1 /* Broadcom NetXtreme-C/E network driver. 2 * 3 * Copyright (c) 2017 Broadcom Limited 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation. 8 */ 9 10 #include <linux/pci.h> 11 #include <linux/netdevice.h> 12 #include "bnxt_hsi.h" 13 #include "bnxt.h" 14 #include "bnxt_vfr.h" 15 #include "bnxt_devlink.h" 16 17 static const struct devlink_ops bnxt_dl_ops = { 18 #ifdef CONFIG_BNXT_SRIOV 19 .eswitch_mode_set = bnxt_dl_eswitch_mode_set, 20 .eswitch_mode_get = bnxt_dl_eswitch_mode_get, 21 #endif /* CONFIG_BNXT_SRIOV */ 22 }; 23 24 enum bnxt_dl_param_id { 25 BNXT_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, 26 BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, 27 }; 28 29 static const struct bnxt_dl_nvm_param nvm_params[] = { 30 {DEVLINK_PARAM_GENERIC_ID_ENABLE_SRIOV, NVM_OFF_ENABLE_SRIOV, 31 BNXT_NVM_SHARED_CFG, 1}, 32 {DEVLINK_PARAM_GENERIC_ID_IGNORE_ARI, NVM_OFF_IGNORE_ARI, 33 BNXT_NVM_SHARED_CFG, 1}, 34 {DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX, 35 NVM_OFF_MSIX_VEC_PER_PF_MAX, BNXT_NVM_SHARED_CFG, 10}, 36 {DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN, 37 NVM_OFF_MSIX_VEC_PER_PF_MIN, BNXT_NVM_SHARED_CFG, 7}, 38 {BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, NVM_OFF_DIS_GRE_VER_CHECK, 39 BNXT_NVM_SHARED_CFG, 1}, 40 }; 41 42 static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg, 43 int msg_len, union devlink_param_value *val) 44 { 45 struct hwrm_nvm_get_variable_input *req = msg; 46 void *data_addr = NULL, *buf = NULL; 47 struct bnxt_dl_nvm_param nvm_param; 48 int bytesize, idx = 0, rc, i; 49 dma_addr_t data_dma_addr; 50 51 /* Get/Set NVM CFG parameter is supported only on PFs */ 52 if (BNXT_VF(bp)) 53 return -EPERM; 54 55 for (i = 0; i < ARRAY_SIZE(nvm_params); i++) { 56 if (nvm_params[i].id == param_id) { 57 nvm_param = nvm_params[i]; 58 break; 59 } 60 } 61 62 if (i == ARRAY_SIZE(nvm_params)) 63 return -EOPNOTSUPP; 64 65 if (nvm_param.dir_type == BNXT_NVM_PORT_CFG) 66 idx = bp->pf.port_id; 67 else if (nvm_param.dir_type == BNXT_NVM_FUNC_CFG) 68 idx = bp->pf.fw_fid - BNXT_FIRST_PF_FID; 69 70 bytesize = roundup(nvm_param.num_bits, BITS_PER_BYTE) / BITS_PER_BYTE; 71 switch (bytesize) { 72 case 1: 73 if (nvm_param.num_bits == 1) 74 buf = &val->vbool; 75 else 76 buf = &val->vu8; 77 break; 78 case 2: 79 buf = &val->vu16; 80 break; 81 case 4: 82 buf = &val->vu32; 83 break; 84 default: 85 return -EFAULT; 86 } 87 88 data_addr = dma_alloc_coherent(&bp->pdev->dev, bytesize, 89 &data_dma_addr, GFP_KERNEL); 90 if (!data_addr) 91 return -ENOMEM; 92 93 req->dest_data_addr = cpu_to_le64(data_dma_addr); 94 req->data_len = cpu_to_le16(nvm_param.num_bits); 95 req->option_num = cpu_to_le16(nvm_param.offset); 96 req->index_0 = cpu_to_le16(idx); 97 if (idx) 98 req->dimensions = cpu_to_le16(1); 99 100 if (req->req_type == cpu_to_le16(HWRM_NVM_SET_VARIABLE)) 101 memcpy(data_addr, buf, bytesize); 102 103 rc = hwrm_send_message(bp, msg, msg_len, HWRM_CMD_TIMEOUT); 104 if (!rc && req->req_type == cpu_to_le16(HWRM_NVM_GET_VARIABLE)) 105 memcpy(buf, data_addr, bytesize); 106 107 dma_free_coherent(&bp->pdev->dev, bytesize, data_addr, data_dma_addr); 108 if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) { 109 netdev_err(bp->dev, "PF does not have admin privileges to modify NVM config\n"); 110 return -EACCES; 111 } else if (rc) { 112 return -EIO; 113 } 114 return 0; 115 } 116 117 static int bnxt_dl_nvm_param_get(struct devlink *dl, u32 id, 118 struct devlink_param_gset_ctx *ctx) 119 { 120 struct hwrm_nvm_get_variable_input req = {0}; 121 struct bnxt *bp = bnxt_get_bp_from_dl(dl); 122 int rc; 123 124 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1); 125 rc = bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val); 126 if (!rc) 127 if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK) 128 ctx->val.vbool = !ctx->val.vbool; 129 130 return rc; 131 } 132 133 static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id, 134 struct devlink_param_gset_ctx *ctx) 135 { 136 struct hwrm_nvm_set_variable_input req = {0}; 137 struct bnxt *bp = bnxt_get_bp_from_dl(dl); 138 139 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_SET_VARIABLE, -1, -1); 140 141 if (id == BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK) 142 ctx->val.vbool = !ctx->val.vbool; 143 144 return bnxt_hwrm_nvm_req(bp, id, &req, sizeof(req), &ctx->val); 145 } 146 147 static int bnxt_dl_msix_validate(struct devlink *dl, u32 id, 148 union devlink_param_value val, 149 struct netlink_ext_ack *extack) 150 { 151 int max_val = -1; 152 153 if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX) 154 max_val = BNXT_MSIX_VEC_MAX; 155 156 if (id == DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN) 157 max_val = BNXT_MSIX_VEC_MIN_MAX; 158 159 if (val.vu32 > max_val) { 160 NL_SET_ERR_MSG_MOD(extack, "MSIX value is exceeding the range"); 161 return -EINVAL; 162 } 163 164 return 0; 165 } 166 167 static const struct devlink_param bnxt_dl_params[] = { 168 DEVLINK_PARAM_GENERIC(ENABLE_SRIOV, 169 BIT(DEVLINK_PARAM_CMODE_PERMANENT), 170 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set, 171 NULL), 172 DEVLINK_PARAM_GENERIC(IGNORE_ARI, 173 BIT(DEVLINK_PARAM_CMODE_PERMANENT), 174 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set, 175 NULL), 176 DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MAX, 177 BIT(DEVLINK_PARAM_CMODE_PERMANENT), 178 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set, 179 bnxt_dl_msix_validate), 180 DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MIN, 181 BIT(DEVLINK_PARAM_CMODE_PERMANENT), 182 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set, 183 bnxt_dl_msix_validate), 184 DEVLINK_PARAM_DRIVER(BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, 185 "gre_ver_check", DEVLINK_PARAM_TYPE_BOOL, 186 BIT(DEVLINK_PARAM_CMODE_PERMANENT), 187 bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set, 188 NULL), 189 }; 190 191 static const struct devlink_param bnxt_dl_port_params[] = { 192 }; 193 194 int bnxt_dl_register(struct bnxt *bp) 195 { 196 struct devlink *dl; 197 int rc; 198 199 if (bp->hwrm_spec_code < 0x10600) { 200 netdev_warn(bp->dev, "Firmware does not support NVM params"); 201 return -ENOTSUPP; 202 } 203 204 dl = devlink_alloc(&bnxt_dl_ops, sizeof(struct bnxt_dl)); 205 if (!dl) { 206 netdev_warn(bp->dev, "devlink_alloc failed"); 207 return -ENOMEM; 208 } 209 210 bnxt_link_bp_to_dl(bp, dl); 211 212 /* Add switchdev eswitch mode setting, if SRIOV supported */ 213 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV) && 214 bp->hwrm_spec_code > 0x10803) 215 bp->eswitch_mode = DEVLINK_ESWITCH_MODE_LEGACY; 216 217 rc = devlink_register(dl, &bp->pdev->dev); 218 if (rc) { 219 netdev_warn(bp->dev, "devlink_register failed. rc=%d", rc); 220 goto err_dl_free; 221 } 222 223 rc = devlink_params_register(dl, bnxt_dl_params, 224 ARRAY_SIZE(bnxt_dl_params)); 225 if (rc) { 226 netdev_warn(bp->dev, "devlink_params_register failed. rc=%d", 227 rc); 228 goto err_dl_unreg; 229 } 230 231 rc = devlink_port_register(dl, &bp->dl_port, bp->pf.port_id); 232 if (rc) { 233 netdev_err(bp->dev, "devlink_port_register failed"); 234 goto err_dl_param_unreg; 235 } 236 devlink_port_type_eth_set(&bp->dl_port, bp->dev); 237 238 rc = devlink_port_params_register(&bp->dl_port, bnxt_dl_port_params, 239 ARRAY_SIZE(bnxt_dl_port_params)); 240 if (rc) { 241 netdev_err(bp->dev, "devlink_port_params_register failed"); 242 goto err_dl_port_unreg; 243 } 244 245 devlink_params_publish(dl); 246 247 return 0; 248 249 err_dl_port_unreg: 250 devlink_port_unregister(&bp->dl_port); 251 err_dl_param_unreg: 252 devlink_params_unregister(dl, bnxt_dl_params, 253 ARRAY_SIZE(bnxt_dl_params)); 254 err_dl_unreg: 255 devlink_unregister(dl); 256 err_dl_free: 257 bnxt_link_bp_to_dl(bp, NULL); 258 devlink_free(dl); 259 return rc; 260 } 261 262 void bnxt_dl_unregister(struct bnxt *bp) 263 { 264 struct devlink *dl = bp->dl; 265 266 if (!dl) 267 return; 268 269 devlink_port_params_unregister(&bp->dl_port, bnxt_dl_port_params, 270 ARRAY_SIZE(bnxt_dl_port_params)); 271 devlink_port_unregister(&bp->dl_port); 272 devlink_params_unregister(dl, bnxt_dl_params, 273 ARRAY_SIZE(bnxt_dl_params)); 274 devlink_unregister(dl); 275 devlink_free(dl); 276 } 277