1 /* bnx2x_stats.c: Broadcom Everest network driver. 2 * 3 * Copyright (c) 2007-2013 Broadcom Corporation 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation. 8 * 9 * Maintained by: Eilon Greenstein <eilong@broadcom.com> 10 * Written by: Eliezer Tamir 11 * Based on code from Michael Chan's bnx2 driver 12 * UDP CSUM errata workaround by Arik Gendelman 13 * Slowpath and fastpath rework by Vladislav Zolotarov 14 * Statistics and Link management by Yitchak Gertner 15 * 16 */ 17 18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 19 20 #include "bnx2x_stats.h" 21 #include "bnx2x_cmn.h" 22 #include "bnx2x_sriov.h" 23 24 /* Statistics */ 25 26 /* 27 * General service functions 28 */ 29 30 static inline long bnx2x_hilo(u32 *hiref) 31 { 32 u32 lo = *(hiref + 1); 33 #if (BITS_PER_LONG == 64) 34 u32 hi = *hiref; 35 36 return HILO_U64(hi, lo); 37 #else 38 return lo; 39 #endif 40 } 41 42 static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp) 43 { 44 u16 res = 0; 45 46 /* 'newest' convention - shmem2 cotains the size of the port stats */ 47 if (SHMEM2_HAS(bp, sizeof_port_stats)) { 48 u32 size = SHMEM2_RD(bp, sizeof_port_stats); 49 if (size) 50 res = size; 51 52 /* prevent newer BC from causing buffer overflow */ 53 if (res > sizeof(struct host_port_stats)) 54 res = sizeof(struct host_port_stats); 55 } 56 57 /* Older convention - all BCs support the port stats' fields up until 58 * the 'not_used' field 59 */ 60 if (!res) { 61 res = offsetof(struct host_port_stats, not_used) + 4; 62 63 /* if PFC stats are supported by the MFW, DMA them as well */ 64 if (bp->flags & BC_SUPPORTS_PFC_STATS) { 65 res += offsetof(struct host_port_stats, 66 pfc_frames_rx_lo) - 67 offsetof(struct host_port_stats, 68 pfc_frames_tx_hi) + 4 ; 69 } 70 } 71 72 res >>= 2; 73 74 WARN_ON(res > 2 * DMAE_LEN32_RD_MAX); 75 return res; 76 } 77 78 /* 79 * Init service functions 80 */ 81 82 static void bnx2x_dp_stats(struct bnx2x *bp) 83 { 84 int i; 85 86 DP(BNX2X_MSG_STATS, "dumping stats:\n" 87 "fw_stats_req\n" 88 " hdr\n" 89 " cmd_num %d\n" 90 " reserved0 %d\n" 91 " drv_stats_counter %d\n" 92 " reserved1 %d\n" 93 " stats_counters_addrs %x %x\n", 94 bp->fw_stats_req->hdr.cmd_num, 95 bp->fw_stats_req->hdr.reserved0, 96 bp->fw_stats_req->hdr.drv_stats_counter, 97 bp->fw_stats_req->hdr.reserved1, 98 bp->fw_stats_req->hdr.stats_counters_addrs.hi, 99 bp->fw_stats_req->hdr.stats_counters_addrs.lo); 100 101 for (i = 0; i < bp->fw_stats_req->hdr.cmd_num; i++) { 102 DP(BNX2X_MSG_STATS, 103 "query[%d]\n" 104 " kind %d\n" 105 " index %d\n" 106 " funcID %d\n" 107 " reserved %d\n" 108 " address %x %x\n", 109 i, bp->fw_stats_req->query[i].kind, 110 bp->fw_stats_req->query[i].index, 111 bp->fw_stats_req->query[i].funcID, 112 bp->fw_stats_req->query[i].reserved, 113 bp->fw_stats_req->query[i].address.hi, 114 bp->fw_stats_req->query[i].address.lo); 115 } 116 } 117 118 /* Post the next statistics ramrod. Protect it with the spin in 119 * order to ensure the strict order between statistics ramrods 120 * (each ramrod has a sequence number passed in a 121 * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be 122 * sent in order). 123 */ 124 static void bnx2x_storm_stats_post(struct bnx2x *bp) 125 { 126 if (!bp->stats_pending) { 127 int rc; 128 129 spin_lock_bh(&bp->stats_lock); 130 131 if (bp->stats_pending) { 132 spin_unlock_bh(&bp->stats_lock); 133 return; 134 } 135 136 bp->fw_stats_req->hdr.drv_stats_counter = 137 cpu_to_le16(bp->stats_counter++); 138 139 DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n", 140 bp->fw_stats_req->hdr.drv_stats_counter); 141 142 /* adjust the ramrod to include VF queues statistics */ 143 bnx2x_iov_adjust_stats_req(bp); 144 bnx2x_dp_stats(bp); 145 146 /* send FW stats ramrod */ 147 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0, 148 U64_HI(bp->fw_stats_req_mapping), 149 U64_LO(bp->fw_stats_req_mapping), 150 NONE_CONNECTION_TYPE); 151 if (rc == 0) 152 bp->stats_pending = 1; 153 154 spin_unlock_bh(&bp->stats_lock); 155 } 156 } 157 158 static void bnx2x_hw_stats_post(struct bnx2x *bp) 159 { 160 struct dmae_command *dmae = &bp->stats_dmae; 161 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 162 163 *stats_comp = DMAE_COMP_VAL; 164 if (CHIP_REV_IS_SLOW(bp)) 165 return; 166 167 /* Update MCP's statistics if possible */ 168 if (bp->func_stx) 169 memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats, 170 sizeof(bp->func_stats)); 171 172 /* loader */ 173 if (bp->executer_idx) { 174 int loader_idx = PMF_DMAE_C(bp); 175 u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, 176 true, DMAE_COMP_GRC); 177 opcode = bnx2x_dmae_opcode_clr_src_reset(opcode); 178 179 memset(dmae, 0, sizeof(struct dmae_command)); 180 dmae->opcode = opcode; 181 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0])); 182 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0])); 183 dmae->dst_addr_lo = (DMAE_REG_CMD_MEM + 184 sizeof(struct dmae_command) * 185 (loader_idx + 1)) >> 2; 186 dmae->dst_addr_hi = 0; 187 dmae->len = sizeof(struct dmae_command) >> 2; 188 if (CHIP_IS_E1(bp)) 189 dmae->len--; 190 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2; 191 dmae->comp_addr_hi = 0; 192 dmae->comp_val = 1; 193 194 *stats_comp = 0; 195 bnx2x_post_dmae(bp, dmae, loader_idx); 196 197 } else if (bp->func_stx) { 198 *stats_comp = 0; 199 bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp)); 200 } 201 } 202 203 static int bnx2x_stats_comp(struct bnx2x *bp) 204 { 205 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 206 int cnt = 10; 207 208 might_sleep(); 209 while (*stats_comp != DMAE_COMP_VAL) { 210 if (!cnt) { 211 BNX2X_ERR("timeout waiting for stats finished\n"); 212 break; 213 } 214 cnt--; 215 usleep_range(1000, 2000); 216 } 217 return 1; 218 } 219 220 /* 221 * Statistics service functions 222 */ 223 224 /* should be called under stats_sema */ 225 static void __bnx2x_stats_pmf_update(struct bnx2x *bp) 226 { 227 struct dmae_command *dmae; 228 u32 opcode; 229 int loader_idx = PMF_DMAE_C(bp); 230 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 231 232 /* sanity */ 233 if (!bp->port.pmf || !bp->port.port_stx) { 234 BNX2X_ERR("BUG!\n"); 235 return; 236 } 237 238 bp->executer_idx = 0; 239 240 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0); 241 242 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 243 dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); 244 dmae->src_addr_lo = bp->port.port_stx >> 2; 245 dmae->src_addr_hi = 0; 246 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); 247 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); 248 dmae->len = DMAE_LEN32_RD_MAX; 249 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 250 dmae->comp_addr_hi = 0; 251 dmae->comp_val = 1; 252 253 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 254 dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 255 dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX; 256 dmae->src_addr_hi = 0; 257 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) + 258 DMAE_LEN32_RD_MAX * 4); 259 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) + 260 DMAE_LEN32_RD_MAX * 4); 261 dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX; 262 263 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); 264 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); 265 dmae->comp_val = DMAE_COMP_VAL; 266 267 *stats_comp = 0; 268 bnx2x_hw_stats_post(bp); 269 bnx2x_stats_comp(bp); 270 } 271 272 static void bnx2x_port_stats_init(struct bnx2x *bp) 273 { 274 struct dmae_command *dmae; 275 int port = BP_PORT(bp); 276 u32 opcode; 277 int loader_idx = PMF_DMAE_C(bp); 278 u32 mac_addr; 279 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 280 281 /* sanity */ 282 if (!bp->link_vars.link_up || !bp->port.pmf) { 283 BNX2X_ERR("BUG!\n"); 284 return; 285 } 286 287 bp->executer_idx = 0; 288 289 /* MCP */ 290 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, 291 true, DMAE_COMP_GRC); 292 293 if (bp->port.port_stx) { 294 295 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 296 dmae->opcode = opcode; 297 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); 298 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); 299 dmae->dst_addr_lo = bp->port.port_stx >> 2; 300 dmae->dst_addr_hi = 0; 301 dmae->len = bnx2x_get_port_stats_dma_len(bp); 302 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 303 dmae->comp_addr_hi = 0; 304 dmae->comp_val = 1; 305 } 306 307 if (bp->func_stx) { 308 309 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 310 dmae->opcode = opcode; 311 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); 312 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); 313 dmae->dst_addr_lo = bp->func_stx >> 2; 314 dmae->dst_addr_hi = 0; 315 dmae->len = sizeof(struct host_func_stats) >> 2; 316 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 317 dmae->comp_addr_hi = 0; 318 dmae->comp_val = 1; 319 } 320 321 /* MAC */ 322 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, 323 true, DMAE_COMP_GRC); 324 325 /* EMAC is special */ 326 if (bp->link_vars.mac_type == MAC_TYPE_EMAC) { 327 mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); 328 329 /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/ 330 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 331 dmae->opcode = opcode; 332 dmae->src_addr_lo = (mac_addr + 333 EMAC_REG_EMAC_RX_STAT_AC) >> 2; 334 dmae->src_addr_hi = 0; 335 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); 336 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); 337 dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT; 338 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 339 dmae->comp_addr_hi = 0; 340 dmae->comp_val = 1; 341 342 /* EMAC_REG_EMAC_RX_STAT_AC_28 */ 343 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 344 dmae->opcode = opcode; 345 dmae->src_addr_lo = (mac_addr + 346 EMAC_REG_EMAC_RX_STAT_AC_28) >> 2; 347 dmae->src_addr_hi = 0; 348 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) + 349 offsetof(struct emac_stats, rx_stat_falsecarriererrors)); 350 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) + 351 offsetof(struct emac_stats, rx_stat_falsecarriererrors)); 352 dmae->len = 1; 353 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 354 dmae->comp_addr_hi = 0; 355 dmae->comp_val = 1; 356 357 /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/ 358 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 359 dmae->opcode = opcode; 360 dmae->src_addr_lo = (mac_addr + 361 EMAC_REG_EMAC_TX_STAT_AC) >> 2; 362 dmae->src_addr_hi = 0; 363 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) + 364 offsetof(struct emac_stats, tx_stat_ifhcoutoctets)); 365 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) + 366 offsetof(struct emac_stats, tx_stat_ifhcoutoctets)); 367 dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT; 368 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 369 dmae->comp_addr_hi = 0; 370 dmae->comp_val = 1; 371 } else { 372 u32 tx_src_addr_lo, rx_src_addr_lo; 373 u16 rx_len, tx_len; 374 375 /* configure the params according to MAC type */ 376 switch (bp->link_vars.mac_type) { 377 case MAC_TYPE_BMAC: 378 mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM : 379 NIG_REG_INGRESS_BMAC0_MEM); 380 381 /* BIGMAC_REGISTER_TX_STAT_GTPKT .. 382 BIGMAC_REGISTER_TX_STAT_GTBYT */ 383 if (CHIP_IS_E1x(bp)) { 384 tx_src_addr_lo = (mac_addr + 385 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; 386 tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT - 387 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2; 388 rx_src_addr_lo = (mac_addr + 389 BIGMAC_REGISTER_RX_STAT_GR64) >> 2; 390 rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - 391 BIGMAC_REGISTER_RX_STAT_GR64) >> 2; 392 } else { 393 tx_src_addr_lo = (mac_addr + 394 BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; 395 tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT - 396 BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2; 397 rx_src_addr_lo = (mac_addr + 398 BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; 399 rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ - 400 BIGMAC2_REGISTER_RX_STAT_GR64) >> 2; 401 } 402 break; 403 404 case MAC_TYPE_UMAC: /* handled by MSTAT */ 405 case MAC_TYPE_XMAC: /* handled by MSTAT */ 406 default: 407 mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0; 408 tx_src_addr_lo = (mac_addr + 409 MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2; 410 rx_src_addr_lo = (mac_addr + 411 MSTAT_REG_RX_STAT_GR64_LO) >> 2; 412 tx_len = sizeof(bp->slowpath-> 413 mac_stats.mstat_stats.stats_tx) >> 2; 414 rx_len = sizeof(bp->slowpath-> 415 mac_stats.mstat_stats.stats_rx) >> 2; 416 break; 417 } 418 419 /* TX stats */ 420 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 421 dmae->opcode = opcode; 422 dmae->src_addr_lo = tx_src_addr_lo; 423 dmae->src_addr_hi = 0; 424 dmae->len = tx_len; 425 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats)); 426 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats)); 427 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 428 dmae->comp_addr_hi = 0; 429 dmae->comp_val = 1; 430 431 /* RX stats */ 432 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 433 dmae->opcode = opcode; 434 dmae->src_addr_hi = 0; 435 dmae->src_addr_lo = rx_src_addr_lo; 436 dmae->dst_addr_lo = 437 U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2)); 438 dmae->dst_addr_hi = 439 U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2)); 440 dmae->len = rx_len; 441 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 442 dmae->comp_addr_hi = 0; 443 dmae->comp_val = 1; 444 } 445 446 /* NIG */ 447 if (!CHIP_IS_E3(bp)) { 448 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 449 dmae->opcode = opcode; 450 dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 : 451 NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2; 452 dmae->src_addr_hi = 0; 453 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) + 454 offsetof(struct nig_stats, egress_mac_pkt0_lo)); 455 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) + 456 offsetof(struct nig_stats, egress_mac_pkt0_lo)); 457 dmae->len = (2*sizeof(u32)) >> 2; 458 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 459 dmae->comp_addr_hi = 0; 460 dmae->comp_val = 1; 461 462 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 463 dmae->opcode = opcode; 464 dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : 465 NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; 466 dmae->src_addr_hi = 0; 467 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) + 468 offsetof(struct nig_stats, egress_mac_pkt1_lo)); 469 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) + 470 offsetof(struct nig_stats, egress_mac_pkt1_lo)); 471 dmae->len = (2*sizeof(u32)) >> 2; 472 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 473 dmae->comp_addr_hi = 0; 474 dmae->comp_val = 1; 475 } 476 477 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 478 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, 479 true, DMAE_COMP_PCI); 480 dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD : 481 NIG_REG_STAT0_BRB_DISCARD) >> 2; 482 dmae->src_addr_hi = 0; 483 dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats)); 484 dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats)); 485 dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2; 486 487 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); 488 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); 489 dmae->comp_val = DMAE_COMP_VAL; 490 491 *stats_comp = 0; 492 } 493 494 static void bnx2x_func_stats_init(struct bnx2x *bp) 495 { 496 struct dmae_command *dmae = &bp->stats_dmae; 497 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 498 499 /* sanity */ 500 if (!bp->func_stx) { 501 BNX2X_ERR("BUG!\n"); 502 return; 503 } 504 505 bp->executer_idx = 0; 506 memset(dmae, 0, sizeof(struct dmae_command)); 507 508 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, 509 true, DMAE_COMP_PCI); 510 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); 511 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); 512 dmae->dst_addr_lo = bp->func_stx >> 2; 513 dmae->dst_addr_hi = 0; 514 dmae->len = sizeof(struct host_func_stats) >> 2; 515 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); 516 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); 517 dmae->comp_val = DMAE_COMP_VAL; 518 519 *stats_comp = 0; 520 } 521 522 /* should be called under stats_sema */ 523 static void __bnx2x_stats_start(struct bnx2x *bp) 524 { 525 /* vfs travel through here as part of the statistics FSM, but no action 526 * is required 527 */ 528 if (IS_VF(bp)) 529 return; 530 531 if (bp->port.pmf) 532 bnx2x_port_stats_init(bp); 533 534 else if (bp->func_stx) 535 bnx2x_func_stats_init(bp); 536 537 bnx2x_hw_stats_post(bp); 538 bnx2x_storm_stats_post(bp); 539 540 bp->stats_started = true; 541 } 542 543 static void bnx2x_stats_start(struct bnx2x *bp) 544 { 545 if (down_timeout(&bp->stats_sema, HZ/10)) 546 BNX2X_ERR("Unable to acquire stats lock\n"); 547 __bnx2x_stats_start(bp); 548 up(&bp->stats_sema); 549 } 550 551 static void bnx2x_stats_pmf_start(struct bnx2x *bp) 552 { 553 if (down_timeout(&bp->stats_sema, HZ/10)) 554 BNX2X_ERR("Unable to acquire stats lock\n"); 555 bnx2x_stats_comp(bp); 556 __bnx2x_stats_pmf_update(bp); 557 __bnx2x_stats_start(bp); 558 up(&bp->stats_sema); 559 } 560 561 static void bnx2x_stats_pmf_update(struct bnx2x *bp) 562 { 563 if (down_timeout(&bp->stats_sema, HZ/10)) 564 BNX2X_ERR("Unable to acquire stats lock\n"); 565 __bnx2x_stats_pmf_update(bp); 566 up(&bp->stats_sema); 567 } 568 569 static void bnx2x_stats_restart(struct bnx2x *bp) 570 { 571 /* vfs travel through here as part of the statistics FSM, but no action 572 * is required 573 */ 574 if (IS_VF(bp)) 575 return; 576 if (down_timeout(&bp->stats_sema, HZ/10)) 577 BNX2X_ERR("Unable to acquire stats lock\n"); 578 bnx2x_stats_comp(bp); 579 __bnx2x_stats_start(bp); 580 up(&bp->stats_sema); 581 } 582 583 static void bnx2x_bmac_stats_update(struct bnx2x *bp) 584 { 585 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); 586 struct bnx2x_eth_stats *estats = &bp->eth_stats; 587 struct { 588 u32 lo; 589 u32 hi; 590 } diff; 591 592 if (CHIP_IS_E1x(bp)) { 593 struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats); 594 595 /* the macros below will use "bmac1_stats" type */ 596 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); 597 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); 598 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); 599 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); 600 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); 601 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); 602 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); 603 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); 604 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); 605 606 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); 607 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); 608 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); 609 UPDATE_STAT64(tx_stat_gt127, 610 tx_stat_etherstatspkts65octetsto127octets); 611 UPDATE_STAT64(tx_stat_gt255, 612 tx_stat_etherstatspkts128octetsto255octets); 613 UPDATE_STAT64(tx_stat_gt511, 614 tx_stat_etherstatspkts256octetsto511octets); 615 UPDATE_STAT64(tx_stat_gt1023, 616 tx_stat_etherstatspkts512octetsto1023octets); 617 UPDATE_STAT64(tx_stat_gt1518, 618 tx_stat_etherstatspkts1024octetsto1522octets); 619 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); 620 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); 621 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); 622 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); 623 UPDATE_STAT64(tx_stat_gterr, 624 tx_stat_dot3statsinternalmactransmiterrors); 625 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); 626 627 } else { 628 struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats); 629 630 /* the macros below will use "bmac2_stats" type */ 631 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); 632 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); 633 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); 634 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); 635 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); 636 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); 637 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); 638 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); 639 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); 640 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); 641 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); 642 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); 643 UPDATE_STAT64(tx_stat_gt127, 644 tx_stat_etherstatspkts65octetsto127octets); 645 UPDATE_STAT64(tx_stat_gt255, 646 tx_stat_etherstatspkts128octetsto255octets); 647 UPDATE_STAT64(tx_stat_gt511, 648 tx_stat_etherstatspkts256octetsto511octets); 649 UPDATE_STAT64(tx_stat_gt1023, 650 tx_stat_etherstatspkts512octetsto1023octets); 651 UPDATE_STAT64(tx_stat_gt1518, 652 tx_stat_etherstatspkts1024octetsto1522octets); 653 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); 654 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); 655 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); 656 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); 657 UPDATE_STAT64(tx_stat_gterr, 658 tx_stat_dot3statsinternalmactransmiterrors); 659 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); 660 661 /* collect PFC stats */ 662 pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi; 663 pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo; 664 665 pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi; 666 pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo; 667 } 668 669 estats->pause_frames_received_hi = 670 pstats->mac_stx[1].rx_stat_mac_xpf_hi; 671 estats->pause_frames_received_lo = 672 pstats->mac_stx[1].rx_stat_mac_xpf_lo; 673 674 estats->pause_frames_sent_hi = 675 pstats->mac_stx[1].tx_stat_outxoffsent_hi; 676 estats->pause_frames_sent_lo = 677 pstats->mac_stx[1].tx_stat_outxoffsent_lo; 678 679 estats->pfc_frames_received_hi = 680 pstats->pfc_frames_rx_hi; 681 estats->pfc_frames_received_lo = 682 pstats->pfc_frames_rx_lo; 683 estats->pfc_frames_sent_hi = 684 pstats->pfc_frames_tx_hi; 685 estats->pfc_frames_sent_lo = 686 pstats->pfc_frames_tx_lo; 687 } 688 689 static void bnx2x_mstat_stats_update(struct bnx2x *bp) 690 { 691 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); 692 struct bnx2x_eth_stats *estats = &bp->eth_stats; 693 694 struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats); 695 696 ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets); 697 ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors); 698 ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts); 699 ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong); 700 ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments); 701 ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived); 702 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered); 703 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf); 704 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent); 705 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone); 706 707 /* collect pfc stats */ 708 ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi, 709 pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo); 710 ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi, 711 pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo); 712 713 ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets); 714 ADD_STAT64(stats_tx.tx_gt127, 715 tx_stat_etherstatspkts65octetsto127octets); 716 ADD_STAT64(stats_tx.tx_gt255, 717 tx_stat_etherstatspkts128octetsto255octets); 718 ADD_STAT64(stats_tx.tx_gt511, 719 tx_stat_etherstatspkts256octetsto511octets); 720 ADD_STAT64(stats_tx.tx_gt1023, 721 tx_stat_etherstatspkts512octetsto1023octets); 722 ADD_STAT64(stats_tx.tx_gt1518, 723 tx_stat_etherstatspkts1024octetsto1522octets); 724 ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047); 725 726 ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095); 727 ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216); 728 ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383); 729 730 ADD_STAT64(stats_tx.tx_gterr, 731 tx_stat_dot3statsinternalmactransmiterrors); 732 ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl); 733 734 estats->etherstatspkts1024octetsto1522octets_hi = 735 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi; 736 estats->etherstatspkts1024octetsto1522octets_lo = 737 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo; 738 739 estats->etherstatspktsover1522octets_hi = 740 pstats->mac_stx[1].tx_stat_mac_2047_hi; 741 estats->etherstatspktsover1522octets_lo = 742 pstats->mac_stx[1].tx_stat_mac_2047_lo; 743 744 ADD_64(estats->etherstatspktsover1522octets_hi, 745 pstats->mac_stx[1].tx_stat_mac_4095_hi, 746 estats->etherstatspktsover1522octets_lo, 747 pstats->mac_stx[1].tx_stat_mac_4095_lo); 748 749 ADD_64(estats->etherstatspktsover1522octets_hi, 750 pstats->mac_stx[1].tx_stat_mac_9216_hi, 751 estats->etherstatspktsover1522octets_lo, 752 pstats->mac_stx[1].tx_stat_mac_9216_lo); 753 754 ADD_64(estats->etherstatspktsover1522octets_hi, 755 pstats->mac_stx[1].tx_stat_mac_16383_hi, 756 estats->etherstatspktsover1522octets_lo, 757 pstats->mac_stx[1].tx_stat_mac_16383_lo); 758 759 estats->pause_frames_received_hi = 760 pstats->mac_stx[1].rx_stat_mac_xpf_hi; 761 estats->pause_frames_received_lo = 762 pstats->mac_stx[1].rx_stat_mac_xpf_lo; 763 764 estats->pause_frames_sent_hi = 765 pstats->mac_stx[1].tx_stat_outxoffsent_hi; 766 estats->pause_frames_sent_lo = 767 pstats->mac_stx[1].tx_stat_outxoffsent_lo; 768 769 estats->pfc_frames_received_hi = 770 pstats->pfc_frames_rx_hi; 771 estats->pfc_frames_received_lo = 772 pstats->pfc_frames_rx_lo; 773 estats->pfc_frames_sent_hi = 774 pstats->pfc_frames_tx_hi; 775 estats->pfc_frames_sent_lo = 776 pstats->pfc_frames_tx_lo; 777 } 778 779 static void bnx2x_emac_stats_update(struct bnx2x *bp) 780 { 781 struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats); 782 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); 783 struct bnx2x_eth_stats *estats = &bp->eth_stats; 784 785 UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets); 786 UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets); 787 UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors); 788 UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors); 789 UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors); 790 UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors); 791 UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts); 792 UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong); 793 UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments); 794 UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers); 795 UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived); 796 UPDATE_EXTEND_STAT(rx_stat_xoffstateentered); 797 UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived); 798 UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived); 799 UPDATE_EXTEND_STAT(tx_stat_outxonsent); 800 UPDATE_EXTEND_STAT(tx_stat_outxoffsent); 801 UPDATE_EXTEND_STAT(tx_stat_flowcontroldone); 802 UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions); 803 UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes); 804 UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes); 805 UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions); 806 UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions); 807 UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions); 808 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets); 809 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets); 810 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets); 811 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets); 812 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets); 813 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets); 814 UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets); 815 UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors); 816 817 estats->pause_frames_received_hi = 818 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi; 819 estats->pause_frames_received_lo = 820 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; 821 ADD_64(estats->pause_frames_received_hi, 822 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, 823 estats->pause_frames_received_lo, 824 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); 825 826 estats->pause_frames_sent_hi = 827 pstats->mac_stx[1].tx_stat_outxonsent_hi; 828 estats->pause_frames_sent_lo = 829 pstats->mac_stx[1].tx_stat_outxonsent_lo; 830 ADD_64(estats->pause_frames_sent_hi, 831 pstats->mac_stx[1].tx_stat_outxoffsent_hi, 832 estats->pause_frames_sent_lo, 833 pstats->mac_stx[1].tx_stat_outxoffsent_lo); 834 } 835 836 static int bnx2x_hw_stats_update(struct bnx2x *bp) 837 { 838 struct nig_stats *new = bnx2x_sp(bp, nig_stats); 839 struct nig_stats *old = &(bp->port.old_nig_stats); 840 struct host_port_stats *pstats = bnx2x_sp(bp, port_stats); 841 struct bnx2x_eth_stats *estats = &bp->eth_stats; 842 struct { 843 u32 lo; 844 u32 hi; 845 } diff; 846 847 switch (bp->link_vars.mac_type) { 848 case MAC_TYPE_BMAC: 849 bnx2x_bmac_stats_update(bp); 850 break; 851 852 case MAC_TYPE_EMAC: 853 bnx2x_emac_stats_update(bp); 854 break; 855 856 case MAC_TYPE_UMAC: 857 case MAC_TYPE_XMAC: 858 bnx2x_mstat_stats_update(bp); 859 break; 860 861 case MAC_TYPE_NONE: /* unreached */ 862 DP(BNX2X_MSG_STATS, 863 "stats updated by DMAE but no MAC active\n"); 864 return -1; 865 866 default: /* unreached */ 867 BNX2X_ERR("Unknown MAC type\n"); 868 } 869 870 ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo, 871 new->brb_discard - old->brb_discard); 872 ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo, 873 new->brb_truncate - old->brb_truncate); 874 875 if (!CHIP_IS_E3(bp)) { 876 UPDATE_STAT64_NIG(egress_mac_pkt0, 877 etherstatspkts1024octetsto1522octets); 878 UPDATE_STAT64_NIG(egress_mac_pkt1, 879 etherstatspktsover1522octets); 880 } 881 882 memcpy(old, new, sizeof(struct nig_stats)); 883 884 memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]), 885 sizeof(struct mac_stx)); 886 estats->brb_drop_hi = pstats->brb_drop_hi; 887 estats->brb_drop_lo = pstats->brb_drop_lo; 888 889 pstats->host_port_stats_counter++; 890 891 if (CHIP_IS_E3(bp)) { 892 u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1 893 : MISC_REG_CPMU_LP_SM_ENT_CNT_P0; 894 estats->eee_tx_lpi += REG_RD(bp, lpi_reg); 895 } 896 897 if (!BP_NOMCP(bp)) { 898 u32 nig_timer_max = 899 SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer); 900 if (nig_timer_max != estats->nig_timer_max) { 901 estats->nig_timer_max = nig_timer_max; 902 BNX2X_ERR("NIG timer max (%u)\n", 903 estats->nig_timer_max); 904 } 905 } 906 907 return 0; 908 } 909 910 static int bnx2x_storm_stats_validate_counters(struct bnx2x *bp) 911 { 912 struct stats_counter *counters = &bp->fw_stats_data->storm_counters; 913 u16 cur_stats_counter; 914 /* Make sure we use the value of the counter 915 * used for sending the last stats ramrod. 916 */ 917 cur_stats_counter = bp->stats_counter - 1; 918 919 /* are storm stats valid? */ 920 if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) { 921 DP(BNX2X_MSG_STATS, 922 "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n", 923 le16_to_cpu(counters->xstats_counter), bp->stats_counter); 924 return -EAGAIN; 925 } 926 927 if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) { 928 DP(BNX2X_MSG_STATS, 929 "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n", 930 le16_to_cpu(counters->ustats_counter), bp->stats_counter); 931 return -EAGAIN; 932 } 933 934 if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) { 935 DP(BNX2X_MSG_STATS, 936 "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n", 937 le16_to_cpu(counters->cstats_counter), bp->stats_counter); 938 return -EAGAIN; 939 } 940 941 if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) { 942 DP(BNX2X_MSG_STATS, 943 "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n", 944 le16_to_cpu(counters->tstats_counter), bp->stats_counter); 945 return -EAGAIN; 946 } 947 return 0; 948 } 949 950 static int bnx2x_storm_stats_update(struct bnx2x *bp) 951 { 952 struct tstorm_per_port_stats *tport = 953 &bp->fw_stats_data->port.tstorm_port_statistics; 954 struct tstorm_per_pf_stats *tfunc = 955 &bp->fw_stats_data->pf.tstorm_pf_statistics; 956 struct host_func_stats *fstats = &bp->func_stats; 957 struct bnx2x_eth_stats *estats = &bp->eth_stats; 958 struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old; 959 int i; 960 961 /* vfs stat counter is managed by pf */ 962 if (IS_PF(bp) && bnx2x_storm_stats_validate_counters(bp)) 963 return -EAGAIN; 964 965 estats->error_bytes_received_hi = 0; 966 estats->error_bytes_received_lo = 0; 967 968 for_each_eth_queue(bp, i) { 969 struct bnx2x_fastpath *fp = &bp->fp[i]; 970 struct tstorm_per_queue_stats *tclient = 971 &bp->fw_stats_data->queue_stats[i]. 972 tstorm_queue_statistics; 973 struct tstorm_per_queue_stats *old_tclient = 974 &bnx2x_fp_stats(bp, fp)->old_tclient; 975 struct ustorm_per_queue_stats *uclient = 976 &bp->fw_stats_data->queue_stats[i]. 977 ustorm_queue_statistics; 978 struct ustorm_per_queue_stats *old_uclient = 979 &bnx2x_fp_stats(bp, fp)->old_uclient; 980 struct xstorm_per_queue_stats *xclient = 981 &bp->fw_stats_data->queue_stats[i]. 982 xstorm_queue_statistics; 983 struct xstorm_per_queue_stats *old_xclient = 984 &bnx2x_fp_stats(bp, fp)->old_xclient; 985 struct bnx2x_eth_q_stats *qstats = 986 &bnx2x_fp_stats(bp, fp)->eth_q_stats; 987 struct bnx2x_eth_q_stats_old *qstats_old = 988 &bnx2x_fp_stats(bp, fp)->eth_q_stats_old; 989 990 u32 diff; 991 992 DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n", 993 i, xclient->ucast_pkts_sent, 994 xclient->bcast_pkts_sent, xclient->mcast_pkts_sent); 995 996 DP(BNX2X_MSG_STATS, "---------------\n"); 997 998 UPDATE_QSTAT(tclient->rcv_bcast_bytes, 999 total_broadcast_bytes_received); 1000 UPDATE_QSTAT(tclient->rcv_mcast_bytes, 1001 total_multicast_bytes_received); 1002 UPDATE_QSTAT(tclient->rcv_ucast_bytes, 1003 total_unicast_bytes_received); 1004 1005 /* 1006 * sum to total_bytes_received all 1007 * unicast/multicast/broadcast 1008 */ 1009 qstats->total_bytes_received_hi = 1010 qstats->total_broadcast_bytes_received_hi; 1011 qstats->total_bytes_received_lo = 1012 qstats->total_broadcast_bytes_received_lo; 1013 1014 ADD_64(qstats->total_bytes_received_hi, 1015 qstats->total_multicast_bytes_received_hi, 1016 qstats->total_bytes_received_lo, 1017 qstats->total_multicast_bytes_received_lo); 1018 1019 ADD_64(qstats->total_bytes_received_hi, 1020 qstats->total_unicast_bytes_received_hi, 1021 qstats->total_bytes_received_lo, 1022 qstats->total_unicast_bytes_received_lo); 1023 1024 qstats->valid_bytes_received_hi = 1025 qstats->total_bytes_received_hi; 1026 qstats->valid_bytes_received_lo = 1027 qstats->total_bytes_received_lo; 1028 1029 UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, 1030 total_unicast_packets_received); 1031 UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, 1032 total_multicast_packets_received); 1033 UPDATE_EXTEND_TSTAT(rcv_bcast_pkts, 1034 total_broadcast_packets_received); 1035 UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard, 1036 etherstatsoverrsizepkts, 32); 1037 UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16); 1038 1039 SUB_EXTEND_USTAT(ucast_no_buff_pkts, 1040 total_unicast_packets_received); 1041 SUB_EXTEND_USTAT(mcast_no_buff_pkts, 1042 total_multicast_packets_received); 1043 SUB_EXTEND_USTAT(bcast_no_buff_pkts, 1044 total_broadcast_packets_received); 1045 UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard); 1046 UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard); 1047 UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard); 1048 1049 UPDATE_QSTAT(xclient->bcast_bytes_sent, 1050 total_broadcast_bytes_transmitted); 1051 UPDATE_QSTAT(xclient->mcast_bytes_sent, 1052 total_multicast_bytes_transmitted); 1053 UPDATE_QSTAT(xclient->ucast_bytes_sent, 1054 total_unicast_bytes_transmitted); 1055 1056 /* 1057 * sum to total_bytes_transmitted all 1058 * unicast/multicast/broadcast 1059 */ 1060 qstats->total_bytes_transmitted_hi = 1061 qstats->total_unicast_bytes_transmitted_hi; 1062 qstats->total_bytes_transmitted_lo = 1063 qstats->total_unicast_bytes_transmitted_lo; 1064 1065 ADD_64(qstats->total_bytes_transmitted_hi, 1066 qstats->total_broadcast_bytes_transmitted_hi, 1067 qstats->total_bytes_transmitted_lo, 1068 qstats->total_broadcast_bytes_transmitted_lo); 1069 1070 ADD_64(qstats->total_bytes_transmitted_hi, 1071 qstats->total_multicast_bytes_transmitted_hi, 1072 qstats->total_bytes_transmitted_lo, 1073 qstats->total_multicast_bytes_transmitted_lo); 1074 1075 UPDATE_EXTEND_XSTAT(ucast_pkts_sent, 1076 total_unicast_packets_transmitted); 1077 UPDATE_EXTEND_XSTAT(mcast_pkts_sent, 1078 total_multicast_packets_transmitted); 1079 UPDATE_EXTEND_XSTAT(bcast_pkts_sent, 1080 total_broadcast_packets_transmitted); 1081 1082 UPDATE_EXTEND_TSTAT(checksum_discard, 1083 total_packets_received_checksum_discarded); 1084 UPDATE_EXTEND_TSTAT(ttl0_discard, 1085 total_packets_received_ttl0_discarded); 1086 1087 UPDATE_EXTEND_XSTAT(error_drop_pkts, 1088 total_transmitted_dropped_packets_error); 1089 1090 /* TPA aggregations completed */ 1091 UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations); 1092 /* Number of network frames aggregated by TPA */ 1093 UPDATE_EXTEND_E_USTAT(coalesced_pkts, 1094 total_tpa_aggregated_frames); 1095 /* Total number of bytes in completed TPA aggregations */ 1096 UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes); 1097 1098 UPDATE_ESTAT_QSTAT_64(total_tpa_bytes); 1099 1100 UPDATE_FSTAT_QSTAT(total_bytes_received); 1101 UPDATE_FSTAT_QSTAT(total_bytes_transmitted); 1102 UPDATE_FSTAT_QSTAT(total_unicast_packets_received); 1103 UPDATE_FSTAT_QSTAT(total_multicast_packets_received); 1104 UPDATE_FSTAT_QSTAT(total_broadcast_packets_received); 1105 UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted); 1106 UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted); 1107 UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted); 1108 UPDATE_FSTAT_QSTAT(valid_bytes_received); 1109 } 1110 1111 ADD_64(estats->total_bytes_received_hi, 1112 estats->rx_stat_ifhcinbadoctets_hi, 1113 estats->total_bytes_received_lo, 1114 estats->rx_stat_ifhcinbadoctets_lo); 1115 1116 ADD_64_LE(estats->total_bytes_received_hi, 1117 tfunc->rcv_error_bytes.hi, 1118 estats->total_bytes_received_lo, 1119 tfunc->rcv_error_bytes.lo); 1120 1121 ADD_64_LE(estats->error_bytes_received_hi, 1122 tfunc->rcv_error_bytes.hi, 1123 estats->error_bytes_received_lo, 1124 tfunc->rcv_error_bytes.lo); 1125 1126 UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong); 1127 1128 ADD_64(estats->error_bytes_received_hi, 1129 estats->rx_stat_ifhcinbadoctets_hi, 1130 estats->error_bytes_received_lo, 1131 estats->rx_stat_ifhcinbadoctets_lo); 1132 1133 if (bp->port.pmf) { 1134 struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old; 1135 UPDATE_FW_STAT(mac_filter_discard); 1136 UPDATE_FW_STAT(mf_tag_discard); 1137 UPDATE_FW_STAT(brb_truncate_discard); 1138 UPDATE_FW_STAT(mac_discard); 1139 } 1140 1141 fstats->host_func_stats_start = ++fstats->host_func_stats_end; 1142 1143 bp->stats_pending = 0; 1144 1145 return 0; 1146 } 1147 1148 static void bnx2x_net_stats_update(struct bnx2x *bp) 1149 { 1150 struct bnx2x_eth_stats *estats = &bp->eth_stats; 1151 struct net_device_stats *nstats = &bp->dev->stats; 1152 unsigned long tmp; 1153 int i; 1154 1155 nstats->rx_packets = 1156 bnx2x_hilo(&estats->total_unicast_packets_received_hi) + 1157 bnx2x_hilo(&estats->total_multicast_packets_received_hi) + 1158 bnx2x_hilo(&estats->total_broadcast_packets_received_hi); 1159 1160 nstats->tx_packets = 1161 bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) + 1162 bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) + 1163 bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi); 1164 1165 nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi); 1166 1167 nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi); 1168 1169 tmp = estats->mac_discard; 1170 for_each_rx_queue(bp, i) { 1171 struct tstorm_per_queue_stats *old_tclient = 1172 &bp->fp_stats[i].old_tclient; 1173 tmp += le32_to_cpu(old_tclient->checksum_discard); 1174 } 1175 nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped; 1176 1177 nstats->tx_dropped = 0; 1178 1179 nstats->multicast = 1180 bnx2x_hilo(&estats->total_multicast_packets_received_hi); 1181 1182 nstats->collisions = 1183 bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi); 1184 1185 nstats->rx_length_errors = 1186 bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) + 1187 bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi); 1188 nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) + 1189 bnx2x_hilo(&estats->brb_truncate_hi); 1190 nstats->rx_crc_errors = 1191 bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi); 1192 nstats->rx_frame_errors = 1193 bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi); 1194 nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi); 1195 nstats->rx_missed_errors = 0; 1196 1197 nstats->rx_errors = nstats->rx_length_errors + 1198 nstats->rx_over_errors + 1199 nstats->rx_crc_errors + 1200 nstats->rx_frame_errors + 1201 nstats->rx_fifo_errors + 1202 nstats->rx_missed_errors; 1203 1204 nstats->tx_aborted_errors = 1205 bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) + 1206 bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi); 1207 nstats->tx_carrier_errors = 1208 bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi); 1209 nstats->tx_fifo_errors = 0; 1210 nstats->tx_heartbeat_errors = 0; 1211 nstats->tx_window_errors = 0; 1212 1213 nstats->tx_errors = nstats->tx_aborted_errors + 1214 nstats->tx_carrier_errors + 1215 bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi); 1216 } 1217 1218 static void bnx2x_drv_stats_update(struct bnx2x *bp) 1219 { 1220 struct bnx2x_eth_stats *estats = &bp->eth_stats; 1221 int i; 1222 1223 for_each_queue(bp, i) { 1224 struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats; 1225 struct bnx2x_eth_q_stats_old *qstats_old = 1226 &bp->fp_stats[i].eth_q_stats_old; 1227 1228 UPDATE_ESTAT_QSTAT(driver_xoff); 1229 UPDATE_ESTAT_QSTAT(rx_err_discard_pkt); 1230 UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed); 1231 UPDATE_ESTAT_QSTAT(hw_csum_err); 1232 UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt); 1233 } 1234 } 1235 1236 static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp) 1237 { 1238 u32 val; 1239 1240 if (SHMEM2_HAS(bp, edebug_driver_if[1])) { 1241 val = SHMEM2_RD(bp, edebug_driver_if[1]); 1242 1243 if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) 1244 return true; 1245 } 1246 1247 return false; 1248 } 1249 1250 static void bnx2x_stats_update(struct bnx2x *bp) 1251 { 1252 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 1253 1254 /* we run update from timer context, so give up 1255 * if somebody is in the middle of transition 1256 */ 1257 if (down_trylock(&bp->stats_sema)) 1258 return; 1259 1260 if (bnx2x_edebug_stats_stopped(bp) || !bp->stats_started) 1261 goto out; 1262 1263 if (IS_PF(bp)) { 1264 if (*stats_comp != DMAE_COMP_VAL) 1265 goto out; 1266 1267 if (bp->port.pmf) 1268 bnx2x_hw_stats_update(bp); 1269 1270 if (bnx2x_storm_stats_update(bp)) { 1271 if (bp->stats_pending++ == 3) { 1272 BNX2X_ERR("storm stats were not updated for 3 times\n"); 1273 bnx2x_panic(); 1274 } 1275 goto out; 1276 } 1277 } else { 1278 /* vf doesn't collect HW statistics, and doesn't get completions 1279 * perform only update 1280 */ 1281 bnx2x_storm_stats_update(bp); 1282 } 1283 1284 bnx2x_net_stats_update(bp); 1285 bnx2x_drv_stats_update(bp); 1286 1287 /* vf is done */ 1288 if (IS_VF(bp)) 1289 goto out; 1290 1291 if (netif_msg_timer(bp)) { 1292 struct bnx2x_eth_stats *estats = &bp->eth_stats; 1293 1294 netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n", 1295 estats->brb_drop_lo, estats->brb_truncate_lo); 1296 } 1297 1298 bnx2x_hw_stats_post(bp); 1299 bnx2x_storm_stats_post(bp); 1300 1301 out: 1302 up(&bp->stats_sema); 1303 } 1304 1305 static void bnx2x_port_stats_stop(struct bnx2x *bp) 1306 { 1307 struct dmae_command *dmae; 1308 u32 opcode; 1309 int loader_idx = PMF_DMAE_C(bp); 1310 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 1311 1312 bp->executer_idx = 0; 1313 1314 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0); 1315 1316 if (bp->port.port_stx) { 1317 1318 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 1319 if (bp->func_stx) 1320 dmae->opcode = bnx2x_dmae_opcode_add_comp( 1321 opcode, DMAE_COMP_GRC); 1322 else 1323 dmae->opcode = bnx2x_dmae_opcode_add_comp( 1324 opcode, DMAE_COMP_PCI); 1325 1326 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); 1327 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); 1328 dmae->dst_addr_lo = bp->port.port_stx >> 2; 1329 dmae->dst_addr_hi = 0; 1330 dmae->len = bnx2x_get_port_stats_dma_len(bp); 1331 if (bp->func_stx) { 1332 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 1333 dmae->comp_addr_hi = 0; 1334 dmae->comp_val = 1; 1335 } else { 1336 dmae->comp_addr_lo = 1337 U64_LO(bnx2x_sp_mapping(bp, stats_comp)); 1338 dmae->comp_addr_hi = 1339 U64_HI(bnx2x_sp_mapping(bp, stats_comp)); 1340 dmae->comp_val = DMAE_COMP_VAL; 1341 1342 *stats_comp = 0; 1343 } 1344 } 1345 1346 if (bp->func_stx) { 1347 1348 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 1349 dmae->opcode = 1350 bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 1351 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats)); 1352 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats)); 1353 dmae->dst_addr_lo = bp->func_stx >> 2; 1354 dmae->dst_addr_hi = 0; 1355 dmae->len = sizeof(struct host_func_stats) >> 2; 1356 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); 1357 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); 1358 dmae->comp_val = DMAE_COMP_VAL; 1359 1360 *stats_comp = 0; 1361 } 1362 } 1363 1364 static void bnx2x_stats_stop(struct bnx2x *bp) 1365 { 1366 int update = 0; 1367 1368 if (down_timeout(&bp->stats_sema, HZ/10)) 1369 BNX2X_ERR("Unable to acquire stats lock\n"); 1370 1371 bp->stats_started = false; 1372 1373 bnx2x_stats_comp(bp); 1374 1375 if (bp->port.pmf) 1376 update = (bnx2x_hw_stats_update(bp) == 0); 1377 1378 update |= (bnx2x_storm_stats_update(bp) == 0); 1379 1380 if (update) { 1381 bnx2x_net_stats_update(bp); 1382 1383 if (bp->port.pmf) 1384 bnx2x_port_stats_stop(bp); 1385 1386 bnx2x_hw_stats_post(bp); 1387 bnx2x_stats_comp(bp); 1388 } 1389 1390 up(&bp->stats_sema); 1391 } 1392 1393 static void bnx2x_stats_do_nothing(struct bnx2x *bp) 1394 { 1395 } 1396 1397 static const struct { 1398 void (*action)(struct bnx2x *bp); 1399 enum bnx2x_stats_state next_state; 1400 } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = { 1401 /* state event */ 1402 { 1403 /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED}, 1404 /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED}, 1405 /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}, 1406 /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED} 1407 }, 1408 { 1409 /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED}, 1410 /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED}, 1411 /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED}, 1412 /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED} 1413 } 1414 }; 1415 1416 void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event) 1417 { 1418 enum bnx2x_stats_state state; 1419 void (*action)(struct bnx2x *bp); 1420 if (unlikely(bp->panic)) 1421 return; 1422 1423 spin_lock_bh(&bp->stats_lock); 1424 state = bp->stats_state; 1425 bp->stats_state = bnx2x_stats_stm[state][event].next_state; 1426 action = bnx2x_stats_stm[state][event].action; 1427 spin_unlock_bh(&bp->stats_lock); 1428 1429 action(bp); 1430 1431 if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp)) 1432 DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n", 1433 state, event, bp->stats_state); 1434 } 1435 1436 static void bnx2x_port_stats_base_init(struct bnx2x *bp) 1437 { 1438 struct dmae_command *dmae; 1439 u32 *stats_comp = bnx2x_sp(bp, stats_comp); 1440 1441 /* sanity */ 1442 if (!bp->port.pmf || !bp->port.port_stx) { 1443 BNX2X_ERR("BUG!\n"); 1444 return; 1445 } 1446 1447 bp->executer_idx = 0; 1448 1449 dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]); 1450 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, 1451 true, DMAE_COMP_PCI); 1452 dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats)); 1453 dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats)); 1454 dmae->dst_addr_lo = bp->port.port_stx >> 2; 1455 dmae->dst_addr_hi = 0; 1456 dmae->len = bnx2x_get_port_stats_dma_len(bp); 1457 dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp)); 1458 dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp)); 1459 dmae->comp_val = DMAE_COMP_VAL; 1460 1461 *stats_comp = 0; 1462 bnx2x_hw_stats_post(bp); 1463 bnx2x_stats_comp(bp); 1464 } 1465 1466 /* This function will prepare the statistics ramrod data the way 1467 * we will only have to increment the statistics counter and 1468 * send the ramrod each time we have to. 1469 */ 1470 static void bnx2x_prep_fw_stats_req(struct bnx2x *bp) 1471 { 1472 int i; 1473 int first_queue_query_index; 1474 struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr; 1475 1476 dma_addr_t cur_data_offset; 1477 struct stats_query_entry *cur_query_entry; 1478 1479 stats_hdr->cmd_num = bp->fw_stats_num; 1480 stats_hdr->drv_stats_counter = 0; 1481 1482 /* storm_counters struct contains the counters of completed 1483 * statistics requests per storm which are incremented by FW 1484 * each time it completes hadning a statistics ramrod. We will 1485 * check these counters in the timer handler and discard a 1486 * (statistics) ramrod completion. 1487 */ 1488 cur_data_offset = bp->fw_stats_data_mapping + 1489 offsetof(struct bnx2x_fw_stats_data, storm_counters); 1490 1491 stats_hdr->stats_counters_addrs.hi = 1492 cpu_to_le32(U64_HI(cur_data_offset)); 1493 stats_hdr->stats_counters_addrs.lo = 1494 cpu_to_le32(U64_LO(cur_data_offset)); 1495 1496 /* prepare to the first stats ramrod (will be completed with 1497 * the counters equal to zero) - init counters to somethig different. 1498 */ 1499 memset(&bp->fw_stats_data->storm_counters, 0xff, 1500 sizeof(struct stats_counter)); 1501 1502 /**** Port FW statistics data ****/ 1503 cur_data_offset = bp->fw_stats_data_mapping + 1504 offsetof(struct bnx2x_fw_stats_data, port); 1505 1506 cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX]; 1507 1508 cur_query_entry->kind = STATS_TYPE_PORT; 1509 /* For port query index is a DONT CARE */ 1510 cur_query_entry->index = BP_PORT(bp); 1511 /* For port query funcID is a DONT CARE */ 1512 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); 1513 cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset)); 1514 cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset)); 1515 1516 /**** PF FW statistics data ****/ 1517 cur_data_offset = bp->fw_stats_data_mapping + 1518 offsetof(struct bnx2x_fw_stats_data, pf); 1519 1520 cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX]; 1521 1522 cur_query_entry->kind = STATS_TYPE_PF; 1523 /* For PF query index is a DONT CARE */ 1524 cur_query_entry->index = BP_PORT(bp); 1525 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); 1526 cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset)); 1527 cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset)); 1528 1529 /**** FCoE FW statistics data ****/ 1530 if (!NO_FCOE(bp)) { 1531 cur_data_offset = bp->fw_stats_data_mapping + 1532 offsetof(struct bnx2x_fw_stats_data, fcoe); 1533 1534 cur_query_entry = 1535 &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX]; 1536 1537 cur_query_entry->kind = STATS_TYPE_FCOE; 1538 /* For FCoE query index is a DONT CARE */ 1539 cur_query_entry->index = BP_PORT(bp); 1540 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); 1541 cur_query_entry->address.hi = 1542 cpu_to_le32(U64_HI(cur_data_offset)); 1543 cur_query_entry->address.lo = 1544 cpu_to_le32(U64_LO(cur_data_offset)); 1545 } 1546 1547 /**** Clients' queries ****/ 1548 cur_data_offset = bp->fw_stats_data_mapping + 1549 offsetof(struct bnx2x_fw_stats_data, queue_stats); 1550 1551 /* first queue query index depends whether FCoE offloaded request will 1552 * be included in the ramrod 1553 */ 1554 if (!NO_FCOE(bp)) 1555 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX; 1556 else 1557 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1; 1558 1559 for_each_eth_queue(bp, i) { 1560 cur_query_entry = 1561 &bp->fw_stats_req-> 1562 query[first_queue_query_index + i]; 1563 1564 cur_query_entry->kind = STATS_TYPE_QUEUE; 1565 cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]); 1566 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); 1567 cur_query_entry->address.hi = 1568 cpu_to_le32(U64_HI(cur_data_offset)); 1569 cur_query_entry->address.lo = 1570 cpu_to_le32(U64_LO(cur_data_offset)); 1571 1572 cur_data_offset += sizeof(struct per_queue_stats); 1573 } 1574 1575 /* add FCoE queue query if needed */ 1576 if (!NO_FCOE(bp)) { 1577 cur_query_entry = 1578 &bp->fw_stats_req-> 1579 query[first_queue_query_index + i]; 1580 1581 cur_query_entry->kind = STATS_TYPE_QUEUE; 1582 cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]); 1583 cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp)); 1584 cur_query_entry->address.hi = 1585 cpu_to_le32(U64_HI(cur_data_offset)); 1586 cur_query_entry->address.lo = 1587 cpu_to_le32(U64_LO(cur_data_offset)); 1588 } 1589 } 1590 1591 void bnx2x_memset_stats(struct bnx2x *bp) 1592 { 1593 int i; 1594 1595 /* function stats */ 1596 for_each_queue(bp, i) { 1597 struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i]; 1598 1599 memset(&fp_stats->old_tclient, 0, 1600 sizeof(fp_stats->old_tclient)); 1601 memset(&fp_stats->old_uclient, 0, 1602 sizeof(fp_stats->old_uclient)); 1603 memset(&fp_stats->old_xclient, 0, 1604 sizeof(fp_stats->old_xclient)); 1605 if (bp->stats_init) { 1606 memset(&fp_stats->eth_q_stats, 0, 1607 sizeof(fp_stats->eth_q_stats)); 1608 memset(&fp_stats->eth_q_stats_old, 0, 1609 sizeof(fp_stats->eth_q_stats_old)); 1610 } 1611 } 1612 1613 memset(&bp->dev->stats, 0, sizeof(bp->dev->stats)); 1614 1615 if (bp->stats_init) { 1616 memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old)); 1617 memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old)); 1618 memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old)); 1619 memset(&bp->eth_stats, 0, sizeof(bp->eth_stats)); 1620 memset(&bp->func_stats, 0, sizeof(bp->func_stats)); 1621 } 1622 1623 bp->stats_state = STATS_STATE_DISABLED; 1624 1625 if (bp->port.pmf && bp->port.port_stx) 1626 bnx2x_port_stats_base_init(bp); 1627 1628 /* mark the end of statistics initializiation */ 1629 bp->stats_init = false; 1630 } 1631 1632 void bnx2x_stats_init(struct bnx2x *bp) 1633 { 1634 int /*abs*/port = BP_PORT(bp); 1635 int mb_idx = BP_FW_MB_IDX(bp); 1636 1637 bp->stats_pending = 0; 1638 bp->executer_idx = 0; 1639 bp->stats_counter = 0; 1640 1641 /* port and func stats for management */ 1642 if (!BP_NOMCP(bp)) { 1643 bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx); 1644 bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param); 1645 1646 } else { 1647 bp->port.port_stx = 0; 1648 bp->func_stx = 0; 1649 } 1650 DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n", 1651 bp->port.port_stx, bp->func_stx); 1652 1653 /* pmf should retrieve port statistics from SP on a non-init*/ 1654 if (!bp->stats_init && bp->port.pmf && bp->port.port_stx) 1655 bnx2x_stats_handle(bp, STATS_EVENT_PMF); 1656 1657 port = BP_PORT(bp); 1658 /* port stats */ 1659 memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats)); 1660 bp->port.old_nig_stats.brb_discard = 1661 REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38); 1662 bp->port.old_nig_stats.brb_truncate = 1663 REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38); 1664 if (!CHIP_IS_E3(bp)) { 1665 REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50, 1666 &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2); 1667 REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50, 1668 &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2); 1669 } 1670 1671 /* Prepare statistics ramrod data */ 1672 bnx2x_prep_fw_stats_req(bp); 1673 1674 /* Clean SP from previous statistics */ 1675 if (bp->stats_init) { 1676 if (bp->func_stx) { 1677 memset(bnx2x_sp(bp, func_stats), 0, 1678 sizeof(struct host_func_stats)); 1679 bnx2x_func_stats_init(bp); 1680 bnx2x_hw_stats_post(bp); 1681 bnx2x_stats_comp(bp); 1682 } 1683 } 1684 1685 bnx2x_memset_stats(bp); 1686 } 1687 1688 void bnx2x_save_statistics(struct bnx2x *bp) 1689 { 1690 int i; 1691 struct net_device_stats *nstats = &bp->dev->stats; 1692 1693 /* save queue statistics */ 1694 for_each_eth_queue(bp, i) { 1695 struct bnx2x_fastpath *fp = &bp->fp[i]; 1696 struct bnx2x_eth_q_stats *qstats = 1697 &bnx2x_fp_stats(bp, fp)->eth_q_stats; 1698 struct bnx2x_eth_q_stats_old *qstats_old = 1699 &bnx2x_fp_stats(bp, fp)->eth_q_stats_old; 1700 1701 UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi); 1702 UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo); 1703 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi); 1704 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo); 1705 UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi); 1706 UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo); 1707 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi); 1708 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo); 1709 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi); 1710 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo); 1711 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi); 1712 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo); 1713 UPDATE_QSTAT_OLD(total_tpa_bytes_hi); 1714 UPDATE_QSTAT_OLD(total_tpa_bytes_lo); 1715 } 1716 1717 /* save net_device_stats statistics */ 1718 bp->net_stats_old.rx_dropped = nstats->rx_dropped; 1719 1720 /* store port firmware statistics */ 1721 if (bp->port.pmf && IS_MF(bp)) { 1722 struct bnx2x_eth_stats *estats = &bp->eth_stats; 1723 struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old; 1724 UPDATE_FW_STAT_OLD(mac_filter_discard); 1725 UPDATE_FW_STAT_OLD(mf_tag_discard); 1726 UPDATE_FW_STAT_OLD(brb_truncate_discard); 1727 UPDATE_FW_STAT_OLD(mac_discard); 1728 } 1729 } 1730 1731 void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats, 1732 u32 stats_type) 1733 { 1734 int i; 1735 struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats; 1736 struct bnx2x_eth_stats *estats = &bp->eth_stats; 1737 struct per_queue_stats *fcoe_q_stats = 1738 &bp->fw_stats_data->queue_stats[FCOE_IDX(bp)]; 1739 1740 struct tstorm_per_queue_stats *fcoe_q_tstorm_stats = 1741 &fcoe_q_stats->tstorm_queue_statistics; 1742 1743 struct ustorm_per_queue_stats *fcoe_q_ustorm_stats = 1744 &fcoe_q_stats->ustorm_queue_statistics; 1745 1746 struct xstorm_per_queue_stats *fcoe_q_xstorm_stats = 1747 &fcoe_q_stats->xstorm_queue_statistics; 1748 1749 struct fcoe_statistics_params *fw_fcoe_stat = 1750 &bp->fw_stats_data->fcoe; 1751 1752 memset(afex_stats, 0, sizeof(struct afex_stats)); 1753 1754 for_each_eth_queue(bp, i) { 1755 struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats; 1756 1757 ADD_64(afex_stats->rx_unicast_bytes_hi, 1758 qstats->total_unicast_bytes_received_hi, 1759 afex_stats->rx_unicast_bytes_lo, 1760 qstats->total_unicast_bytes_received_lo); 1761 1762 ADD_64(afex_stats->rx_broadcast_bytes_hi, 1763 qstats->total_broadcast_bytes_received_hi, 1764 afex_stats->rx_broadcast_bytes_lo, 1765 qstats->total_broadcast_bytes_received_lo); 1766 1767 ADD_64(afex_stats->rx_multicast_bytes_hi, 1768 qstats->total_multicast_bytes_received_hi, 1769 afex_stats->rx_multicast_bytes_lo, 1770 qstats->total_multicast_bytes_received_lo); 1771 1772 ADD_64(afex_stats->rx_unicast_frames_hi, 1773 qstats->total_unicast_packets_received_hi, 1774 afex_stats->rx_unicast_frames_lo, 1775 qstats->total_unicast_packets_received_lo); 1776 1777 ADD_64(afex_stats->rx_broadcast_frames_hi, 1778 qstats->total_broadcast_packets_received_hi, 1779 afex_stats->rx_broadcast_frames_lo, 1780 qstats->total_broadcast_packets_received_lo); 1781 1782 ADD_64(afex_stats->rx_multicast_frames_hi, 1783 qstats->total_multicast_packets_received_hi, 1784 afex_stats->rx_multicast_frames_lo, 1785 qstats->total_multicast_packets_received_lo); 1786 1787 /* sum to rx_frames_discarded all discraded 1788 * packets due to size, ttl0 and checksum 1789 */ 1790 ADD_64(afex_stats->rx_frames_discarded_hi, 1791 qstats->total_packets_received_checksum_discarded_hi, 1792 afex_stats->rx_frames_discarded_lo, 1793 qstats->total_packets_received_checksum_discarded_lo); 1794 1795 ADD_64(afex_stats->rx_frames_discarded_hi, 1796 qstats->total_packets_received_ttl0_discarded_hi, 1797 afex_stats->rx_frames_discarded_lo, 1798 qstats->total_packets_received_ttl0_discarded_lo); 1799 1800 ADD_64(afex_stats->rx_frames_discarded_hi, 1801 qstats->etherstatsoverrsizepkts_hi, 1802 afex_stats->rx_frames_discarded_lo, 1803 qstats->etherstatsoverrsizepkts_lo); 1804 1805 ADD_64(afex_stats->rx_frames_dropped_hi, 1806 qstats->no_buff_discard_hi, 1807 afex_stats->rx_frames_dropped_lo, 1808 qstats->no_buff_discard_lo); 1809 1810 ADD_64(afex_stats->tx_unicast_bytes_hi, 1811 qstats->total_unicast_bytes_transmitted_hi, 1812 afex_stats->tx_unicast_bytes_lo, 1813 qstats->total_unicast_bytes_transmitted_lo); 1814 1815 ADD_64(afex_stats->tx_broadcast_bytes_hi, 1816 qstats->total_broadcast_bytes_transmitted_hi, 1817 afex_stats->tx_broadcast_bytes_lo, 1818 qstats->total_broadcast_bytes_transmitted_lo); 1819 1820 ADD_64(afex_stats->tx_multicast_bytes_hi, 1821 qstats->total_multicast_bytes_transmitted_hi, 1822 afex_stats->tx_multicast_bytes_lo, 1823 qstats->total_multicast_bytes_transmitted_lo); 1824 1825 ADD_64(afex_stats->tx_unicast_frames_hi, 1826 qstats->total_unicast_packets_transmitted_hi, 1827 afex_stats->tx_unicast_frames_lo, 1828 qstats->total_unicast_packets_transmitted_lo); 1829 1830 ADD_64(afex_stats->tx_broadcast_frames_hi, 1831 qstats->total_broadcast_packets_transmitted_hi, 1832 afex_stats->tx_broadcast_frames_lo, 1833 qstats->total_broadcast_packets_transmitted_lo); 1834 1835 ADD_64(afex_stats->tx_multicast_frames_hi, 1836 qstats->total_multicast_packets_transmitted_hi, 1837 afex_stats->tx_multicast_frames_lo, 1838 qstats->total_multicast_packets_transmitted_lo); 1839 1840 ADD_64(afex_stats->tx_frames_dropped_hi, 1841 qstats->total_transmitted_dropped_packets_error_hi, 1842 afex_stats->tx_frames_dropped_lo, 1843 qstats->total_transmitted_dropped_packets_error_lo); 1844 } 1845 1846 /* now add FCoE statistics which are collected separately 1847 * (both offloaded and non offloaded) 1848 */ 1849 if (!NO_FCOE(bp)) { 1850 ADD_64_LE(afex_stats->rx_unicast_bytes_hi, 1851 LE32_0, 1852 afex_stats->rx_unicast_bytes_lo, 1853 fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt); 1854 1855 ADD_64_LE(afex_stats->rx_unicast_bytes_hi, 1856 fcoe_q_tstorm_stats->rcv_ucast_bytes.hi, 1857 afex_stats->rx_unicast_bytes_lo, 1858 fcoe_q_tstorm_stats->rcv_ucast_bytes.lo); 1859 1860 ADD_64_LE(afex_stats->rx_broadcast_bytes_hi, 1861 fcoe_q_tstorm_stats->rcv_bcast_bytes.hi, 1862 afex_stats->rx_broadcast_bytes_lo, 1863 fcoe_q_tstorm_stats->rcv_bcast_bytes.lo); 1864 1865 ADD_64_LE(afex_stats->rx_multicast_bytes_hi, 1866 fcoe_q_tstorm_stats->rcv_mcast_bytes.hi, 1867 afex_stats->rx_multicast_bytes_lo, 1868 fcoe_q_tstorm_stats->rcv_mcast_bytes.lo); 1869 1870 ADD_64_LE(afex_stats->rx_unicast_frames_hi, 1871 LE32_0, 1872 afex_stats->rx_unicast_frames_lo, 1873 fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt); 1874 1875 ADD_64_LE(afex_stats->rx_unicast_frames_hi, 1876 LE32_0, 1877 afex_stats->rx_unicast_frames_lo, 1878 fcoe_q_tstorm_stats->rcv_ucast_pkts); 1879 1880 ADD_64_LE(afex_stats->rx_broadcast_frames_hi, 1881 LE32_0, 1882 afex_stats->rx_broadcast_frames_lo, 1883 fcoe_q_tstorm_stats->rcv_bcast_pkts); 1884 1885 ADD_64_LE(afex_stats->rx_multicast_frames_hi, 1886 LE32_0, 1887 afex_stats->rx_multicast_frames_lo, 1888 fcoe_q_tstorm_stats->rcv_ucast_pkts); 1889 1890 ADD_64_LE(afex_stats->rx_frames_discarded_hi, 1891 LE32_0, 1892 afex_stats->rx_frames_discarded_lo, 1893 fcoe_q_tstorm_stats->checksum_discard); 1894 1895 ADD_64_LE(afex_stats->rx_frames_discarded_hi, 1896 LE32_0, 1897 afex_stats->rx_frames_discarded_lo, 1898 fcoe_q_tstorm_stats->pkts_too_big_discard); 1899 1900 ADD_64_LE(afex_stats->rx_frames_discarded_hi, 1901 LE32_0, 1902 afex_stats->rx_frames_discarded_lo, 1903 fcoe_q_tstorm_stats->ttl0_discard); 1904 1905 ADD_64_LE16(afex_stats->rx_frames_dropped_hi, 1906 LE16_0, 1907 afex_stats->rx_frames_dropped_lo, 1908 fcoe_q_tstorm_stats->no_buff_discard); 1909 1910 ADD_64_LE(afex_stats->rx_frames_dropped_hi, 1911 LE32_0, 1912 afex_stats->rx_frames_dropped_lo, 1913 fcoe_q_ustorm_stats->ucast_no_buff_pkts); 1914 1915 ADD_64_LE(afex_stats->rx_frames_dropped_hi, 1916 LE32_0, 1917 afex_stats->rx_frames_dropped_lo, 1918 fcoe_q_ustorm_stats->mcast_no_buff_pkts); 1919 1920 ADD_64_LE(afex_stats->rx_frames_dropped_hi, 1921 LE32_0, 1922 afex_stats->rx_frames_dropped_lo, 1923 fcoe_q_ustorm_stats->bcast_no_buff_pkts); 1924 1925 ADD_64_LE(afex_stats->rx_frames_dropped_hi, 1926 LE32_0, 1927 afex_stats->rx_frames_dropped_lo, 1928 fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt); 1929 1930 ADD_64_LE(afex_stats->rx_frames_dropped_hi, 1931 LE32_0, 1932 afex_stats->rx_frames_dropped_lo, 1933 fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt); 1934 1935 ADD_64_LE(afex_stats->tx_unicast_bytes_hi, 1936 LE32_0, 1937 afex_stats->tx_unicast_bytes_lo, 1938 fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt); 1939 1940 ADD_64_LE(afex_stats->tx_unicast_bytes_hi, 1941 fcoe_q_xstorm_stats->ucast_bytes_sent.hi, 1942 afex_stats->tx_unicast_bytes_lo, 1943 fcoe_q_xstorm_stats->ucast_bytes_sent.lo); 1944 1945 ADD_64_LE(afex_stats->tx_broadcast_bytes_hi, 1946 fcoe_q_xstorm_stats->bcast_bytes_sent.hi, 1947 afex_stats->tx_broadcast_bytes_lo, 1948 fcoe_q_xstorm_stats->bcast_bytes_sent.lo); 1949 1950 ADD_64_LE(afex_stats->tx_multicast_bytes_hi, 1951 fcoe_q_xstorm_stats->mcast_bytes_sent.hi, 1952 afex_stats->tx_multicast_bytes_lo, 1953 fcoe_q_xstorm_stats->mcast_bytes_sent.lo); 1954 1955 ADD_64_LE(afex_stats->tx_unicast_frames_hi, 1956 LE32_0, 1957 afex_stats->tx_unicast_frames_lo, 1958 fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt); 1959 1960 ADD_64_LE(afex_stats->tx_unicast_frames_hi, 1961 LE32_0, 1962 afex_stats->tx_unicast_frames_lo, 1963 fcoe_q_xstorm_stats->ucast_pkts_sent); 1964 1965 ADD_64_LE(afex_stats->tx_broadcast_frames_hi, 1966 LE32_0, 1967 afex_stats->tx_broadcast_frames_lo, 1968 fcoe_q_xstorm_stats->bcast_pkts_sent); 1969 1970 ADD_64_LE(afex_stats->tx_multicast_frames_hi, 1971 LE32_0, 1972 afex_stats->tx_multicast_frames_lo, 1973 fcoe_q_xstorm_stats->mcast_pkts_sent); 1974 1975 ADD_64_LE(afex_stats->tx_frames_dropped_hi, 1976 LE32_0, 1977 afex_stats->tx_frames_dropped_lo, 1978 fcoe_q_xstorm_stats->error_drop_pkts); 1979 } 1980 1981 /* if port stats are requested, add them to the PMF 1982 * stats, as anyway they will be accumulated by the 1983 * MCP before sent to the switch 1984 */ 1985 if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) { 1986 ADD_64(afex_stats->rx_frames_dropped_hi, 1987 0, 1988 afex_stats->rx_frames_dropped_lo, 1989 estats->mac_filter_discard); 1990 ADD_64(afex_stats->rx_frames_dropped_hi, 1991 0, 1992 afex_stats->rx_frames_dropped_lo, 1993 estats->brb_truncate_discard); 1994 ADD_64(afex_stats->rx_frames_discarded_hi, 1995 0, 1996 afex_stats->rx_frames_discarded_lo, 1997 estats->mac_discard); 1998 } 1999 } 2000