1 /* bnx2x_stats.c: Broadcom Everest network driver.
2  *
3  * Copyright (c) 2007-2013 Broadcom Corporation
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  *
9  * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10  * Written by: Eliezer Tamir
11  * Based on code from Michael Chan's bnx2 driver
12  * UDP CSUM errata workaround by Arik Gendelman
13  * Slowpath and fastpath rework by Vladislav Zolotarov
14  * Statistics and Link management by Yitchak Gertner
15  *
16  */
17 
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 
20 #include "bnx2x_stats.h"
21 #include "bnx2x_cmn.h"
22 #include "bnx2x_sriov.h"
23 
24 /* Statistics */
25 
26 /*
27  * General service functions
28  */
29 
30 static inline long bnx2x_hilo(u32 *hiref)
31 {
32 	u32 lo = *(hiref + 1);
33 #if (BITS_PER_LONG == 64)
34 	u32 hi = *hiref;
35 
36 	return HILO_U64(hi, lo);
37 #else
38 	return lo;
39 #endif
40 }
41 
42 static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
43 {
44 	u16 res = 0;
45 
46 	/* 'newest' convention - shmem2 cotains the size of the port stats */
47 	if (SHMEM2_HAS(bp, sizeof_port_stats)) {
48 		u32 size = SHMEM2_RD(bp, sizeof_port_stats);
49 		if (size)
50 			res = size;
51 
52 		/* prevent newer BC from causing buffer overflow */
53 		if (res > sizeof(struct host_port_stats))
54 			res = sizeof(struct host_port_stats);
55 	}
56 
57 	/* Older convention - all BCs support the port stats' fields up until
58 	 * the 'not_used' field
59 	 */
60 	if (!res) {
61 		res = offsetof(struct host_port_stats, not_used) + 4;
62 
63 		/* if PFC stats are supported by the MFW, DMA them as well */
64 		if (bp->flags & BC_SUPPORTS_PFC_STATS) {
65 			res += offsetof(struct host_port_stats,
66 					pfc_frames_rx_lo) -
67 			       offsetof(struct host_port_stats,
68 					pfc_frames_tx_hi) + 4 ;
69 		}
70 	}
71 
72 	res >>= 2;
73 
74 	WARN_ON(res > 2 * DMAE_LEN32_RD_MAX);
75 	return res;
76 }
77 
78 /*
79  * Init service functions
80  */
81 
82 static void bnx2x_dp_stats(struct bnx2x *bp)
83 {
84 	int i;
85 
86 	DP(BNX2X_MSG_STATS, "dumping stats:\n"
87 	   "fw_stats_req\n"
88 	   "    hdr\n"
89 	   "        cmd_num %d\n"
90 	   "        reserved0 %d\n"
91 	   "        drv_stats_counter %d\n"
92 	   "        reserved1 %d\n"
93 	   "        stats_counters_addrs %x %x\n",
94 	   bp->fw_stats_req->hdr.cmd_num,
95 	   bp->fw_stats_req->hdr.reserved0,
96 	   bp->fw_stats_req->hdr.drv_stats_counter,
97 	   bp->fw_stats_req->hdr.reserved1,
98 	   bp->fw_stats_req->hdr.stats_counters_addrs.hi,
99 	   bp->fw_stats_req->hdr.stats_counters_addrs.lo);
100 
101 	for (i = 0; i < bp->fw_stats_req->hdr.cmd_num; i++) {
102 		DP(BNX2X_MSG_STATS,
103 		   "query[%d]\n"
104 		   "              kind %d\n"
105 		   "              index %d\n"
106 		   "              funcID %d\n"
107 		   "              reserved %d\n"
108 		   "              address %x %x\n",
109 		   i, bp->fw_stats_req->query[i].kind,
110 		   bp->fw_stats_req->query[i].index,
111 		   bp->fw_stats_req->query[i].funcID,
112 		   bp->fw_stats_req->query[i].reserved,
113 		   bp->fw_stats_req->query[i].address.hi,
114 		   bp->fw_stats_req->query[i].address.lo);
115 	}
116 }
117 
118 /* Post the next statistics ramrod. Protect it with the spin in
119  * order to ensure the strict order between statistics ramrods
120  * (each ramrod has a sequence number passed in a
121  * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
122  * sent in order).
123  */
124 static void bnx2x_storm_stats_post(struct bnx2x *bp)
125 {
126 	if (!bp->stats_pending) {
127 		int rc;
128 
129 		spin_lock_bh(&bp->stats_lock);
130 
131 		if (bp->stats_pending) {
132 			spin_unlock_bh(&bp->stats_lock);
133 			return;
134 		}
135 
136 		bp->fw_stats_req->hdr.drv_stats_counter =
137 			cpu_to_le16(bp->stats_counter++);
138 
139 		DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
140 			bp->fw_stats_req->hdr.drv_stats_counter);
141 
142 		/* adjust the ramrod to include VF queues statistics */
143 		bnx2x_iov_adjust_stats_req(bp);
144 		bnx2x_dp_stats(bp);
145 
146 		/* send FW stats ramrod */
147 		rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
148 				   U64_HI(bp->fw_stats_req_mapping),
149 				   U64_LO(bp->fw_stats_req_mapping),
150 				   NONE_CONNECTION_TYPE);
151 		if (rc == 0)
152 			bp->stats_pending = 1;
153 
154 		spin_unlock_bh(&bp->stats_lock);
155 	}
156 }
157 
158 static void bnx2x_hw_stats_post(struct bnx2x *bp)
159 {
160 	struct dmae_command *dmae = &bp->stats_dmae;
161 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
162 
163 	*stats_comp = DMAE_COMP_VAL;
164 	if (CHIP_REV_IS_SLOW(bp))
165 		return;
166 
167 	/* Update MCP's statistics if possible */
168 	if (bp->func_stx)
169 		memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
170 		       sizeof(bp->func_stats));
171 
172 	/* loader */
173 	if (bp->executer_idx) {
174 		int loader_idx = PMF_DMAE_C(bp);
175 		u32 opcode =  bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
176 						 true, DMAE_COMP_GRC);
177 		opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
178 
179 		memset(dmae, 0, sizeof(struct dmae_command));
180 		dmae->opcode = opcode;
181 		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
182 		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
183 		dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
184 				     sizeof(struct dmae_command) *
185 				     (loader_idx + 1)) >> 2;
186 		dmae->dst_addr_hi = 0;
187 		dmae->len = sizeof(struct dmae_command) >> 2;
188 		if (CHIP_IS_E1(bp))
189 			dmae->len--;
190 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
191 		dmae->comp_addr_hi = 0;
192 		dmae->comp_val = 1;
193 
194 		*stats_comp = 0;
195 		bnx2x_post_dmae(bp, dmae, loader_idx);
196 
197 	} else if (bp->func_stx) {
198 		*stats_comp = 0;
199 		bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
200 	}
201 }
202 
203 static int bnx2x_stats_comp(struct bnx2x *bp)
204 {
205 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
206 	int cnt = 10;
207 
208 	might_sleep();
209 	while (*stats_comp != DMAE_COMP_VAL) {
210 		if (!cnt) {
211 			BNX2X_ERR("timeout waiting for stats finished\n");
212 			break;
213 		}
214 		cnt--;
215 		usleep_range(1000, 2000);
216 	}
217 	return 1;
218 }
219 
220 /*
221  * Statistics service functions
222  */
223 
224 static void bnx2x_stats_pmf_update(struct bnx2x *bp)
225 {
226 	struct dmae_command *dmae;
227 	u32 opcode;
228 	int loader_idx = PMF_DMAE_C(bp);
229 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
230 
231 	/* sanity */
232 	if (!bp->port.pmf || !bp->port.port_stx) {
233 		BNX2X_ERR("BUG!\n");
234 		return;
235 	}
236 
237 	bp->executer_idx = 0;
238 
239 	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
240 
241 	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
242 	dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
243 	dmae->src_addr_lo = bp->port.port_stx >> 2;
244 	dmae->src_addr_hi = 0;
245 	dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
246 	dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
247 	dmae->len = DMAE_LEN32_RD_MAX;
248 	dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
249 	dmae->comp_addr_hi = 0;
250 	dmae->comp_val = 1;
251 
252 	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
253 	dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
254 	dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
255 	dmae->src_addr_hi = 0;
256 	dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
257 				   DMAE_LEN32_RD_MAX * 4);
258 	dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
259 				   DMAE_LEN32_RD_MAX * 4);
260 	dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
261 
262 	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
263 	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
264 	dmae->comp_val = DMAE_COMP_VAL;
265 
266 	*stats_comp = 0;
267 	bnx2x_hw_stats_post(bp);
268 	bnx2x_stats_comp(bp);
269 }
270 
271 static void bnx2x_port_stats_init(struct bnx2x *bp)
272 {
273 	struct dmae_command *dmae;
274 	int port = BP_PORT(bp);
275 	u32 opcode;
276 	int loader_idx = PMF_DMAE_C(bp);
277 	u32 mac_addr;
278 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
279 
280 	/* sanity */
281 	if (!bp->link_vars.link_up || !bp->port.pmf) {
282 		BNX2X_ERR("BUG!\n");
283 		return;
284 	}
285 
286 	bp->executer_idx = 0;
287 
288 	/* MCP */
289 	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
290 				    true, DMAE_COMP_GRC);
291 
292 	if (bp->port.port_stx) {
293 
294 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
295 		dmae->opcode = opcode;
296 		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
297 		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
298 		dmae->dst_addr_lo = bp->port.port_stx >> 2;
299 		dmae->dst_addr_hi = 0;
300 		dmae->len = bnx2x_get_port_stats_dma_len(bp);
301 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
302 		dmae->comp_addr_hi = 0;
303 		dmae->comp_val = 1;
304 	}
305 
306 	if (bp->func_stx) {
307 
308 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
309 		dmae->opcode = opcode;
310 		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
311 		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
312 		dmae->dst_addr_lo = bp->func_stx >> 2;
313 		dmae->dst_addr_hi = 0;
314 		dmae->len = sizeof(struct host_func_stats) >> 2;
315 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
316 		dmae->comp_addr_hi = 0;
317 		dmae->comp_val = 1;
318 	}
319 
320 	/* MAC */
321 	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
322 				   true, DMAE_COMP_GRC);
323 
324 	/* EMAC is special */
325 	if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
326 		mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
327 
328 		/* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
329 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
330 		dmae->opcode = opcode;
331 		dmae->src_addr_lo = (mac_addr +
332 				     EMAC_REG_EMAC_RX_STAT_AC) >> 2;
333 		dmae->src_addr_hi = 0;
334 		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
335 		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
336 		dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
337 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
338 		dmae->comp_addr_hi = 0;
339 		dmae->comp_val = 1;
340 
341 		/* EMAC_REG_EMAC_RX_STAT_AC_28 */
342 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
343 		dmae->opcode = opcode;
344 		dmae->src_addr_lo = (mac_addr +
345 				     EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
346 		dmae->src_addr_hi = 0;
347 		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
348 		     offsetof(struct emac_stats, rx_stat_falsecarriererrors));
349 		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
350 		     offsetof(struct emac_stats, rx_stat_falsecarriererrors));
351 		dmae->len = 1;
352 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
353 		dmae->comp_addr_hi = 0;
354 		dmae->comp_val = 1;
355 
356 		/* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
357 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
358 		dmae->opcode = opcode;
359 		dmae->src_addr_lo = (mac_addr +
360 				     EMAC_REG_EMAC_TX_STAT_AC) >> 2;
361 		dmae->src_addr_hi = 0;
362 		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
363 			offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
364 		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
365 			offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
366 		dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
367 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
368 		dmae->comp_addr_hi = 0;
369 		dmae->comp_val = 1;
370 	} else {
371 		u32 tx_src_addr_lo, rx_src_addr_lo;
372 		u16 rx_len, tx_len;
373 
374 		/* configure the params according to MAC type */
375 		switch (bp->link_vars.mac_type) {
376 		case MAC_TYPE_BMAC:
377 			mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
378 					   NIG_REG_INGRESS_BMAC0_MEM);
379 
380 			/* BIGMAC_REGISTER_TX_STAT_GTPKT ..
381 			   BIGMAC_REGISTER_TX_STAT_GTBYT */
382 			if (CHIP_IS_E1x(bp)) {
383 				tx_src_addr_lo = (mac_addr +
384 					BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
385 				tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
386 					  BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
387 				rx_src_addr_lo = (mac_addr +
388 					BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
389 				rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
390 					  BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
391 			} else {
392 				tx_src_addr_lo = (mac_addr +
393 					BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
394 				tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
395 					  BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
396 				rx_src_addr_lo = (mac_addr +
397 					BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
398 				rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
399 					  BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
400 			}
401 			break;
402 
403 		case MAC_TYPE_UMAC: /* handled by MSTAT */
404 		case MAC_TYPE_XMAC: /* handled by MSTAT */
405 		default:
406 			mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
407 			tx_src_addr_lo = (mac_addr +
408 					  MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
409 			rx_src_addr_lo = (mac_addr +
410 					  MSTAT_REG_RX_STAT_GR64_LO) >> 2;
411 			tx_len = sizeof(bp->slowpath->
412 					mac_stats.mstat_stats.stats_tx) >> 2;
413 			rx_len = sizeof(bp->slowpath->
414 					mac_stats.mstat_stats.stats_rx) >> 2;
415 			break;
416 		}
417 
418 		/* TX stats */
419 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
420 		dmae->opcode = opcode;
421 		dmae->src_addr_lo = tx_src_addr_lo;
422 		dmae->src_addr_hi = 0;
423 		dmae->len = tx_len;
424 		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
425 		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
426 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
427 		dmae->comp_addr_hi = 0;
428 		dmae->comp_val = 1;
429 
430 		/* RX stats */
431 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
432 		dmae->opcode = opcode;
433 		dmae->src_addr_hi = 0;
434 		dmae->src_addr_lo = rx_src_addr_lo;
435 		dmae->dst_addr_lo =
436 			U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
437 		dmae->dst_addr_hi =
438 			U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
439 		dmae->len = rx_len;
440 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
441 		dmae->comp_addr_hi = 0;
442 		dmae->comp_val = 1;
443 	}
444 
445 	/* NIG */
446 	if (!CHIP_IS_E3(bp)) {
447 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
448 		dmae->opcode = opcode;
449 		dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
450 					    NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
451 		dmae->src_addr_hi = 0;
452 		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
453 				offsetof(struct nig_stats, egress_mac_pkt0_lo));
454 		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
455 				offsetof(struct nig_stats, egress_mac_pkt0_lo));
456 		dmae->len = (2*sizeof(u32)) >> 2;
457 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
458 		dmae->comp_addr_hi = 0;
459 		dmae->comp_val = 1;
460 
461 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
462 		dmae->opcode = opcode;
463 		dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
464 					    NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
465 		dmae->src_addr_hi = 0;
466 		dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
467 				offsetof(struct nig_stats, egress_mac_pkt1_lo));
468 		dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
469 				offsetof(struct nig_stats, egress_mac_pkt1_lo));
470 		dmae->len = (2*sizeof(u32)) >> 2;
471 		dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
472 		dmae->comp_addr_hi = 0;
473 		dmae->comp_val = 1;
474 	}
475 
476 	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
477 	dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
478 						 true, DMAE_COMP_PCI);
479 	dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
480 				    NIG_REG_STAT0_BRB_DISCARD) >> 2;
481 	dmae->src_addr_hi = 0;
482 	dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
483 	dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
484 	dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
485 
486 	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
487 	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
488 	dmae->comp_val = DMAE_COMP_VAL;
489 
490 	*stats_comp = 0;
491 }
492 
493 static void bnx2x_func_stats_init(struct bnx2x *bp)
494 {
495 	struct dmae_command *dmae = &bp->stats_dmae;
496 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
497 
498 	/* sanity */
499 	if (!bp->func_stx) {
500 		BNX2X_ERR("BUG!\n");
501 		return;
502 	}
503 
504 	bp->executer_idx = 0;
505 	memset(dmae, 0, sizeof(struct dmae_command));
506 
507 	dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
508 					 true, DMAE_COMP_PCI);
509 	dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
510 	dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
511 	dmae->dst_addr_lo = bp->func_stx >> 2;
512 	dmae->dst_addr_hi = 0;
513 	dmae->len = sizeof(struct host_func_stats) >> 2;
514 	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
515 	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
516 	dmae->comp_val = DMAE_COMP_VAL;
517 
518 	*stats_comp = 0;
519 }
520 
521 static void bnx2x_stats_start(struct bnx2x *bp)
522 {
523 	/* vfs travel through here as part of the statistics FSM, but no action
524 	 * is required
525 	 */
526 	if (IS_VF(bp))
527 		return;
528 
529 	if (bp->port.pmf)
530 		bnx2x_port_stats_init(bp);
531 
532 	else if (bp->func_stx)
533 		bnx2x_func_stats_init(bp);
534 
535 	bnx2x_hw_stats_post(bp);
536 	bnx2x_storm_stats_post(bp);
537 }
538 
539 static void bnx2x_stats_pmf_start(struct bnx2x *bp)
540 {
541 	bnx2x_stats_comp(bp);
542 	bnx2x_stats_pmf_update(bp);
543 	bnx2x_stats_start(bp);
544 }
545 
546 static void bnx2x_stats_restart(struct bnx2x *bp)
547 {
548 	/* vfs travel through here as part of the statistics FSM, but no action
549 	 * is required
550 	 */
551 	if (IS_VF(bp))
552 		return;
553 	bnx2x_stats_comp(bp);
554 	bnx2x_stats_start(bp);
555 }
556 
557 static void bnx2x_bmac_stats_update(struct bnx2x *bp)
558 {
559 	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
560 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
561 	struct {
562 		u32 lo;
563 		u32 hi;
564 	} diff;
565 
566 	if (CHIP_IS_E1x(bp)) {
567 		struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
568 
569 		/* the macros below will use "bmac1_stats" type */
570 		UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
571 		UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
572 		UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
573 		UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
574 		UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
575 		UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
576 		UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
577 		UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
578 		UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
579 
580 		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
581 		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
582 		UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
583 		UPDATE_STAT64(tx_stat_gt127,
584 				tx_stat_etherstatspkts65octetsto127octets);
585 		UPDATE_STAT64(tx_stat_gt255,
586 				tx_stat_etherstatspkts128octetsto255octets);
587 		UPDATE_STAT64(tx_stat_gt511,
588 				tx_stat_etherstatspkts256octetsto511octets);
589 		UPDATE_STAT64(tx_stat_gt1023,
590 				tx_stat_etherstatspkts512octetsto1023octets);
591 		UPDATE_STAT64(tx_stat_gt1518,
592 				tx_stat_etherstatspkts1024octetsto1522octets);
593 		UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
594 		UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
595 		UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
596 		UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
597 		UPDATE_STAT64(tx_stat_gterr,
598 				tx_stat_dot3statsinternalmactransmiterrors);
599 		UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
600 
601 	} else {
602 		struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
603 
604 		/* the macros below will use "bmac2_stats" type */
605 		UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
606 		UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
607 		UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
608 		UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
609 		UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
610 		UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
611 		UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
612 		UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
613 		UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
614 		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
615 		UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
616 		UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
617 		UPDATE_STAT64(tx_stat_gt127,
618 				tx_stat_etherstatspkts65octetsto127octets);
619 		UPDATE_STAT64(tx_stat_gt255,
620 				tx_stat_etherstatspkts128octetsto255octets);
621 		UPDATE_STAT64(tx_stat_gt511,
622 				tx_stat_etherstatspkts256octetsto511octets);
623 		UPDATE_STAT64(tx_stat_gt1023,
624 				tx_stat_etherstatspkts512octetsto1023octets);
625 		UPDATE_STAT64(tx_stat_gt1518,
626 				tx_stat_etherstatspkts1024octetsto1522octets);
627 		UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
628 		UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
629 		UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
630 		UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
631 		UPDATE_STAT64(tx_stat_gterr,
632 				tx_stat_dot3statsinternalmactransmiterrors);
633 		UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
634 
635 		/* collect PFC stats */
636 		pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
637 		pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
638 
639 		pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
640 		pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
641 	}
642 
643 	estats->pause_frames_received_hi =
644 				pstats->mac_stx[1].rx_stat_mac_xpf_hi;
645 	estats->pause_frames_received_lo =
646 				pstats->mac_stx[1].rx_stat_mac_xpf_lo;
647 
648 	estats->pause_frames_sent_hi =
649 				pstats->mac_stx[1].tx_stat_outxoffsent_hi;
650 	estats->pause_frames_sent_lo =
651 				pstats->mac_stx[1].tx_stat_outxoffsent_lo;
652 
653 	estats->pfc_frames_received_hi =
654 				pstats->pfc_frames_rx_hi;
655 	estats->pfc_frames_received_lo =
656 				pstats->pfc_frames_rx_lo;
657 	estats->pfc_frames_sent_hi =
658 				pstats->pfc_frames_tx_hi;
659 	estats->pfc_frames_sent_lo =
660 				pstats->pfc_frames_tx_lo;
661 }
662 
663 static void bnx2x_mstat_stats_update(struct bnx2x *bp)
664 {
665 	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
666 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
667 
668 	struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
669 
670 	ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
671 	ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
672 	ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
673 	ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
674 	ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
675 	ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
676 	ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
677 	ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
678 	ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
679 	ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
680 
681 	/* collect pfc stats */
682 	ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
683 		pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
684 	ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
685 		pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
686 
687 	ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
688 	ADD_STAT64(stats_tx.tx_gt127,
689 			tx_stat_etherstatspkts65octetsto127octets);
690 	ADD_STAT64(stats_tx.tx_gt255,
691 			tx_stat_etherstatspkts128octetsto255octets);
692 	ADD_STAT64(stats_tx.tx_gt511,
693 			tx_stat_etherstatspkts256octetsto511octets);
694 	ADD_STAT64(stats_tx.tx_gt1023,
695 			tx_stat_etherstatspkts512octetsto1023octets);
696 	ADD_STAT64(stats_tx.tx_gt1518,
697 			tx_stat_etherstatspkts1024octetsto1522octets);
698 	ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
699 
700 	ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
701 	ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
702 	ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
703 
704 	ADD_STAT64(stats_tx.tx_gterr,
705 			tx_stat_dot3statsinternalmactransmiterrors);
706 	ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
707 
708 	estats->etherstatspkts1024octetsto1522octets_hi =
709 	    pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
710 	estats->etherstatspkts1024octetsto1522octets_lo =
711 	    pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
712 
713 	estats->etherstatspktsover1522octets_hi =
714 	    pstats->mac_stx[1].tx_stat_mac_2047_hi;
715 	estats->etherstatspktsover1522octets_lo =
716 	    pstats->mac_stx[1].tx_stat_mac_2047_lo;
717 
718 	ADD_64(estats->etherstatspktsover1522octets_hi,
719 	       pstats->mac_stx[1].tx_stat_mac_4095_hi,
720 	       estats->etherstatspktsover1522octets_lo,
721 	       pstats->mac_stx[1].tx_stat_mac_4095_lo);
722 
723 	ADD_64(estats->etherstatspktsover1522octets_hi,
724 	       pstats->mac_stx[1].tx_stat_mac_9216_hi,
725 	       estats->etherstatspktsover1522octets_lo,
726 	       pstats->mac_stx[1].tx_stat_mac_9216_lo);
727 
728 	ADD_64(estats->etherstatspktsover1522octets_hi,
729 	       pstats->mac_stx[1].tx_stat_mac_16383_hi,
730 	       estats->etherstatspktsover1522octets_lo,
731 	       pstats->mac_stx[1].tx_stat_mac_16383_lo);
732 
733 	estats->pause_frames_received_hi =
734 				pstats->mac_stx[1].rx_stat_mac_xpf_hi;
735 	estats->pause_frames_received_lo =
736 				pstats->mac_stx[1].rx_stat_mac_xpf_lo;
737 
738 	estats->pause_frames_sent_hi =
739 				pstats->mac_stx[1].tx_stat_outxoffsent_hi;
740 	estats->pause_frames_sent_lo =
741 				pstats->mac_stx[1].tx_stat_outxoffsent_lo;
742 
743 	estats->pfc_frames_received_hi =
744 				pstats->pfc_frames_rx_hi;
745 	estats->pfc_frames_received_lo =
746 				pstats->pfc_frames_rx_lo;
747 	estats->pfc_frames_sent_hi =
748 				pstats->pfc_frames_tx_hi;
749 	estats->pfc_frames_sent_lo =
750 				pstats->pfc_frames_tx_lo;
751 }
752 
753 static void bnx2x_emac_stats_update(struct bnx2x *bp)
754 {
755 	struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
756 	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
757 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
758 
759 	UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
760 	UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
761 	UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
762 	UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
763 	UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
764 	UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
765 	UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
766 	UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
767 	UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
768 	UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
769 	UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
770 	UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
771 	UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
772 	UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
773 	UPDATE_EXTEND_STAT(tx_stat_outxonsent);
774 	UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
775 	UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
776 	UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
777 	UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
778 	UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
779 	UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
780 	UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
781 	UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
782 	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
783 	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
784 	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
785 	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
786 	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
787 	UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
788 	UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
789 	UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
790 
791 	estats->pause_frames_received_hi =
792 			pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
793 	estats->pause_frames_received_lo =
794 			pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
795 	ADD_64(estats->pause_frames_received_hi,
796 	       pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
797 	       estats->pause_frames_received_lo,
798 	       pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
799 
800 	estats->pause_frames_sent_hi =
801 			pstats->mac_stx[1].tx_stat_outxonsent_hi;
802 	estats->pause_frames_sent_lo =
803 			pstats->mac_stx[1].tx_stat_outxonsent_lo;
804 	ADD_64(estats->pause_frames_sent_hi,
805 	       pstats->mac_stx[1].tx_stat_outxoffsent_hi,
806 	       estats->pause_frames_sent_lo,
807 	       pstats->mac_stx[1].tx_stat_outxoffsent_lo);
808 }
809 
810 static int bnx2x_hw_stats_update(struct bnx2x *bp)
811 {
812 	struct nig_stats *new = bnx2x_sp(bp, nig_stats);
813 	struct nig_stats *old = &(bp->port.old_nig_stats);
814 	struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
815 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
816 	struct {
817 		u32 lo;
818 		u32 hi;
819 	} diff;
820 
821 	switch (bp->link_vars.mac_type) {
822 	case MAC_TYPE_BMAC:
823 		bnx2x_bmac_stats_update(bp);
824 		break;
825 
826 	case MAC_TYPE_EMAC:
827 		bnx2x_emac_stats_update(bp);
828 		break;
829 
830 	case MAC_TYPE_UMAC:
831 	case MAC_TYPE_XMAC:
832 		bnx2x_mstat_stats_update(bp);
833 		break;
834 
835 	case MAC_TYPE_NONE: /* unreached */
836 		DP(BNX2X_MSG_STATS,
837 		   "stats updated by DMAE but no MAC active\n");
838 		return -1;
839 
840 	default: /* unreached */
841 		BNX2X_ERR("Unknown MAC type\n");
842 	}
843 
844 	ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
845 		      new->brb_discard - old->brb_discard);
846 	ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
847 		      new->brb_truncate - old->brb_truncate);
848 
849 	if (!CHIP_IS_E3(bp)) {
850 		UPDATE_STAT64_NIG(egress_mac_pkt0,
851 					etherstatspkts1024octetsto1522octets);
852 		UPDATE_STAT64_NIG(egress_mac_pkt1,
853 					etherstatspktsover1522octets);
854 	}
855 
856 	memcpy(old, new, sizeof(struct nig_stats));
857 
858 	memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
859 	       sizeof(struct mac_stx));
860 	estats->brb_drop_hi = pstats->brb_drop_hi;
861 	estats->brb_drop_lo = pstats->brb_drop_lo;
862 
863 	pstats->host_port_stats_counter++;
864 
865 	if (CHIP_IS_E3(bp)) {
866 		u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
867 					  : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
868 		estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
869 	}
870 
871 	if (!BP_NOMCP(bp)) {
872 		u32 nig_timer_max =
873 			SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
874 		if (nig_timer_max != estats->nig_timer_max) {
875 			estats->nig_timer_max = nig_timer_max;
876 			BNX2X_ERR("NIG timer max (%u)\n",
877 				  estats->nig_timer_max);
878 		}
879 	}
880 
881 	return 0;
882 }
883 
884 static int bnx2x_storm_stats_validate_counters(struct bnx2x *bp)
885 {
886 	struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
887 	u16 cur_stats_counter;
888 	/* Make sure we use the value of the counter
889 	 * used for sending the last stats ramrod.
890 	 */
891 	spin_lock_bh(&bp->stats_lock);
892 	cur_stats_counter = bp->stats_counter - 1;
893 	spin_unlock_bh(&bp->stats_lock);
894 
895 	/* are storm stats valid? */
896 	if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
897 		DP(BNX2X_MSG_STATS,
898 		   "stats not updated by xstorm  xstorm counter (0x%x) != stats_counter (0x%x)\n",
899 		   le16_to_cpu(counters->xstats_counter), bp->stats_counter);
900 		return -EAGAIN;
901 	}
902 
903 	if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
904 		DP(BNX2X_MSG_STATS,
905 		   "stats not updated by ustorm  ustorm counter (0x%x) != stats_counter (0x%x)\n",
906 		   le16_to_cpu(counters->ustats_counter), bp->stats_counter);
907 		return -EAGAIN;
908 	}
909 
910 	if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
911 		DP(BNX2X_MSG_STATS,
912 		   "stats not updated by cstorm  cstorm counter (0x%x) != stats_counter (0x%x)\n",
913 		   le16_to_cpu(counters->cstats_counter), bp->stats_counter);
914 		return -EAGAIN;
915 	}
916 
917 	if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
918 		DP(BNX2X_MSG_STATS,
919 		   "stats not updated by tstorm  tstorm counter (0x%x) != stats_counter (0x%x)\n",
920 		   le16_to_cpu(counters->tstats_counter), bp->stats_counter);
921 		return -EAGAIN;
922 	}
923 	return 0;
924 }
925 
926 static int bnx2x_storm_stats_update(struct bnx2x *bp)
927 {
928 	struct tstorm_per_port_stats *tport =
929 				&bp->fw_stats_data->port.tstorm_port_statistics;
930 	struct tstorm_per_pf_stats *tfunc =
931 				&bp->fw_stats_data->pf.tstorm_pf_statistics;
932 	struct host_func_stats *fstats = &bp->func_stats;
933 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
934 	struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
935 	int i;
936 
937 	/* vfs stat counter is managed by pf */
938 	if (IS_PF(bp) && bnx2x_storm_stats_validate_counters(bp))
939 		return -EAGAIN;
940 
941 	estats->error_bytes_received_hi = 0;
942 	estats->error_bytes_received_lo = 0;
943 
944 	for_each_eth_queue(bp, i) {
945 		struct bnx2x_fastpath *fp = &bp->fp[i];
946 		struct tstorm_per_queue_stats *tclient =
947 			&bp->fw_stats_data->queue_stats[i].
948 			tstorm_queue_statistics;
949 		struct tstorm_per_queue_stats *old_tclient =
950 			&bnx2x_fp_stats(bp, fp)->old_tclient;
951 		struct ustorm_per_queue_stats *uclient =
952 			&bp->fw_stats_data->queue_stats[i].
953 			ustorm_queue_statistics;
954 		struct ustorm_per_queue_stats *old_uclient =
955 			&bnx2x_fp_stats(bp, fp)->old_uclient;
956 		struct xstorm_per_queue_stats *xclient =
957 			&bp->fw_stats_data->queue_stats[i].
958 			xstorm_queue_statistics;
959 		struct xstorm_per_queue_stats *old_xclient =
960 			&bnx2x_fp_stats(bp, fp)->old_xclient;
961 		struct bnx2x_eth_q_stats *qstats =
962 			&bnx2x_fp_stats(bp, fp)->eth_q_stats;
963 		struct bnx2x_eth_q_stats_old *qstats_old =
964 			&bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
965 
966 		u32 diff;
967 
968 		DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
969 		   i, xclient->ucast_pkts_sent,
970 		   xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
971 
972 		DP(BNX2X_MSG_STATS, "---------------\n");
973 
974 		UPDATE_QSTAT(tclient->rcv_bcast_bytes,
975 			     total_broadcast_bytes_received);
976 		UPDATE_QSTAT(tclient->rcv_mcast_bytes,
977 			     total_multicast_bytes_received);
978 		UPDATE_QSTAT(tclient->rcv_ucast_bytes,
979 			     total_unicast_bytes_received);
980 
981 		/*
982 		 * sum to total_bytes_received all
983 		 * unicast/multicast/broadcast
984 		 */
985 		qstats->total_bytes_received_hi =
986 			qstats->total_broadcast_bytes_received_hi;
987 		qstats->total_bytes_received_lo =
988 			qstats->total_broadcast_bytes_received_lo;
989 
990 		ADD_64(qstats->total_bytes_received_hi,
991 		       qstats->total_multicast_bytes_received_hi,
992 		       qstats->total_bytes_received_lo,
993 		       qstats->total_multicast_bytes_received_lo);
994 
995 		ADD_64(qstats->total_bytes_received_hi,
996 		       qstats->total_unicast_bytes_received_hi,
997 		       qstats->total_bytes_received_lo,
998 		       qstats->total_unicast_bytes_received_lo);
999 
1000 		qstats->valid_bytes_received_hi =
1001 					qstats->total_bytes_received_hi;
1002 		qstats->valid_bytes_received_lo =
1003 					qstats->total_bytes_received_lo;
1004 
1005 		UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
1006 					total_unicast_packets_received);
1007 		UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
1008 					total_multicast_packets_received);
1009 		UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
1010 					total_broadcast_packets_received);
1011 		UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
1012 				      etherstatsoverrsizepkts, 32);
1013 		UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16);
1014 
1015 		SUB_EXTEND_USTAT(ucast_no_buff_pkts,
1016 					total_unicast_packets_received);
1017 		SUB_EXTEND_USTAT(mcast_no_buff_pkts,
1018 					total_multicast_packets_received);
1019 		SUB_EXTEND_USTAT(bcast_no_buff_pkts,
1020 					total_broadcast_packets_received);
1021 		UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
1022 		UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
1023 		UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
1024 
1025 		UPDATE_QSTAT(xclient->bcast_bytes_sent,
1026 			     total_broadcast_bytes_transmitted);
1027 		UPDATE_QSTAT(xclient->mcast_bytes_sent,
1028 			     total_multicast_bytes_transmitted);
1029 		UPDATE_QSTAT(xclient->ucast_bytes_sent,
1030 			     total_unicast_bytes_transmitted);
1031 
1032 		/*
1033 		 * sum to total_bytes_transmitted all
1034 		 * unicast/multicast/broadcast
1035 		 */
1036 		qstats->total_bytes_transmitted_hi =
1037 				qstats->total_unicast_bytes_transmitted_hi;
1038 		qstats->total_bytes_transmitted_lo =
1039 				qstats->total_unicast_bytes_transmitted_lo;
1040 
1041 		ADD_64(qstats->total_bytes_transmitted_hi,
1042 		       qstats->total_broadcast_bytes_transmitted_hi,
1043 		       qstats->total_bytes_transmitted_lo,
1044 		       qstats->total_broadcast_bytes_transmitted_lo);
1045 
1046 		ADD_64(qstats->total_bytes_transmitted_hi,
1047 		       qstats->total_multicast_bytes_transmitted_hi,
1048 		       qstats->total_bytes_transmitted_lo,
1049 		       qstats->total_multicast_bytes_transmitted_lo);
1050 
1051 		UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
1052 					total_unicast_packets_transmitted);
1053 		UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
1054 					total_multicast_packets_transmitted);
1055 		UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
1056 					total_broadcast_packets_transmitted);
1057 
1058 		UPDATE_EXTEND_TSTAT(checksum_discard,
1059 				    total_packets_received_checksum_discarded);
1060 		UPDATE_EXTEND_TSTAT(ttl0_discard,
1061 				    total_packets_received_ttl0_discarded);
1062 
1063 		UPDATE_EXTEND_XSTAT(error_drop_pkts,
1064 				    total_transmitted_dropped_packets_error);
1065 
1066 		/* TPA aggregations completed */
1067 		UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
1068 		/* Number of network frames aggregated by TPA */
1069 		UPDATE_EXTEND_E_USTAT(coalesced_pkts,
1070 				      total_tpa_aggregated_frames);
1071 		/* Total number of bytes in completed TPA aggregations */
1072 		UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
1073 
1074 		UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
1075 
1076 		UPDATE_FSTAT_QSTAT(total_bytes_received);
1077 		UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
1078 		UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
1079 		UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
1080 		UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
1081 		UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
1082 		UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
1083 		UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
1084 		UPDATE_FSTAT_QSTAT(valid_bytes_received);
1085 	}
1086 
1087 	ADD_64(estats->total_bytes_received_hi,
1088 	       estats->rx_stat_ifhcinbadoctets_hi,
1089 	       estats->total_bytes_received_lo,
1090 	       estats->rx_stat_ifhcinbadoctets_lo);
1091 
1092 	ADD_64_LE(estats->total_bytes_received_hi,
1093 		  tfunc->rcv_error_bytes.hi,
1094 		  estats->total_bytes_received_lo,
1095 		  tfunc->rcv_error_bytes.lo);
1096 
1097 	ADD_64_LE(estats->error_bytes_received_hi,
1098 		  tfunc->rcv_error_bytes.hi,
1099 		  estats->error_bytes_received_lo,
1100 		  tfunc->rcv_error_bytes.lo);
1101 
1102 	UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
1103 
1104 	ADD_64(estats->error_bytes_received_hi,
1105 	       estats->rx_stat_ifhcinbadoctets_hi,
1106 	       estats->error_bytes_received_lo,
1107 	       estats->rx_stat_ifhcinbadoctets_lo);
1108 
1109 	if (bp->port.pmf) {
1110 		struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
1111 		UPDATE_FW_STAT(mac_filter_discard);
1112 		UPDATE_FW_STAT(mf_tag_discard);
1113 		UPDATE_FW_STAT(brb_truncate_discard);
1114 		UPDATE_FW_STAT(mac_discard);
1115 	}
1116 
1117 	fstats->host_func_stats_start = ++fstats->host_func_stats_end;
1118 
1119 	bp->stats_pending = 0;
1120 
1121 	return 0;
1122 }
1123 
1124 static void bnx2x_net_stats_update(struct bnx2x *bp)
1125 {
1126 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
1127 	struct net_device_stats *nstats = &bp->dev->stats;
1128 	unsigned long tmp;
1129 	int i;
1130 
1131 	nstats->rx_packets =
1132 		bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
1133 		bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
1134 		bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
1135 
1136 	nstats->tx_packets =
1137 		bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
1138 		bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
1139 		bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
1140 
1141 	nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
1142 
1143 	nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
1144 
1145 	tmp = estats->mac_discard;
1146 	for_each_rx_queue(bp, i) {
1147 		struct tstorm_per_queue_stats *old_tclient =
1148 			&bp->fp_stats[i].old_tclient;
1149 		tmp += le32_to_cpu(old_tclient->checksum_discard);
1150 	}
1151 	nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
1152 
1153 	nstats->tx_dropped = 0;
1154 
1155 	nstats->multicast =
1156 		bnx2x_hilo(&estats->total_multicast_packets_received_hi);
1157 
1158 	nstats->collisions =
1159 		bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
1160 
1161 	nstats->rx_length_errors =
1162 		bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
1163 		bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
1164 	nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
1165 				 bnx2x_hilo(&estats->brb_truncate_hi);
1166 	nstats->rx_crc_errors =
1167 		bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
1168 	nstats->rx_frame_errors =
1169 		bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
1170 	nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
1171 	nstats->rx_missed_errors = 0;
1172 
1173 	nstats->rx_errors = nstats->rx_length_errors +
1174 			    nstats->rx_over_errors +
1175 			    nstats->rx_crc_errors +
1176 			    nstats->rx_frame_errors +
1177 			    nstats->rx_fifo_errors +
1178 			    nstats->rx_missed_errors;
1179 
1180 	nstats->tx_aborted_errors =
1181 		bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
1182 		bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
1183 	nstats->tx_carrier_errors =
1184 		bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
1185 	nstats->tx_fifo_errors = 0;
1186 	nstats->tx_heartbeat_errors = 0;
1187 	nstats->tx_window_errors = 0;
1188 
1189 	nstats->tx_errors = nstats->tx_aborted_errors +
1190 			    nstats->tx_carrier_errors +
1191 	    bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
1192 }
1193 
1194 static void bnx2x_drv_stats_update(struct bnx2x *bp)
1195 {
1196 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
1197 	int i;
1198 
1199 	for_each_queue(bp, i) {
1200 		struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
1201 		struct bnx2x_eth_q_stats_old *qstats_old =
1202 			&bp->fp_stats[i].eth_q_stats_old;
1203 
1204 		UPDATE_ESTAT_QSTAT(driver_xoff);
1205 		UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
1206 		UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
1207 		UPDATE_ESTAT_QSTAT(hw_csum_err);
1208 		UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt);
1209 	}
1210 }
1211 
1212 static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
1213 {
1214 	u32 val;
1215 
1216 	if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
1217 		val = SHMEM2_RD(bp, edebug_driver_if[1]);
1218 
1219 		if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
1220 			return true;
1221 	}
1222 
1223 	return false;
1224 }
1225 
1226 static void bnx2x_stats_update(struct bnx2x *bp)
1227 {
1228 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1229 
1230 	if (bnx2x_edebug_stats_stopped(bp))
1231 		return;
1232 
1233 	if (IS_PF(bp)) {
1234 		if (*stats_comp != DMAE_COMP_VAL)
1235 			return;
1236 
1237 		if (bp->port.pmf)
1238 			bnx2x_hw_stats_update(bp);
1239 
1240 		if (bnx2x_storm_stats_update(bp)) {
1241 			if (bp->stats_pending++ == 3) {
1242 				BNX2X_ERR("storm stats were not updated for 3 times\n");
1243 				bnx2x_panic();
1244 			}
1245 			return;
1246 		}
1247 	} else {
1248 		/* vf doesn't collect HW statistics, and doesn't get completions
1249 		 * perform only update
1250 		 */
1251 		bnx2x_storm_stats_update(bp);
1252 	}
1253 
1254 	bnx2x_net_stats_update(bp);
1255 	bnx2x_drv_stats_update(bp);
1256 
1257 	/* vf is done */
1258 	if (IS_VF(bp))
1259 		return;
1260 
1261 	if (netif_msg_timer(bp)) {
1262 		struct bnx2x_eth_stats *estats = &bp->eth_stats;
1263 
1264 		netdev_dbg(bp->dev, "brb drops %u  brb truncate %u\n",
1265 		       estats->brb_drop_lo, estats->brb_truncate_lo);
1266 	}
1267 
1268 	bnx2x_hw_stats_post(bp);
1269 	bnx2x_storm_stats_post(bp);
1270 }
1271 
1272 static void bnx2x_port_stats_stop(struct bnx2x *bp)
1273 {
1274 	struct dmae_command *dmae;
1275 	u32 opcode;
1276 	int loader_idx = PMF_DMAE_C(bp);
1277 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1278 
1279 	bp->executer_idx = 0;
1280 
1281 	opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
1282 
1283 	if (bp->port.port_stx) {
1284 
1285 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1286 		if (bp->func_stx)
1287 			dmae->opcode = bnx2x_dmae_opcode_add_comp(
1288 						opcode, DMAE_COMP_GRC);
1289 		else
1290 			dmae->opcode = bnx2x_dmae_opcode_add_comp(
1291 						opcode, DMAE_COMP_PCI);
1292 
1293 		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1294 		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1295 		dmae->dst_addr_lo = bp->port.port_stx >> 2;
1296 		dmae->dst_addr_hi = 0;
1297 		dmae->len = bnx2x_get_port_stats_dma_len(bp);
1298 		if (bp->func_stx) {
1299 			dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
1300 			dmae->comp_addr_hi = 0;
1301 			dmae->comp_val = 1;
1302 		} else {
1303 			dmae->comp_addr_lo =
1304 				U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1305 			dmae->comp_addr_hi =
1306 				U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1307 			dmae->comp_val = DMAE_COMP_VAL;
1308 
1309 			*stats_comp = 0;
1310 		}
1311 	}
1312 
1313 	if (bp->func_stx) {
1314 
1315 		dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1316 		dmae->opcode =
1317 			bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
1318 		dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
1319 		dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
1320 		dmae->dst_addr_lo = bp->func_stx >> 2;
1321 		dmae->dst_addr_hi = 0;
1322 		dmae->len = sizeof(struct host_func_stats) >> 2;
1323 		dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1324 		dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1325 		dmae->comp_val = DMAE_COMP_VAL;
1326 
1327 		*stats_comp = 0;
1328 	}
1329 }
1330 
1331 static void bnx2x_stats_stop(struct bnx2x *bp)
1332 {
1333 	int update = 0;
1334 
1335 	bnx2x_stats_comp(bp);
1336 
1337 	if (bp->port.pmf)
1338 		update = (bnx2x_hw_stats_update(bp) == 0);
1339 
1340 	update |= (bnx2x_storm_stats_update(bp) == 0);
1341 
1342 	if (update) {
1343 		bnx2x_net_stats_update(bp);
1344 
1345 		if (bp->port.pmf)
1346 			bnx2x_port_stats_stop(bp);
1347 
1348 		bnx2x_hw_stats_post(bp);
1349 		bnx2x_stats_comp(bp);
1350 	}
1351 }
1352 
1353 static void bnx2x_stats_do_nothing(struct bnx2x *bp)
1354 {
1355 }
1356 
1357 static const struct {
1358 	void (*action)(struct bnx2x *bp);
1359 	enum bnx2x_stats_state next_state;
1360 } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
1361 /* state	event	*/
1362 {
1363 /* DISABLED	PMF	*/ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
1364 /*		LINK_UP	*/ {bnx2x_stats_start,      STATS_STATE_ENABLED},
1365 /*		UPDATE	*/ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
1366 /*		STOP	*/ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
1367 },
1368 {
1369 /* ENABLED	PMF	*/ {bnx2x_stats_pmf_start,  STATS_STATE_ENABLED},
1370 /*		LINK_UP	*/ {bnx2x_stats_restart,    STATS_STATE_ENABLED},
1371 /*		UPDATE	*/ {bnx2x_stats_update,     STATS_STATE_ENABLED},
1372 /*		STOP	*/ {bnx2x_stats_stop,       STATS_STATE_DISABLED}
1373 }
1374 };
1375 
1376 void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
1377 {
1378 	enum bnx2x_stats_state state;
1379 	if (unlikely(bp->panic))
1380 		return;
1381 
1382 	spin_lock_bh(&bp->stats_lock);
1383 	state = bp->stats_state;
1384 	bp->stats_state = bnx2x_stats_stm[state][event].next_state;
1385 	spin_unlock_bh(&bp->stats_lock);
1386 
1387 	bnx2x_stats_stm[state][event].action(bp);
1388 
1389 	if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
1390 		DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
1391 		   state, event, bp->stats_state);
1392 }
1393 
1394 static void bnx2x_port_stats_base_init(struct bnx2x *bp)
1395 {
1396 	struct dmae_command *dmae;
1397 	u32 *stats_comp = bnx2x_sp(bp, stats_comp);
1398 
1399 	/* sanity */
1400 	if (!bp->port.pmf || !bp->port.port_stx) {
1401 		BNX2X_ERR("BUG!\n");
1402 		return;
1403 	}
1404 
1405 	bp->executer_idx = 0;
1406 
1407 	dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
1408 	dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
1409 					 true, DMAE_COMP_PCI);
1410 	dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
1411 	dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
1412 	dmae->dst_addr_lo = bp->port.port_stx >> 2;
1413 	dmae->dst_addr_hi = 0;
1414 	dmae->len = bnx2x_get_port_stats_dma_len(bp);
1415 	dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
1416 	dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
1417 	dmae->comp_val = DMAE_COMP_VAL;
1418 
1419 	*stats_comp = 0;
1420 	bnx2x_hw_stats_post(bp);
1421 	bnx2x_stats_comp(bp);
1422 }
1423 
1424 /* This function will prepare the statistics ramrod data the way
1425  * we will only have to increment the statistics counter and
1426  * send the ramrod each time we have to.
1427  */
1428 static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
1429 {
1430 	int i;
1431 	int first_queue_query_index;
1432 	struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
1433 
1434 	dma_addr_t cur_data_offset;
1435 	struct stats_query_entry *cur_query_entry;
1436 
1437 	stats_hdr->cmd_num = bp->fw_stats_num;
1438 	stats_hdr->drv_stats_counter = 0;
1439 
1440 	/* storm_counters struct contains the counters of completed
1441 	 * statistics requests per storm which are incremented by FW
1442 	 * each time it completes hadning a statistics ramrod. We will
1443 	 * check these counters in the timer handler and discard a
1444 	 * (statistics) ramrod completion.
1445 	 */
1446 	cur_data_offset = bp->fw_stats_data_mapping +
1447 		offsetof(struct bnx2x_fw_stats_data, storm_counters);
1448 
1449 	stats_hdr->stats_counters_addrs.hi =
1450 		cpu_to_le32(U64_HI(cur_data_offset));
1451 	stats_hdr->stats_counters_addrs.lo =
1452 		cpu_to_le32(U64_LO(cur_data_offset));
1453 
1454 	/* prepare to the first stats ramrod (will be completed with
1455 	 * the counters equal to zero) - init counters to somethig different.
1456 	 */
1457 	memset(&bp->fw_stats_data->storm_counters, 0xff,
1458 	       sizeof(struct stats_counter));
1459 
1460 	/**** Port FW statistics data ****/
1461 	cur_data_offset = bp->fw_stats_data_mapping +
1462 		offsetof(struct bnx2x_fw_stats_data, port);
1463 
1464 	cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
1465 
1466 	cur_query_entry->kind = STATS_TYPE_PORT;
1467 	/* For port query index is a DONT CARE */
1468 	cur_query_entry->index = BP_PORT(bp);
1469 	/* For port query funcID is a DONT CARE */
1470 	cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1471 	cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
1472 	cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
1473 
1474 	/**** PF FW statistics data ****/
1475 	cur_data_offset = bp->fw_stats_data_mapping +
1476 		offsetof(struct bnx2x_fw_stats_data, pf);
1477 
1478 	cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
1479 
1480 	cur_query_entry->kind = STATS_TYPE_PF;
1481 	/* For PF query index is a DONT CARE */
1482 	cur_query_entry->index = BP_PORT(bp);
1483 	cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1484 	cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
1485 	cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
1486 
1487 	/**** FCoE FW statistics data ****/
1488 	if (!NO_FCOE(bp)) {
1489 		cur_data_offset = bp->fw_stats_data_mapping +
1490 			offsetof(struct bnx2x_fw_stats_data, fcoe);
1491 
1492 		cur_query_entry =
1493 			&bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
1494 
1495 		cur_query_entry->kind = STATS_TYPE_FCOE;
1496 		/* For FCoE query index is a DONT CARE */
1497 		cur_query_entry->index = BP_PORT(bp);
1498 		cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1499 		cur_query_entry->address.hi =
1500 			cpu_to_le32(U64_HI(cur_data_offset));
1501 		cur_query_entry->address.lo =
1502 			cpu_to_le32(U64_LO(cur_data_offset));
1503 	}
1504 
1505 	/**** Clients' queries ****/
1506 	cur_data_offset = bp->fw_stats_data_mapping +
1507 		offsetof(struct bnx2x_fw_stats_data, queue_stats);
1508 
1509 	/* first queue query index depends whether FCoE offloaded request will
1510 	 * be included in the ramrod
1511 	 */
1512 	if (!NO_FCOE(bp))
1513 		first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
1514 	else
1515 		first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
1516 
1517 	for_each_eth_queue(bp, i) {
1518 		cur_query_entry =
1519 			&bp->fw_stats_req->
1520 					query[first_queue_query_index + i];
1521 
1522 		cur_query_entry->kind = STATS_TYPE_QUEUE;
1523 		cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
1524 		cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1525 		cur_query_entry->address.hi =
1526 			cpu_to_le32(U64_HI(cur_data_offset));
1527 		cur_query_entry->address.lo =
1528 			cpu_to_le32(U64_LO(cur_data_offset));
1529 
1530 		cur_data_offset += sizeof(struct per_queue_stats);
1531 	}
1532 
1533 	/* add FCoE queue query if needed */
1534 	if (!NO_FCOE(bp)) {
1535 		cur_query_entry =
1536 			&bp->fw_stats_req->
1537 					query[first_queue_query_index + i];
1538 
1539 		cur_query_entry->kind = STATS_TYPE_QUEUE;
1540 		cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
1541 		cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
1542 		cur_query_entry->address.hi =
1543 			cpu_to_le32(U64_HI(cur_data_offset));
1544 		cur_query_entry->address.lo =
1545 			cpu_to_le32(U64_LO(cur_data_offset));
1546 	}
1547 }
1548 
1549 void bnx2x_memset_stats(struct bnx2x *bp)
1550 {
1551 	int i;
1552 
1553 	/* function stats */
1554 	for_each_queue(bp, i) {
1555 		struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
1556 
1557 		memset(&fp_stats->old_tclient, 0,
1558 		       sizeof(fp_stats->old_tclient));
1559 		memset(&fp_stats->old_uclient, 0,
1560 		       sizeof(fp_stats->old_uclient));
1561 		memset(&fp_stats->old_xclient, 0,
1562 		       sizeof(fp_stats->old_xclient));
1563 		if (bp->stats_init) {
1564 			memset(&fp_stats->eth_q_stats, 0,
1565 			       sizeof(fp_stats->eth_q_stats));
1566 			memset(&fp_stats->eth_q_stats_old, 0,
1567 			       sizeof(fp_stats->eth_q_stats_old));
1568 		}
1569 	}
1570 
1571 	memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
1572 
1573 	if (bp->stats_init) {
1574 		memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
1575 		memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
1576 		memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
1577 		memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
1578 		memset(&bp->func_stats, 0, sizeof(bp->func_stats));
1579 	}
1580 
1581 	bp->stats_state = STATS_STATE_DISABLED;
1582 
1583 	if (bp->port.pmf && bp->port.port_stx)
1584 		bnx2x_port_stats_base_init(bp);
1585 
1586 	/* mark the end of statistics initializiation */
1587 	bp->stats_init = false;
1588 }
1589 
1590 void bnx2x_stats_init(struct bnx2x *bp)
1591 {
1592 	int /*abs*/port = BP_PORT(bp);
1593 	int mb_idx = BP_FW_MB_IDX(bp);
1594 
1595 	bp->stats_pending = 0;
1596 	bp->executer_idx = 0;
1597 	bp->stats_counter = 0;
1598 
1599 	/* port and func stats for management */
1600 	if (!BP_NOMCP(bp)) {
1601 		bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
1602 		bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
1603 
1604 	} else {
1605 		bp->port.port_stx = 0;
1606 		bp->func_stx = 0;
1607 	}
1608 	DP(BNX2X_MSG_STATS, "port_stx 0x%x  func_stx 0x%x\n",
1609 	   bp->port.port_stx, bp->func_stx);
1610 
1611 	/* pmf should retrieve port statistics from SP on a non-init*/
1612 	if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
1613 		bnx2x_stats_handle(bp, STATS_EVENT_PMF);
1614 
1615 	port = BP_PORT(bp);
1616 	/* port stats */
1617 	memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
1618 	bp->port.old_nig_stats.brb_discard =
1619 			REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
1620 	bp->port.old_nig_stats.brb_truncate =
1621 			REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
1622 	if (!CHIP_IS_E3(bp)) {
1623 		REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
1624 			    &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
1625 		REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
1626 			    &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
1627 	}
1628 
1629 	/* Prepare statistics ramrod data */
1630 	bnx2x_prep_fw_stats_req(bp);
1631 
1632 	/* Clean SP from previous statistics */
1633 	if (bp->stats_init) {
1634 		if (bp->func_stx) {
1635 			memset(bnx2x_sp(bp, func_stats), 0,
1636 			       sizeof(struct host_func_stats));
1637 			bnx2x_func_stats_init(bp);
1638 			bnx2x_hw_stats_post(bp);
1639 			bnx2x_stats_comp(bp);
1640 		}
1641 	}
1642 
1643 	bnx2x_memset_stats(bp);
1644 }
1645 
1646 void bnx2x_save_statistics(struct bnx2x *bp)
1647 {
1648 	int i;
1649 	struct net_device_stats *nstats = &bp->dev->stats;
1650 
1651 	/* save queue statistics */
1652 	for_each_eth_queue(bp, i) {
1653 		struct bnx2x_fastpath *fp = &bp->fp[i];
1654 		struct bnx2x_eth_q_stats *qstats =
1655 			&bnx2x_fp_stats(bp, fp)->eth_q_stats;
1656 		struct bnx2x_eth_q_stats_old *qstats_old =
1657 			&bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
1658 
1659 		UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
1660 		UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
1661 		UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
1662 		UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
1663 		UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
1664 		UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
1665 		UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
1666 		UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
1667 		UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
1668 		UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
1669 		UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
1670 		UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
1671 		UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
1672 		UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
1673 	}
1674 
1675 	/* save net_device_stats statistics */
1676 	bp->net_stats_old.rx_dropped = nstats->rx_dropped;
1677 
1678 	/* store port firmware statistics */
1679 	if (bp->port.pmf && IS_MF(bp)) {
1680 		struct bnx2x_eth_stats *estats = &bp->eth_stats;
1681 		struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
1682 		UPDATE_FW_STAT_OLD(mac_filter_discard);
1683 		UPDATE_FW_STAT_OLD(mf_tag_discard);
1684 		UPDATE_FW_STAT_OLD(brb_truncate_discard);
1685 		UPDATE_FW_STAT_OLD(mac_discard);
1686 	}
1687 }
1688 
1689 void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
1690 			      u32 stats_type)
1691 {
1692 	int i;
1693 	struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
1694 	struct bnx2x_eth_stats *estats = &bp->eth_stats;
1695 	struct per_queue_stats *fcoe_q_stats =
1696 		&bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
1697 
1698 	struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
1699 		&fcoe_q_stats->tstorm_queue_statistics;
1700 
1701 	struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
1702 		&fcoe_q_stats->ustorm_queue_statistics;
1703 
1704 	struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
1705 		&fcoe_q_stats->xstorm_queue_statistics;
1706 
1707 	struct fcoe_statistics_params *fw_fcoe_stat =
1708 		&bp->fw_stats_data->fcoe;
1709 
1710 	memset(afex_stats, 0, sizeof(struct afex_stats));
1711 
1712 	for_each_eth_queue(bp, i) {
1713 		struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
1714 
1715 		ADD_64(afex_stats->rx_unicast_bytes_hi,
1716 		       qstats->total_unicast_bytes_received_hi,
1717 		       afex_stats->rx_unicast_bytes_lo,
1718 		       qstats->total_unicast_bytes_received_lo);
1719 
1720 		ADD_64(afex_stats->rx_broadcast_bytes_hi,
1721 		       qstats->total_broadcast_bytes_received_hi,
1722 		       afex_stats->rx_broadcast_bytes_lo,
1723 		       qstats->total_broadcast_bytes_received_lo);
1724 
1725 		ADD_64(afex_stats->rx_multicast_bytes_hi,
1726 		       qstats->total_multicast_bytes_received_hi,
1727 		       afex_stats->rx_multicast_bytes_lo,
1728 		       qstats->total_multicast_bytes_received_lo);
1729 
1730 		ADD_64(afex_stats->rx_unicast_frames_hi,
1731 		       qstats->total_unicast_packets_received_hi,
1732 		       afex_stats->rx_unicast_frames_lo,
1733 		       qstats->total_unicast_packets_received_lo);
1734 
1735 		ADD_64(afex_stats->rx_broadcast_frames_hi,
1736 		       qstats->total_broadcast_packets_received_hi,
1737 		       afex_stats->rx_broadcast_frames_lo,
1738 		       qstats->total_broadcast_packets_received_lo);
1739 
1740 		ADD_64(afex_stats->rx_multicast_frames_hi,
1741 		       qstats->total_multicast_packets_received_hi,
1742 		       afex_stats->rx_multicast_frames_lo,
1743 		       qstats->total_multicast_packets_received_lo);
1744 
1745 		/* sum to rx_frames_discarded all discraded
1746 		 * packets due to size, ttl0 and checksum
1747 		 */
1748 		ADD_64(afex_stats->rx_frames_discarded_hi,
1749 		       qstats->total_packets_received_checksum_discarded_hi,
1750 		       afex_stats->rx_frames_discarded_lo,
1751 		       qstats->total_packets_received_checksum_discarded_lo);
1752 
1753 		ADD_64(afex_stats->rx_frames_discarded_hi,
1754 		       qstats->total_packets_received_ttl0_discarded_hi,
1755 		       afex_stats->rx_frames_discarded_lo,
1756 		       qstats->total_packets_received_ttl0_discarded_lo);
1757 
1758 		ADD_64(afex_stats->rx_frames_discarded_hi,
1759 		       qstats->etherstatsoverrsizepkts_hi,
1760 		       afex_stats->rx_frames_discarded_lo,
1761 		       qstats->etherstatsoverrsizepkts_lo);
1762 
1763 		ADD_64(afex_stats->rx_frames_dropped_hi,
1764 		       qstats->no_buff_discard_hi,
1765 		       afex_stats->rx_frames_dropped_lo,
1766 		       qstats->no_buff_discard_lo);
1767 
1768 		ADD_64(afex_stats->tx_unicast_bytes_hi,
1769 		       qstats->total_unicast_bytes_transmitted_hi,
1770 		       afex_stats->tx_unicast_bytes_lo,
1771 		       qstats->total_unicast_bytes_transmitted_lo);
1772 
1773 		ADD_64(afex_stats->tx_broadcast_bytes_hi,
1774 		       qstats->total_broadcast_bytes_transmitted_hi,
1775 		       afex_stats->tx_broadcast_bytes_lo,
1776 		       qstats->total_broadcast_bytes_transmitted_lo);
1777 
1778 		ADD_64(afex_stats->tx_multicast_bytes_hi,
1779 		       qstats->total_multicast_bytes_transmitted_hi,
1780 		       afex_stats->tx_multicast_bytes_lo,
1781 		       qstats->total_multicast_bytes_transmitted_lo);
1782 
1783 		ADD_64(afex_stats->tx_unicast_frames_hi,
1784 		       qstats->total_unicast_packets_transmitted_hi,
1785 		       afex_stats->tx_unicast_frames_lo,
1786 		       qstats->total_unicast_packets_transmitted_lo);
1787 
1788 		ADD_64(afex_stats->tx_broadcast_frames_hi,
1789 		       qstats->total_broadcast_packets_transmitted_hi,
1790 		       afex_stats->tx_broadcast_frames_lo,
1791 		       qstats->total_broadcast_packets_transmitted_lo);
1792 
1793 		ADD_64(afex_stats->tx_multicast_frames_hi,
1794 		       qstats->total_multicast_packets_transmitted_hi,
1795 		       afex_stats->tx_multicast_frames_lo,
1796 		       qstats->total_multicast_packets_transmitted_lo);
1797 
1798 		ADD_64(afex_stats->tx_frames_dropped_hi,
1799 		       qstats->total_transmitted_dropped_packets_error_hi,
1800 		       afex_stats->tx_frames_dropped_lo,
1801 		       qstats->total_transmitted_dropped_packets_error_lo);
1802 	}
1803 
1804 	/* now add FCoE statistics which are collected separately
1805 	 * (both offloaded and non offloaded)
1806 	 */
1807 	if (!NO_FCOE(bp)) {
1808 		ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
1809 			  LE32_0,
1810 			  afex_stats->rx_unicast_bytes_lo,
1811 			  fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
1812 
1813 		ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
1814 			  fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
1815 			  afex_stats->rx_unicast_bytes_lo,
1816 			  fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
1817 
1818 		ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
1819 			  fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
1820 			  afex_stats->rx_broadcast_bytes_lo,
1821 			  fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
1822 
1823 		ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
1824 			  fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
1825 			  afex_stats->rx_multicast_bytes_lo,
1826 			  fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
1827 
1828 		ADD_64_LE(afex_stats->rx_unicast_frames_hi,
1829 			  LE32_0,
1830 			  afex_stats->rx_unicast_frames_lo,
1831 			  fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
1832 
1833 		ADD_64_LE(afex_stats->rx_unicast_frames_hi,
1834 			  LE32_0,
1835 			  afex_stats->rx_unicast_frames_lo,
1836 			  fcoe_q_tstorm_stats->rcv_ucast_pkts);
1837 
1838 		ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
1839 			  LE32_0,
1840 			  afex_stats->rx_broadcast_frames_lo,
1841 			  fcoe_q_tstorm_stats->rcv_bcast_pkts);
1842 
1843 		ADD_64_LE(afex_stats->rx_multicast_frames_hi,
1844 			  LE32_0,
1845 			  afex_stats->rx_multicast_frames_lo,
1846 			  fcoe_q_tstorm_stats->rcv_ucast_pkts);
1847 
1848 		ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1849 			  LE32_0,
1850 			  afex_stats->rx_frames_discarded_lo,
1851 			  fcoe_q_tstorm_stats->checksum_discard);
1852 
1853 		ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1854 			  LE32_0,
1855 			  afex_stats->rx_frames_discarded_lo,
1856 			  fcoe_q_tstorm_stats->pkts_too_big_discard);
1857 
1858 		ADD_64_LE(afex_stats->rx_frames_discarded_hi,
1859 			  LE32_0,
1860 			  afex_stats->rx_frames_discarded_lo,
1861 			  fcoe_q_tstorm_stats->ttl0_discard);
1862 
1863 		ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
1864 			    LE16_0,
1865 			    afex_stats->rx_frames_dropped_lo,
1866 			    fcoe_q_tstorm_stats->no_buff_discard);
1867 
1868 		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1869 			  LE32_0,
1870 			  afex_stats->rx_frames_dropped_lo,
1871 			  fcoe_q_ustorm_stats->ucast_no_buff_pkts);
1872 
1873 		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1874 			  LE32_0,
1875 			  afex_stats->rx_frames_dropped_lo,
1876 			  fcoe_q_ustorm_stats->mcast_no_buff_pkts);
1877 
1878 		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1879 			  LE32_0,
1880 			  afex_stats->rx_frames_dropped_lo,
1881 			  fcoe_q_ustorm_stats->bcast_no_buff_pkts);
1882 
1883 		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1884 			  LE32_0,
1885 			  afex_stats->rx_frames_dropped_lo,
1886 			  fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
1887 
1888 		ADD_64_LE(afex_stats->rx_frames_dropped_hi,
1889 			  LE32_0,
1890 			  afex_stats->rx_frames_dropped_lo,
1891 			  fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
1892 
1893 		ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
1894 			  LE32_0,
1895 			  afex_stats->tx_unicast_bytes_lo,
1896 			  fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
1897 
1898 		ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
1899 			  fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
1900 			  afex_stats->tx_unicast_bytes_lo,
1901 			  fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
1902 
1903 		ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
1904 			  fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
1905 			  afex_stats->tx_broadcast_bytes_lo,
1906 			  fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
1907 
1908 		ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
1909 			  fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
1910 			  afex_stats->tx_multicast_bytes_lo,
1911 			  fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
1912 
1913 		ADD_64_LE(afex_stats->tx_unicast_frames_hi,
1914 			  LE32_0,
1915 			  afex_stats->tx_unicast_frames_lo,
1916 			  fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
1917 
1918 		ADD_64_LE(afex_stats->tx_unicast_frames_hi,
1919 			  LE32_0,
1920 			  afex_stats->tx_unicast_frames_lo,
1921 			  fcoe_q_xstorm_stats->ucast_pkts_sent);
1922 
1923 		ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
1924 			  LE32_0,
1925 			  afex_stats->tx_broadcast_frames_lo,
1926 			  fcoe_q_xstorm_stats->bcast_pkts_sent);
1927 
1928 		ADD_64_LE(afex_stats->tx_multicast_frames_hi,
1929 			  LE32_0,
1930 			  afex_stats->tx_multicast_frames_lo,
1931 			  fcoe_q_xstorm_stats->mcast_pkts_sent);
1932 
1933 		ADD_64_LE(afex_stats->tx_frames_dropped_hi,
1934 			  LE32_0,
1935 			  afex_stats->tx_frames_dropped_lo,
1936 			  fcoe_q_xstorm_stats->error_drop_pkts);
1937 	}
1938 
1939 	/* if port stats are requested, add them to the PMF
1940 	 * stats, as anyway they will be accumulated by the
1941 	 * MCP before sent to the switch
1942 	 */
1943 	if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
1944 		ADD_64(afex_stats->rx_frames_dropped_hi,
1945 		       0,
1946 		       afex_stats->rx_frames_dropped_lo,
1947 		       estats->mac_filter_discard);
1948 		ADD_64(afex_stats->rx_frames_dropped_hi,
1949 		       0,
1950 		       afex_stats->rx_frames_dropped_lo,
1951 		       estats->brb_truncate_discard);
1952 		ADD_64(afex_stats->rx_frames_discarded_hi,
1953 		       0,
1954 		       afex_stats->rx_frames_discarded_lo,
1955 		       estats->mac_discard);
1956 	}
1957 }
1958