1adfc5217SJeff Kirsher /* bnx2x_cmn.h: Broadcom Everest network driver. 2adfc5217SJeff Kirsher * 3247fa82bSYuval Mintz * Copyright (c) 2007-2013 Broadcom Corporation 4adfc5217SJeff Kirsher * 5adfc5217SJeff Kirsher * This program is free software; you can redistribute it and/or modify 6adfc5217SJeff Kirsher * it under the terms of the GNU General Public License as published by 7adfc5217SJeff Kirsher * the Free Software Foundation. 8adfc5217SJeff Kirsher * 9adfc5217SJeff Kirsher * Maintained by: Eilon Greenstein <eilong@broadcom.com> 10adfc5217SJeff Kirsher * Written by: Eliezer Tamir 11adfc5217SJeff Kirsher * Based on code from Michael Chan's bnx2 driver 12adfc5217SJeff Kirsher * UDP CSUM errata workaround by Arik Gendelman 13adfc5217SJeff Kirsher * Slowpath and fastpath rework by Vladislav Zolotarov 14adfc5217SJeff Kirsher * Statistics and Link management by Yitchak Gertner 15adfc5217SJeff Kirsher * 16adfc5217SJeff Kirsher */ 17adfc5217SJeff Kirsher #ifndef BNX2X_CMN_H 18adfc5217SJeff Kirsher #define BNX2X_CMN_H 19adfc5217SJeff Kirsher 20adfc5217SJeff Kirsher #include <linux/types.h> 21adfc5217SJeff Kirsher #include <linux/pci.h> 22adfc5217SJeff Kirsher #include <linux/netdevice.h> 23614c76dfSDmitry Kravkov #include <linux/etherdevice.h> 24adfc5217SJeff Kirsher 25adfc5217SJeff Kirsher 26adfc5217SJeff Kirsher #include "bnx2x.h" 276411280aSAriel Elior #include "bnx2x_sriov.h" 28adfc5217SJeff Kirsher 29adfc5217SJeff Kirsher /* This is used as a replacement for an MCP if it's not present */ 30adfc5217SJeff Kirsher extern int load_count[2][3]; /* per-path: 0-common, 1-port0, 2-port1 */ 31adfc5217SJeff Kirsher 32adfc5217SJeff Kirsher extern int num_queues; 330e8d2ec5SMerav Sicron extern int int_mode; 34adfc5217SJeff Kirsher 35adfc5217SJeff Kirsher /************************ Macros ********************************/ 36adfc5217SJeff Kirsher #define BNX2X_PCI_FREE(x, y, size) \ 37adfc5217SJeff Kirsher do { \ 38adfc5217SJeff Kirsher if (x) { \ 39adfc5217SJeff Kirsher dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \ 40adfc5217SJeff Kirsher x = NULL; \ 41adfc5217SJeff Kirsher y = 0; \ 42adfc5217SJeff Kirsher } \ 43adfc5217SJeff Kirsher } while (0) 44adfc5217SJeff Kirsher 45adfc5217SJeff Kirsher #define BNX2X_FREE(x) \ 46adfc5217SJeff Kirsher do { \ 47adfc5217SJeff Kirsher if (x) { \ 48adfc5217SJeff Kirsher kfree((void *)x); \ 49adfc5217SJeff Kirsher x = NULL; \ 50adfc5217SJeff Kirsher } \ 51adfc5217SJeff Kirsher } while (0) 52adfc5217SJeff Kirsher 53adfc5217SJeff Kirsher #define BNX2X_PCI_ALLOC(x, y, size) \ 54adfc5217SJeff Kirsher do { \ 55adfc5217SJeff Kirsher x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ 56adfc5217SJeff Kirsher if (x == NULL) \ 57adfc5217SJeff Kirsher goto alloc_mem_err; \ 58adfc5217SJeff Kirsher memset((void *)x, 0, size); \ 59adfc5217SJeff Kirsher } while (0) 60adfc5217SJeff Kirsher 61adfc5217SJeff Kirsher #define BNX2X_ALLOC(x, size) \ 62adfc5217SJeff Kirsher do { \ 63adfc5217SJeff Kirsher x = kzalloc(size, GFP_KERNEL); \ 64adfc5217SJeff Kirsher if (x == NULL) \ 65adfc5217SJeff Kirsher goto alloc_mem_err; \ 66adfc5217SJeff Kirsher } while (0) 67adfc5217SJeff Kirsher 68adfc5217SJeff Kirsher /*********************** Interfaces **************************** 69adfc5217SJeff Kirsher * Functions that need to be implemented by each driver version 70adfc5217SJeff Kirsher */ 71adfc5217SJeff Kirsher /* Init */ 72adfc5217SJeff Kirsher 73adfc5217SJeff Kirsher /** 74adfc5217SJeff Kirsher * bnx2x_send_unload_req - request unload mode from the MCP. 75adfc5217SJeff Kirsher * 76adfc5217SJeff Kirsher * @bp: driver handle 77adfc5217SJeff Kirsher * @unload_mode: requested function's unload mode 78adfc5217SJeff Kirsher * 79adfc5217SJeff Kirsher * Return unload mode returned by the MCP: COMMON, PORT or FUNC. 80adfc5217SJeff Kirsher */ 81adfc5217SJeff Kirsher u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode); 82adfc5217SJeff Kirsher 83adfc5217SJeff Kirsher /** 84adfc5217SJeff Kirsher * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP. 85adfc5217SJeff Kirsher * 86adfc5217SJeff Kirsher * @bp: driver handle 875d07d868SYuval Mintz * @keep_link: true iff link should be kept up 88adfc5217SJeff Kirsher */ 895d07d868SYuval Mintz void bnx2x_send_unload_done(struct bnx2x *bp, bool keep_link); 90adfc5217SJeff Kirsher 91adfc5217SJeff Kirsher /** 9296305234SDmitry Kravkov * bnx2x_config_rss_pf - configure RSS parameters in a PF. 93adfc5217SJeff Kirsher * 94adfc5217SJeff Kirsher * @bp: driver handle 9549ce9c2cSBen Hutchings * @rss_obj: RSS object to use 96adfc5217SJeff Kirsher * @ind_table: indirection table to configure 97adfc5217SJeff Kirsher * @config_hash: re-configure RSS hash keys configuration 98adfc5217SJeff Kirsher */ 9996305234SDmitry Kravkov int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj, 1005d317c6aSMerav Sicron bool config_hash); 101adfc5217SJeff Kirsher 102adfc5217SJeff Kirsher /** 103adfc5217SJeff Kirsher * bnx2x__init_func_obj - init function object 104adfc5217SJeff Kirsher * 105adfc5217SJeff Kirsher * @bp: driver handle 106adfc5217SJeff Kirsher * 107adfc5217SJeff Kirsher * Initializes the Function Object with the appropriate 108adfc5217SJeff Kirsher * parameters which include a function slow path driver 109adfc5217SJeff Kirsher * interface. 110adfc5217SJeff Kirsher */ 111adfc5217SJeff Kirsher void bnx2x__init_func_obj(struct bnx2x *bp); 112adfc5217SJeff Kirsher 113adfc5217SJeff Kirsher /** 114adfc5217SJeff Kirsher * bnx2x_setup_queue - setup eth queue. 115adfc5217SJeff Kirsher * 116adfc5217SJeff Kirsher * @bp: driver handle 117adfc5217SJeff Kirsher * @fp: pointer to the fastpath structure 118adfc5217SJeff Kirsher * @leading: boolean 119adfc5217SJeff Kirsher * 120adfc5217SJeff Kirsher */ 121adfc5217SJeff Kirsher int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, 122adfc5217SJeff Kirsher bool leading); 123adfc5217SJeff Kirsher 124adfc5217SJeff Kirsher /** 125adfc5217SJeff Kirsher * bnx2x_setup_leading - bring up a leading eth queue. 126adfc5217SJeff Kirsher * 127adfc5217SJeff Kirsher * @bp: driver handle 128adfc5217SJeff Kirsher */ 129adfc5217SJeff Kirsher int bnx2x_setup_leading(struct bnx2x *bp); 130adfc5217SJeff Kirsher 131adfc5217SJeff Kirsher /** 132adfc5217SJeff Kirsher * bnx2x_fw_command - send the MCP a request 133adfc5217SJeff Kirsher * 134adfc5217SJeff Kirsher * @bp: driver handle 135adfc5217SJeff Kirsher * @command: request 136adfc5217SJeff Kirsher * @param: request's parameter 137adfc5217SJeff Kirsher * 138adfc5217SJeff Kirsher * block until there is a reply 139adfc5217SJeff Kirsher */ 140adfc5217SJeff Kirsher u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); 141adfc5217SJeff Kirsher 142adfc5217SJeff Kirsher /** 143adfc5217SJeff Kirsher * bnx2x_initial_phy_init - initialize link parameters structure variables. 144adfc5217SJeff Kirsher * 145adfc5217SJeff Kirsher * @bp: driver handle 146adfc5217SJeff Kirsher * @load_mode: current mode 147adfc5217SJeff Kirsher */ 148cd1dfce2SYuval Mintz int bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode); 149adfc5217SJeff Kirsher 150adfc5217SJeff Kirsher /** 151adfc5217SJeff Kirsher * bnx2x_link_set - configure hw according to link parameters structure. 152adfc5217SJeff Kirsher * 153adfc5217SJeff Kirsher * @bp: driver handle 154adfc5217SJeff Kirsher */ 155adfc5217SJeff Kirsher void bnx2x_link_set(struct bnx2x *bp); 156adfc5217SJeff Kirsher 157adfc5217SJeff Kirsher /** 1585d07d868SYuval Mintz * bnx2x_force_link_reset - Forces link reset, and put the PHY 1595d07d868SYuval Mintz * in reset as well. 1605d07d868SYuval Mintz * 1615d07d868SYuval Mintz * @bp: driver handle 1625d07d868SYuval Mintz */ 1635d07d868SYuval Mintz void bnx2x_force_link_reset(struct bnx2x *bp); 1645d07d868SYuval Mintz 1655d07d868SYuval Mintz /** 166adfc5217SJeff Kirsher * bnx2x_link_test - query link status. 167adfc5217SJeff Kirsher * 168adfc5217SJeff Kirsher * @bp: driver handle 169adfc5217SJeff Kirsher * @is_serdes: bool 170adfc5217SJeff Kirsher * 171adfc5217SJeff Kirsher * Returns 0 if link is UP. 172adfc5217SJeff Kirsher */ 173adfc5217SJeff Kirsher u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes); 174adfc5217SJeff Kirsher 175adfc5217SJeff Kirsher /** 176adfc5217SJeff Kirsher * bnx2x_drv_pulse - write driver pulse to shmem 177adfc5217SJeff Kirsher * 178adfc5217SJeff Kirsher * @bp: driver handle 179adfc5217SJeff Kirsher * 180adfc5217SJeff Kirsher * writes the value in bp->fw_drv_pulse_wr_seq to drv_pulse mbox 181adfc5217SJeff Kirsher * in the shmem. 182adfc5217SJeff Kirsher */ 183adfc5217SJeff Kirsher void bnx2x_drv_pulse(struct bnx2x *bp); 184adfc5217SJeff Kirsher 185adfc5217SJeff Kirsher /** 186adfc5217SJeff Kirsher * bnx2x_igu_ack_sb - update IGU with current SB value 187adfc5217SJeff Kirsher * 188adfc5217SJeff Kirsher * @bp: driver handle 189adfc5217SJeff Kirsher * @igu_sb_id: SB id 190adfc5217SJeff Kirsher * @segment: SB segment 191adfc5217SJeff Kirsher * @index: SB index 192adfc5217SJeff Kirsher * @op: SB operation 193adfc5217SJeff Kirsher * @update: is HW update required 194adfc5217SJeff Kirsher */ 195adfc5217SJeff Kirsher void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, 196adfc5217SJeff Kirsher u16 index, u8 op, u8 update); 197adfc5217SJeff Kirsher 198adfc5217SJeff Kirsher /* Disable transactions from chip to host */ 199adfc5217SJeff Kirsher void bnx2x_pf_disable(struct bnx2x *bp); 20007ba6af4SMiriam Shitrit int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val); 201adfc5217SJeff Kirsher 202adfc5217SJeff Kirsher /** 203adfc5217SJeff Kirsher * bnx2x__link_status_update - handles link status change. 204adfc5217SJeff Kirsher * 205adfc5217SJeff Kirsher * @bp: driver handle 206adfc5217SJeff Kirsher */ 207adfc5217SJeff Kirsher void bnx2x__link_status_update(struct bnx2x *bp); 208adfc5217SJeff Kirsher 209adfc5217SJeff Kirsher /** 210adfc5217SJeff Kirsher * bnx2x_link_report - report link status to upper layer. 211adfc5217SJeff Kirsher * 212adfc5217SJeff Kirsher * @bp: driver handle 213adfc5217SJeff Kirsher */ 214adfc5217SJeff Kirsher void bnx2x_link_report(struct bnx2x *bp); 215adfc5217SJeff Kirsher 216adfc5217SJeff Kirsher /* None-atomic version of bnx2x_link_report() */ 217adfc5217SJeff Kirsher void __bnx2x_link_report(struct bnx2x *bp); 218adfc5217SJeff Kirsher 219adfc5217SJeff Kirsher /** 220adfc5217SJeff Kirsher * bnx2x_get_mf_speed - calculate MF speed. 221adfc5217SJeff Kirsher * 222adfc5217SJeff Kirsher * @bp: driver handle 223adfc5217SJeff Kirsher * 224adfc5217SJeff Kirsher * Takes into account current linespeed and MF configuration. 225adfc5217SJeff Kirsher */ 226adfc5217SJeff Kirsher u16 bnx2x_get_mf_speed(struct bnx2x *bp); 227adfc5217SJeff Kirsher 228adfc5217SJeff Kirsher /** 229adfc5217SJeff Kirsher * bnx2x_msix_sp_int - MSI-X slowpath interrupt handler 230adfc5217SJeff Kirsher * 231adfc5217SJeff Kirsher * @irq: irq number 232adfc5217SJeff Kirsher * @dev_instance: private instance 233adfc5217SJeff Kirsher */ 234adfc5217SJeff Kirsher irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance); 235adfc5217SJeff Kirsher 236adfc5217SJeff Kirsher /** 237adfc5217SJeff Kirsher * bnx2x_interrupt - non MSI-X interrupt handler 238adfc5217SJeff Kirsher * 239adfc5217SJeff Kirsher * @irq: irq number 240adfc5217SJeff Kirsher * @dev_instance: private instance 241adfc5217SJeff Kirsher */ 242adfc5217SJeff Kirsher irqreturn_t bnx2x_interrupt(int irq, void *dev_instance); 243adfc5217SJeff Kirsher 244adfc5217SJeff Kirsher /** 245adfc5217SJeff Kirsher * bnx2x_cnic_notify - send command to cnic driver 246adfc5217SJeff Kirsher * 247adfc5217SJeff Kirsher * @bp: driver handle 248adfc5217SJeff Kirsher * @cmd: command 249adfc5217SJeff Kirsher */ 250adfc5217SJeff Kirsher int bnx2x_cnic_notify(struct bnx2x *bp, int cmd); 251adfc5217SJeff Kirsher 252adfc5217SJeff Kirsher /** 253adfc5217SJeff Kirsher * bnx2x_setup_cnic_irq_info - provides cnic with IRQ information 254adfc5217SJeff Kirsher * 255adfc5217SJeff Kirsher * @bp: driver handle 256adfc5217SJeff Kirsher */ 257adfc5217SJeff Kirsher void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); 25837ae41a9SMerav Sicron 25937ae41a9SMerav Sicron /** 26037ae41a9SMerav Sicron * bnx2x_setup_cnic_info - provides cnic with updated info 26137ae41a9SMerav Sicron * 26237ae41a9SMerav Sicron * @bp: driver handle 26337ae41a9SMerav Sicron */ 26437ae41a9SMerav Sicron void bnx2x_setup_cnic_info(struct bnx2x *bp); 26537ae41a9SMerav Sicron 266adfc5217SJeff Kirsher /** 267adfc5217SJeff Kirsher * bnx2x_int_enable - enable HW interrupts. 268adfc5217SJeff Kirsher * 269adfc5217SJeff Kirsher * @bp: driver handle 270adfc5217SJeff Kirsher */ 271adfc5217SJeff Kirsher void bnx2x_int_enable(struct bnx2x *bp); 272adfc5217SJeff Kirsher 273adfc5217SJeff Kirsher /** 274adfc5217SJeff Kirsher * bnx2x_int_disable_sync - disable interrupts. 275adfc5217SJeff Kirsher * 276adfc5217SJeff Kirsher * @bp: driver handle 277adfc5217SJeff Kirsher * @disable_hw: true, disable HW interrupts. 278adfc5217SJeff Kirsher * 279adfc5217SJeff Kirsher * This function ensures that there are no 280adfc5217SJeff Kirsher * ISRs or SP DPCs (sp_task) are running after it returns. 281adfc5217SJeff Kirsher */ 282adfc5217SJeff Kirsher void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw); 283adfc5217SJeff Kirsher 284adfc5217SJeff Kirsher /** 28555c11941SMerav Sicron * bnx2x_nic_init_cnic - init driver internals for cnic. 286adfc5217SJeff Kirsher * 287adfc5217SJeff Kirsher * @bp: driver handle 288adfc5217SJeff Kirsher * @load_code: COMMON, PORT or FUNCTION 289adfc5217SJeff Kirsher * 290adfc5217SJeff Kirsher * Initializes: 291adfc5217SJeff Kirsher * - rings 292adfc5217SJeff Kirsher * - status blocks 293adfc5217SJeff Kirsher * - etc. 294adfc5217SJeff Kirsher */ 29555c11941SMerav Sicron void bnx2x_nic_init_cnic(struct bnx2x *bp); 296adfc5217SJeff Kirsher 297adfc5217SJeff Kirsher /** 298ecf01c22SYuval Mintz * bnx2x_preirq_nic_init - init driver internals. 29955c11941SMerav Sicron * 30055c11941SMerav Sicron * @bp: driver handle 30155c11941SMerav Sicron * 30255c11941SMerav Sicron * Initializes: 303ecf01c22SYuval Mintz * - fastpath object 304ecf01c22SYuval Mintz * - fastpath rings 305ecf01c22SYuval Mintz * etc. 306ecf01c22SYuval Mintz */ 307ecf01c22SYuval Mintz void bnx2x_pre_irq_nic_init(struct bnx2x *bp); 308ecf01c22SYuval Mintz 309ecf01c22SYuval Mintz /** 310ecf01c22SYuval Mintz * bnx2x_postirq_nic_init - init driver internals. 311ecf01c22SYuval Mintz * 312ecf01c22SYuval Mintz * @bp: driver handle 313ecf01c22SYuval Mintz * @load_code: COMMON, PORT or FUNCTION 314ecf01c22SYuval Mintz * 315ecf01c22SYuval Mintz * Initializes: 31655c11941SMerav Sicron * - status blocks 317ecf01c22SYuval Mintz * - slowpath rings 31855c11941SMerav Sicron * - etc. 31955c11941SMerav Sicron */ 320ecf01c22SYuval Mintz void bnx2x_post_irq_nic_init(struct bnx2x *bp, u32 load_code); 32155c11941SMerav Sicron /** 32255c11941SMerav Sicron * bnx2x_alloc_mem_cnic - allocate driver's memory for cnic. 32355c11941SMerav Sicron * 32455c11941SMerav Sicron * @bp: driver handle 32555c11941SMerav Sicron */ 32655c11941SMerav Sicron int bnx2x_alloc_mem_cnic(struct bnx2x *bp); 32755c11941SMerav Sicron /** 328adfc5217SJeff Kirsher * bnx2x_alloc_mem - allocate driver's memory. 329adfc5217SJeff Kirsher * 330adfc5217SJeff Kirsher * @bp: driver handle 331adfc5217SJeff Kirsher */ 332adfc5217SJeff Kirsher int bnx2x_alloc_mem(struct bnx2x *bp); 333adfc5217SJeff Kirsher 334adfc5217SJeff Kirsher /** 33555c11941SMerav Sicron * bnx2x_free_mem_cnic - release driver's memory for cnic. 33655c11941SMerav Sicron * 33755c11941SMerav Sicron * @bp: driver handle 33855c11941SMerav Sicron */ 33955c11941SMerav Sicron void bnx2x_free_mem_cnic(struct bnx2x *bp); 34055c11941SMerav Sicron /** 341adfc5217SJeff Kirsher * bnx2x_free_mem - release driver's memory. 342adfc5217SJeff Kirsher * 343adfc5217SJeff Kirsher * @bp: driver handle 344adfc5217SJeff Kirsher */ 345adfc5217SJeff Kirsher void bnx2x_free_mem(struct bnx2x *bp); 346adfc5217SJeff Kirsher 347adfc5217SJeff Kirsher /** 348adfc5217SJeff Kirsher * bnx2x_set_num_queues - set number of queues according to mode. 349adfc5217SJeff Kirsher * 350adfc5217SJeff Kirsher * @bp: driver handle 351adfc5217SJeff Kirsher */ 352adfc5217SJeff Kirsher void bnx2x_set_num_queues(struct bnx2x *bp); 353adfc5217SJeff Kirsher 354adfc5217SJeff Kirsher /** 355adfc5217SJeff Kirsher * bnx2x_chip_cleanup - cleanup chip internals. 356adfc5217SJeff Kirsher * 357adfc5217SJeff Kirsher * @bp: driver handle 358adfc5217SJeff Kirsher * @unload_mode: COMMON, PORT, FUNCTION 3595d07d868SYuval Mintz * @keep_link: true iff link should be kept up. 360adfc5217SJeff Kirsher * 361adfc5217SJeff Kirsher * - Cleanup MAC configuration. 362adfc5217SJeff Kirsher * - Closes clients. 363adfc5217SJeff Kirsher * - etc. 364adfc5217SJeff Kirsher */ 3655d07d868SYuval Mintz void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link); 366adfc5217SJeff Kirsher 367adfc5217SJeff Kirsher /** 368adfc5217SJeff Kirsher * bnx2x_acquire_hw_lock - acquire HW lock. 369adfc5217SJeff Kirsher * 370adfc5217SJeff Kirsher * @bp: driver handle 371adfc5217SJeff Kirsher * @resource: resource bit which was locked 372adfc5217SJeff Kirsher */ 373adfc5217SJeff Kirsher int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource); 374adfc5217SJeff Kirsher 375adfc5217SJeff Kirsher /** 376adfc5217SJeff Kirsher * bnx2x_release_hw_lock - release HW lock. 377adfc5217SJeff Kirsher * 378adfc5217SJeff Kirsher * @bp: driver handle 379adfc5217SJeff Kirsher * @resource: resource bit which was locked 380adfc5217SJeff Kirsher */ 381adfc5217SJeff Kirsher int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); 382adfc5217SJeff Kirsher 383adfc5217SJeff Kirsher /** 384adfc5217SJeff Kirsher * bnx2x_release_leader_lock - release recovery leader lock 385adfc5217SJeff Kirsher * 386adfc5217SJeff Kirsher * @bp: driver handle 387adfc5217SJeff Kirsher */ 388adfc5217SJeff Kirsher int bnx2x_release_leader_lock(struct bnx2x *bp); 389adfc5217SJeff Kirsher 390adfc5217SJeff Kirsher /** 391adfc5217SJeff Kirsher * bnx2x_set_eth_mac - configure eth MAC address in the HW 392adfc5217SJeff Kirsher * 393adfc5217SJeff Kirsher * @bp: driver handle 394adfc5217SJeff Kirsher * @set: set or clear 395adfc5217SJeff Kirsher * 396adfc5217SJeff Kirsher * Configures according to the value in netdev->dev_addr. 397adfc5217SJeff Kirsher */ 398adfc5217SJeff Kirsher int bnx2x_set_eth_mac(struct bnx2x *bp, bool set); 399adfc5217SJeff Kirsher 400adfc5217SJeff Kirsher /** 401adfc5217SJeff Kirsher * bnx2x_set_rx_mode - set MAC filtering configurations. 402adfc5217SJeff Kirsher * 403adfc5217SJeff Kirsher * @dev: netdevice 404adfc5217SJeff Kirsher * 405adfc5217SJeff Kirsher * called with netif_tx_lock from dev_mcast.c 406adfc5217SJeff Kirsher * If bp->state is OPEN, should be called with 407adfc5217SJeff Kirsher * netif_addr_lock_bh() 408adfc5217SJeff Kirsher */ 409adfc5217SJeff Kirsher void bnx2x_set_rx_mode(struct net_device *dev); 410adfc5217SJeff Kirsher 411adfc5217SJeff Kirsher /** 412adfc5217SJeff Kirsher * bnx2x_set_storm_rx_mode - configure MAC filtering rules in a FW. 413adfc5217SJeff Kirsher * 414adfc5217SJeff Kirsher * @bp: driver handle 415adfc5217SJeff Kirsher * 416adfc5217SJeff Kirsher * If bp->state is OPEN, should be called with 417adfc5217SJeff Kirsher * netif_addr_lock_bh(). 418adfc5217SJeff Kirsher */ 419924d75abSYuval Mintz int bnx2x_set_storm_rx_mode(struct bnx2x *bp); 420adfc5217SJeff Kirsher 421adfc5217SJeff Kirsher /** 422adfc5217SJeff Kirsher * bnx2x_set_q_rx_mode - configures rx_mode for a single queue. 423adfc5217SJeff Kirsher * 424adfc5217SJeff Kirsher * @bp: driver handle 425adfc5217SJeff Kirsher * @cl_id: client id 426adfc5217SJeff Kirsher * @rx_mode_flags: rx mode configuration 427adfc5217SJeff Kirsher * @rx_accept_flags: rx accept configuration 428adfc5217SJeff Kirsher * @tx_accept_flags: tx accept configuration (tx switch) 429adfc5217SJeff Kirsher * @ramrod_flags: ramrod configuration 430adfc5217SJeff Kirsher */ 431924d75abSYuval Mintz int bnx2x_set_q_rx_mode(struct bnx2x *bp, u8 cl_id, 432adfc5217SJeff Kirsher unsigned long rx_mode_flags, 433adfc5217SJeff Kirsher unsigned long rx_accept_flags, 434adfc5217SJeff Kirsher unsigned long tx_accept_flags, 435adfc5217SJeff Kirsher unsigned long ramrod_flags); 436adfc5217SJeff Kirsher 437adfc5217SJeff Kirsher /* Parity errors related */ 438889b9af3SAriel Elior void bnx2x_set_pf_load(struct bnx2x *bp); 439889b9af3SAriel Elior bool bnx2x_clear_pf_load(struct bnx2x *bp); 440adfc5217SJeff Kirsher bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print); 441adfc5217SJeff Kirsher bool bnx2x_reset_is_done(struct bnx2x *bp, int engine); 442adfc5217SJeff Kirsher void bnx2x_set_reset_in_progress(struct bnx2x *bp); 443adfc5217SJeff Kirsher void bnx2x_set_reset_global(struct bnx2x *bp); 444adfc5217SJeff Kirsher void bnx2x_disable_close_the_gate(struct bnx2x *bp); 44555c11941SMerav Sicron int bnx2x_init_hw_func_cnic(struct bnx2x *bp); 446adfc5217SJeff Kirsher 447adfc5217SJeff Kirsher /** 448adfc5217SJeff Kirsher * bnx2x_sp_event - handle ramrods completion. 449adfc5217SJeff Kirsher * 450adfc5217SJeff Kirsher * @fp: fastpath handle for the event 451adfc5217SJeff Kirsher * @rr_cqe: eth_rx_cqe 452adfc5217SJeff Kirsher */ 453adfc5217SJeff Kirsher void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); 454adfc5217SJeff Kirsher 455adfc5217SJeff Kirsher /** 456adfc5217SJeff Kirsher * bnx2x_ilt_set_info - prepare ILT configurations. 457adfc5217SJeff Kirsher * 458adfc5217SJeff Kirsher * @bp: driver handle 459adfc5217SJeff Kirsher */ 460adfc5217SJeff Kirsher void bnx2x_ilt_set_info(struct bnx2x *bp); 461adfc5217SJeff Kirsher 462adfc5217SJeff Kirsher /** 46355c11941SMerav Sicron * bnx2x_ilt_set_cnic_info - prepare ILT configurations for SRC 46455c11941SMerav Sicron * and TM. 46555c11941SMerav Sicron * 46655c11941SMerav Sicron * @bp: driver handle 46755c11941SMerav Sicron */ 46855c11941SMerav Sicron void bnx2x_ilt_set_info_cnic(struct bnx2x *bp); 46955c11941SMerav Sicron 47055c11941SMerav Sicron /** 471adfc5217SJeff Kirsher * bnx2x_dcbx_init - initialize dcbx protocol. 472adfc5217SJeff Kirsher * 473adfc5217SJeff Kirsher * @bp: driver handle 474adfc5217SJeff Kirsher */ 4759876879fSBarak Witkowski void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem); 476adfc5217SJeff Kirsher 477adfc5217SJeff Kirsher /** 478adfc5217SJeff Kirsher * bnx2x_set_power_state - set power state to the requested value. 479adfc5217SJeff Kirsher * 480adfc5217SJeff Kirsher * @bp: driver handle 481adfc5217SJeff Kirsher * @state: required state D0 or D3hot 482adfc5217SJeff Kirsher * 483adfc5217SJeff Kirsher * Currently only D0 and D3hot are supported. 484adfc5217SJeff Kirsher */ 485adfc5217SJeff Kirsher int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); 486adfc5217SJeff Kirsher 487adfc5217SJeff Kirsher /** 488adfc5217SJeff Kirsher * bnx2x_update_max_mf_config - update MAX part of MF configuration in HW. 489adfc5217SJeff Kirsher * 490adfc5217SJeff Kirsher * @bp: driver handle 491adfc5217SJeff Kirsher * @value: new value 492adfc5217SJeff Kirsher */ 493adfc5217SJeff Kirsher void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value); 494adfc5217SJeff Kirsher /* Error handling */ 495adfc5217SJeff Kirsher void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl); 496adfc5217SJeff Kirsher 497452427b0SYuval Mintz /* validate currect fw is loaded */ 498452427b0SYuval Mintz bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err); 499452427b0SYuval Mintz 500adfc5217SJeff Kirsher /* dev_close main block */ 5015d07d868SYuval Mintz int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link); 502adfc5217SJeff Kirsher 503adfc5217SJeff Kirsher /* dev_open main block */ 504adfc5217SJeff Kirsher int bnx2x_nic_load(struct bnx2x *bp, int load_mode); 505adfc5217SJeff Kirsher 506adfc5217SJeff Kirsher /* hard_xmit callback */ 507adfc5217SJeff Kirsher netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev); 508adfc5217SJeff Kirsher 509adfc5217SJeff Kirsher /* setup_tc callback */ 510adfc5217SJeff Kirsher int bnx2x_setup_tc(struct net_device *dev, u8 num_tc); 511adfc5217SJeff Kirsher 512abc5a021SAriel Elior int bnx2x_set_vf_mac(struct net_device *dev, int queue, u8 *mac); 513abc5a021SAriel Elior 514adfc5217SJeff Kirsher /* select_queue callback */ 515adfc5217SJeff Kirsher u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb); 516adfc5217SJeff Kirsher 517dc1ba591SAriel Elior static inline void bnx2x_update_rx_prod(struct bnx2x *bp, 518dc1ba591SAriel Elior struct bnx2x_fastpath *fp, 519dc1ba591SAriel Elior u16 bd_prod, u16 rx_comp_prod, 520dc1ba591SAriel Elior u16 rx_sge_prod) 521dc1ba591SAriel Elior { 522dc1ba591SAriel Elior struct ustorm_eth_rx_producers rx_prods = {0}; 523dc1ba591SAriel Elior u32 i; 524dc1ba591SAriel Elior 525dc1ba591SAriel Elior /* Update producers */ 526dc1ba591SAriel Elior rx_prods.bd_prod = bd_prod; 527dc1ba591SAriel Elior rx_prods.cqe_prod = rx_comp_prod; 528dc1ba591SAriel Elior rx_prods.sge_prod = rx_sge_prod; 529dc1ba591SAriel Elior 530dc1ba591SAriel Elior /* Make sure that the BD and SGE data is updated before updating the 531dc1ba591SAriel Elior * producers since FW might read the BD/SGE right after the producer 532dc1ba591SAriel Elior * is updated. 533dc1ba591SAriel Elior * This is only applicable for weak-ordered memory model archs such 534dc1ba591SAriel Elior * as IA-64. The following barrier is also mandatory since FW will 535dc1ba591SAriel Elior * assumes BDs must have buffers. 536dc1ba591SAriel Elior */ 537dc1ba591SAriel Elior wmb(); 538dc1ba591SAriel Elior 539dc1ba591SAriel Elior for (i = 0; i < sizeof(rx_prods)/4; i++) 540dc1ba591SAriel Elior REG_WR(bp, fp->ustorm_rx_prods_offset + i*4, 541dc1ba591SAriel Elior ((u32 *)&rx_prods)[i]); 542dc1ba591SAriel Elior 543dc1ba591SAriel Elior mmiowb(); /* keep prod updates ordered */ 544dc1ba591SAriel Elior 545dc1ba591SAriel Elior DP(NETIF_MSG_RX_STATUS, 546dc1ba591SAriel Elior "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", 547dc1ba591SAriel Elior fp->index, bd_prod, rx_comp_prod, rx_sge_prod); 548dc1ba591SAriel Elior } 549dc1ba591SAriel Elior 550adfc5217SJeff Kirsher /* reload helper */ 551adfc5217SJeff Kirsher int bnx2x_reload_if_running(struct net_device *dev); 552adfc5217SJeff Kirsher 553adfc5217SJeff Kirsher int bnx2x_change_mac_addr(struct net_device *dev, void *p); 554adfc5217SJeff Kirsher 555adfc5217SJeff Kirsher /* NAPI poll Rx part */ 556adfc5217SJeff Kirsher int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget); 557adfc5217SJeff Kirsher 558adfc5217SJeff Kirsher /* NAPI poll Tx part */ 559adfc5217SJeff Kirsher int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata); 560adfc5217SJeff Kirsher 561adfc5217SJeff Kirsher /* suspend/resume callbacks */ 562adfc5217SJeff Kirsher int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state); 563adfc5217SJeff Kirsher int bnx2x_resume(struct pci_dev *pdev); 564adfc5217SJeff Kirsher 565adfc5217SJeff Kirsher /* Release IRQ vectors */ 566adfc5217SJeff Kirsher void bnx2x_free_irq(struct bnx2x *bp); 567adfc5217SJeff Kirsher 56855c11941SMerav Sicron void bnx2x_free_fp_mem_cnic(struct bnx2x *bp); 569adfc5217SJeff Kirsher void bnx2x_free_fp_mem(struct bnx2x *bp); 57055c11941SMerav Sicron int bnx2x_alloc_fp_mem_cnic(struct bnx2x *bp); 571adfc5217SJeff Kirsher int bnx2x_alloc_fp_mem(struct bnx2x *bp); 572adfc5217SJeff Kirsher void bnx2x_init_rx_rings(struct bnx2x *bp); 57355c11941SMerav Sicron void bnx2x_init_rx_rings_cnic(struct bnx2x *bp); 57455c11941SMerav Sicron void bnx2x_free_skbs_cnic(struct bnx2x *bp); 575adfc5217SJeff Kirsher void bnx2x_free_skbs(struct bnx2x *bp); 576adfc5217SJeff Kirsher void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw); 577adfc5217SJeff Kirsher void bnx2x_netif_start(struct bnx2x *bp); 57855c11941SMerav Sicron int bnx2x_load_cnic(struct bnx2x *bp); 579adfc5217SJeff Kirsher 580adfc5217SJeff Kirsher /** 581adfc5217SJeff Kirsher * bnx2x_enable_msix - set msix configuration. 582adfc5217SJeff Kirsher * 583adfc5217SJeff Kirsher * @bp: driver handle 584adfc5217SJeff Kirsher * 585adfc5217SJeff Kirsher * fills msix_table, requests vectors, updates num_queues 586adfc5217SJeff Kirsher * according to number of available vectors. 587adfc5217SJeff Kirsher */ 5880e8d2ec5SMerav Sicron int bnx2x_enable_msix(struct bnx2x *bp); 589adfc5217SJeff Kirsher 590adfc5217SJeff Kirsher /** 591adfc5217SJeff Kirsher * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly 592adfc5217SJeff Kirsher * 593adfc5217SJeff Kirsher * @bp: driver handle 594adfc5217SJeff Kirsher */ 595adfc5217SJeff Kirsher int bnx2x_enable_msi(struct bnx2x *bp); 596adfc5217SJeff Kirsher 597adfc5217SJeff Kirsher /** 598adfc5217SJeff Kirsher * bnx2x_poll - NAPI callback 599adfc5217SJeff Kirsher * 600adfc5217SJeff Kirsher * @napi: napi structure 601adfc5217SJeff Kirsher * @budget: 602adfc5217SJeff Kirsher * 603adfc5217SJeff Kirsher */ 604adfc5217SJeff Kirsher int bnx2x_poll(struct napi_struct *napi, int budget); 605adfc5217SJeff Kirsher 606adfc5217SJeff Kirsher /** 607adfc5217SJeff Kirsher * bnx2x_alloc_mem_bp - allocate memories outsize main driver structure 608adfc5217SJeff Kirsher * 609adfc5217SJeff Kirsher * @bp: driver handle 610adfc5217SJeff Kirsher */ 6110329aba1SBill Pemberton int bnx2x_alloc_mem_bp(struct bnx2x *bp); 612adfc5217SJeff Kirsher 613adfc5217SJeff Kirsher /** 614adfc5217SJeff Kirsher * bnx2x_free_mem_bp - release memories outsize main driver structure 615adfc5217SJeff Kirsher * 616adfc5217SJeff Kirsher * @bp: driver handle 617adfc5217SJeff Kirsher */ 618adfc5217SJeff Kirsher void bnx2x_free_mem_bp(struct bnx2x *bp); 619adfc5217SJeff Kirsher 620adfc5217SJeff Kirsher /** 621adfc5217SJeff Kirsher * bnx2x_change_mtu - change mtu netdev callback 622adfc5217SJeff Kirsher * 623adfc5217SJeff Kirsher * @dev: net device 624adfc5217SJeff Kirsher * @new_mtu: requested mtu 625adfc5217SJeff Kirsher * 626adfc5217SJeff Kirsher */ 627adfc5217SJeff Kirsher int bnx2x_change_mtu(struct net_device *dev, int new_mtu); 628adfc5217SJeff Kirsher 62955c11941SMerav Sicron #ifdef NETDEV_FCOE_WWNN 630adfc5217SJeff Kirsher /** 631adfc5217SJeff Kirsher * bnx2x_fcoe_get_wwn - return the requested WWN value for this port 632adfc5217SJeff Kirsher * 633adfc5217SJeff Kirsher * @dev: net_device 634adfc5217SJeff Kirsher * @wwn: output buffer 635adfc5217SJeff Kirsher * @type: WWN type: NETDEV_FCOE_WWNN (node) or NETDEV_FCOE_WWPN (port) 636adfc5217SJeff Kirsher * 637adfc5217SJeff Kirsher */ 638adfc5217SJeff Kirsher int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type); 639adfc5217SJeff Kirsher #endif 640621b4d66SDmitry Kravkov 641c8f44affSMichał Mirosław netdev_features_t bnx2x_fix_features(struct net_device *dev, 642c8f44affSMichał Mirosław netdev_features_t features); 643c8f44affSMichał Mirosław int bnx2x_set_features(struct net_device *dev, netdev_features_t features); 644adfc5217SJeff Kirsher 645adfc5217SJeff Kirsher /** 646adfc5217SJeff Kirsher * bnx2x_tx_timeout - tx timeout netdev callback 647adfc5217SJeff Kirsher * 648adfc5217SJeff Kirsher * @dev: net device 649adfc5217SJeff Kirsher */ 650adfc5217SJeff Kirsher void bnx2x_tx_timeout(struct net_device *dev); 651adfc5217SJeff Kirsher 652adfc5217SJeff Kirsher /*********************** Inlines **********************************/ 653adfc5217SJeff Kirsher /*********************** Fast path ********************************/ 654adfc5217SJeff Kirsher static inline void bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp) 655adfc5217SJeff Kirsher { 656adfc5217SJeff Kirsher barrier(); /* status block is written to by the chip */ 657adfc5217SJeff Kirsher fp->fp_hc_idx = fp->sb_running_index[SM_RX_ID]; 658adfc5217SJeff Kirsher } 659adfc5217SJeff Kirsher 660adfc5217SJeff Kirsher static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id, 661adfc5217SJeff Kirsher u8 segment, u16 index, u8 op, 662adfc5217SJeff Kirsher u8 update, u32 igu_addr) 663adfc5217SJeff Kirsher { 664adfc5217SJeff Kirsher struct igu_regular cmd_data = {0}; 665adfc5217SJeff Kirsher 666adfc5217SJeff Kirsher cmd_data.sb_id_and_flags = 667adfc5217SJeff Kirsher ((index << IGU_REGULAR_SB_INDEX_SHIFT) | 668adfc5217SJeff Kirsher (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | 669adfc5217SJeff Kirsher (update << IGU_REGULAR_BUPDATE_SHIFT) | 670adfc5217SJeff Kirsher (op << IGU_REGULAR_ENABLE_INT_SHIFT)); 671adfc5217SJeff Kirsher 67251c1a580SMerav Sicron DP(NETIF_MSG_INTR, "write 0x%08x to IGU addr 0x%x\n", 673adfc5217SJeff Kirsher cmd_data.sb_id_and_flags, igu_addr); 674adfc5217SJeff Kirsher REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags); 675adfc5217SJeff Kirsher 676adfc5217SJeff Kirsher /* Make sure that ACK is written */ 677adfc5217SJeff Kirsher mmiowb(); 678adfc5217SJeff Kirsher barrier(); 679adfc5217SJeff Kirsher } 680adfc5217SJeff Kirsher 681adfc5217SJeff Kirsher static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id, 682adfc5217SJeff Kirsher u8 storm, u16 index, u8 op, u8 update) 683adfc5217SJeff Kirsher { 684adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 685adfc5217SJeff Kirsher COMMAND_REG_INT_ACK); 686adfc5217SJeff Kirsher struct igu_ack_register igu_ack; 687adfc5217SJeff Kirsher 688adfc5217SJeff Kirsher igu_ack.status_block_index = index; 689adfc5217SJeff Kirsher igu_ack.sb_id_and_flags = 690adfc5217SJeff Kirsher ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | 691adfc5217SJeff Kirsher (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | 692adfc5217SJeff Kirsher (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | 693adfc5217SJeff Kirsher (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); 694adfc5217SJeff Kirsher 695adfc5217SJeff Kirsher REG_WR(bp, hc_addr, (*(u32 *)&igu_ack)); 696adfc5217SJeff Kirsher 697adfc5217SJeff Kirsher /* Make sure that ACK is written */ 698adfc5217SJeff Kirsher mmiowb(); 699adfc5217SJeff Kirsher barrier(); 700adfc5217SJeff Kirsher } 701adfc5217SJeff Kirsher 702adfc5217SJeff Kirsher static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm, 703adfc5217SJeff Kirsher u16 index, u8 op, u8 update) 704adfc5217SJeff Kirsher { 705adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 706adfc5217SJeff Kirsher bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update); 707adfc5217SJeff Kirsher else { 708adfc5217SJeff Kirsher u8 segment; 709adfc5217SJeff Kirsher 710adfc5217SJeff Kirsher if (CHIP_INT_MODE_IS_BC(bp)) 711adfc5217SJeff Kirsher segment = storm; 712adfc5217SJeff Kirsher else if (igu_sb_id != bp->igu_dsb_id) 713adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 714adfc5217SJeff Kirsher else if (storm == ATTENTION_ID) 715adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_ATTN; 716adfc5217SJeff Kirsher else 717adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 718adfc5217SJeff Kirsher bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update); 719adfc5217SJeff Kirsher } 720adfc5217SJeff Kirsher } 721adfc5217SJeff Kirsher 722adfc5217SJeff Kirsher static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp) 723adfc5217SJeff Kirsher { 724adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 725adfc5217SJeff Kirsher COMMAND_REG_SIMD_MASK); 726adfc5217SJeff Kirsher u32 result = REG_RD(bp, hc_addr); 727adfc5217SJeff Kirsher 728adfc5217SJeff Kirsher barrier(); 729adfc5217SJeff Kirsher return result; 730adfc5217SJeff Kirsher } 731adfc5217SJeff Kirsher 732adfc5217SJeff Kirsher static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp) 733adfc5217SJeff Kirsher { 734adfc5217SJeff Kirsher u32 igu_addr = (BAR_IGU_INTMEM + IGU_REG_SISR_MDPC_WMASK_LSB_UPPER*8); 735adfc5217SJeff Kirsher u32 result = REG_RD(bp, igu_addr); 736adfc5217SJeff Kirsher 73751c1a580SMerav Sicron DP(NETIF_MSG_INTR, "read 0x%08x from IGU addr 0x%x\n", 738adfc5217SJeff Kirsher result, igu_addr); 739adfc5217SJeff Kirsher 740adfc5217SJeff Kirsher barrier(); 741adfc5217SJeff Kirsher return result; 742adfc5217SJeff Kirsher } 743adfc5217SJeff Kirsher 744adfc5217SJeff Kirsher static inline u16 bnx2x_ack_int(struct bnx2x *bp) 745adfc5217SJeff Kirsher { 746adfc5217SJeff Kirsher barrier(); 747adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 748adfc5217SJeff Kirsher return bnx2x_hc_ack_int(bp); 749adfc5217SJeff Kirsher else 750adfc5217SJeff Kirsher return bnx2x_igu_ack_int(bp); 751adfc5217SJeff Kirsher } 752adfc5217SJeff Kirsher 753adfc5217SJeff Kirsher static inline int bnx2x_has_tx_work_unload(struct bnx2x_fp_txdata *txdata) 754adfc5217SJeff Kirsher { 755adfc5217SJeff Kirsher /* Tell compiler that consumer and producer can change */ 756adfc5217SJeff Kirsher barrier(); 757adfc5217SJeff Kirsher return txdata->tx_pkt_prod != txdata->tx_pkt_cons; 758adfc5217SJeff Kirsher } 759adfc5217SJeff Kirsher 760adfc5217SJeff Kirsher static inline u16 bnx2x_tx_avail(struct bnx2x *bp, 761adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 762adfc5217SJeff Kirsher { 763adfc5217SJeff Kirsher s16 used; 764adfc5217SJeff Kirsher u16 prod; 765adfc5217SJeff Kirsher u16 cons; 766adfc5217SJeff Kirsher 767adfc5217SJeff Kirsher prod = txdata->tx_bd_prod; 768adfc5217SJeff Kirsher cons = txdata->tx_bd_cons; 769adfc5217SJeff Kirsher 7707b5342d9SYuval Mintz used = SUB_S16(prod, cons); 771adfc5217SJeff Kirsher 772adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 773adfc5217SJeff Kirsher WARN_ON(used < 0); 7747b5342d9SYuval Mintz WARN_ON(used > txdata->tx_ring_size); 7757b5342d9SYuval Mintz WARN_ON((txdata->tx_ring_size - used) > MAX_TX_AVAIL); 776adfc5217SJeff Kirsher #endif 777adfc5217SJeff Kirsher 7787b5342d9SYuval Mintz return (s16)(txdata->tx_ring_size) - used; 779adfc5217SJeff Kirsher } 780adfc5217SJeff Kirsher 781adfc5217SJeff Kirsher static inline int bnx2x_tx_queue_has_work(struct bnx2x_fp_txdata *txdata) 782adfc5217SJeff Kirsher { 783adfc5217SJeff Kirsher u16 hw_cons; 784adfc5217SJeff Kirsher 785adfc5217SJeff Kirsher /* Tell compiler that status block fields can change */ 786adfc5217SJeff Kirsher barrier(); 787adfc5217SJeff Kirsher hw_cons = le16_to_cpu(*txdata->tx_cons_sb); 788adfc5217SJeff Kirsher return hw_cons != txdata->tx_pkt_cons; 789adfc5217SJeff Kirsher } 790adfc5217SJeff Kirsher 791adfc5217SJeff Kirsher static inline bool bnx2x_has_tx_work(struct bnx2x_fastpath *fp) 792adfc5217SJeff Kirsher { 793adfc5217SJeff Kirsher u8 cos; 794adfc5217SJeff Kirsher for_each_cos_in_tx_queue(fp, cos) 79565565884SMerav Sicron if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos])) 796adfc5217SJeff Kirsher return true; 797adfc5217SJeff Kirsher return false; 798adfc5217SJeff Kirsher } 799adfc5217SJeff Kirsher 800adfc5217SJeff Kirsher static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) 801adfc5217SJeff Kirsher { 802adfc5217SJeff Kirsher u16 rx_cons_sb; 803adfc5217SJeff Kirsher 804adfc5217SJeff Kirsher /* Tell compiler that status block fields can change */ 805adfc5217SJeff Kirsher barrier(); 806adfc5217SJeff Kirsher rx_cons_sb = le16_to_cpu(*fp->rx_cons_sb); 807adfc5217SJeff Kirsher if ((rx_cons_sb & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT) 808adfc5217SJeff Kirsher rx_cons_sb++; 809adfc5217SJeff Kirsher return (fp->rx_comp_cons != rx_cons_sb); 810adfc5217SJeff Kirsher } 811adfc5217SJeff Kirsher 812adfc5217SJeff Kirsher /** 813adfc5217SJeff Kirsher * bnx2x_tx_disable - disables tx from stack point of view 814adfc5217SJeff Kirsher * 815adfc5217SJeff Kirsher * @bp: driver handle 816adfc5217SJeff Kirsher */ 817adfc5217SJeff Kirsher static inline void bnx2x_tx_disable(struct bnx2x *bp) 818adfc5217SJeff Kirsher { 819adfc5217SJeff Kirsher netif_tx_disable(bp->dev); 820adfc5217SJeff Kirsher netif_carrier_off(bp->dev); 821adfc5217SJeff Kirsher } 822adfc5217SJeff Kirsher 823adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge(struct bnx2x *bp, 824adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, u16 index) 825adfc5217SJeff Kirsher { 826adfc5217SJeff Kirsher struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; 827adfc5217SJeff Kirsher struct page *page = sw_buf->page; 828adfc5217SJeff Kirsher struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; 829adfc5217SJeff Kirsher 830adfc5217SJeff Kirsher /* Skip "next page" elements */ 831adfc5217SJeff Kirsher if (!page) 832adfc5217SJeff Kirsher return; 833adfc5217SJeff Kirsher 834adfc5217SJeff Kirsher dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping), 835924d75abSYuval Mintz SGE_PAGES, DMA_FROM_DEVICE); 836adfc5217SJeff Kirsher __free_pages(page, PAGES_PER_SGE_SHIFT); 837adfc5217SJeff Kirsher 838adfc5217SJeff Kirsher sw_buf->page = NULL; 839adfc5217SJeff Kirsher sge->addr_hi = 0; 840adfc5217SJeff Kirsher sge->addr_lo = 0; 841adfc5217SJeff Kirsher } 842adfc5217SJeff Kirsher 84355c11941SMerav Sicron static inline void bnx2x_add_all_napi_cnic(struct bnx2x *bp) 84455c11941SMerav Sicron { 84555c11941SMerav Sicron int i; 84655c11941SMerav Sicron 84755c11941SMerav Sicron /* Add NAPI objects */ 84855c11941SMerav Sicron for_each_rx_queue_cnic(bp, i) 84955c11941SMerav Sicron netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), 85055c11941SMerav Sicron bnx2x_poll, BNX2X_NAPI_WEIGHT); 85155c11941SMerav Sicron } 85255c11941SMerav Sicron 853adfc5217SJeff Kirsher static inline void bnx2x_add_all_napi(struct bnx2x *bp) 854adfc5217SJeff Kirsher { 855adfc5217SJeff Kirsher int i; 856adfc5217SJeff Kirsher 857adfc5217SJeff Kirsher /* Add NAPI objects */ 85855c11941SMerav Sicron for_each_eth_queue(bp, i) 859adfc5217SJeff Kirsher netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), 860adfc5217SJeff Kirsher bnx2x_poll, BNX2X_NAPI_WEIGHT); 861adfc5217SJeff Kirsher } 862adfc5217SJeff Kirsher 86355c11941SMerav Sicron static inline void bnx2x_del_all_napi_cnic(struct bnx2x *bp) 86455c11941SMerav Sicron { 86555c11941SMerav Sicron int i; 86655c11941SMerav Sicron 86755c11941SMerav Sicron for_each_rx_queue_cnic(bp, i) 86855c11941SMerav Sicron netif_napi_del(&bnx2x_fp(bp, i, napi)); 86955c11941SMerav Sicron } 87055c11941SMerav Sicron 871adfc5217SJeff Kirsher static inline void bnx2x_del_all_napi(struct bnx2x *bp) 872adfc5217SJeff Kirsher { 873adfc5217SJeff Kirsher int i; 874adfc5217SJeff Kirsher 87555c11941SMerav Sicron for_each_eth_queue(bp, i) 876adfc5217SJeff Kirsher netif_napi_del(&bnx2x_fp(bp, i, napi)); 877adfc5217SJeff Kirsher } 878adfc5217SJeff Kirsher 8791ab4434cSAriel Elior int bnx2x_set_int_mode(struct bnx2x *bp); 8800e8d2ec5SMerav Sicron 881adfc5217SJeff Kirsher static inline void bnx2x_disable_msi(struct bnx2x *bp) 882adfc5217SJeff Kirsher { 883adfc5217SJeff Kirsher if (bp->flags & USING_MSIX_FLAG) { 884adfc5217SJeff Kirsher pci_disable_msix(bp->pdev); 88530a5de77SDmitry Kravkov bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG); 886adfc5217SJeff Kirsher } else if (bp->flags & USING_MSI_FLAG) { 887adfc5217SJeff Kirsher pci_disable_msi(bp->pdev); 888adfc5217SJeff Kirsher bp->flags &= ~USING_MSI_FLAG; 889adfc5217SJeff Kirsher } 890adfc5217SJeff Kirsher } 891adfc5217SJeff Kirsher 892adfc5217SJeff Kirsher static inline int bnx2x_calc_num_queues(struct bnx2x *bp) 893adfc5217SJeff Kirsher { 894adfc5217SJeff Kirsher return num_queues ? 895adfc5217SJeff Kirsher min_t(int, num_queues, BNX2X_MAX_QUEUES(bp)) : 8967d515413SYuval Mintz min_t(int, netif_get_num_default_rss_queues(), 8977d515413SYuval Mintz BNX2X_MAX_QUEUES(bp)); 898adfc5217SJeff Kirsher } 899adfc5217SJeff Kirsher 900adfc5217SJeff Kirsher static inline void bnx2x_clear_sge_mask_next_elems(struct bnx2x_fastpath *fp) 901adfc5217SJeff Kirsher { 902adfc5217SJeff Kirsher int i, j; 903adfc5217SJeff Kirsher 904adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { 905adfc5217SJeff Kirsher int idx = RX_SGE_CNT * i - 1; 906adfc5217SJeff Kirsher 907adfc5217SJeff Kirsher for (j = 0; j < 2; j++) { 908adfc5217SJeff Kirsher BIT_VEC64_CLEAR_BIT(fp->sge_mask, idx); 909adfc5217SJeff Kirsher idx--; 910adfc5217SJeff Kirsher } 911adfc5217SJeff Kirsher } 912adfc5217SJeff Kirsher } 913adfc5217SJeff Kirsher 914adfc5217SJeff Kirsher static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) 915adfc5217SJeff Kirsher { 916adfc5217SJeff Kirsher /* Set the mask to all 1-s: it's faster to compare to 0 than to 0xf-s */ 917b3637827SDmitry Kravkov memset(fp->sge_mask, 0xff, sizeof(fp->sge_mask)); 918adfc5217SJeff Kirsher 919adfc5217SJeff Kirsher /* Clear the two last indices in the page to 1: 920adfc5217SJeff Kirsher these are the indices that correspond to the "next" element, 921adfc5217SJeff Kirsher hence will never be indicated and should be removed from 922adfc5217SJeff Kirsher the calculations. */ 923adfc5217SJeff Kirsher bnx2x_clear_sge_mask_next_elems(fp); 924adfc5217SJeff Kirsher } 925adfc5217SJeff Kirsher 926e52fcb24SEric Dumazet /* note that we are not allocating a new buffer, 927adfc5217SJeff Kirsher * we are just moving one from cons to prod 928adfc5217SJeff Kirsher * we are not creating a new mapping, 929adfc5217SJeff Kirsher * so there is no need to check for dma_mapping_error(). 930adfc5217SJeff Kirsher */ 931e52fcb24SEric Dumazet static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp, 932adfc5217SJeff Kirsher u16 cons, u16 prod) 933adfc5217SJeff Kirsher { 934adfc5217SJeff Kirsher struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; 935adfc5217SJeff Kirsher struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; 936adfc5217SJeff Kirsher struct eth_rx_bd *cons_bd = &fp->rx_desc_ring[cons]; 937adfc5217SJeff Kirsher struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; 938adfc5217SJeff Kirsher 939adfc5217SJeff Kirsher dma_unmap_addr_set(prod_rx_buf, mapping, 940adfc5217SJeff Kirsher dma_unmap_addr(cons_rx_buf, mapping)); 941e52fcb24SEric Dumazet prod_rx_buf->data = cons_rx_buf->data; 942adfc5217SJeff Kirsher *prod_bd = *cons_bd; 943adfc5217SJeff Kirsher } 944adfc5217SJeff Kirsher 945adfc5217SJeff Kirsher /************************* Init ******************************************/ 946adfc5217SJeff Kirsher 947b475d78fSYuval Mintz /* returns func by VN for current port */ 948b475d78fSYuval Mintz static inline int func_by_vn(struct bnx2x *bp, int vn) 949b475d78fSYuval Mintz { 950b475d78fSYuval Mintz return 2 * vn + BP_PORT(bp); 951b475d78fSYuval Mintz } 952b475d78fSYuval Mintz 9535d317c6aSMerav Sicron static inline int bnx2x_config_rss_eth(struct bnx2x *bp, bool config_hash) 95496305234SDmitry Kravkov { 9555d317c6aSMerav Sicron return bnx2x_config_rss_pf(bp, &bp->rss_conf_obj, config_hash); 95696305234SDmitry Kravkov } 95796305234SDmitry Kravkov 958adfc5217SJeff Kirsher /** 959adfc5217SJeff Kirsher * bnx2x_func_start - init function 960adfc5217SJeff Kirsher * 961adfc5217SJeff Kirsher * @bp: driver handle 962adfc5217SJeff Kirsher * 963adfc5217SJeff Kirsher * Must be called before sending CLIENT_SETUP for the first client. 964adfc5217SJeff Kirsher */ 965adfc5217SJeff Kirsher static inline int bnx2x_func_start(struct bnx2x *bp) 966adfc5217SJeff Kirsher { 9673b603066SYuval Mintz struct bnx2x_func_state_params func_params = {NULL}; 968adfc5217SJeff Kirsher struct bnx2x_func_start_params *start_params = 969adfc5217SJeff Kirsher &func_params.params.start; 970adfc5217SJeff Kirsher 971adfc5217SJeff Kirsher /* Prepare parameters for function state transitions */ 972adfc5217SJeff Kirsher __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 973adfc5217SJeff Kirsher 974adfc5217SJeff Kirsher func_params.f_obj = &bp->func_obj; 975adfc5217SJeff Kirsher func_params.cmd = BNX2X_F_CMD_START; 976adfc5217SJeff Kirsher 977adfc5217SJeff Kirsher /* Function parameters */ 978adfc5217SJeff Kirsher start_params->mf_mode = bp->mf_mode; 979adfc5217SJeff Kirsher start_params->sd_vlan_tag = bp->mf_ov; 9808d7b0278SAriel Elior 9818d7b0278SAriel Elior if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp)) 982adfc5217SJeff Kirsher start_params->network_cos_mode = STATIC_COS; 9838d7b0278SAriel Elior else /* CHIP_IS_E1X */ 9848d7b0278SAriel Elior start_params->network_cos_mode = FW_WRR; 985adfc5217SJeff Kirsher 986adfc5217SJeff Kirsher return bnx2x_func_state_change(bp, &func_params); 987adfc5217SJeff Kirsher } 988adfc5217SJeff Kirsher 989adfc5217SJeff Kirsher /** 990adfc5217SJeff Kirsher * bnx2x_set_fw_mac_addr - fill in a MAC address in FW format 991adfc5217SJeff Kirsher * 992adfc5217SJeff Kirsher * @fw_hi: pointer to upper part 993adfc5217SJeff Kirsher * @fw_mid: pointer to middle part 994adfc5217SJeff Kirsher * @fw_lo: pointer to lower part 995adfc5217SJeff Kirsher * @mac: pointer to MAC address 996adfc5217SJeff Kirsher */ 99786564c3fSYuval Mintz static inline void bnx2x_set_fw_mac_addr(__le16 *fw_hi, __le16 *fw_mid, 99886564c3fSYuval Mintz __le16 *fw_lo, u8 *mac) 999adfc5217SJeff Kirsher { 1000adfc5217SJeff Kirsher ((u8 *)fw_hi)[0] = mac[1]; 1001adfc5217SJeff Kirsher ((u8 *)fw_hi)[1] = mac[0]; 1002adfc5217SJeff Kirsher ((u8 *)fw_mid)[0] = mac[3]; 1003adfc5217SJeff Kirsher ((u8 *)fw_mid)[1] = mac[2]; 1004adfc5217SJeff Kirsher ((u8 *)fw_lo)[0] = mac[5]; 1005adfc5217SJeff Kirsher ((u8 *)fw_lo)[1] = mac[4]; 1006adfc5217SJeff Kirsher } 1007adfc5217SJeff Kirsher 1008adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp, 1009adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, int last) 1010adfc5217SJeff Kirsher { 1011adfc5217SJeff Kirsher int i; 1012adfc5217SJeff Kirsher 1013adfc5217SJeff Kirsher if (fp->disable_tpa) 1014adfc5217SJeff Kirsher return; 1015adfc5217SJeff Kirsher 1016adfc5217SJeff Kirsher for (i = 0; i < last; i++) 1017adfc5217SJeff Kirsher bnx2x_free_rx_sge(bp, fp, i); 1018adfc5217SJeff Kirsher } 1019adfc5217SJeff Kirsher 1020adfc5217SJeff Kirsher static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp) 1021adfc5217SJeff Kirsher { 1022adfc5217SJeff Kirsher int i; 1023adfc5217SJeff Kirsher 1024adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_RINGS; i++) { 1025adfc5217SJeff Kirsher struct eth_rx_bd *rx_bd; 1026adfc5217SJeff Kirsher 1027adfc5217SJeff Kirsher rx_bd = &fp->rx_desc_ring[RX_DESC_CNT * i - 2]; 1028adfc5217SJeff Kirsher rx_bd->addr_hi = 1029adfc5217SJeff Kirsher cpu_to_le32(U64_HI(fp->rx_desc_mapping + 1030adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 1031adfc5217SJeff Kirsher rx_bd->addr_lo = 1032adfc5217SJeff Kirsher cpu_to_le32(U64_LO(fp->rx_desc_mapping + 1033adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 1034adfc5217SJeff Kirsher } 1035adfc5217SJeff Kirsher } 1036adfc5217SJeff Kirsher 1037adfc5217SJeff Kirsher /* Statistics ID are global per chip/path, while Client IDs for E1x are per 1038adfc5217SJeff Kirsher * port. 1039adfc5217SJeff Kirsher */ 1040adfc5217SJeff Kirsher static inline u8 bnx2x_stats_id(struct bnx2x_fastpath *fp) 1041adfc5217SJeff Kirsher { 1042de5c3741SYuval Mintz struct bnx2x *bp = fp->bp; 1043de5c3741SYuval Mintz if (!CHIP_IS_E1x(bp)) { 1044de5c3741SYuval Mintz /* there are special statistics counters for FCoE 136..140 */ 1045de5c3741SYuval Mintz if (IS_FCOE_FP(fp)) 1046de5c3741SYuval Mintz return bp->cnic_base_cl_id + (bp->pf_num >> 1); 1047adfc5217SJeff Kirsher return fp->cl_id; 1048de5c3741SYuval Mintz } 1049de5c3741SYuval Mintz return fp->cl_id + BP_PORT(bp) * FP_SB_MAX_E1x; 1050adfc5217SJeff Kirsher } 1051adfc5217SJeff Kirsher 1052adfc5217SJeff Kirsher static inline void bnx2x_init_vlan_mac_fp_objs(struct bnx2x_fastpath *fp, 1053adfc5217SJeff Kirsher bnx2x_obj_type obj_type) 1054adfc5217SJeff Kirsher { 1055adfc5217SJeff Kirsher struct bnx2x *bp = fp->bp; 1056adfc5217SJeff Kirsher 1057adfc5217SJeff Kirsher /* Configure classification DBs */ 105815192a8cSBarak Witkowski bnx2x_init_mac_obj(bp, &bnx2x_sp_obj(bp, fp).mac_obj, fp->cl_id, 105915192a8cSBarak Witkowski fp->cid, BP_FUNC(bp), bnx2x_sp(bp, mac_rdata), 1060adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mac_rdata), 1061adfc5217SJeff Kirsher BNX2X_FILTER_MAC_PENDING, 1062adfc5217SJeff Kirsher &bp->sp_state, obj_type, 1063adfc5217SJeff Kirsher &bp->macs_pool); 1064adfc5217SJeff Kirsher } 1065adfc5217SJeff Kirsher 1066adfc5217SJeff Kirsher /** 1067adfc5217SJeff Kirsher * bnx2x_get_path_func_num - get number of active functions 1068adfc5217SJeff Kirsher * 1069adfc5217SJeff Kirsher * @bp: driver handle 1070adfc5217SJeff Kirsher * 1071adfc5217SJeff Kirsher * Calculates the number of active (not hidden) functions on the 1072adfc5217SJeff Kirsher * current path. 1073adfc5217SJeff Kirsher */ 1074adfc5217SJeff Kirsher static inline u8 bnx2x_get_path_func_num(struct bnx2x *bp) 1075adfc5217SJeff Kirsher { 1076adfc5217SJeff Kirsher u8 func_num = 0, i; 1077adfc5217SJeff Kirsher 1078adfc5217SJeff Kirsher /* 57710 has only one function per-port */ 1079adfc5217SJeff Kirsher if (CHIP_IS_E1(bp)) 1080adfc5217SJeff Kirsher return 1; 1081adfc5217SJeff Kirsher 1082adfc5217SJeff Kirsher /* Calculate a number of functions enabled on the current 1083adfc5217SJeff Kirsher * PATH/PORT. 1084adfc5217SJeff Kirsher */ 1085adfc5217SJeff Kirsher if (CHIP_REV_IS_SLOW(bp)) { 1086adfc5217SJeff Kirsher if (IS_MF(bp)) 1087adfc5217SJeff Kirsher func_num = 4; 1088adfc5217SJeff Kirsher else 1089adfc5217SJeff Kirsher func_num = 2; 1090adfc5217SJeff Kirsher } else { 1091adfc5217SJeff Kirsher for (i = 0; i < E1H_FUNC_MAX / 2; i++) { 1092adfc5217SJeff Kirsher u32 func_config = 1093adfc5217SJeff Kirsher MF_CFG_RD(bp, 1094adfc5217SJeff Kirsher func_mf_config[BP_PORT(bp) + 2 * i]. 1095adfc5217SJeff Kirsher config); 1096adfc5217SJeff Kirsher func_num += 1097adfc5217SJeff Kirsher ((func_config & FUNC_MF_CFG_FUNC_HIDE) ? 0 : 1); 1098adfc5217SJeff Kirsher } 1099adfc5217SJeff Kirsher } 1100adfc5217SJeff Kirsher 1101adfc5217SJeff Kirsher WARN_ON(!func_num); 1102adfc5217SJeff Kirsher 1103adfc5217SJeff Kirsher return func_num; 1104adfc5217SJeff Kirsher } 1105adfc5217SJeff Kirsher 1106adfc5217SJeff Kirsher static inline void bnx2x_init_bp_objs(struct bnx2x *bp) 1107adfc5217SJeff Kirsher { 1108adfc5217SJeff Kirsher /* RX_MODE controlling object */ 1109adfc5217SJeff Kirsher bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj); 1110adfc5217SJeff Kirsher 1111adfc5217SJeff Kirsher /* multicast configuration controlling object */ 1112adfc5217SJeff Kirsher bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid, 1113adfc5217SJeff Kirsher BP_FUNC(bp), BP_FUNC(bp), 1114adfc5217SJeff Kirsher bnx2x_sp(bp, mcast_rdata), 1115adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mcast_rdata), 1116adfc5217SJeff Kirsher BNX2X_FILTER_MCAST_PENDING, &bp->sp_state, 1117adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 1118adfc5217SJeff Kirsher 1119adfc5217SJeff Kirsher /* Setup CAM credit pools */ 1120adfc5217SJeff Kirsher bnx2x_init_mac_credit_pool(bp, &bp->macs_pool, BP_FUNC(bp), 1121adfc5217SJeff Kirsher bnx2x_get_path_func_num(bp)); 1122adfc5217SJeff Kirsher 1123b56e9670SAriel Elior bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool, BP_ABS_FUNC(bp)>>1, 1124b56e9670SAriel Elior bnx2x_get_path_func_num(bp)); 1125b56e9670SAriel Elior 1126adfc5217SJeff Kirsher /* RSS configuration object */ 1127adfc5217SJeff Kirsher bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id, 1128adfc5217SJeff Kirsher bp->fp->cid, BP_FUNC(bp), BP_FUNC(bp), 1129adfc5217SJeff Kirsher bnx2x_sp(bp, rss_rdata), 1130adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, rss_rdata), 1131adfc5217SJeff Kirsher BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state, 1132adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 1133adfc5217SJeff Kirsher } 1134adfc5217SJeff Kirsher 1135adfc5217SJeff Kirsher static inline u8 bnx2x_fp_qzone_id(struct bnx2x_fastpath *fp) 1136adfc5217SJeff Kirsher { 1137adfc5217SJeff Kirsher if (CHIP_IS_E1x(fp->bp)) 1138adfc5217SJeff Kirsher return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H; 1139adfc5217SJeff Kirsher else 1140adfc5217SJeff Kirsher return fp->cl_id; 1141adfc5217SJeff Kirsher } 1142adfc5217SJeff Kirsher 11436411280aSAriel Elior u32 bnx2x_rx_ustorm_prods_offset(struct bnx2x_fastpath *fp); 1144adfc5217SJeff Kirsher 1145adfc5217SJeff Kirsher static inline void bnx2x_init_txdata(struct bnx2x *bp, 114665565884SMerav Sicron struct bnx2x_fp_txdata *txdata, u32 cid, 114765565884SMerav Sicron int txq_index, __le16 *tx_cons_sb, 114865565884SMerav Sicron struct bnx2x_fastpath *fp) 1149adfc5217SJeff Kirsher { 1150adfc5217SJeff Kirsher txdata->cid = cid; 1151adfc5217SJeff Kirsher txdata->txq_index = txq_index; 1152adfc5217SJeff Kirsher txdata->tx_cons_sb = tx_cons_sb; 115365565884SMerav Sicron txdata->parent_fp = fp; 11547b5342d9SYuval Mintz txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size; 1155adfc5217SJeff Kirsher 115651c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "created tx data cid %d, txq %d\n", 1157adfc5217SJeff Kirsher txdata->cid, txdata->txq_index); 1158adfc5217SJeff Kirsher } 1159adfc5217SJeff Kirsher 1160adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx) 1161adfc5217SJeff Kirsher { 1162adfc5217SJeff Kirsher return bp->cnic_base_cl_id + cl_idx + 11631805b2f0SDavid S. Miller (bp->pf_num >> 1) * BNX2X_MAX_CNIC_ETH_CL_ID_IDX; 1164adfc5217SJeff Kirsher } 1165adfc5217SJeff Kirsher 1166adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp) 1167adfc5217SJeff Kirsher { 1168adfc5217SJeff Kirsher 1169adfc5217SJeff Kirsher /* the 'first' id is allocated for the cnic */ 1170adfc5217SJeff Kirsher return bp->base_fw_ndsb; 1171adfc5217SJeff Kirsher } 1172adfc5217SJeff Kirsher 1173adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp) 1174adfc5217SJeff Kirsher { 1175adfc5217SJeff Kirsher return bp->igu_base_sb; 1176adfc5217SJeff Kirsher } 1177adfc5217SJeff Kirsher 1178adfc5217SJeff Kirsher 1179adfc5217SJeff Kirsher static inline void bnx2x_init_fcoe_fp(struct bnx2x *bp) 1180adfc5217SJeff Kirsher { 1181adfc5217SJeff Kirsher struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); 1182adfc5217SJeff Kirsher unsigned long q_type = 0; 1183adfc5217SJeff Kirsher 1184f233cafeSDmitry Kravkov bnx2x_fcoe(bp, rx_queue) = BNX2X_NUM_ETH_QUEUES(bp); 1185adfc5217SJeff Kirsher bnx2x_fcoe(bp, cl_id) = bnx2x_cnic_eth_cl_id(bp, 1186adfc5217SJeff Kirsher BNX2X_FCOE_ETH_CL_ID_IDX); 118737ae41a9SMerav Sicron bnx2x_fcoe(bp, cid) = BNX2X_FCOE_ETH_CID(bp); 1188adfc5217SJeff Kirsher bnx2x_fcoe(bp, fw_sb_id) = DEF_SB_ID; 1189adfc5217SJeff Kirsher bnx2x_fcoe(bp, igu_sb_id) = bp->igu_dsb_id; 1190adfc5217SJeff Kirsher bnx2x_fcoe(bp, rx_cons_sb) = BNX2X_FCOE_L2_RX_INDEX; 119165565884SMerav Sicron bnx2x_init_txdata(bp, bnx2x_fcoe(bp, txdata_ptr[0]), 119265565884SMerav Sicron fp->cid, FCOE_TXQ_IDX(bp), BNX2X_FCOE_L2_TX_INDEX, 119365565884SMerav Sicron fp); 1194adfc5217SJeff Kirsher 119551c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "created fcoe tx data (fp index %d)\n", fp->index); 1196adfc5217SJeff Kirsher 1197adfc5217SJeff Kirsher /* qZone id equals to FW (per path) client id */ 1198adfc5217SJeff Kirsher bnx2x_fcoe(bp, cl_qzone_id) = bnx2x_fp_qzone_id(fp); 1199adfc5217SJeff Kirsher /* init shortcut */ 1200adfc5217SJeff Kirsher bnx2x_fcoe(bp, ustorm_rx_prods_offset) = 1201adfc5217SJeff Kirsher bnx2x_rx_ustorm_prods_offset(fp); 1202adfc5217SJeff Kirsher 1203adfc5217SJeff Kirsher /* Configure Queue State object */ 1204adfc5217SJeff Kirsher __set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type); 1205adfc5217SJeff Kirsher __set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type); 1206adfc5217SJeff Kirsher 1207adfc5217SJeff Kirsher /* No multi-CoS for FCoE L2 client */ 1208adfc5217SJeff Kirsher BUG_ON(fp->max_cos != 1); 1209adfc5217SJeff Kirsher 121015192a8cSBarak Witkowski bnx2x_init_queue_obj(bp, &bnx2x_sp_obj(bp, fp).q_obj, fp->cl_id, 121115192a8cSBarak Witkowski &fp->cid, 1, BP_FUNC(bp), bnx2x_sp(bp, q_rdata), 1212adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, q_rdata), q_type); 1213adfc5217SJeff Kirsher 121451c1a580SMerav Sicron DP(NETIF_MSG_IFUP, 121551c1a580SMerav Sicron "queue[%d]: bnx2x_init_sb(%p,%p) cl_id %d fw_sb %d igu_sb %d\n", 1216adfc5217SJeff Kirsher fp->index, bp, fp->status_blk.e2_sb, fp->cl_id, fp->fw_sb_id, 1217adfc5217SJeff Kirsher fp->igu_sb_id); 1218adfc5217SJeff Kirsher } 1219adfc5217SJeff Kirsher 1220adfc5217SJeff Kirsher static inline int bnx2x_clean_tx_queue(struct bnx2x *bp, 1221adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 1222adfc5217SJeff Kirsher { 1223adfc5217SJeff Kirsher int cnt = 1000; 1224adfc5217SJeff Kirsher 1225adfc5217SJeff Kirsher while (bnx2x_has_tx_work_unload(txdata)) { 1226adfc5217SJeff Kirsher if (!cnt) { 122751c1a580SMerav Sicron BNX2X_ERR("timeout waiting for queue[%d]: txdata->tx_pkt_prod(%d) != txdata->tx_pkt_cons(%d)\n", 1228adfc5217SJeff Kirsher txdata->txq_index, txdata->tx_pkt_prod, 1229adfc5217SJeff Kirsher txdata->tx_pkt_cons); 1230adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 1231adfc5217SJeff Kirsher bnx2x_panic(); 1232adfc5217SJeff Kirsher return -EBUSY; 1233adfc5217SJeff Kirsher #else 1234adfc5217SJeff Kirsher break; 1235adfc5217SJeff Kirsher #endif 1236adfc5217SJeff Kirsher } 1237adfc5217SJeff Kirsher cnt--; 12380926d499SYuval Mintz usleep_range(1000, 2000); 1239adfc5217SJeff Kirsher } 1240adfc5217SJeff Kirsher 1241adfc5217SJeff Kirsher return 0; 1242adfc5217SJeff Kirsher } 1243adfc5217SJeff Kirsher 1244adfc5217SJeff Kirsher int bnx2x_get_link_cfg_idx(struct bnx2x *bp); 1245adfc5217SJeff Kirsher 1246adfc5217SJeff Kirsher static inline void __storm_memset_struct(struct bnx2x *bp, 1247adfc5217SJeff Kirsher u32 addr, size_t size, u32 *data) 1248adfc5217SJeff Kirsher { 1249adfc5217SJeff Kirsher int i; 1250adfc5217SJeff Kirsher for (i = 0; i < size/4; i++) 1251adfc5217SJeff Kirsher REG_WR(bp, addr + (i * 4), data[i]); 1252adfc5217SJeff Kirsher } 1253adfc5217SJeff Kirsher 1254adfc5217SJeff Kirsher /** 1255adfc5217SJeff Kirsher * bnx2x_wait_sp_comp - wait for the outstanding SP commands. 1256adfc5217SJeff Kirsher * 1257adfc5217SJeff Kirsher * @bp: driver handle 1258adfc5217SJeff Kirsher * @mask: bits that need to be cleared 1259adfc5217SJeff Kirsher */ 1260adfc5217SJeff Kirsher static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp, unsigned long mask) 1261adfc5217SJeff Kirsher { 1262adfc5217SJeff Kirsher int tout = 5000; /* Wait for 5 secs tops */ 1263adfc5217SJeff Kirsher 1264adfc5217SJeff Kirsher while (tout--) { 1265adfc5217SJeff Kirsher smp_mb(); 1266adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1267adfc5217SJeff Kirsher if (!(bp->sp_state & mask)) { 1268adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1269adfc5217SJeff Kirsher return true; 1270adfc5217SJeff Kirsher } 1271adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1272adfc5217SJeff Kirsher 12730926d499SYuval Mintz usleep_range(1000, 2000); 1274adfc5217SJeff Kirsher } 1275adfc5217SJeff Kirsher 1276adfc5217SJeff Kirsher smp_mb(); 1277adfc5217SJeff Kirsher 1278adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1279adfc5217SJeff Kirsher if (bp->sp_state & mask) { 128051c1a580SMerav Sicron BNX2X_ERR("Filtering completion timed out. sp_state 0x%lx, mask 0x%lx\n", 128151c1a580SMerav Sicron bp->sp_state, mask); 1282adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1283adfc5217SJeff Kirsher return false; 1284adfc5217SJeff Kirsher } 1285adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1286adfc5217SJeff Kirsher 1287adfc5217SJeff Kirsher return true; 1288adfc5217SJeff Kirsher } 1289adfc5217SJeff Kirsher 1290adfc5217SJeff Kirsher /** 1291adfc5217SJeff Kirsher * bnx2x_set_ctx_validation - set CDU context validation values 1292adfc5217SJeff Kirsher * 1293adfc5217SJeff Kirsher * @bp: driver handle 1294adfc5217SJeff Kirsher * @cxt: context of the connection on the host memory 1295adfc5217SJeff Kirsher * @cid: SW CID of the connection to be configured 1296adfc5217SJeff Kirsher */ 1297adfc5217SJeff Kirsher void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt, 1298adfc5217SJeff Kirsher u32 cid); 1299adfc5217SJeff Kirsher 1300adfc5217SJeff Kirsher void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id, 1301adfc5217SJeff Kirsher u8 sb_index, u8 disable, u16 usec); 1302adfc5217SJeff Kirsher void bnx2x_acquire_phy_lock(struct bnx2x *bp); 1303adfc5217SJeff Kirsher void bnx2x_release_phy_lock(struct bnx2x *bp); 1304adfc5217SJeff Kirsher 1305adfc5217SJeff Kirsher /** 1306adfc5217SJeff Kirsher * bnx2x_extract_max_cfg - extract MAX BW part from MF configuration. 1307adfc5217SJeff Kirsher * 1308adfc5217SJeff Kirsher * @bp: driver handle 1309adfc5217SJeff Kirsher * @mf_cfg: MF configuration 1310adfc5217SJeff Kirsher * 1311adfc5217SJeff Kirsher */ 1312adfc5217SJeff Kirsher static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg) 1313adfc5217SJeff Kirsher { 1314adfc5217SJeff Kirsher u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> 1315adfc5217SJeff Kirsher FUNC_MF_CFG_MAX_BW_SHIFT; 1316adfc5217SJeff Kirsher if (!max_cfg) { 131751c1a580SMerav Sicron DP(NETIF_MSG_IFUP | BNX2X_MSG_ETHTOOL, 131896b0accbSMichal Schmidt "Max BW configured to 0 - using 100 instead\n"); 1319adfc5217SJeff Kirsher max_cfg = 100; 1320adfc5217SJeff Kirsher } 1321adfc5217SJeff Kirsher return max_cfg; 1322adfc5217SJeff Kirsher } 1323adfc5217SJeff Kirsher 1324621b4d66SDmitry Kravkov /* checks if HW supports GRO for given MTU */ 1325621b4d66SDmitry Kravkov static inline bool bnx2x_mtu_allows_gro(int mtu) 1326621b4d66SDmitry Kravkov { 1327621b4d66SDmitry Kravkov /* gro frags per page */ 1328621b4d66SDmitry Kravkov int fpp = SGE_PAGE_SIZE / (mtu - ETH_MAX_TPA_HEADER_SIZE); 1329621b4d66SDmitry Kravkov 1330621b4d66SDmitry Kravkov /* 1331621b4d66SDmitry Kravkov * 1. number of frags should not grow above MAX_SKB_FRAGS 1332621b4d66SDmitry Kravkov * 2. frag must fit the page 1333621b4d66SDmitry Kravkov */ 1334621b4d66SDmitry Kravkov return mtu <= SGE_PAGE_SIZE && (U_ETH_SGL_SIZE * fpp) <= MAX_SKB_FRAGS; 1335621b4d66SDmitry Kravkov } 133655c11941SMerav Sicron 13371355b704SMintz Yuval /** 1338b306f5edSDmitry Kravkov * bnx2x_get_iscsi_info - update iSCSI params according to licensing info. 1339b306f5edSDmitry Kravkov * 1340b306f5edSDmitry Kravkov * @bp: driver handle 1341b306f5edSDmitry Kravkov * 1342b306f5edSDmitry Kravkov */ 1343b306f5edSDmitry Kravkov void bnx2x_get_iscsi_info(struct bnx2x *bp); 134400253a8cSDmitry Kravkov 134500253a8cSDmitry Kravkov /** 134600253a8cSDmitry Kravkov * bnx2x_link_sync_notify - send notification to other functions. 134700253a8cSDmitry Kravkov * 134800253a8cSDmitry Kravkov * @bp: driver handle 134900253a8cSDmitry Kravkov * 135000253a8cSDmitry Kravkov */ 135100253a8cSDmitry Kravkov static inline void bnx2x_link_sync_notify(struct bnx2x *bp) 135200253a8cSDmitry Kravkov { 135300253a8cSDmitry Kravkov int func; 135400253a8cSDmitry Kravkov int vn; 135500253a8cSDmitry Kravkov 135600253a8cSDmitry Kravkov /* Set the attention towards other drivers on the same port */ 135700253a8cSDmitry Kravkov for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { 135800253a8cSDmitry Kravkov if (vn == BP_VN(bp)) 135900253a8cSDmitry Kravkov continue; 136000253a8cSDmitry Kravkov 136100253a8cSDmitry Kravkov func = func_by_vn(bp, vn); 136200253a8cSDmitry Kravkov REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + 136300253a8cSDmitry Kravkov (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); 136400253a8cSDmitry Kravkov } 136500253a8cSDmitry Kravkov } 136600253a8cSDmitry Kravkov 136700253a8cSDmitry Kravkov /** 136800253a8cSDmitry Kravkov * bnx2x_update_drv_flags - update flags in shmem 136900253a8cSDmitry Kravkov * 137000253a8cSDmitry Kravkov * @bp: driver handle 137100253a8cSDmitry Kravkov * @flags: flags to update 137200253a8cSDmitry Kravkov * @set: set or clear 137300253a8cSDmitry Kravkov * 137400253a8cSDmitry Kravkov */ 137500253a8cSDmitry Kravkov static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set) 137600253a8cSDmitry Kravkov { 137700253a8cSDmitry Kravkov if (SHMEM2_HAS(bp, drv_flags)) { 137800253a8cSDmitry Kravkov u32 drv_flags; 1379f16da43bSAriel Elior bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 138000253a8cSDmitry Kravkov drv_flags = SHMEM2_RD(bp, drv_flags); 138100253a8cSDmitry Kravkov 138200253a8cSDmitry Kravkov if (set) 138300253a8cSDmitry Kravkov SET_FLAGS(drv_flags, flags); 138400253a8cSDmitry Kravkov else 138500253a8cSDmitry Kravkov RESET_FLAGS(drv_flags, flags); 138600253a8cSDmitry Kravkov 138700253a8cSDmitry Kravkov SHMEM2_WR(bp, drv_flags, drv_flags); 138851c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "drv_flags 0x%08x\n", drv_flags); 1389f16da43bSAriel Elior bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 139000253a8cSDmitry Kravkov } 139100253a8cSDmitry Kravkov } 139200253a8cSDmitry Kravkov 1393614c76dfSDmitry Kravkov static inline bool bnx2x_is_valid_ether_addr(struct bnx2x *bp, u8 *addr) 1394614c76dfSDmitry Kravkov { 139555c11941SMerav Sicron if (is_valid_ether_addr(addr) || 139655c11941SMerav Sicron (is_zero_ether_addr(addr) && 139755c11941SMerav Sicron (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)))) 1398614c76dfSDmitry Kravkov return true; 139955c11941SMerav Sicron 1400614c76dfSDmitry Kravkov return false; 1401614c76dfSDmitry Kravkov } 1402614c76dfSDmitry Kravkov 14038ca5e17eSAriel Elior /** 14042de67439SYuval Mintz * bnx2x_fill_fw_str - Fill buffer with FW version string 14058ca5e17eSAriel Elior * 14068ca5e17eSAriel Elior * @bp: driver handle 14078ca5e17eSAriel Elior * @buf: character buffer to fill with the fw name 14088ca5e17eSAriel Elior * @buf_len: length of the above buffer 14098ca5e17eSAriel Elior * 14108ca5e17eSAriel Elior */ 14118ca5e17eSAriel Elior void bnx2x_fill_fw_str(struct bnx2x *bp, char *buf, size_t buf_len); 1412adfc5217SJeff Kirsher #endif /* BNX2X_CMN_H */ 1413