1adfc5217SJeff Kirsher /* bnx2x_cmn.h: Broadcom Everest network driver. 2adfc5217SJeff Kirsher * 3247fa82bSYuval Mintz * Copyright (c) 2007-2013 Broadcom Corporation 4adfc5217SJeff Kirsher * 5adfc5217SJeff Kirsher * This program is free software; you can redistribute it and/or modify 6adfc5217SJeff Kirsher * it under the terms of the GNU General Public License as published by 7adfc5217SJeff Kirsher * the Free Software Foundation. 8adfc5217SJeff Kirsher * 9adfc5217SJeff Kirsher * Maintained by: Eilon Greenstein <eilong@broadcom.com> 10adfc5217SJeff Kirsher * Written by: Eliezer Tamir 11adfc5217SJeff Kirsher * Based on code from Michael Chan's bnx2 driver 12adfc5217SJeff Kirsher * UDP CSUM errata workaround by Arik Gendelman 13adfc5217SJeff Kirsher * Slowpath and fastpath rework by Vladislav Zolotarov 14adfc5217SJeff Kirsher * Statistics and Link management by Yitchak Gertner 15adfc5217SJeff Kirsher * 16adfc5217SJeff Kirsher */ 17adfc5217SJeff Kirsher #ifndef BNX2X_CMN_H 18adfc5217SJeff Kirsher #define BNX2X_CMN_H 19adfc5217SJeff Kirsher 20adfc5217SJeff Kirsher #include <linux/types.h> 21adfc5217SJeff Kirsher #include <linux/pci.h> 22adfc5217SJeff Kirsher #include <linux/netdevice.h> 23614c76dfSDmitry Kravkov #include <linux/etherdevice.h> 24adfc5217SJeff Kirsher 25adfc5217SJeff Kirsher #include "bnx2x.h" 266411280aSAriel Elior #include "bnx2x_sriov.h" 27adfc5217SJeff Kirsher 28adfc5217SJeff Kirsher /* This is used as a replacement for an MCP if it's not present */ 29adfc5217SJeff Kirsher extern int load_count[2][3]; /* per-path: 0-common, 1-port0, 2-port1 */ 30adfc5217SJeff Kirsher 31adfc5217SJeff Kirsher extern int num_queues; 320e8d2ec5SMerav Sicron extern int int_mode; 33adfc5217SJeff Kirsher 34adfc5217SJeff Kirsher /************************ Macros ********************************/ 35adfc5217SJeff Kirsher #define BNX2X_PCI_FREE(x, y, size) \ 36adfc5217SJeff Kirsher do { \ 37adfc5217SJeff Kirsher if (x) { \ 38adfc5217SJeff Kirsher dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \ 39adfc5217SJeff Kirsher x = NULL; \ 40adfc5217SJeff Kirsher y = 0; \ 41adfc5217SJeff Kirsher } \ 42adfc5217SJeff Kirsher } while (0) 43adfc5217SJeff Kirsher 44adfc5217SJeff Kirsher #define BNX2X_FREE(x) \ 45adfc5217SJeff Kirsher do { \ 46adfc5217SJeff Kirsher if (x) { \ 47adfc5217SJeff Kirsher kfree((void *)x); \ 48adfc5217SJeff Kirsher x = NULL; \ 49adfc5217SJeff Kirsher } \ 50adfc5217SJeff Kirsher } while (0) 51adfc5217SJeff Kirsher 52adfc5217SJeff Kirsher #define BNX2X_PCI_ALLOC(x, y, size) \ 53adfc5217SJeff Kirsher do { \ 541f9061d2SJoe Perches x = dma_alloc_coherent(&bp->pdev->dev, size, y, \ 551f9061d2SJoe Perches GFP_KERNEL | __GFP_ZERO); \ 56adfc5217SJeff Kirsher if (x == NULL) \ 57adfc5217SJeff Kirsher goto alloc_mem_err; \ 586bf07b8eSYuval Mintz DP(NETIF_MSG_HW, "BNX2X_PCI_ALLOC: Physical %Lx Virtual %p\n", \ 596bf07b8eSYuval Mintz (unsigned long long)(*y), x); \ 60adfc5217SJeff Kirsher } while (0) 61adfc5217SJeff Kirsher 6275b29459SDmitry Kravkov #define BNX2X_PCI_FALLOC(x, y, size) \ 6375b29459SDmitry Kravkov do { \ 6475b29459SDmitry Kravkov x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ 6575b29459SDmitry Kravkov if (x == NULL) \ 6675b29459SDmitry Kravkov goto alloc_mem_err; \ 6775b29459SDmitry Kravkov memset((void *)x, 0xFFFFFFFF, size); \ 6875b29459SDmitry Kravkov DP(NETIF_MSG_HW, "BNX2X_PCI_FALLOC: Physical %Lx Virtual %p\n",\ 6975b29459SDmitry Kravkov (unsigned long long)(*y), x); \ 7075b29459SDmitry Kravkov } while (0) 7175b29459SDmitry Kravkov 72adfc5217SJeff Kirsher #define BNX2X_ALLOC(x, size) \ 73adfc5217SJeff Kirsher do { \ 74adfc5217SJeff Kirsher x = kzalloc(size, GFP_KERNEL); \ 75adfc5217SJeff Kirsher if (x == NULL) \ 76adfc5217SJeff Kirsher goto alloc_mem_err; \ 77adfc5217SJeff Kirsher } while (0) 78adfc5217SJeff Kirsher 79adfc5217SJeff Kirsher /*********************** Interfaces **************************** 80adfc5217SJeff Kirsher * Functions that need to be implemented by each driver version 81adfc5217SJeff Kirsher */ 82adfc5217SJeff Kirsher /* Init */ 83adfc5217SJeff Kirsher 84adfc5217SJeff Kirsher /** 85adfc5217SJeff Kirsher * bnx2x_send_unload_req - request unload mode from the MCP. 86adfc5217SJeff Kirsher * 87adfc5217SJeff Kirsher * @bp: driver handle 88adfc5217SJeff Kirsher * @unload_mode: requested function's unload mode 89adfc5217SJeff Kirsher * 90adfc5217SJeff Kirsher * Return unload mode returned by the MCP: COMMON, PORT or FUNC. 91adfc5217SJeff Kirsher */ 92adfc5217SJeff Kirsher u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode); 93adfc5217SJeff Kirsher 94adfc5217SJeff Kirsher /** 95adfc5217SJeff Kirsher * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP. 96adfc5217SJeff Kirsher * 97adfc5217SJeff Kirsher * @bp: driver handle 985d07d868SYuval Mintz * @keep_link: true iff link should be kept up 99adfc5217SJeff Kirsher */ 1005d07d868SYuval Mintz void bnx2x_send_unload_done(struct bnx2x *bp, bool keep_link); 101adfc5217SJeff Kirsher 102adfc5217SJeff Kirsher /** 10396305234SDmitry Kravkov * bnx2x_config_rss_pf - configure RSS parameters in a PF. 104adfc5217SJeff Kirsher * 105adfc5217SJeff Kirsher * @bp: driver handle 10649ce9c2cSBen Hutchings * @rss_obj: RSS object to use 107adfc5217SJeff Kirsher * @ind_table: indirection table to configure 108adfc5217SJeff Kirsher * @config_hash: re-configure RSS hash keys configuration 109adfc5217SJeff Kirsher */ 11096305234SDmitry Kravkov int bnx2x_config_rss_pf(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj, 1115d317c6aSMerav Sicron bool config_hash); 112adfc5217SJeff Kirsher 113adfc5217SJeff Kirsher /** 114adfc5217SJeff Kirsher * bnx2x__init_func_obj - init function object 115adfc5217SJeff Kirsher * 116adfc5217SJeff Kirsher * @bp: driver handle 117adfc5217SJeff Kirsher * 118adfc5217SJeff Kirsher * Initializes the Function Object with the appropriate 119adfc5217SJeff Kirsher * parameters which include a function slow path driver 120adfc5217SJeff Kirsher * interface. 121adfc5217SJeff Kirsher */ 122adfc5217SJeff Kirsher void bnx2x__init_func_obj(struct bnx2x *bp); 123adfc5217SJeff Kirsher 124adfc5217SJeff Kirsher /** 125adfc5217SJeff Kirsher * bnx2x_setup_queue - setup eth queue. 126adfc5217SJeff Kirsher * 127adfc5217SJeff Kirsher * @bp: driver handle 128adfc5217SJeff Kirsher * @fp: pointer to the fastpath structure 129adfc5217SJeff Kirsher * @leading: boolean 130adfc5217SJeff Kirsher * 131adfc5217SJeff Kirsher */ 132adfc5217SJeff Kirsher int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, 133adfc5217SJeff Kirsher bool leading); 134adfc5217SJeff Kirsher 135adfc5217SJeff Kirsher /** 136adfc5217SJeff Kirsher * bnx2x_setup_leading - bring up a leading eth queue. 137adfc5217SJeff Kirsher * 138adfc5217SJeff Kirsher * @bp: driver handle 139adfc5217SJeff Kirsher */ 140adfc5217SJeff Kirsher int bnx2x_setup_leading(struct bnx2x *bp); 141adfc5217SJeff Kirsher 142adfc5217SJeff Kirsher /** 143adfc5217SJeff Kirsher * bnx2x_fw_command - send the MCP a request 144adfc5217SJeff Kirsher * 145adfc5217SJeff Kirsher * @bp: driver handle 146adfc5217SJeff Kirsher * @command: request 147adfc5217SJeff Kirsher * @param: request's parameter 148adfc5217SJeff Kirsher * 149adfc5217SJeff Kirsher * block until there is a reply 150adfc5217SJeff Kirsher */ 151adfc5217SJeff Kirsher u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); 152adfc5217SJeff Kirsher 153adfc5217SJeff Kirsher /** 154adfc5217SJeff Kirsher * bnx2x_initial_phy_init - initialize link parameters structure variables. 155adfc5217SJeff Kirsher * 156adfc5217SJeff Kirsher * @bp: driver handle 157adfc5217SJeff Kirsher * @load_mode: current mode 158adfc5217SJeff Kirsher */ 159cd1dfce2SYuval Mintz int bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode); 160adfc5217SJeff Kirsher 161adfc5217SJeff Kirsher /** 162adfc5217SJeff Kirsher * bnx2x_link_set - configure hw according to link parameters structure. 163adfc5217SJeff Kirsher * 164adfc5217SJeff Kirsher * @bp: driver handle 165adfc5217SJeff Kirsher */ 166adfc5217SJeff Kirsher void bnx2x_link_set(struct bnx2x *bp); 167adfc5217SJeff Kirsher 168adfc5217SJeff Kirsher /** 1695d07d868SYuval Mintz * bnx2x_force_link_reset - Forces link reset, and put the PHY 1705d07d868SYuval Mintz * in reset as well. 1715d07d868SYuval Mintz * 1725d07d868SYuval Mintz * @bp: driver handle 1735d07d868SYuval Mintz */ 1745d07d868SYuval Mintz void bnx2x_force_link_reset(struct bnx2x *bp); 1755d07d868SYuval Mintz 1765d07d868SYuval Mintz /** 177adfc5217SJeff Kirsher * bnx2x_link_test - query link status. 178adfc5217SJeff Kirsher * 179adfc5217SJeff Kirsher * @bp: driver handle 180adfc5217SJeff Kirsher * @is_serdes: bool 181adfc5217SJeff Kirsher * 182adfc5217SJeff Kirsher * Returns 0 if link is UP. 183adfc5217SJeff Kirsher */ 184adfc5217SJeff Kirsher u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes); 185adfc5217SJeff Kirsher 186adfc5217SJeff Kirsher /** 187adfc5217SJeff Kirsher * bnx2x_drv_pulse - write driver pulse to shmem 188adfc5217SJeff Kirsher * 189adfc5217SJeff Kirsher * @bp: driver handle 190adfc5217SJeff Kirsher * 191adfc5217SJeff Kirsher * writes the value in bp->fw_drv_pulse_wr_seq to drv_pulse mbox 192adfc5217SJeff Kirsher * in the shmem. 193adfc5217SJeff Kirsher */ 194adfc5217SJeff Kirsher void bnx2x_drv_pulse(struct bnx2x *bp); 195adfc5217SJeff Kirsher 196adfc5217SJeff Kirsher /** 197adfc5217SJeff Kirsher * bnx2x_igu_ack_sb - update IGU with current SB value 198adfc5217SJeff Kirsher * 199adfc5217SJeff Kirsher * @bp: driver handle 200adfc5217SJeff Kirsher * @igu_sb_id: SB id 201adfc5217SJeff Kirsher * @segment: SB segment 202adfc5217SJeff Kirsher * @index: SB index 203adfc5217SJeff Kirsher * @op: SB operation 204adfc5217SJeff Kirsher * @update: is HW update required 205adfc5217SJeff Kirsher */ 206adfc5217SJeff Kirsher void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, 207adfc5217SJeff Kirsher u16 index, u8 op, u8 update); 208adfc5217SJeff Kirsher 209adfc5217SJeff Kirsher /* Disable transactions from chip to host */ 210adfc5217SJeff Kirsher void bnx2x_pf_disable(struct bnx2x *bp); 21107ba6af4SMiriam Shitrit int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val); 212adfc5217SJeff Kirsher 213adfc5217SJeff Kirsher /** 214adfc5217SJeff Kirsher * bnx2x__link_status_update - handles link status change. 215adfc5217SJeff Kirsher * 216adfc5217SJeff Kirsher * @bp: driver handle 217adfc5217SJeff Kirsher */ 218adfc5217SJeff Kirsher void bnx2x__link_status_update(struct bnx2x *bp); 219adfc5217SJeff Kirsher 220adfc5217SJeff Kirsher /** 221adfc5217SJeff Kirsher * bnx2x_link_report - report link status to upper layer. 222adfc5217SJeff Kirsher * 223adfc5217SJeff Kirsher * @bp: driver handle 224adfc5217SJeff Kirsher */ 225adfc5217SJeff Kirsher void bnx2x_link_report(struct bnx2x *bp); 226adfc5217SJeff Kirsher 227adfc5217SJeff Kirsher /* None-atomic version of bnx2x_link_report() */ 228adfc5217SJeff Kirsher void __bnx2x_link_report(struct bnx2x *bp); 229adfc5217SJeff Kirsher 230adfc5217SJeff Kirsher /** 231adfc5217SJeff Kirsher * bnx2x_get_mf_speed - calculate MF speed. 232adfc5217SJeff Kirsher * 233adfc5217SJeff Kirsher * @bp: driver handle 234adfc5217SJeff Kirsher * 235adfc5217SJeff Kirsher * Takes into account current linespeed and MF configuration. 236adfc5217SJeff Kirsher */ 237adfc5217SJeff Kirsher u16 bnx2x_get_mf_speed(struct bnx2x *bp); 238adfc5217SJeff Kirsher 239adfc5217SJeff Kirsher /** 240adfc5217SJeff Kirsher * bnx2x_msix_sp_int - MSI-X slowpath interrupt handler 241adfc5217SJeff Kirsher * 242adfc5217SJeff Kirsher * @irq: irq number 243adfc5217SJeff Kirsher * @dev_instance: private instance 244adfc5217SJeff Kirsher */ 245adfc5217SJeff Kirsher irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance); 246adfc5217SJeff Kirsher 247adfc5217SJeff Kirsher /** 248adfc5217SJeff Kirsher * bnx2x_interrupt - non MSI-X interrupt handler 249adfc5217SJeff Kirsher * 250adfc5217SJeff Kirsher * @irq: irq number 251adfc5217SJeff Kirsher * @dev_instance: private instance 252adfc5217SJeff Kirsher */ 253adfc5217SJeff Kirsher irqreturn_t bnx2x_interrupt(int irq, void *dev_instance); 254adfc5217SJeff Kirsher 255adfc5217SJeff Kirsher /** 256adfc5217SJeff Kirsher * bnx2x_cnic_notify - send command to cnic driver 257adfc5217SJeff Kirsher * 258adfc5217SJeff Kirsher * @bp: driver handle 259adfc5217SJeff Kirsher * @cmd: command 260adfc5217SJeff Kirsher */ 261adfc5217SJeff Kirsher int bnx2x_cnic_notify(struct bnx2x *bp, int cmd); 262adfc5217SJeff Kirsher 263adfc5217SJeff Kirsher /** 264adfc5217SJeff Kirsher * bnx2x_setup_cnic_irq_info - provides cnic with IRQ information 265adfc5217SJeff Kirsher * 266adfc5217SJeff Kirsher * @bp: driver handle 267adfc5217SJeff Kirsher */ 268adfc5217SJeff Kirsher void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); 26937ae41a9SMerav Sicron 27037ae41a9SMerav Sicron /** 27137ae41a9SMerav Sicron * bnx2x_setup_cnic_info - provides cnic with updated info 27237ae41a9SMerav Sicron * 27337ae41a9SMerav Sicron * @bp: driver handle 27437ae41a9SMerav Sicron */ 27537ae41a9SMerav Sicron void bnx2x_setup_cnic_info(struct bnx2x *bp); 27637ae41a9SMerav Sicron 277adfc5217SJeff Kirsher /** 278adfc5217SJeff Kirsher * bnx2x_int_enable - enable HW interrupts. 279adfc5217SJeff Kirsher * 280adfc5217SJeff Kirsher * @bp: driver handle 281adfc5217SJeff Kirsher */ 282adfc5217SJeff Kirsher void bnx2x_int_enable(struct bnx2x *bp); 283adfc5217SJeff Kirsher 284adfc5217SJeff Kirsher /** 285adfc5217SJeff Kirsher * bnx2x_int_disable_sync - disable interrupts. 286adfc5217SJeff Kirsher * 287adfc5217SJeff Kirsher * @bp: driver handle 288adfc5217SJeff Kirsher * @disable_hw: true, disable HW interrupts. 289adfc5217SJeff Kirsher * 290adfc5217SJeff Kirsher * This function ensures that there are no 291adfc5217SJeff Kirsher * ISRs or SP DPCs (sp_task) are running after it returns. 292adfc5217SJeff Kirsher */ 293adfc5217SJeff Kirsher void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw); 294adfc5217SJeff Kirsher 295adfc5217SJeff Kirsher /** 29655c11941SMerav Sicron * bnx2x_nic_init_cnic - init driver internals for cnic. 297adfc5217SJeff Kirsher * 298adfc5217SJeff Kirsher * @bp: driver handle 299adfc5217SJeff Kirsher * @load_code: COMMON, PORT or FUNCTION 300adfc5217SJeff Kirsher * 301adfc5217SJeff Kirsher * Initializes: 302adfc5217SJeff Kirsher * - rings 303adfc5217SJeff Kirsher * - status blocks 304adfc5217SJeff Kirsher * - etc. 305adfc5217SJeff Kirsher */ 30655c11941SMerav Sicron void bnx2x_nic_init_cnic(struct bnx2x *bp); 307adfc5217SJeff Kirsher 308adfc5217SJeff Kirsher /** 309ecf01c22SYuval Mintz * bnx2x_preirq_nic_init - init driver internals. 31055c11941SMerav Sicron * 31155c11941SMerav Sicron * @bp: driver handle 31255c11941SMerav Sicron * 31355c11941SMerav Sicron * Initializes: 314ecf01c22SYuval Mintz * - fastpath object 315ecf01c22SYuval Mintz * - fastpath rings 316ecf01c22SYuval Mintz * etc. 317ecf01c22SYuval Mintz */ 318ecf01c22SYuval Mintz void bnx2x_pre_irq_nic_init(struct bnx2x *bp); 319ecf01c22SYuval Mintz 320ecf01c22SYuval Mintz /** 321ecf01c22SYuval Mintz * bnx2x_postirq_nic_init - init driver internals. 322ecf01c22SYuval Mintz * 323ecf01c22SYuval Mintz * @bp: driver handle 324ecf01c22SYuval Mintz * @load_code: COMMON, PORT or FUNCTION 325ecf01c22SYuval Mintz * 326ecf01c22SYuval Mintz * Initializes: 32755c11941SMerav Sicron * - status blocks 328ecf01c22SYuval Mintz * - slowpath rings 32955c11941SMerav Sicron * - etc. 33055c11941SMerav Sicron */ 331ecf01c22SYuval Mintz void bnx2x_post_irq_nic_init(struct bnx2x *bp, u32 load_code); 33255c11941SMerav Sicron /** 33355c11941SMerav Sicron * bnx2x_alloc_mem_cnic - allocate driver's memory for cnic. 33455c11941SMerav Sicron * 33555c11941SMerav Sicron * @bp: driver handle 33655c11941SMerav Sicron */ 33755c11941SMerav Sicron int bnx2x_alloc_mem_cnic(struct bnx2x *bp); 33855c11941SMerav Sicron /** 339adfc5217SJeff Kirsher * bnx2x_alloc_mem - allocate driver's memory. 340adfc5217SJeff Kirsher * 341adfc5217SJeff Kirsher * @bp: driver handle 342adfc5217SJeff Kirsher */ 343adfc5217SJeff Kirsher int bnx2x_alloc_mem(struct bnx2x *bp); 344adfc5217SJeff Kirsher 345adfc5217SJeff Kirsher /** 34655c11941SMerav Sicron * bnx2x_free_mem_cnic - release driver's memory for cnic. 34755c11941SMerav Sicron * 34855c11941SMerav Sicron * @bp: driver handle 34955c11941SMerav Sicron */ 35055c11941SMerav Sicron void bnx2x_free_mem_cnic(struct bnx2x *bp); 35155c11941SMerav Sicron /** 352adfc5217SJeff Kirsher * bnx2x_free_mem - release driver's memory. 353adfc5217SJeff Kirsher * 354adfc5217SJeff Kirsher * @bp: driver handle 355adfc5217SJeff Kirsher */ 356adfc5217SJeff Kirsher void bnx2x_free_mem(struct bnx2x *bp); 357adfc5217SJeff Kirsher 358adfc5217SJeff Kirsher /** 359adfc5217SJeff Kirsher * bnx2x_set_num_queues - set number of queues according to mode. 360adfc5217SJeff Kirsher * 361adfc5217SJeff Kirsher * @bp: driver handle 362adfc5217SJeff Kirsher */ 363adfc5217SJeff Kirsher void bnx2x_set_num_queues(struct bnx2x *bp); 364adfc5217SJeff Kirsher 365adfc5217SJeff Kirsher /** 366adfc5217SJeff Kirsher * bnx2x_chip_cleanup - cleanup chip internals. 367adfc5217SJeff Kirsher * 368adfc5217SJeff Kirsher * @bp: driver handle 369adfc5217SJeff Kirsher * @unload_mode: COMMON, PORT, FUNCTION 3705d07d868SYuval Mintz * @keep_link: true iff link should be kept up. 371adfc5217SJeff Kirsher * 372adfc5217SJeff Kirsher * - Cleanup MAC configuration. 373adfc5217SJeff Kirsher * - Closes clients. 374adfc5217SJeff Kirsher * - etc. 375adfc5217SJeff Kirsher */ 3765d07d868SYuval Mintz void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link); 377adfc5217SJeff Kirsher 378adfc5217SJeff Kirsher /** 379adfc5217SJeff Kirsher * bnx2x_acquire_hw_lock - acquire HW lock. 380adfc5217SJeff Kirsher * 381adfc5217SJeff Kirsher * @bp: driver handle 382adfc5217SJeff Kirsher * @resource: resource bit which was locked 383adfc5217SJeff Kirsher */ 384adfc5217SJeff Kirsher int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource); 385adfc5217SJeff Kirsher 386adfc5217SJeff Kirsher /** 387adfc5217SJeff Kirsher * bnx2x_release_hw_lock - release HW lock. 388adfc5217SJeff Kirsher * 389adfc5217SJeff Kirsher * @bp: driver handle 390adfc5217SJeff Kirsher * @resource: resource bit which was locked 391adfc5217SJeff Kirsher */ 392adfc5217SJeff Kirsher int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); 393adfc5217SJeff Kirsher 394adfc5217SJeff Kirsher /** 395adfc5217SJeff Kirsher * bnx2x_release_leader_lock - release recovery leader lock 396adfc5217SJeff Kirsher * 397adfc5217SJeff Kirsher * @bp: driver handle 398adfc5217SJeff Kirsher */ 399adfc5217SJeff Kirsher int bnx2x_release_leader_lock(struct bnx2x *bp); 400adfc5217SJeff Kirsher 401adfc5217SJeff Kirsher /** 402adfc5217SJeff Kirsher * bnx2x_set_eth_mac - configure eth MAC address in the HW 403adfc5217SJeff Kirsher * 404adfc5217SJeff Kirsher * @bp: driver handle 405adfc5217SJeff Kirsher * @set: set or clear 406adfc5217SJeff Kirsher * 407adfc5217SJeff Kirsher * Configures according to the value in netdev->dev_addr. 408adfc5217SJeff Kirsher */ 409adfc5217SJeff Kirsher int bnx2x_set_eth_mac(struct bnx2x *bp, bool set); 410adfc5217SJeff Kirsher 411adfc5217SJeff Kirsher /** 412adfc5217SJeff Kirsher * bnx2x_set_rx_mode - set MAC filtering configurations. 413adfc5217SJeff Kirsher * 414adfc5217SJeff Kirsher * @dev: netdevice 415adfc5217SJeff Kirsher * 416adfc5217SJeff Kirsher * called with netif_tx_lock from dev_mcast.c 417adfc5217SJeff Kirsher * If bp->state is OPEN, should be called with 418adfc5217SJeff Kirsher * netif_addr_lock_bh() 419adfc5217SJeff Kirsher */ 420adfc5217SJeff Kirsher void bnx2x_set_rx_mode(struct net_device *dev); 421adfc5217SJeff Kirsher 422adfc5217SJeff Kirsher /** 423adfc5217SJeff Kirsher * bnx2x_set_storm_rx_mode - configure MAC filtering rules in a FW. 424adfc5217SJeff Kirsher * 425adfc5217SJeff Kirsher * @bp: driver handle 426adfc5217SJeff Kirsher * 427adfc5217SJeff Kirsher * If bp->state is OPEN, should be called with 428adfc5217SJeff Kirsher * netif_addr_lock_bh(). 429adfc5217SJeff Kirsher */ 430924d75abSYuval Mintz int bnx2x_set_storm_rx_mode(struct bnx2x *bp); 431adfc5217SJeff Kirsher 432adfc5217SJeff Kirsher /** 433adfc5217SJeff Kirsher * bnx2x_set_q_rx_mode - configures rx_mode for a single queue. 434adfc5217SJeff Kirsher * 435adfc5217SJeff Kirsher * @bp: driver handle 436adfc5217SJeff Kirsher * @cl_id: client id 437adfc5217SJeff Kirsher * @rx_mode_flags: rx mode configuration 438adfc5217SJeff Kirsher * @rx_accept_flags: rx accept configuration 439adfc5217SJeff Kirsher * @tx_accept_flags: tx accept configuration (tx switch) 440adfc5217SJeff Kirsher * @ramrod_flags: ramrod configuration 441adfc5217SJeff Kirsher */ 442924d75abSYuval Mintz int bnx2x_set_q_rx_mode(struct bnx2x *bp, u8 cl_id, 443adfc5217SJeff Kirsher unsigned long rx_mode_flags, 444adfc5217SJeff Kirsher unsigned long rx_accept_flags, 445adfc5217SJeff Kirsher unsigned long tx_accept_flags, 446adfc5217SJeff Kirsher unsigned long ramrod_flags); 447adfc5217SJeff Kirsher 448adfc5217SJeff Kirsher /* Parity errors related */ 449889b9af3SAriel Elior void bnx2x_set_pf_load(struct bnx2x *bp); 450889b9af3SAriel Elior bool bnx2x_clear_pf_load(struct bnx2x *bp); 451adfc5217SJeff Kirsher bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print); 452adfc5217SJeff Kirsher bool bnx2x_reset_is_done(struct bnx2x *bp, int engine); 453adfc5217SJeff Kirsher void bnx2x_set_reset_in_progress(struct bnx2x *bp); 454adfc5217SJeff Kirsher void bnx2x_set_reset_global(struct bnx2x *bp); 455adfc5217SJeff Kirsher void bnx2x_disable_close_the_gate(struct bnx2x *bp); 45655c11941SMerav Sicron int bnx2x_init_hw_func_cnic(struct bnx2x *bp); 457adfc5217SJeff Kirsher 458adfc5217SJeff Kirsher /** 459adfc5217SJeff Kirsher * bnx2x_sp_event - handle ramrods completion. 460adfc5217SJeff Kirsher * 461adfc5217SJeff Kirsher * @fp: fastpath handle for the event 462adfc5217SJeff Kirsher * @rr_cqe: eth_rx_cqe 463adfc5217SJeff Kirsher */ 464adfc5217SJeff Kirsher void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); 465adfc5217SJeff Kirsher 466adfc5217SJeff Kirsher /** 467adfc5217SJeff Kirsher * bnx2x_ilt_set_info - prepare ILT configurations. 468adfc5217SJeff Kirsher * 469adfc5217SJeff Kirsher * @bp: driver handle 470adfc5217SJeff Kirsher */ 471adfc5217SJeff Kirsher void bnx2x_ilt_set_info(struct bnx2x *bp); 472adfc5217SJeff Kirsher 473adfc5217SJeff Kirsher /** 47455c11941SMerav Sicron * bnx2x_ilt_set_cnic_info - prepare ILT configurations for SRC 47555c11941SMerav Sicron * and TM. 47655c11941SMerav Sicron * 47755c11941SMerav Sicron * @bp: driver handle 47855c11941SMerav Sicron */ 47955c11941SMerav Sicron void bnx2x_ilt_set_info_cnic(struct bnx2x *bp); 48055c11941SMerav Sicron 48155c11941SMerav Sicron /** 482adfc5217SJeff Kirsher * bnx2x_dcbx_init - initialize dcbx protocol. 483adfc5217SJeff Kirsher * 484adfc5217SJeff Kirsher * @bp: driver handle 485adfc5217SJeff Kirsher */ 4869876879fSBarak Witkowski void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem); 487adfc5217SJeff Kirsher 488adfc5217SJeff Kirsher /** 489adfc5217SJeff Kirsher * bnx2x_set_power_state - set power state to the requested value. 490adfc5217SJeff Kirsher * 491adfc5217SJeff Kirsher * @bp: driver handle 492adfc5217SJeff Kirsher * @state: required state D0 or D3hot 493adfc5217SJeff Kirsher * 494adfc5217SJeff Kirsher * Currently only D0 and D3hot are supported. 495adfc5217SJeff Kirsher */ 496adfc5217SJeff Kirsher int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); 497adfc5217SJeff Kirsher 498adfc5217SJeff Kirsher /** 499adfc5217SJeff Kirsher * bnx2x_update_max_mf_config - update MAX part of MF configuration in HW. 500adfc5217SJeff Kirsher * 501adfc5217SJeff Kirsher * @bp: driver handle 502adfc5217SJeff Kirsher * @value: new value 503adfc5217SJeff Kirsher */ 504adfc5217SJeff Kirsher void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value); 505adfc5217SJeff Kirsher /* Error handling */ 506adfc5217SJeff Kirsher void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl); 507adfc5217SJeff Kirsher 508adfc5217SJeff Kirsher /* dev_close main block */ 5095d07d868SYuval Mintz int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link); 510adfc5217SJeff Kirsher 511adfc5217SJeff Kirsher /* dev_open main block */ 512adfc5217SJeff Kirsher int bnx2x_nic_load(struct bnx2x *bp, int load_mode); 513adfc5217SJeff Kirsher 514adfc5217SJeff Kirsher /* hard_xmit callback */ 515adfc5217SJeff Kirsher netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev); 516adfc5217SJeff Kirsher 517adfc5217SJeff Kirsher /* setup_tc callback */ 518adfc5217SJeff Kirsher int bnx2x_setup_tc(struct net_device *dev, u8 num_tc); 519adfc5217SJeff Kirsher 5203ec9f9caSAriel Elior int bnx2x_get_vf_config(struct net_device *dev, int vf, 5213ec9f9caSAriel Elior struct ifla_vf_info *ivi); 522abc5a021SAriel Elior int bnx2x_set_vf_mac(struct net_device *dev, int queue, u8 *mac); 5233ec9f9caSAriel Elior int bnx2x_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos); 524abc5a021SAriel Elior 525adfc5217SJeff Kirsher /* select_queue callback */ 526adfc5217SJeff Kirsher u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb); 527adfc5217SJeff Kirsher 528dc1ba591SAriel Elior static inline void bnx2x_update_rx_prod(struct bnx2x *bp, 529dc1ba591SAriel Elior struct bnx2x_fastpath *fp, 530dc1ba591SAriel Elior u16 bd_prod, u16 rx_comp_prod, 531dc1ba591SAriel Elior u16 rx_sge_prod) 532dc1ba591SAriel Elior { 533dc1ba591SAriel Elior struct ustorm_eth_rx_producers rx_prods = {0}; 534dc1ba591SAriel Elior u32 i; 535dc1ba591SAriel Elior 536dc1ba591SAriel Elior /* Update producers */ 537dc1ba591SAriel Elior rx_prods.bd_prod = bd_prod; 538dc1ba591SAriel Elior rx_prods.cqe_prod = rx_comp_prod; 539dc1ba591SAriel Elior rx_prods.sge_prod = rx_sge_prod; 540dc1ba591SAriel Elior 541dc1ba591SAriel Elior /* Make sure that the BD and SGE data is updated before updating the 542dc1ba591SAriel Elior * producers since FW might read the BD/SGE right after the producer 543dc1ba591SAriel Elior * is updated. 544dc1ba591SAriel Elior * This is only applicable for weak-ordered memory model archs such 545dc1ba591SAriel Elior * as IA-64. The following barrier is also mandatory since FW will 546dc1ba591SAriel Elior * assumes BDs must have buffers. 547dc1ba591SAriel Elior */ 548dc1ba591SAriel Elior wmb(); 549dc1ba591SAriel Elior 550dc1ba591SAriel Elior for (i = 0; i < sizeof(rx_prods)/4; i++) 551dc1ba591SAriel Elior REG_WR(bp, fp->ustorm_rx_prods_offset + i*4, 552dc1ba591SAriel Elior ((u32 *)&rx_prods)[i]); 553dc1ba591SAriel Elior 554dc1ba591SAriel Elior mmiowb(); /* keep prod updates ordered */ 555dc1ba591SAriel Elior 556dc1ba591SAriel Elior DP(NETIF_MSG_RX_STATUS, 557dc1ba591SAriel Elior "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", 558dc1ba591SAriel Elior fp->index, bd_prod, rx_comp_prod, rx_sge_prod); 559dc1ba591SAriel Elior } 560dc1ba591SAriel Elior 561adfc5217SJeff Kirsher /* reload helper */ 562adfc5217SJeff Kirsher int bnx2x_reload_if_running(struct net_device *dev); 563adfc5217SJeff Kirsher 564adfc5217SJeff Kirsher int bnx2x_change_mac_addr(struct net_device *dev, void *p); 565adfc5217SJeff Kirsher 566adfc5217SJeff Kirsher /* NAPI poll Rx part */ 567adfc5217SJeff Kirsher int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget); 568adfc5217SJeff Kirsher 569adfc5217SJeff Kirsher /* NAPI poll Tx part */ 570adfc5217SJeff Kirsher int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata); 571adfc5217SJeff Kirsher 572adfc5217SJeff Kirsher /* suspend/resume callbacks */ 573adfc5217SJeff Kirsher int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state); 574adfc5217SJeff Kirsher int bnx2x_resume(struct pci_dev *pdev); 575adfc5217SJeff Kirsher 576adfc5217SJeff Kirsher /* Release IRQ vectors */ 577adfc5217SJeff Kirsher void bnx2x_free_irq(struct bnx2x *bp); 578adfc5217SJeff Kirsher 57955c11941SMerav Sicron void bnx2x_free_fp_mem_cnic(struct bnx2x *bp); 580adfc5217SJeff Kirsher void bnx2x_free_fp_mem(struct bnx2x *bp); 58155c11941SMerav Sicron int bnx2x_alloc_fp_mem_cnic(struct bnx2x *bp); 582adfc5217SJeff Kirsher int bnx2x_alloc_fp_mem(struct bnx2x *bp); 583adfc5217SJeff Kirsher void bnx2x_init_rx_rings(struct bnx2x *bp); 58455c11941SMerav Sicron void bnx2x_init_rx_rings_cnic(struct bnx2x *bp); 58555c11941SMerav Sicron void bnx2x_free_skbs_cnic(struct bnx2x *bp); 586adfc5217SJeff Kirsher void bnx2x_free_skbs(struct bnx2x *bp); 587adfc5217SJeff Kirsher void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw); 588adfc5217SJeff Kirsher void bnx2x_netif_start(struct bnx2x *bp); 58955c11941SMerav Sicron int bnx2x_load_cnic(struct bnx2x *bp); 590adfc5217SJeff Kirsher 591adfc5217SJeff Kirsher /** 592adfc5217SJeff Kirsher * bnx2x_enable_msix - set msix configuration. 593adfc5217SJeff Kirsher * 594adfc5217SJeff Kirsher * @bp: driver handle 595adfc5217SJeff Kirsher * 596adfc5217SJeff Kirsher * fills msix_table, requests vectors, updates num_queues 597adfc5217SJeff Kirsher * according to number of available vectors. 598adfc5217SJeff Kirsher */ 5990e8d2ec5SMerav Sicron int bnx2x_enable_msix(struct bnx2x *bp); 600adfc5217SJeff Kirsher 601adfc5217SJeff Kirsher /** 602adfc5217SJeff Kirsher * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly 603adfc5217SJeff Kirsher * 604adfc5217SJeff Kirsher * @bp: driver handle 605adfc5217SJeff Kirsher */ 606adfc5217SJeff Kirsher int bnx2x_enable_msi(struct bnx2x *bp); 607adfc5217SJeff Kirsher 608adfc5217SJeff Kirsher /** 609adfc5217SJeff Kirsher * bnx2x_poll - NAPI callback 610adfc5217SJeff Kirsher * 611adfc5217SJeff Kirsher * @napi: napi structure 612adfc5217SJeff Kirsher * @budget: 613adfc5217SJeff Kirsher * 614adfc5217SJeff Kirsher */ 615adfc5217SJeff Kirsher int bnx2x_poll(struct napi_struct *napi, int budget); 616adfc5217SJeff Kirsher 617adfc5217SJeff Kirsher /** 6188f20aa57SDmitry Kravkov * bnx2x_low_latency_recv - LL callback 6198f20aa57SDmitry Kravkov * 6208f20aa57SDmitry Kravkov * @napi: napi structure 6218f20aa57SDmitry Kravkov */ 6228f20aa57SDmitry Kravkov int bnx2x_low_latency_recv(struct napi_struct *napi); 6238f20aa57SDmitry Kravkov 6248f20aa57SDmitry Kravkov /** 625adfc5217SJeff Kirsher * bnx2x_alloc_mem_bp - allocate memories outsize main driver structure 626adfc5217SJeff Kirsher * 627adfc5217SJeff Kirsher * @bp: driver handle 628adfc5217SJeff Kirsher */ 6290329aba1SBill Pemberton int bnx2x_alloc_mem_bp(struct bnx2x *bp); 630adfc5217SJeff Kirsher 631adfc5217SJeff Kirsher /** 632adfc5217SJeff Kirsher * bnx2x_free_mem_bp - release memories outsize main driver structure 633adfc5217SJeff Kirsher * 634adfc5217SJeff Kirsher * @bp: driver handle 635adfc5217SJeff Kirsher */ 636adfc5217SJeff Kirsher void bnx2x_free_mem_bp(struct bnx2x *bp); 637adfc5217SJeff Kirsher 638adfc5217SJeff Kirsher /** 639adfc5217SJeff Kirsher * bnx2x_change_mtu - change mtu netdev callback 640adfc5217SJeff Kirsher * 641adfc5217SJeff Kirsher * @dev: net device 642adfc5217SJeff Kirsher * @new_mtu: requested mtu 643adfc5217SJeff Kirsher * 644adfc5217SJeff Kirsher */ 645adfc5217SJeff Kirsher int bnx2x_change_mtu(struct net_device *dev, int new_mtu); 646adfc5217SJeff Kirsher 64755c11941SMerav Sicron #ifdef NETDEV_FCOE_WWNN 648adfc5217SJeff Kirsher /** 649adfc5217SJeff Kirsher * bnx2x_fcoe_get_wwn - return the requested WWN value for this port 650adfc5217SJeff Kirsher * 651adfc5217SJeff Kirsher * @dev: net_device 652adfc5217SJeff Kirsher * @wwn: output buffer 653adfc5217SJeff Kirsher * @type: WWN type: NETDEV_FCOE_WWNN (node) or NETDEV_FCOE_WWPN (port) 654adfc5217SJeff Kirsher * 655adfc5217SJeff Kirsher */ 656adfc5217SJeff Kirsher int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type); 657adfc5217SJeff Kirsher #endif 658621b4d66SDmitry Kravkov 659c8f44affSMichał Mirosław netdev_features_t bnx2x_fix_features(struct net_device *dev, 660c8f44affSMichał Mirosław netdev_features_t features); 661c8f44affSMichał Mirosław int bnx2x_set_features(struct net_device *dev, netdev_features_t features); 662adfc5217SJeff Kirsher 663adfc5217SJeff Kirsher /** 664adfc5217SJeff Kirsher * bnx2x_tx_timeout - tx timeout netdev callback 665adfc5217SJeff Kirsher * 666adfc5217SJeff Kirsher * @dev: net device 667adfc5217SJeff Kirsher */ 668adfc5217SJeff Kirsher void bnx2x_tx_timeout(struct net_device *dev); 669adfc5217SJeff Kirsher 670adfc5217SJeff Kirsher /*********************** Inlines **********************************/ 671adfc5217SJeff Kirsher /*********************** Fast path ********************************/ 672adfc5217SJeff Kirsher static inline void bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp) 673adfc5217SJeff Kirsher { 674adfc5217SJeff Kirsher barrier(); /* status block is written to by the chip */ 675adfc5217SJeff Kirsher fp->fp_hc_idx = fp->sb_running_index[SM_RX_ID]; 676adfc5217SJeff Kirsher } 677adfc5217SJeff Kirsher 678adfc5217SJeff Kirsher static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id, 679adfc5217SJeff Kirsher u8 segment, u16 index, u8 op, 680adfc5217SJeff Kirsher u8 update, u32 igu_addr) 681adfc5217SJeff Kirsher { 682adfc5217SJeff Kirsher struct igu_regular cmd_data = {0}; 683adfc5217SJeff Kirsher 684adfc5217SJeff Kirsher cmd_data.sb_id_and_flags = 685adfc5217SJeff Kirsher ((index << IGU_REGULAR_SB_INDEX_SHIFT) | 686adfc5217SJeff Kirsher (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | 687adfc5217SJeff Kirsher (update << IGU_REGULAR_BUPDATE_SHIFT) | 688adfc5217SJeff Kirsher (op << IGU_REGULAR_ENABLE_INT_SHIFT)); 689adfc5217SJeff Kirsher 69051c1a580SMerav Sicron DP(NETIF_MSG_INTR, "write 0x%08x to IGU addr 0x%x\n", 691adfc5217SJeff Kirsher cmd_data.sb_id_and_flags, igu_addr); 692adfc5217SJeff Kirsher REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags); 693adfc5217SJeff Kirsher 694adfc5217SJeff Kirsher /* Make sure that ACK is written */ 695adfc5217SJeff Kirsher mmiowb(); 696adfc5217SJeff Kirsher barrier(); 697adfc5217SJeff Kirsher } 698adfc5217SJeff Kirsher 699adfc5217SJeff Kirsher static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id, 700adfc5217SJeff Kirsher u8 storm, u16 index, u8 op, u8 update) 701adfc5217SJeff Kirsher { 702adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 703adfc5217SJeff Kirsher COMMAND_REG_INT_ACK); 704adfc5217SJeff Kirsher struct igu_ack_register igu_ack; 705adfc5217SJeff Kirsher 706adfc5217SJeff Kirsher igu_ack.status_block_index = index; 707adfc5217SJeff Kirsher igu_ack.sb_id_and_flags = 708adfc5217SJeff Kirsher ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | 709adfc5217SJeff Kirsher (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | 710adfc5217SJeff Kirsher (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | 711adfc5217SJeff Kirsher (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); 712adfc5217SJeff Kirsher 713adfc5217SJeff Kirsher REG_WR(bp, hc_addr, (*(u32 *)&igu_ack)); 714adfc5217SJeff Kirsher 715adfc5217SJeff Kirsher /* Make sure that ACK is written */ 716adfc5217SJeff Kirsher mmiowb(); 717adfc5217SJeff Kirsher barrier(); 718adfc5217SJeff Kirsher } 719adfc5217SJeff Kirsher 720adfc5217SJeff Kirsher static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm, 721adfc5217SJeff Kirsher u16 index, u8 op, u8 update) 722adfc5217SJeff Kirsher { 723adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 724adfc5217SJeff Kirsher bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update); 725adfc5217SJeff Kirsher else { 726adfc5217SJeff Kirsher u8 segment; 727adfc5217SJeff Kirsher 728adfc5217SJeff Kirsher if (CHIP_INT_MODE_IS_BC(bp)) 729adfc5217SJeff Kirsher segment = storm; 730adfc5217SJeff Kirsher else if (igu_sb_id != bp->igu_dsb_id) 731adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 732adfc5217SJeff Kirsher else if (storm == ATTENTION_ID) 733adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_ATTN; 734adfc5217SJeff Kirsher else 735adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 736adfc5217SJeff Kirsher bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update); 737adfc5217SJeff Kirsher } 738adfc5217SJeff Kirsher } 739adfc5217SJeff Kirsher 740adfc5217SJeff Kirsher static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp) 741adfc5217SJeff Kirsher { 742adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 743adfc5217SJeff Kirsher COMMAND_REG_SIMD_MASK); 744adfc5217SJeff Kirsher u32 result = REG_RD(bp, hc_addr); 745adfc5217SJeff Kirsher 746adfc5217SJeff Kirsher barrier(); 747adfc5217SJeff Kirsher return result; 748adfc5217SJeff Kirsher } 749adfc5217SJeff Kirsher 750adfc5217SJeff Kirsher static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp) 751adfc5217SJeff Kirsher { 752adfc5217SJeff Kirsher u32 igu_addr = (BAR_IGU_INTMEM + IGU_REG_SISR_MDPC_WMASK_LSB_UPPER*8); 753adfc5217SJeff Kirsher u32 result = REG_RD(bp, igu_addr); 754adfc5217SJeff Kirsher 75551c1a580SMerav Sicron DP(NETIF_MSG_INTR, "read 0x%08x from IGU addr 0x%x\n", 756adfc5217SJeff Kirsher result, igu_addr); 757adfc5217SJeff Kirsher 758adfc5217SJeff Kirsher barrier(); 759adfc5217SJeff Kirsher return result; 760adfc5217SJeff Kirsher } 761adfc5217SJeff Kirsher 762adfc5217SJeff Kirsher static inline u16 bnx2x_ack_int(struct bnx2x *bp) 763adfc5217SJeff Kirsher { 764adfc5217SJeff Kirsher barrier(); 765adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 766adfc5217SJeff Kirsher return bnx2x_hc_ack_int(bp); 767adfc5217SJeff Kirsher else 768adfc5217SJeff Kirsher return bnx2x_igu_ack_int(bp); 769adfc5217SJeff Kirsher } 770adfc5217SJeff Kirsher 771adfc5217SJeff Kirsher static inline int bnx2x_has_tx_work_unload(struct bnx2x_fp_txdata *txdata) 772adfc5217SJeff Kirsher { 773adfc5217SJeff Kirsher /* Tell compiler that consumer and producer can change */ 774adfc5217SJeff Kirsher barrier(); 775adfc5217SJeff Kirsher return txdata->tx_pkt_prod != txdata->tx_pkt_cons; 776adfc5217SJeff Kirsher } 777adfc5217SJeff Kirsher 778adfc5217SJeff Kirsher static inline u16 bnx2x_tx_avail(struct bnx2x *bp, 779adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 780adfc5217SJeff Kirsher { 781adfc5217SJeff Kirsher s16 used; 782adfc5217SJeff Kirsher u16 prod; 783adfc5217SJeff Kirsher u16 cons; 784adfc5217SJeff Kirsher 785adfc5217SJeff Kirsher prod = txdata->tx_bd_prod; 786adfc5217SJeff Kirsher cons = txdata->tx_bd_cons; 787adfc5217SJeff Kirsher 7887b5342d9SYuval Mintz used = SUB_S16(prod, cons); 789adfc5217SJeff Kirsher 790adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 791adfc5217SJeff Kirsher WARN_ON(used < 0); 7927b5342d9SYuval Mintz WARN_ON(used > txdata->tx_ring_size); 7937b5342d9SYuval Mintz WARN_ON((txdata->tx_ring_size - used) > MAX_TX_AVAIL); 794adfc5217SJeff Kirsher #endif 795adfc5217SJeff Kirsher 7967b5342d9SYuval Mintz return (s16)(txdata->tx_ring_size) - used; 797adfc5217SJeff Kirsher } 798adfc5217SJeff Kirsher 799adfc5217SJeff Kirsher static inline int bnx2x_tx_queue_has_work(struct bnx2x_fp_txdata *txdata) 800adfc5217SJeff Kirsher { 801adfc5217SJeff Kirsher u16 hw_cons; 802adfc5217SJeff Kirsher 803adfc5217SJeff Kirsher /* Tell compiler that status block fields can change */ 804adfc5217SJeff Kirsher barrier(); 805adfc5217SJeff Kirsher hw_cons = le16_to_cpu(*txdata->tx_cons_sb); 806adfc5217SJeff Kirsher return hw_cons != txdata->tx_pkt_cons; 807adfc5217SJeff Kirsher } 808adfc5217SJeff Kirsher 809adfc5217SJeff Kirsher static inline bool bnx2x_has_tx_work(struct bnx2x_fastpath *fp) 810adfc5217SJeff Kirsher { 811adfc5217SJeff Kirsher u8 cos; 812adfc5217SJeff Kirsher for_each_cos_in_tx_queue(fp, cos) 81365565884SMerav Sicron if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos])) 814adfc5217SJeff Kirsher return true; 815adfc5217SJeff Kirsher return false; 816adfc5217SJeff Kirsher } 817adfc5217SJeff Kirsher 81875b29459SDmitry Kravkov #define BNX2X_IS_CQE_COMPLETED(cqe_fp) (cqe_fp->marker == 0x0) 81975b29459SDmitry Kravkov #define BNX2X_SEED_CQE(cqe_fp) (cqe_fp->marker = 0xFFFFFFFF) 820adfc5217SJeff Kirsher static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) 821adfc5217SJeff Kirsher { 82275b29459SDmitry Kravkov u16 cons; 82375b29459SDmitry Kravkov union eth_rx_cqe *cqe; 82475b29459SDmitry Kravkov struct eth_fast_path_rx_cqe *cqe_fp; 825adfc5217SJeff Kirsher 82675b29459SDmitry Kravkov cons = RCQ_BD(fp->rx_comp_cons); 82775b29459SDmitry Kravkov cqe = &fp->rx_comp_ring[cons]; 82875b29459SDmitry Kravkov cqe_fp = &cqe->fast_path_cqe; 82975b29459SDmitry Kravkov return BNX2X_IS_CQE_COMPLETED(cqe_fp); 830adfc5217SJeff Kirsher } 831adfc5217SJeff Kirsher 832adfc5217SJeff Kirsher /** 833adfc5217SJeff Kirsher * bnx2x_tx_disable - disables tx from stack point of view 834adfc5217SJeff Kirsher * 835adfc5217SJeff Kirsher * @bp: driver handle 836adfc5217SJeff Kirsher */ 837adfc5217SJeff Kirsher static inline void bnx2x_tx_disable(struct bnx2x *bp) 838adfc5217SJeff Kirsher { 839adfc5217SJeff Kirsher netif_tx_disable(bp->dev); 840adfc5217SJeff Kirsher netif_carrier_off(bp->dev); 841adfc5217SJeff Kirsher } 842adfc5217SJeff Kirsher 843adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge(struct bnx2x *bp, 844adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, u16 index) 845adfc5217SJeff Kirsher { 846adfc5217SJeff Kirsher struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; 847adfc5217SJeff Kirsher struct page *page = sw_buf->page; 848adfc5217SJeff Kirsher struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; 849adfc5217SJeff Kirsher 850adfc5217SJeff Kirsher /* Skip "next page" elements */ 851adfc5217SJeff Kirsher if (!page) 852adfc5217SJeff Kirsher return; 853adfc5217SJeff Kirsher 854adfc5217SJeff Kirsher dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping), 855924d75abSYuval Mintz SGE_PAGES, DMA_FROM_DEVICE); 856adfc5217SJeff Kirsher __free_pages(page, PAGES_PER_SGE_SHIFT); 857adfc5217SJeff Kirsher 858adfc5217SJeff Kirsher sw_buf->page = NULL; 859adfc5217SJeff Kirsher sge->addr_hi = 0; 860adfc5217SJeff Kirsher sge->addr_lo = 0; 861adfc5217SJeff Kirsher } 862adfc5217SJeff Kirsher 86355c11941SMerav Sicron static inline void bnx2x_add_all_napi_cnic(struct bnx2x *bp) 86455c11941SMerav Sicron { 86555c11941SMerav Sicron int i; 86655c11941SMerav Sicron 86755c11941SMerav Sicron /* Add NAPI objects */ 8688f20aa57SDmitry Kravkov for_each_rx_queue_cnic(bp, i) { 86955c11941SMerav Sicron netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), 8706fac4115SEric Dumazet bnx2x_poll, NAPI_POLL_WEIGHT); 8718f20aa57SDmitry Kravkov napi_hash_add(&bnx2x_fp(bp, i, napi)); 8728f20aa57SDmitry Kravkov } 87355c11941SMerav Sicron } 87455c11941SMerav Sicron 875adfc5217SJeff Kirsher static inline void bnx2x_add_all_napi(struct bnx2x *bp) 876adfc5217SJeff Kirsher { 877adfc5217SJeff Kirsher int i; 878adfc5217SJeff Kirsher 879adfc5217SJeff Kirsher /* Add NAPI objects */ 8808f20aa57SDmitry Kravkov for_each_eth_queue(bp, i) { 881adfc5217SJeff Kirsher netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), 8826fac4115SEric Dumazet bnx2x_poll, NAPI_POLL_WEIGHT); 8838f20aa57SDmitry Kravkov napi_hash_add(&bnx2x_fp(bp, i, napi)); 8848f20aa57SDmitry Kravkov } 885adfc5217SJeff Kirsher } 886adfc5217SJeff Kirsher 88755c11941SMerav Sicron static inline void bnx2x_del_all_napi_cnic(struct bnx2x *bp) 88855c11941SMerav Sicron { 88955c11941SMerav Sicron int i; 89055c11941SMerav Sicron 8918f20aa57SDmitry Kravkov for_each_rx_queue_cnic(bp, i) { 8928f20aa57SDmitry Kravkov napi_hash_del(&bnx2x_fp(bp, i, napi)); 89355c11941SMerav Sicron netif_napi_del(&bnx2x_fp(bp, i, napi)); 89455c11941SMerav Sicron } 8958f20aa57SDmitry Kravkov } 89655c11941SMerav Sicron 897adfc5217SJeff Kirsher static inline void bnx2x_del_all_napi(struct bnx2x *bp) 898adfc5217SJeff Kirsher { 899adfc5217SJeff Kirsher int i; 900adfc5217SJeff Kirsher 9018f20aa57SDmitry Kravkov for_each_eth_queue(bp, i) { 9028f20aa57SDmitry Kravkov napi_hash_del(&bnx2x_fp(bp, i, napi)); 903adfc5217SJeff Kirsher netif_napi_del(&bnx2x_fp(bp, i, napi)); 904adfc5217SJeff Kirsher } 9058f20aa57SDmitry Kravkov } 906adfc5217SJeff Kirsher 9071ab4434cSAriel Elior int bnx2x_set_int_mode(struct bnx2x *bp); 9080e8d2ec5SMerav Sicron 909adfc5217SJeff Kirsher static inline void bnx2x_disable_msi(struct bnx2x *bp) 910adfc5217SJeff Kirsher { 911adfc5217SJeff Kirsher if (bp->flags & USING_MSIX_FLAG) { 912adfc5217SJeff Kirsher pci_disable_msix(bp->pdev); 91330a5de77SDmitry Kravkov bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG); 914adfc5217SJeff Kirsher } else if (bp->flags & USING_MSI_FLAG) { 915adfc5217SJeff Kirsher pci_disable_msi(bp->pdev); 916adfc5217SJeff Kirsher bp->flags &= ~USING_MSI_FLAG; 917adfc5217SJeff Kirsher } 918adfc5217SJeff Kirsher } 919adfc5217SJeff Kirsher 920adfc5217SJeff Kirsher static inline int bnx2x_calc_num_queues(struct bnx2x *bp) 921adfc5217SJeff Kirsher { 922adfc5217SJeff Kirsher return num_queues ? 923adfc5217SJeff Kirsher min_t(int, num_queues, BNX2X_MAX_QUEUES(bp)) : 9247d515413SYuval Mintz min_t(int, netif_get_num_default_rss_queues(), 9257d515413SYuval Mintz BNX2X_MAX_QUEUES(bp)); 926adfc5217SJeff Kirsher } 927adfc5217SJeff Kirsher 928adfc5217SJeff Kirsher static inline void bnx2x_clear_sge_mask_next_elems(struct bnx2x_fastpath *fp) 929adfc5217SJeff Kirsher { 930adfc5217SJeff Kirsher int i, j; 931adfc5217SJeff Kirsher 932adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { 933adfc5217SJeff Kirsher int idx = RX_SGE_CNT * i - 1; 934adfc5217SJeff Kirsher 935adfc5217SJeff Kirsher for (j = 0; j < 2; j++) { 936adfc5217SJeff Kirsher BIT_VEC64_CLEAR_BIT(fp->sge_mask, idx); 937adfc5217SJeff Kirsher idx--; 938adfc5217SJeff Kirsher } 939adfc5217SJeff Kirsher } 940adfc5217SJeff Kirsher } 941adfc5217SJeff Kirsher 942adfc5217SJeff Kirsher static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) 943adfc5217SJeff Kirsher { 944adfc5217SJeff Kirsher /* Set the mask to all 1-s: it's faster to compare to 0 than to 0xf-s */ 945b3637827SDmitry Kravkov memset(fp->sge_mask, 0xff, sizeof(fp->sge_mask)); 946adfc5217SJeff Kirsher 947adfc5217SJeff Kirsher /* Clear the two last indices in the page to 1: 948adfc5217SJeff Kirsher these are the indices that correspond to the "next" element, 949adfc5217SJeff Kirsher hence will never be indicated and should be removed from 950adfc5217SJeff Kirsher the calculations. */ 951adfc5217SJeff Kirsher bnx2x_clear_sge_mask_next_elems(fp); 952adfc5217SJeff Kirsher } 953adfc5217SJeff Kirsher 954e52fcb24SEric Dumazet /* note that we are not allocating a new buffer, 955adfc5217SJeff Kirsher * we are just moving one from cons to prod 956adfc5217SJeff Kirsher * we are not creating a new mapping, 957adfc5217SJeff Kirsher * so there is no need to check for dma_mapping_error(). 958adfc5217SJeff Kirsher */ 959e52fcb24SEric Dumazet static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp, 960adfc5217SJeff Kirsher u16 cons, u16 prod) 961adfc5217SJeff Kirsher { 962adfc5217SJeff Kirsher struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; 963adfc5217SJeff Kirsher struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; 964adfc5217SJeff Kirsher struct eth_rx_bd *cons_bd = &fp->rx_desc_ring[cons]; 965adfc5217SJeff Kirsher struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; 966adfc5217SJeff Kirsher 967adfc5217SJeff Kirsher dma_unmap_addr_set(prod_rx_buf, mapping, 968adfc5217SJeff Kirsher dma_unmap_addr(cons_rx_buf, mapping)); 969e52fcb24SEric Dumazet prod_rx_buf->data = cons_rx_buf->data; 970adfc5217SJeff Kirsher *prod_bd = *cons_bd; 971adfc5217SJeff Kirsher } 972adfc5217SJeff Kirsher 973adfc5217SJeff Kirsher /************************* Init ******************************************/ 974adfc5217SJeff Kirsher 975b475d78fSYuval Mintz /* returns func by VN for current port */ 976b475d78fSYuval Mintz static inline int func_by_vn(struct bnx2x *bp, int vn) 977b475d78fSYuval Mintz { 978b475d78fSYuval Mintz return 2 * vn + BP_PORT(bp); 979b475d78fSYuval Mintz } 980b475d78fSYuval Mintz 9815d317c6aSMerav Sicron static inline int bnx2x_config_rss_eth(struct bnx2x *bp, bool config_hash) 98296305234SDmitry Kravkov { 9835d317c6aSMerav Sicron return bnx2x_config_rss_pf(bp, &bp->rss_conf_obj, config_hash); 98496305234SDmitry Kravkov } 98596305234SDmitry Kravkov 986adfc5217SJeff Kirsher /** 987adfc5217SJeff Kirsher * bnx2x_func_start - init function 988adfc5217SJeff Kirsher * 989adfc5217SJeff Kirsher * @bp: driver handle 990adfc5217SJeff Kirsher * 991adfc5217SJeff Kirsher * Must be called before sending CLIENT_SETUP for the first client. 992adfc5217SJeff Kirsher */ 993adfc5217SJeff Kirsher static inline int bnx2x_func_start(struct bnx2x *bp) 994adfc5217SJeff Kirsher { 9953b603066SYuval Mintz struct bnx2x_func_state_params func_params = {NULL}; 996adfc5217SJeff Kirsher struct bnx2x_func_start_params *start_params = 997adfc5217SJeff Kirsher &func_params.params.start; 998adfc5217SJeff Kirsher 999adfc5217SJeff Kirsher /* Prepare parameters for function state transitions */ 1000adfc5217SJeff Kirsher __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 1001adfc5217SJeff Kirsher 1002adfc5217SJeff Kirsher func_params.f_obj = &bp->func_obj; 1003adfc5217SJeff Kirsher func_params.cmd = BNX2X_F_CMD_START; 1004adfc5217SJeff Kirsher 1005adfc5217SJeff Kirsher /* Function parameters */ 1006adfc5217SJeff Kirsher start_params->mf_mode = bp->mf_mode; 1007adfc5217SJeff Kirsher start_params->sd_vlan_tag = bp->mf_ov; 10088d7b0278SAriel Elior 10098d7b0278SAriel Elior if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp)) 1010adfc5217SJeff Kirsher start_params->network_cos_mode = STATIC_COS; 10118d7b0278SAriel Elior else /* CHIP_IS_E1X */ 10128d7b0278SAriel Elior start_params->network_cos_mode = FW_WRR; 1013adfc5217SJeff Kirsher 10141bc277f7SDmitry Kravkov start_params->gre_tunnel_mode = IPGRE_TUNNEL; 10151bc277f7SDmitry Kravkov start_params->gre_tunnel_rss = GRE_INNER_HEADERS_RSS; 10161bc277f7SDmitry Kravkov 1017adfc5217SJeff Kirsher return bnx2x_func_state_change(bp, &func_params); 1018adfc5217SJeff Kirsher } 1019adfc5217SJeff Kirsher 1020adfc5217SJeff Kirsher /** 1021adfc5217SJeff Kirsher * bnx2x_set_fw_mac_addr - fill in a MAC address in FW format 1022adfc5217SJeff Kirsher * 1023adfc5217SJeff Kirsher * @fw_hi: pointer to upper part 1024adfc5217SJeff Kirsher * @fw_mid: pointer to middle part 1025adfc5217SJeff Kirsher * @fw_lo: pointer to lower part 1026adfc5217SJeff Kirsher * @mac: pointer to MAC address 1027adfc5217SJeff Kirsher */ 102886564c3fSYuval Mintz static inline void bnx2x_set_fw_mac_addr(__le16 *fw_hi, __le16 *fw_mid, 102986564c3fSYuval Mintz __le16 *fw_lo, u8 *mac) 1030adfc5217SJeff Kirsher { 1031adfc5217SJeff Kirsher ((u8 *)fw_hi)[0] = mac[1]; 1032adfc5217SJeff Kirsher ((u8 *)fw_hi)[1] = mac[0]; 1033adfc5217SJeff Kirsher ((u8 *)fw_mid)[0] = mac[3]; 1034adfc5217SJeff Kirsher ((u8 *)fw_mid)[1] = mac[2]; 1035adfc5217SJeff Kirsher ((u8 *)fw_lo)[0] = mac[5]; 1036adfc5217SJeff Kirsher ((u8 *)fw_lo)[1] = mac[4]; 1037adfc5217SJeff Kirsher } 1038adfc5217SJeff Kirsher 1039adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp, 1040adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, int last) 1041adfc5217SJeff Kirsher { 1042adfc5217SJeff Kirsher int i; 1043adfc5217SJeff Kirsher 1044adfc5217SJeff Kirsher if (fp->disable_tpa) 1045adfc5217SJeff Kirsher return; 1046adfc5217SJeff Kirsher 1047adfc5217SJeff Kirsher for (i = 0; i < last; i++) 1048adfc5217SJeff Kirsher bnx2x_free_rx_sge(bp, fp, i); 1049adfc5217SJeff Kirsher } 1050adfc5217SJeff Kirsher 1051adfc5217SJeff Kirsher static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp) 1052adfc5217SJeff Kirsher { 1053adfc5217SJeff Kirsher int i; 1054adfc5217SJeff Kirsher 1055adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_RINGS; i++) { 1056adfc5217SJeff Kirsher struct eth_rx_bd *rx_bd; 1057adfc5217SJeff Kirsher 1058adfc5217SJeff Kirsher rx_bd = &fp->rx_desc_ring[RX_DESC_CNT * i - 2]; 1059adfc5217SJeff Kirsher rx_bd->addr_hi = 1060adfc5217SJeff Kirsher cpu_to_le32(U64_HI(fp->rx_desc_mapping + 1061adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 1062adfc5217SJeff Kirsher rx_bd->addr_lo = 1063adfc5217SJeff Kirsher cpu_to_le32(U64_LO(fp->rx_desc_mapping + 1064adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 1065adfc5217SJeff Kirsher } 1066adfc5217SJeff Kirsher } 1067adfc5217SJeff Kirsher 1068adfc5217SJeff Kirsher /* Statistics ID are global per chip/path, while Client IDs for E1x are per 1069adfc5217SJeff Kirsher * port. 1070adfc5217SJeff Kirsher */ 1071adfc5217SJeff Kirsher static inline u8 bnx2x_stats_id(struct bnx2x_fastpath *fp) 1072adfc5217SJeff Kirsher { 1073de5c3741SYuval Mintz struct bnx2x *bp = fp->bp; 1074de5c3741SYuval Mintz if (!CHIP_IS_E1x(bp)) { 1075de5c3741SYuval Mintz /* there are special statistics counters for FCoE 136..140 */ 1076de5c3741SYuval Mintz if (IS_FCOE_FP(fp)) 1077de5c3741SYuval Mintz return bp->cnic_base_cl_id + (bp->pf_num >> 1); 1078adfc5217SJeff Kirsher return fp->cl_id; 1079de5c3741SYuval Mintz } 1080de5c3741SYuval Mintz return fp->cl_id + BP_PORT(bp) * FP_SB_MAX_E1x; 1081adfc5217SJeff Kirsher } 1082adfc5217SJeff Kirsher 1083adfc5217SJeff Kirsher static inline void bnx2x_init_vlan_mac_fp_objs(struct bnx2x_fastpath *fp, 1084adfc5217SJeff Kirsher bnx2x_obj_type obj_type) 1085adfc5217SJeff Kirsher { 1086adfc5217SJeff Kirsher struct bnx2x *bp = fp->bp; 1087adfc5217SJeff Kirsher 1088adfc5217SJeff Kirsher /* Configure classification DBs */ 108915192a8cSBarak Witkowski bnx2x_init_mac_obj(bp, &bnx2x_sp_obj(bp, fp).mac_obj, fp->cl_id, 109015192a8cSBarak Witkowski fp->cid, BP_FUNC(bp), bnx2x_sp(bp, mac_rdata), 1091adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mac_rdata), 1092adfc5217SJeff Kirsher BNX2X_FILTER_MAC_PENDING, 1093adfc5217SJeff Kirsher &bp->sp_state, obj_type, 1094adfc5217SJeff Kirsher &bp->macs_pool); 1095adfc5217SJeff Kirsher } 1096adfc5217SJeff Kirsher 1097adfc5217SJeff Kirsher /** 1098adfc5217SJeff Kirsher * bnx2x_get_path_func_num - get number of active functions 1099adfc5217SJeff Kirsher * 1100adfc5217SJeff Kirsher * @bp: driver handle 1101adfc5217SJeff Kirsher * 1102adfc5217SJeff Kirsher * Calculates the number of active (not hidden) functions on the 1103adfc5217SJeff Kirsher * current path. 1104adfc5217SJeff Kirsher */ 1105adfc5217SJeff Kirsher static inline u8 bnx2x_get_path_func_num(struct bnx2x *bp) 1106adfc5217SJeff Kirsher { 1107adfc5217SJeff Kirsher u8 func_num = 0, i; 1108adfc5217SJeff Kirsher 1109adfc5217SJeff Kirsher /* 57710 has only one function per-port */ 1110adfc5217SJeff Kirsher if (CHIP_IS_E1(bp)) 1111adfc5217SJeff Kirsher return 1; 1112adfc5217SJeff Kirsher 1113adfc5217SJeff Kirsher /* Calculate a number of functions enabled on the current 1114adfc5217SJeff Kirsher * PATH/PORT. 1115adfc5217SJeff Kirsher */ 1116adfc5217SJeff Kirsher if (CHIP_REV_IS_SLOW(bp)) { 1117adfc5217SJeff Kirsher if (IS_MF(bp)) 1118adfc5217SJeff Kirsher func_num = 4; 1119adfc5217SJeff Kirsher else 1120adfc5217SJeff Kirsher func_num = 2; 1121adfc5217SJeff Kirsher } else { 1122adfc5217SJeff Kirsher for (i = 0; i < E1H_FUNC_MAX / 2; i++) { 1123adfc5217SJeff Kirsher u32 func_config = 1124adfc5217SJeff Kirsher MF_CFG_RD(bp, 1125adfc5217SJeff Kirsher func_mf_config[BP_PORT(bp) + 2 * i]. 1126adfc5217SJeff Kirsher config); 1127adfc5217SJeff Kirsher func_num += 1128adfc5217SJeff Kirsher ((func_config & FUNC_MF_CFG_FUNC_HIDE) ? 0 : 1); 1129adfc5217SJeff Kirsher } 1130adfc5217SJeff Kirsher } 1131adfc5217SJeff Kirsher 1132adfc5217SJeff Kirsher WARN_ON(!func_num); 1133adfc5217SJeff Kirsher 1134adfc5217SJeff Kirsher return func_num; 1135adfc5217SJeff Kirsher } 1136adfc5217SJeff Kirsher 1137adfc5217SJeff Kirsher static inline void bnx2x_init_bp_objs(struct bnx2x *bp) 1138adfc5217SJeff Kirsher { 1139adfc5217SJeff Kirsher /* RX_MODE controlling object */ 1140adfc5217SJeff Kirsher bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj); 1141adfc5217SJeff Kirsher 1142adfc5217SJeff Kirsher /* multicast configuration controlling object */ 1143adfc5217SJeff Kirsher bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid, 1144adfc5217SJeff Kirsher BP_FUNC(bp), BP_FUNC(bp), 1145adfc5217SJeff Kirsher bnx2x_sp(bp, mcast_rdata), 1146adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mcast_rdata), 1147adfc5217SJeff Kirsher BNX2X_FILTER_MCAST_PENDING, &bp->sp_state, 1148adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 1149adfc5217SJeff Kirsher 1150adfc5217SJeff Kirsher /* Setup CAM credit pools */ 1151adfc5217SJeff Kirsher bnx2x_init_mac_credit_pool(bp, &bp->macs_pool, BP_FUNC(bp), 1152adfc5217SJeff Kirsher bnx2x_get_path_func_num(bp)); 1153adfc5217SJeff Kirsher 1154b56e9670SAriel Elior bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool, BP_ABS_FUNC(bp)>>1, 1155b56e9670SAriel Elior bnx2x_get_path_func_num(bp)); 1156b56e9670SAriel Elior 1157adfc5217SJeff Kirsher /* RSS configuration object */ 1158adfc5217SJeff Kirsher bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id, 1159adfc5217SJeff Kirsher bp->fp->cid, BP_FUNC(bp), BP_FUNC(bp), 1160adfc5217SJeff Kirsher bnx2x_sp(bp, rss_rdata), 1161adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, rss_rdata), 1162adfc5217SJeff Kirsher BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state, 1163adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 1164adfc5217SJeff Kirsher } 1165adfc5217SJeff Kirsher 1166adfc5217SJeff Kirsher static inline u8 bnx2x_fp_qzone_id(struct bnx2x_fastpath *fp) 1167adfc5217SJeff Kirsher { 1168adfc5217SJeff Kirsher if (CHIP_IS_E1x(fp->bp)) 1169adfc5217SJeff Kirsher return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H; 1170adfc5217SJeff Kirsher else 1171adfc5217SJeff Kirsher return fp->cl_id; 1172adfc5217SJeff Kirsher } 1173adfc5217SJeff Kirsher 11746411280aSAriel Elior u32 bnx2x_rx_ustorm_prods_offset(struct bnx2x_fastpath *fp); 1175adfc5217SJeff Kirsher 1176adfc5217SJeff Kirsher static inline void bnx2x_init_txdata(struct bnx2x *bp, 117765565884SMerav Sicron struct bnx2x_fp_txdata *txdata, u32 cid, 117865565884SMerav Sicron int txq_index, __le16 *tx_cons_sb, 117965565884SMerav Sicron struct bnx2x_fastpath *fp) 1180adfc5217SJeff Kirsher { 1181adfc5217SJeff Kirsher txdata->cid = cid; 1182adfc5217SJeff Kirsher txdata->txq_index = txq_index; 1183adfc5217SJeff Kirsher txdata->tx_cons_sb = tx_cons_sb; 118465565884SMerav Sicron txdata->parent_fp = fp; 11857b5342d9SYuval Mintz txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size; 1186adfc5217SJeff Kirsher 118751c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "created tx data cid %d, txq %d\n", 1188adfc5217SJeff Kirsher txdata->cid, txdata->txq_index); 1189adfc5217SJeff Kirsher } 1190adfc5217SJeff Kirsher 1191adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx) 1192adfc5217SJeff Kirsher { 1193adfc5217SJeff Kirsher return bp->cnic_base_cl_id + cl_idx + 11941805b2f0SDavid S. Miller (bp->pf_num >> 1) * BNX2X_MAX_CNIC_ETH_CL_ID_IDX; 1195adfc5217SJeff Kirsher } 1196adfc5217SJeff Kirsher 1197adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp) 1198adfc5217SJeff Kirsher { 1199adfc5217SJeff Kirsher /* the 'first' id is allocated for the cnic */ 1200adfc5217SJeff Kirsher return bp->base_fw_ndsb; 1201adfc5217SJeff Kirsher } 1202adfc5217SJeff Kirsher 1203adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp) 1204adfc5217SJeff Kirsher { 1205adfc5217SJeff Kirsher return bp->igu_base_sb; 1206adfc5217SJeff Kirsher } 1207adfc5217SJeff Kirsher 1208adfc5217SJeff Kirsher static inline void bnx2x_init_fcoe_fp(struct bnx2x *bp) 1209adfc5217SJeff Kirsher { 1210adfc5217SJeff Kirsher struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp); 1211adfc5217SJeff Kirsher unsigned long q_type = 0; 1212adfc5217SJeff Kirsher 1213f233cafeSDmitry Kravkov bnx2x_fcoe(bp, rx_queue) = BNX2X_NUM_ETH_QUEUES(bp); 1214adfc5217SJeff Kirsher bnx2x_fcoe(bp, cl_id) = bnx2x_cnic_eth_cl_id(bp, 1215adfc5217SJeff Kirsher BNX2X_FCOE_ETH_CL_ID_IDX); 121637ae41a9SMerav Sicron bnx2x_fcoe(bp, cid) = BNX2X_FCOE_ETH_CID(bp); 1217adfc5217SJeff Kirsher bnx2x_fcoe(bp, fw_sb_id) = DEF_SB_ID; 1218adfc5217SJeff Kirsher bnx2x_fcoe(bp, igu_sb_id) = bp->igu_dsb_id; 1219adfc5217SJeff Kirsher bnx2x_fcoe(bp, rx_cons_sb) = BNX2X_FCOE_L2_RX_INDEX; 122065565884SMerav Sicron bnx2x_init_txdata(bp, bnx2x_fcoe(bp, txdata_ptr[0]), 122165565884SMerav Sicron fp->cid, FCOE_TXQ_IDX(bp), BNX2X_FCOE_L2_TX_INDEX, 122265565884SMerav Sicron fp); 1223adfc5217SJeff Kirsher 122451c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "created fcoe tx data (fp index %d)\n", fp->index); 1225adfc5217SJeff Kirsher 1226adfc5217SJeff Kirsher /* qZone id equals to FW (per path) client id */ 1227adfc5217SJeff Kirsher bnx2x_fcoe(bp, cl_qzone_id) = bnx2x_fp_qzone_id(fp); 1228adfc5217SJeff Kirsher /* init shortcut */ 1229adfc5217SJeff Kirsher bnx2x_fcoe(bp, ustorm_rx_prods_offset) = 1230adfc5217SJeff Kirsher bnx2x_rx_ustorm_prods_offset(fp); 1231adfc5217SJeff Kirsher 1232adfc5217SJeff Kirsher /* Configure Queue State object */ 1233adfc5217SJeff Kirsher __set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type); 1234adfc5217SJeff Kirsher __set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type); 1235adfc5217SJeff Kirsher 1236adfc5217SJeff Kirsher /* No multi-CoS for FCoE L2 client */ 1237adfc5217SJeff Kirsher BUG_ON(fp->max_cos != 1); 1238adfc5217SJeff Kirsher 123915192a8cSBarak Witkowski bnx2x_init_queue_obj(bp, &bnx2x_sp_obj(bp, fp).q_obj, fp->cl_id, 124015192a8cSBarak Witkowski &fp->cid, 1, BP_FUNC(bp), bnx2x_sp(bp, q_rdata), 1241adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, q_rdata), q_type); 1242adfc5217SJeff Kirsher 124351c1a580SMerav Sicron DP(NETIF_MSG_IFUP, 124451c1a580SMerav Sicron "queue[%d]: bnx2x_init_sb(%p,%p) cl_id %d fw_sb %d igu_sb %d\n", 1245adfc5217SJeff Kirsher fp->index, bp, fp->status_blk.e2_sb, fp->cl_id, fp->fw_sb_id, 1246adfc5217SJeff Kirsher fp->igu_sb_id); 1247adfc5217SJeff Kirsher } 1248adfc5217SJeff Kirsher 1249adfc5217SJeff Kirsher static inline int bnx2x_clean_tx_queue(struct bnx2x *bp, 1250adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 1251adfc5217SJeff Kirsher { 1252adfc5217SJeff Kirsher int cnt = 1000; 1253adfc5217SJeff Kirsher 1254adfc5217SJeff Kirsher while (bnx2x_has_tx_work_unload(txdata)) { 1255adfc5217SJeff Kirsher if (!cnt) { 125651c1a580SMerav Sicron BNX2X_ERR("timeout waiting for queue[%d]: txdata->tx_pkt_prod(%d) != txdata->tx_pkt_cons(%d)\n", 1257adfc5217SJeff Kirsher txdata->txq_index, txdata->tx_pkt_prod, 1258adfc5217SJeff Kirsher txdata->tx_pkt_cons); 1259adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 1260adfc5217SJeff Kirsher bnx2x_panic(); 1261adfc5217SJeff Kirsher return -EBUSY; 1262adfc5217SJeff Kirsher #else 1263adfc5217SJeff Kirsher break; 1264adfc5217SJeff Kirsher #endif 1265adfc5217SJeff Kirsher } 1266adfc5217SJeff Kirsher cnt--; 12670926d499SYuval Mintz usleep_range(1000, 2000); 1268adfc5217SJeff Kirsher } 1269adfc5217SJeff Kirsher 1270adfc5217SJeff Kirsher return 0; 1271adfc5217SJeff Kirsher } 1272adfc5217SJeff Kirsher 1273adfc5217SJeff Kirsher int bnx2x_get_link_cfg_idx(struct bnx2x *bp); 1274adfc5217SJeff Kirsher 1275adfc5217SJeff Kirsher static inline void __storm_memset_struct(struct bnx2x *bp, 1276adfc5217SJeff Kirsher u32 addr, size_t size, u32 *data) 1277adfc5217SJeff Kirsher { 1278adfc5217SJeff Kirsher int i; 1279adfc5217SJeff Kirsher for (i = 0; i < size/4; i++) 1280adfc5217SJeff Kirsher REG_WR(bp, addr + (i * 4), data[i]); 1281adfc5217SJeff Kirsher } 1282adfc5217SJeff Kirsher 1283adfc5217SJeff Kirsher /** 1284adfc5217SJeff Kirsher * bnx2x_wait_sp_comp - wait for the outstanding SP commands. 1285adfc5217SJeff Kirsher * 1286adfc5217SJeff Kirsher * @bp: driver handle 1287adfc5217SJeff Kirsher * @mask: bits that need to be cleared 1288adfc5217SJeff Kirsher */ 1289adfc5217SJeff Kirsher static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp, unsigned long mask) 1290adfc5217SJeff Kirsher { 1291adfc5217SJeff Kirsher int tout = 5000; /* Wait for 5 secs tops */ 1292adfc5217SJeff Kirsher 1293adfc5217SJeff Kirsher while (tout--) { 1294adfc5217SJeff Kirsher smp_mb(); 1295adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1296adfc5217SJeff Kirsher if (!(bp->sp_state & mask)) { 1297adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1298adfc5217SJeff Kirsher return true; 1299adfc5217SJeff Kirsher } 1300adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1301adfc5217SJeff Kirsher 13020926d499SYuval Mintz usleep_range(1000, 2000); 1303adfc5217SJeff Kirsher } 1304adfc5217SJeff Kirsher 1305adfc5217SJeff Kirsher smp_mb(); 1306adfc5217SJeff Kirsher 1307adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1308adfc5217SJeff Kirsher if (bp->sp_state & mask) { 130951c1a580SMerav Sicron BNX2X_ERR("Filtering completion timed out. sp_state 0x%lx, mask 0x%lx\n", 131051c1a580SMerav Sicron bp->sp_state, mask); 1311adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1312adfc5217SJeff Kirsher return false; 1313adfc5217SJeff Kirsher } 1314adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1315adfc5217SJeff Kirsher 1316adfc5217SJeff Kirsher return true; 1317adfc5217SJeff Kirsher } 1318adfc5217SJeff Kirsher 1319adfc5217SJeff Kirsher /** 1320adfc5217SJeff Kirsher * bnx2x_set_ctx_validation - set CDU context validation values 1321adfc5217SJeff Kirsher * 1322adfc5217SJeff Kirsher * @bp: driver handle 1323adfc5217SJeff Kirsher * @cxt: context of the connection on the host memory 1324adfc5217SJeff Kirsher * @cid: SW CID of the connection to be configured 1325adfc5217SJeff Kirsher */ 1326adfc5217SJeff Kirsher void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt, 1327adfc5217SJeff Kirsher u32 cid); 1328adfc5217SJeff Kirsher 1329adfc5217SJeff Kirsher void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id, 1330adfc5217SJeff Kirsher u8 sb_index, u8 disable, u16 usec); 1331adfc5217SJeff Kirsher void bnx2x_acquire_phy_lock(struct bnx2x *bp); 1332adfc5217SJeff Kirsher void bnx2x_release_phy_lock(struct bnx2x *bp); 1333adfc5217SJeff Kirsher 1334adfc5217SJeff Kirsher /** 1335adfc5217SJeff Kirsher * bnx2x_extract_max_cfg - extract MAX BW part from MF configuration. 1336adfc5217SJeff Kirsher * 1337adfc5217SJeff Kirsher * @bp: driver handle 1338adfc5217SJeff Kirsher * @mf_cfg: MF configuration 1339adfc5217SJeff Kirsher * 1340adfc5217SJeff Kirsher */ 1341adfc5217SJeff Kirsher static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg) 1342adfc5217SJeff Kirsher { 1343adfc5217SJeff Kirsher u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> 1344adfc5217SJeff Kirsher FUNC_MF_CFG_MAX_BW_SHIFT; 1345adfc5217SJeff Kirsher if (!max_cfg) { 134651c1a580SMerav Sicron DP(NETIF_MSG_IFUP | BNX2X_MSG_ETHTOOL, 134796b0accbSMichal Schmidt "Max BW configured to 0 - using 100 instead\n"); 1348adfc5217SJeff Kirsher max_cfg = 100; 1349adfc5217SJeff Kirsher } 1350adfc5217SJeff Kirsher return max_cfg; 1351adfc5217SJeff Kirsher } 1352adfc5217SJeff Kirsher 1353621b4d66SDmitry Kravkov /* checks if HW supports GRO for given MTU */ 1354621b4d66SDmitry Kravkov static inline bool bnx2x_mtu_allows_gro(int mtu) 1355621b4d66SDmitry Kravkov { 1356621b4d66SDmitry Kravkov /* gro frags per page */ 1357621b4d66SDmitry Kravkov int fpp = SGE_PAGE_SIZE / (mtu - ETH_MAX_TPA_HEADER_SIZE); 1358621b4d66SDmitry Kravkov 1359621b4d66SDmitry Kravkov /* 136016a5fd92SYuval Mintz * 1. Number of frags should not grow above MAX_SKB_FRAGS 136116a5fd92SYuval Mintz * 2. Frag must fit the page 1362621b4d66SDmitry Kravkov */ 1363621b4d66SDmitry Kravkov return mtu <= SGE_PAGE_SIZE && (U_ETH_SGL_SIZE * fpp) <= MAX_SKB_FRAGS; 1364621b4d66SDmitry Kravkov } 136555c11941SMerav Sicron 13661355b704SMintz Yuval /** 1367b306f5edSDmitry Kravkov * bnx2x_get_iscsi_info - update iSCSI params according to licensing info. 1368b306f5edSDmitry Kravkov * 1369b306f5edSDmitry Kravkov * @bp: driver handle 1370b306f5edSDmitry Kravkov * 1371b306f5edSDmitry Kravkov */ 1372b306f5edSDmitry Kravkov void bnx2x_get_iscsi_info(struct bnx2x *bp); 137300253a8cSDmitry Kravkov 137400253a8cSDmitry Kravkov /** 137500253a8cSDmitry Kravkov * bnx2x_link_sync_notify - send notification to other functions. 137600253a8cSDmitry Kravkov * 137700253a8cSDmitry Kravkov * @bp: driver handle 137800253a8cSDmitry Kravkov * 137900253a8cSDmitry Kravkov */ 138000253a8cSDmitry Kravkov static inline void bnx2x_link_sync_notify(struct bnx2x *bp) 138100253a8cSDmitry Kravkov { 138200253a8cSDmitry Kravkov int func; 138300253a8cSDmitry Kravkov int vn; 138400253a8cSDmitry Kravkov 138500253a8cSDmitry Kravkov /* Set the attention towards other drivers on the same port */ 138600253a8cSDmitry Kravkov for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { 138700253a8cSDmitry Kravkov if (vn == BP_VN(bp)) 138800253a8cSDmitry Kravkov continue; 138900253a8cSDmitry Kravkov 139000253a8cSDmitry Kravkov func = func_by_vn(bp, vn); 139100253a8cSDmitry Kravkov REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + 139200253a8cSDmitry Kravkov (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); 139300253a8cSDmitry Kravkov } 139400253a8cSDmitry Kravkov } 139500253a8cSDmitry Kravkov 139600253a8cSDmitry Kravkov /** 139700253a8cSDmitry Kravkov * bnx2x_update_drv_flags - update flags in shmem 139800253a8cSDmitry Kravkov * 139900253a8cSDmitry Kravkov * @bp: driver handle 140000253a8cSDmitry Kravkov * @flags: flags to update 140100253a8cSDmitry Kravkov * @set: set or clear 140200253a8cSDmitry Kravkov * 140300253a8cSDmitry Kravkov */ 140400253a8cSDmitry Kravkov static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set) 140500253a8cSDmitry Kravkov { 140600253a8cSDmitry Kravkov if (SHMEM2_HAS(bp, drv_flags)) { 140700253a8cSDmitry Kravkov u32 drv_flags; 1408f16da43bSAriel Elior bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 140900253a8cSDmitry Kravkov drv_flags = SHMEM2_RD(bp, drv_flags); 141000253a8cSDmitry Kravkov 141100253a8cSDmitry Kravkov if (set) 141200253a8cSDmitry Kravkov SET_FLAGS(drv_flags, flags); 141300253a8cSDmitry Kravkov else 141400253a8cSDmitry Kravkov RESET_FLAGS(drv_flags, flags); 141500253a8cSDmitry Kravkov 141600253a8cSDmitry Kravkov SHMEM2_WR(bp, drv_flags, drv_flags); 141751c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "drv_flags 0x%08x\n", drv_flags); 1418f16da43bSAriel Elior bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 141900253a8cSDmitry Kravkov } 142000253a8cSDmitry Kravkov } 142100253a8cSDmitry Kravkov 1422614c76dfSDmitry Kravkov static inline bool bnx2x_is_valid_ether_addr(struct bnx2x *bp, u8 *addr) 1423614c76dfSDmitry Kravkov { 142455c11941SMerav Sicron if (is_valid_ether_addr(addr) || 142555c11941SMerav Sicron (is_zero_ether_addr(addr) && 142655c11941SMerav Sicron (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)))) 1427614c76dfSDmitry Kravkov return true; 142855c11941SMerav Sicron 1429614c76dfSDmitry Kravkov return false; 1430614c76dfSDmitry Kravkov } 1431614c76dfSDmitry Kravkov 14328ca5e17eSAriel Elior /** 14332de67439SYuval Mintz * bnx2x_fill_fw_str - Fill buffer with FW version string 14348ca5e17eSAriel Elior * 14358ca5e17eSAriel Elior * @bp: driver handle 14368ca5e17eSAriel Elior * @buf: character buffer to fill with the fw name 14378ca5e17eSAriel Elior * @buf_len: length of the above buffer 14388ca5e17eSAriel Elior * 14398ca5e17eSAriel Elior */ 14408ca5e17eSAriel Elior void bnx2x_fill_fw_str(struct bnx2x *bp, char *buf, size_t buf_len); 14417fa6f340SYuval Mintz 14427fa6f340SYuval Mintz int bnx2x_drain_tx_queues(struct bnx2x *bp); 14437fa6f340SYuval Mintz void bnx2x_squeeze_objects(struct bnx2x *bp); 14447fa6f340SYuval Mintz 1445adfc5217SJeff Kirsher #endif /* BNX2X_CMN_H */ 1446