14ad79e13SYuval Mintz /* bnx2x_cmn.h: QLogic Everest network driver. 2adfc5217SJeff Kirsher * 3247fa82bSYuval Mintz * Copyright (c) 2007-2013 Broadcom Corporation 44ad79e13SYuval Mintz * Copyright (c) 2014 QLogic Corporation 54ad79e13SYuval Mintz * All rights reserved 6adfc5217SJeff Kirsher * 7adfc5217SJeff Kirsher * This program is free software; you can redistribute it and/or modify 8adfc5217SJeff Kirsher * it under the terms of the GNU General Public License as published by 9adfc5217SJeff Kirsher * the Free Software Foundation. 10adfc5217SJeff Kirsher * 1108f6dd89SAriel Elior * Maintained by: Ariel Elior <ariel.elior@qlogic.com> 12adfc5217SJeff Kirsher * Written by: Eliezer Tamir 13adfc5217SJeff Kirsher * Based on code from Michael Chan's bnx2 driver 14adfc5217SJeff Kirsher * UDP CSUM errata workaround by Arik Gendelman 15adfc5217SJeff Kirsher * Slowpath and fastpath rework by Vladislav Zolotarov 16adfc5217SJeff Kirsher * Statistics and Link management by Yitchak Gertner 17adfc5217SJeff Kirsher * 18adfc5217SJeff Kirsher */ 19adfc5217SJeff Kirsher #ifndef BNX2X_CMN_H 20adfc5217SJeff Kirsher #define BNX2X_CMN_H 21adfc5217SJeff Kirsher 22adfc5217SJeff Kirsher #include <linux/types.h> 23adfc5217SJeff Kirsher #include <linux/pci.h> 24adfc5217SJeff Kirsher #include <linux/netdevice.h> 25614c76dfSDmitry Kravkov #include <linux/etherdevice.h> 26df1efc2dSJosh Boyer #include <linux/irq.h> 27adfc5217SJeff Kirsher 28adfc5217SJeff Kirsher #include "bnx2x.h" 296411280aSAriel Elior #include "bnx2x_sriov.h" 30adfc5217SJeff Kirsher 31adfc5217SJeff Kirsher /* This is used as a replacement for an MCP if it's not present */ 32a8f47eb7Sstephen hemminger extern int bnx2x_load_count[2][3]; /* per-path: 0-common, 1-port0, 2-port1 */ 33a8f47eb7Sstephen hemminger extern int bnx2x_num_queues; 34adfc5217SJeff Kirsher 35adfc5217SJeff Kirsher /************************ Macros ********************************/ 36adfc5217SJeff Kirsher #define BNX2X_PCI_FREE(x, y, size) \ 37adfc5217SJeff Kirsher do { \ 38adfc5217SJeff Kirsher if (x) { \ 39adfc5217SJeff Kirsher dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \ 40adfc5217SJeff Kirsher x = NULL; \ 41adfc5217SJeff Kirsher y = 0; \ 42adfc5217SJeff Kirsher } \ 43adfc5217SJeff Kirsher } while (0) 44adfc5217SJeff Kirsher 45adfc5217SJeff Kirsher #define BNX2X_FREE(x) \ 46adfc5217SJeff Kirsher do { \ 47adfc5217SJeff Kirsher if (x) { \ 48adfc5217SJeff Kirsher kfree((void *)x); \ 49adfc5217SJeff Kirsher x = NULL; \ 50adfc5217SJeff Kirsher } \ 51adfc5217SJeff Kirsher } while (0) 52adfc5217SJeff Kirsher 53cd2b0389SJoe Perches #define BNX2X_PCI_ALLOC(y, size) \ 54cd2b0389SJoe Perches ({ \ 5507a85fe1SLuis Chamberlain void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ 56cd2b0389SJoe Perches if (x) \ 57cd2b0389SJoe Perches DP(NETIF_MSG_HW, \ 58cd2b0389SJoe Perches "BNX2X_PCI_ALLOC: Physical %Lx Virtual %p\n", \ 596bf07b8eSYuval Mintz (unsigned long long)(*y), x); \ 60cd2b0389SJoe Perches x; \ 61cd2b0389SJoe Perches }) 62cd2b0389SJoe Perches #define BNX2X_PCI_FALLOC(y, size) \ 63cd2b0389SJoe Perches ({ \ 64cd2b0389SJoe Perches void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ 65cd2b0389SJoe Perches if (x) { \ 66cd2b0389SJoe Perches memset(x, 0xff, size); \ 67cd2b0389SJoe Perches DP(NETIF_MSG_HW, \ 68cd2b0389SJoe Perches "BNX2X_PCI_FALLOC: Physical %Lx Virtual %p\n", \ 6975b29459SDmitry Kravkov (unsigned long long)(*y), x); \ 70cd2b0389SJoe Perches } \ 71cd2b0389SJoe Perches x; \ 72cd2b0389SJoe Perches }) 73adfc5217SJeff Kirsher 74adfc5217SJeff Kirsher /*********************** Interfaces **************************** 75adfc5217SJeff Kirsher * Functions that need to be implemented by each driver version 76adfc5217SJeff Kirsher */ 77adfc5217SJeff Kirsher /* Init */ 78adfc5217SJeff Kirsher 79adfc5217SJeff Kirsher /** 80adfc5217SJeff Kirsher * bnx2x_send_unload_req - request unload mode from the MCP. 81adfc5217SJeff Kirsher * 82adfc5217SJeff Kirsher * @bp: driver handle 83adfc5217SJeff Kirsher * @unload_mode: requested function's unload mode 84adfc5217SJeff Kirsher * 85adfc5217SJeff Kirsher * Return unload mode returned by the MCP: COMMON, PORT or FUNC. 86adfc5217SJeff Kirsher */ 87adfc5217SJeff Kirsher u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode); 88adfc5217SJeff Kirsher 89adfc5217SJeff Kirsher /** 90adfc5217SJeff Kirsher * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP. 91adfc5217SJeff Kirsher * 92adfc5217SJeff Kirsher * @bp: driver handle 935d07d868SYuval Mintz * @keep_link: true iff link should be kept up 94adfc5217SJeff Kirsher */ 955d07d868SYuval Mintz void bnx2x_send_unload_done(struct bnx2x *bp, bool keep_link); 96adfc5217SJeff Kirsher 97adfc5217SJeff Kirsher /** 9896305234SDmitry Kravkov * bnx2x_config_rss_pf - configure RSS parameters in a PF. 99adfc5217SJeff Kirsher * 100adfc5217SJeff Kirsher * @bp: driver handle 10149ce9c2cSBen Hutchings * @rss_obj: RSS object to use 102adfc5217SJeff Kirsher * @ind_table: indirection table to configure 103adfc5217SJeff Kirsher * @config_hash: re-configure RSS hash keys configuration 10460cad4e6SAriel Elior * @enable: enabled or disabled configuration 105adfc5217SJeff Kirsher */ 10660cad4e6SAriel Elior int bnx2x_rss(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj, 10760cad4e6SAriel Elior bool config_hash, bool enable); 108adfc5217SJeff Kirsher 109adfc5217SJeff Kirsher /** 110adfc5217SJeff Kirsher * bnx2x__init_func_obj - init function object 111adfc5217SJeff Kirsher * 112adfc5217SJeff Kirsher * @bp: driver handle 113adfc5217SJeff Kirsher * 114adfc5217SJeff Kirsher * Initializes the Function Object with the appropriate 115adfc5217SJeff Kirsher * parameters which include a function slow path driver 116adfc5217SJeff Kirsher * interface. 117adfc5217SJeff Kirsher */ 118adfc5217SJeff Kirsher void bnx2x__init_func_obj(struct bnx2x *bp); 119adfc5217SJeff Kirsher 120adfc5217SJeff Kirsher /** 121adfc5217SJeff Kirsher * bnx2x_setup_queue - setup eth queue. 122adfc5217SJeff Kirsher * 123adfc5217SJeff Kirsher * @bp: driver handle 124adfc5217SJeff Kirsher * @fp: pointer to the fastpath structure 125adfc5217SJeff Kirsher * @leading: boolean 126adfc5217SJeff Kirsher * 127adfc5217SJeff Kirsher */ 128adfc5217SJeff Kirsher int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, 129adfc5217SJeff Kirsher bool leading); 130adfc5217SJeff Kirsher 131adfc5217SJeff Kirsher /** 132adfc5217SJeff Kirsher * bnx2x_setup_leading - bring up a leading eth queue. 133adfc5217SJeff Kirsher * 134adfc5217SJeff Kirsher * @bp: driver handle 135adfc5217SJeff Kirsher */ 136adfc5217SJeff Kirsher int bnx2x_setup_leading(struct bnx2x *bp); 137adfc5217SJeff Kirsher 138adfc5217SJeff Kirsher /** 139adfc5217SJeff Kirsher * bnx2x_fw_command - send the MCP a request 140adfc5217SJeff Kirsher * 141adfc5217SJeff Kirsher * @bp: driver handle 142adfc5217SJeff Kirsher * @command: request 143adfc5217SJeff Kirsher * @param: request's parameter 144adfc5217SJeff Kirsher * 145adfc5217SJeff Kirsher * block until there is a reply 146adfc5217SJeff Kirsher */ 147adfc5217SJeff Kirsher u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); 148adfc5217SJeff Kirsher 149adfc5217SJeff Kirsher /** 150adfc5217SJeff Kirsher * bnx2x_initial_phy_init - initialize link parameters structure variables. 151adfc5217SJeff Kirsher * 152adfc5217SJeff Kirsher * @bp: driver handle 153adfc5217SJeff Kirsher * @load_mode: current mode 154adfc5217SJeff Kirsher */ 155cd1dfce2SYuval Mintz int bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode); 156adfc5217SJeff Kirsher 157adfc5217SJeff Kirsher /** 158adfc5217SJeff Kirsher * bnx2x_link_set - configure hw according to link parameters structure. 159adfc5217SJeff Kirsher * 160adfc5217SJeff Kirsher * @bp: driver handle 161adfc5217SJeff Kirsher */ 162adfc5217SJeff Kirsher void bnx2x_link_set(struct bnx2x *bp); 163adfc5217SJeff Kirsher 164adfc5217SJeff Kirsher /** 1655d07d868SYuval Mintz * bnx2x_force_link_reset - Forces link reset, and put the PHY 1665d07d868SYuval Mintz * in reset as well. 1675d07d868SYuval Mintz * 1685d07d868SYuval Mintz * @bp: driver handle 1695d07d868SYuval Mintz */ 1705d07d868SYuval Mintz void bnx2x_force_link_reset(struct bnx2x *bp); 1715d07d868SYuval Mintz 1725d07d868SYuval Mintz /** 173adfc5217SJeff Kirsher * bnx2x_link_test - query link status. 174adfc5217SJeff Kirsher * 175adfc5217SJeff Kirsher * @bp: driver handle 176adfc5217SJeff Kirsher * @is_serdes: bool 177adfc5217SJeff Kirsher * 178adfc5217SJeff Kirsher * Returns 0 if link is UP. 179adfc5217SJeff Kirsher */ 180adfc5217SJeff Kirsher u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes); 181adfc5217SJeff Kirsher 182adfc5217SJeff Kirsher /** 183adfc5217SJeff Kirsher * bnx2x_drv_pulse - write driver pulse to shmem 184adfc5217SJeff Kirsher * 185adfc5217SJeff Kirsher * @bp: driver handle 186adfc5217SJeff Kirsher * 187adfc5217SJeff Kirsher * writes the value in bp->fw_drv_pulse_wr_seq to drv_pulse mbox 188adfc5217SJeff Kirsher * in the shmem. 189adfc5217SJeff Kirsher */ 190adfc5217SJeff Kirsher void bnx2x_drv_pulse(struct bnx2x *bp); 191adfc5217SJeff Kirsher 192adfc5217SJeff Kirsher /** 193adfc5217SJeff Kirsher * bnx2x_igu_ack_sb - update IGU with current SB value 194adfc5217SJeff Kirsher * 195adfc5217SJeff Kirsher * @bp: driver handle 196adfc5217SJeff Kirsher * @igu_sb_id: SB id 197adfc5217SJeff Kirsher * @segment: SB segment 198adfc5217SJeff Kirsher * @index: SB index 199adfc5217SJeff Kirsher * @op: SB operation 200adfc5217SJeff Kirsher * @update: is HW update required 201adfc5217SJeff Kirsher */ 202adfc5217SJeff Kirsher void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, 203adfc5217SJeff Kirsher u16 index, u8 op, u8 update); 204adfc5217SJeff Kirsher 205adfc5217SJeff Kirsher /* Disable transactions from chip to host */ 206adfc5217SJeff Kirsher void bnx2x_pf_disable(struct bnx2x *bp); 20707ba6af4SMiriam Shitrit int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val); 208adfc5217SJeff Kirsher 209adfc5217SJeff Kirsher /** 210adfc5217SJeff Kirsher * bnx2x__link_status_update - handles link status change. 211adfc5217SJeff Kirsher * 212adfc5217SJeff Kirsher * @bp: driver handle 213adfc5217SJeff Kirsher */ 214adfc5217SJeff Kirsher void bnx2x__link_status_update(struct bnx2x *bp); 215adfc5217SJeff Kirsher 216adfc5217SJeff Kirsher /** 217adfc5217SJeff Kirsher * bnx2x_link_report - report link status to upper layer. 218adfc5217SJeff Kirsher * 219adfc5217SJeff Kirsher * @bp: driver handle 220adfc5217SJeff Kirsher */ 221adfc5217SJeff Kirsher void bnx2x_link_report(struct bnx2x *bp); 222adfc5217SJeff Kirsher 223adfc5217SJeff Kirsher /* None-atomic version of bnx2x_link_report() */ 224adfc5217SJeff Kirsher void __bnx2x_link_report(struct bnx2x *bp); 225adfc5217SJeff Kirsher 226adfc5217SJeff Kirsher /** 227adfc5217SJeff Kirsher * bnx2x_get_mf_speed - calculate MF speed. 228adfc5217SJeff Kirsher * 229adfc5217SJeff Kirsher * @bp: driver handle 230adfc5217SJeff Kirsher * 231adfc5217SJeff Kirsher * Takes into account current linespeed and MF configuration. 232adfc5217SJeff Kirsher */ 233adfc5217SJeff Kirsher u16 bnx2x_get_mf_speed(struct bnx2x *bp); 234adfc5217SJeff Kirsher 235adfc5217SJeff Kirsher /** 236adfc5217SJeff Kirsher * bnx2x_msix_sp_int - MSI-X slowpath interrupt handler 237adfc5217SJeff Kirsher * 238adfc5217SJeff Kirsher * @irq: irq number 239adfc5217SJeff Kirsher * @dev_instance: private instance 240adfc5217SJeff Kirsher */ 241adfc5217SJeff Kirsher irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance); 242adfc5217SJeff Kirsher 243adfc5217SJeff Kirsher /** 244adfc5217SJeff Kirsher * bnx2x_interrupt - non MSI-X interrupt handler 245adfc5217SJeff Kirsher * 246adfc5217SJeff Kirsher * @irq: irq number 247adfc5217SJeff Kirsher * @dev_instance: private instance 248adfc5217SJeff Kirsher */ 249adfc5217SJeff Kirsher irqreturn_t bnx2x_interrupt(int irq, void *dev_instance); 250adfc5217SJeff Kirsher 251adfc5217SJeff Kirsher /** 252adfc5217SJeff Kirsher * bnx2x_cnic_notify - send command to cnic driver 253adfc5217SJeff Kirsher * 254adfc5217SJeff Kirsher * @bp: driver handle 255adfc5217SJeff Kirsher * @cmd: command 256adfc5217SJeff Kirsher */ 257adfc5217SJeff Kirsher int bnx2x_cnic_notify(struct bnx2x *bp, int cmd); 258adfc5217SJeff Kirsher 259adfc5217SJeff Kirsher /** 260adfc5217SJeff Kirsher * bnx2x_setup_cnic_irq_info - provides cnic with IRQ information 261adfc5217SJeff Kirsher * 262adfc5217SJeff Kirsher * @bp: driver handle 263adfc5217SJeff Kirsher */ 264adfc5217SJeff Kirsher void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); 26537ae41a9SMerav Sicron 26637ae41a9SMerav Sicron /** 26737ae41a9SMerav Sicron * bnx2x_setup_cnic_info - provides cnic with updated info 26837ae41a9SMerav Sicron * 26937ae41a9SMerav Sicron * @bp: driver handle 27037ae41a9SMerav Sicron */ 27137ae41a9SMerav Sicron void bnx2x_setup_cnic_info(struct bnx2x *bp); 27237ae41a9SMerav Sicron 273adfc5217SJeff Kirsher /** 274adfc5217SJeff Kirsher * bnx2x_int_enable - enable HW interrupts. 275adfc5217SJeff Kirsher * 276adfc5217SJeff Kirsher * @bp: driver handle 277adfc5217SJeff Kirsher */ 278adfc5217SJeff Kirsher void bnx2x_int_enable(struct bnx2x *bp); 279adfc5217SJeff Kirsher 280adfc5217SJeff Kirsher /** 281adfc5217SJeff Kirsher * bnx2x_int_disable_sync - disable interrupts. 282adfc5217SJeff Kirsher * 283adfc5217SJeff Kirsher * @bp: driver handle 284adfc5217SJeff Kirsher * @disable_hw: true, disable HW interrupts. 285adfc5217SJeff Kirsher * 286adfc5217SJeff Kirsher * This function ensures that there are no 287adfc5217SJeff Kirsher * ISRs or SP DPCs (sp_task) are running after it returns. 288adfc5217SJeff Kirsher */ 289adfc5217SJeff Kirsher void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw); 290adfc5217SJeff Kirsher 291adfc5217SJeff Kirsher /** 29255c11941SMerav Sicron * bnx2x_nic_init_cnic - init driver internals for cnic. 293adfc5217SJeff Kirsher * 294adfc5217SJeff Kirsher * @bp: driver handle 295adfc5217SJeff Kirsher * @load_code: COMMON, PORT or FUNCTION 296adfc5217SJeff Kirsher * 297adfc5217SJeff Kirsher * Initializes: 298adfc5217SJeff Kirsher * - rings 299adfc5217SJeff Kirsher * - status blocks 300adfc5217SJeff Kirsher * - etc. 301adfc5217SJeff Kirsher */ 30255c11941SMerav Sicron void bnx2x_nic_init_cnic(struct bnx2x *bp); 303adfc5217SJeff Kirsher 304adfc5217SJeff Kirsher /** 305ecf01c22SYuval Mintz * bnx2x_preirq_nic_init - init driver internals. 30655c11941SMerav Sicron * 30755c11941SMerav Sicron * @bp: driver handle 30855c11941SMerav Sicron * 30955c11941SMerav Sicron * Initializes: 310ecf01c22SYuval Mintz * - fastpath object 311ecf01c22SYuval Mintz * - fastpath rings 312ecf01c22SYuval Mintz * etc. 313ecf01c22SYuval Mintz */ 314ecf01c22SYuval Mintz void bnx2x_pre_irq_nic_init(struct bnx2x *bp); 315ecf01c22SYuval Mintz 316ecf01c22SYuval Mintz /** 317ecf01c22SYuval Mintz * bnx2x_postirq_nic_init - init driver internals. 318ecf01c22SYuval Mintz * 319ecf01c22SYuval Mintz * @bp: driver handle 320ecf01c22SYuval Mintz * @load_code: COMMON, PORT or FUNCTION 321ecf01c22SYuval Mintz * 322ecf01c22SYuval Mintz * Initializes: 32355c11941SMerav Sicron * - status blocks 324ecf01c22SYuval Mintz * - slowpath rings 32555c11941SMerav Sicron * - etc. 32655c11941SMerav Sicron */ 327ecf01c22SYuval Mintz void bnx2x_post_irq_nic_init(struct bnx2x *bp, u32 load_code); 32855c11941SMerav Sicron /** 32955c11941SMerav Sicron * bnx2x_alloc_mem_cnic - allocate driver's memory for cnic. 33055c11941SMerav Sicron * 33155c11941SMerav Sicron * @bp: driver handle 33255c11941SMerav Sicron */ 33355c11941SMerav Sicron int bnx2x_alloc_mem_cnic(struct bnx2x *bp); 33455c11941SMerav Sicron /** 335adfc5217SJeff Kirsher * bnx2x_alloc_mem - allocate driver's memory. 336adfc5217SJeff Kirsher * 337adfc5217SJeff Kirsher * @bp: driver handle 338adfc5217SJeff Kirsher */ 339adfc5217SJeff Kirsher int bnx2x_alloc_mem(struct bnx2x *bp); 340adfc5217SJeff Kirsher 341adfc5217SJeff Kirsher /** 34255c11941SMerav Sicron * bnx2x_free_mem_cnic - release driver's memory for cnic. 34355c11941SMerav Sicron * 34455c11941SMerav Sicron * @bp: driver handle 34555c11941SMerav Sicron */ 34655c11941SMerav Sicron void bnx2x_free_mem_cnic(struct bnx2x *bp); 34755c11941SMerav Sicron /** 348adfc5217SJeff Kirsher * bnx2x_free_mem - release driver's memory. 349adfc5217SJeff Kirsher * 350adfc5217SJeff Kirsher * @bp: driver handle 351adfc5217SJeff Kirsher */ 352adfc5217SJeff Kirsher void bnx2x_free_mem(struct bnx2x *bp); 353adfc5217SJeff Kirsher 354adfc5217SJeff Kirsher /** 355adfc5217SJeff Kirsher * bnx2x_set_num_queues - set number of queues according to mode. 356adfc5217SJeff Kirsher * 357adfc5217SJeff Kirsher * @bp: driver handle 358adfc5217SJeff Kirsher */ 359adfc5217SJeff Kirsher void bnx2x_set_num_queues(struct bnx2x *bp); 360adfc5217SJeff Kirsher 361adfc5217SJeff Kirsher /** 362adfc5217SJeff Kirsher * bnx2x_chip_cleanup - cleanup chip internals. 363adfc5217SJeff Kirsher * 364adfc5217SJeff Kirsher * @bp: driver handle 365adfc5217SJeff Kirsher * @unload_mode: COMMON, PORT, FUNCTION 3665d07d868SYuval Mintz * @keep_link: true iff link should be kept up. 367adfc5217SJeff Kirsher * 368adfc5217SJeff Kirsher * - Cleanup MAC configuration. 369adfc5217SJeff Kirsher * - Closes clients. 370adfc5217SJeff Kirsher * - etc. 371adfc5217SJeff Kirsher */ 3725d07d868SYuval Mintz void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link); 373adfc5217SJeff Kirsher 374adfc5217SJeff Kirsher /** 375adfc5217SJeff Kirsher * bnx2x_acquire_hw_lock - acquire HW lock. 376adfc5217SJeff Kirsher * 377adfc5217SJeff Kirsher * @bp: driver handle 378adfc5217SJeff Kirsher * @resource: resource bit which was locked 379adfc5217SJeff Kirsher */ 380adfc5217SJeff Kirsher int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource); 381adfc5217SJeff Kirsher 382adfc5217SJeff Kirsher /** 383adfc5217SJeff Kirsher * bnx2x_release_hw_lock - release HW lock. 384adfc5217SJeff Kirsher * 385adfc5217SJeff Kirsher * @bp: driver handle 386adfc5217SJeff Kirsher * @resource: resource bit which was locked 387adfc5217SJeff Kirsher */ 388adfc5217SJeff Kirsher int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); 389adfc5217SJeff Kirsher 390adfc5217SJeff Kirsher /** 391adfc5217SJeff Kirsher * bnx2x_release_leader_lock - release recovery leader lock 392adfc5217SJeff Kirsher * 393adfc5217SJeff Kirsher * @bp: driver handle 394adfc5217SJeff Kirsher */ 395adfc5217SJeff Kirsher int bnx2x_release_leader_lock(struct bnx2x *bp); 396adfc5217SJeff Kirsher 397adfc5217SJeff Kirsher /** 398adfc5217SJeff Kirsher * bnx2x_set_eth_mac - configure eth MAC address in the HW 399adfc5217SJeff Kirsher * 400adfc5217SJeff Kirsher * @bp: driver handle 401adfc5217SJeff Kirsher * @set: set or clear 402adfc5217SJeff Kirsher * 403adfc5217SJeff Kirsher * Configures according to the value in netdev->dev_addr. 404adfc5217SJeff Kirsher */ 405adfc5217SJeff Kirsher int bnx2x_set_eth_mac(struct bnx2x *bp, bool set); 406adfc5217SJeff Kirsher 407adfc5217SJeff Kirsher /** 408adfc5217SJeff Kirsher * bnx2x_set_rx_mode - set MAC filtering configurations. 409adfc5217SJeff Kirsher * 410adfc5217SJeff Kirsher * @dev: netdevice 411adfc5217SJeff Kirsher * 412adfc5217SJeff Kirsher * called with netif_tx_lock from dev_mcast.c 413adfc5217SJeff Kirsher * If bp->state is OPEN, should be called with 414adfc5217SJeff Kirsher * netif_addr_lock_bh() 415adfc5217SJeff Kirsher */ 4168b09be5fSYuval Mintz void bnx2x_set_rx_mode_inner(struct bnx2x *bp); 417adfc5217SJeff Kirsher 418adfc5217SJeff Kirsher /* Parity errors related */ 419889b9af3SAriel Elior void bnx2x_set_pf_load(struct bnx2x *bp); 420889b9af3SAriel Elior bool bnx2x_clear_pf_load(struct bnx2x *bp); 421adfc5217SJeff Kirsher bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print); 422adfc5217SJeff Kirsher bool bnx2x_reset_is_done(struct bnx2x *bp, int engine); 423adfc5217SJeff Kirsher void bnx2x_set_reset_in_progress(struct bnx2x *bp); 424adfc5217SJeff Kirsher void bnx2x_set_reset_global(struct bnx2x *bp); 425adfc5217SJeff Kirsher void bnx2x_disable_close_the_gate(struct bnx2x *bp); 42655c11941SMerav Sicron int bnx2x_init_hw_func_cnic(struct bnx2x *bp); 427adfc5217SJeff Kirsher 4284a4d2d37SManish Chopra void bnx2x_clear_vlan_info(struct bnx2x *bp); 4294a4d2d37SManish Chopra 430adfc5217SJeff Kirsher /** 431adfc5217SJeff Kirsher * bnx2x_sp_event - handle ramrods completion. 432adfc5217SJeff Kirsher * 433adfc5217SJeff Kirsher * @fp: fastpath handle for the event 434adfc5217SJeff Kirsher * @rr_cqe: eth_rx_cqe 435adfc5217SJeff Kirsher */ 436adfc5217SJeff Kirsher void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); 437adfc5217SJeff Kirsher 438adfc5217SJeff Kirsher /** 439adfc5217SJeff Kirsher * bnx2x_ilt_set_info - prepare ILT configurations. 440adfc5217SJeff Kirsher * 441adfc5217SJeff Kirsher * @bp: driver handle 442adfc5217SJeff Kirsher */ 443adfc5217SJeff Kirsher void bnx2x_ilt_set_info(struct bnx2x *bp); 444adfc5217SJeff Kirsher 445adfc5217SJeff Kirsher /** 44655c11941SMerav Sicron * bnx2x_ilt_set_cnic_info - prepare ILT configurations for SRC 44755c11941SMerav Sicron * and TM. 44855c11941SMerav Sicron * 44955c11941SMerav Sicron * @bp: driver handle 45055c11941SMerav Sicron */ 45155c11941SMerav Sicron void bnx2x_ilt_set_info_cnic(struct bnx2x *bp); 45255c11941SMerav Sicron 45355c11941SMerav Sicron /** 454adfc5217SJeff Kirsher * bnx2x_dcbx_init - initialize dcbx protocol. 455adfc5217SJeff Kirsher * 456adfc5217SJeff Kirsher * @bp: driver handle 457adfc5217SJeff Kirsher */ 4589876879fSBarak Witkowski void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem); 459adfc5217SJeff Kirsher 460adfc5217SJeff Kirsher /** 461adfc5217SJeff Kirsher * bnx2x_set_power_state - set power state to the requested value. 462adfc5217SJeff Kirsher * 463adfc5217SJeff Kirsher * @bp: driver handle 464adfc5217SJeff Kirsher * @state: required state D0 or D3hot 465adfc5217SJeff Kirsher * 466adfc5217SJeff Kirsher * Currently only D0 and D3hot are supported. 467adfc5217SJeff Kirsher */ 468adfc5217SJeff Kirsher int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); 469adfc5217SJeff Kirsher 470adfc5217SJeff Kirsher /** 471adfc5217SJeff Kirsher * bnx2x_update_max_mf_config - update MAX part of MF configuration in HW. 472adfc5217SJeff Kirsher * 473adfc5217SJeff Kirsher * @bp: driver handle 474adfc5217SJeff Kirsher * @value: new value 475adfc5217SJeff Kirsher */ 476adfc5217SJeff Kirsher void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value); 477adfc5217SJeff Kirsher /* Error handling */ 478adfc5217SJeff Kirsher void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl); 479adfc5217SJeff Kirsher 480adfc5217SJeff Kirsher /* dev_close main block */ 4815d07d868SYuval Mintz int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link); 482adfc5217SJeff Kirsher 483adfc5217SJeff Kirsher /* dev_open main block */ 484adfc5217SJeff Kirsher int bnx2x_nic_load(struct bnx2x *bp, int load_mode); 485adfc5217SJeff Kirsher 486adfc5217SJeff Kirsher /* hard_xmit callback */ 487adfc5217SJeff Kirsher netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev); 488adfc5217SJeff Kirsher 489adfc5217SJeff Kirsher /* setup_tc callback */ 490adfc5217SJeff Kirsher int bnx2x_setup_tc(struct net_device *dev, u8 num_tc); 4912572ac53SJiri Pirko int __bnx2x_setup_tc(struct net_device *dev, enum tc_setup_type type, 492de4784caSJiri Pirko void *type_data); 493adfc5217SJeff Kirsher 4943ec9f9caSAriel Elior int bnx2x_get_vf_config(struct net_device *dev, int vf, 4953ec9f9caSAriel Elior struct ifla_vf_info *ivi); 496abc5a021SAriel Elior int bnx2x_set_vf_mac(struct net_device *dev, int queue, u8 *mac); 49779aab093SMoshe Shemesh int bnx2x_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos, 49879aab093SMoshe Shemesh __be16 vlan_proto); 49975303965SShahed Shaikh int bnx2x_set_vf_spoofchk(struct net_device *dev, int idx, bool val); 500abc5a021SAriel Elior 501adfc5217SJeff Kirsher /* select_queue callback */ 502f663dd9aSJason Wang u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb, 503a350ecceSPaolo Abeni struct net_device *sb_dev); 504adfc5217SJeff Kirsher 505dc1ba591SAriel Elior static inline void bnx2x_update_rx_prod(struct bnx2x *bp, 506dc1ba591SAriel Elior struct bnx2x_fastpath *fp, 507dc1ba591SAriel Elior u16 bd_prod, u16 rx_comp_prod, 508dc1ba591SAriel Elior u16 rx_sge_prod) 509dc1ba591SAriel Elior { 510dc1ba591SAriel Elior struct ustorm_eth_rx_producers rx_prods = {0}; 511dc1ba591SAriel Elior u32 i; 512dc1ba591SAriel Elior 513dc1ba591SAriel Elior /* Update producers */ 514dc1ba591SAriel Elior rx_prods.bd_prod = bd_prod; 515dc1ba591SAriel Elior rx_prods.cqe_prod = rx_comp_prod; 516dc1ba591SAriel Elior rx_prods.sge_prod = rx_sge_prod; 517dc1ba591SAriel Elior 518dc1ba591SAriel Elior /* Make sure that the BD and SGE data is updated before updating the 519dc1ba591SAriel Elior * producers since FW might read the BD/SGE right after the producer 520dc1ba591SAriel Elior * is updated. 521dc1ba591SAriel Elior * This is only applicable for weak-ordered memory model archs such 522dc1ba591SAriel Elior * as IA-64. The following barrier is also mandatory since FW will 523dc1ba591SAriel Elior * assumes BDs must have buffers. 524dc1ba591SAriel Elior */ 525dc1ba591SAriel Elior wmb(); 526dc1ba591SAriel Elior 527dc1ba591SAriel Elior for (i = 0; i < sizeof(rx_prods)/4; i++) 5287f883c77SSinan Kaya REG_WR_RELAXED(bp, fp->ustorm_rx_prods_offset + i * 4, 529dc1ba591SAriel Elior ((u32 *)&rx_prods)[i]); 530dc1ba591SAriel Elior 531dc1ba591SAriel Elior DP(NETIF_MSG_RX_STATUS, 532dc1ba591SAriel Elior "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", 533dc1ba591SAriel Elior fp->index, bd_prod, rx_comp_prod, rx_sge_prod); 534dc1ba591SAriel Elior } 535dc1ba591SAriel Elior 536adfc5217SJeff Kirsher /* reload helper */ 537adfc5217SJeff Kirsher int bnx2x_reload_if_running(struct net_device *dev); 538adfc5217SJeff Kirsher 539adfc5217SJeff Kirsher int bnx2x_change_mac_addr(struct net_device *dev, void *p); 540adfc5217SJeff Kirsher 541adfc5217SJeff Kirsher /* NAPI poll Tx part */ 542adfc5217SJeff Kirsher int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata); 543adfc5217SJeff Kirsher 5444ced637bSVaibhav Gupta extern const struct dev_pm_ops bnx2x_pm_ops; 545adfc5217SJeff Kirsher 546adfc5217SJeff Kirsher /* Release IRQ vectors */ 547adfc5217SJeff Kirsher void bnx2x_free_irq(struct bnx2x *bp); 548adfc5217SJeff Kirsher 549adfc5217SJeff Kirsher void bnx2x_free_fp_mem(struct bnx2x *bp); 550adfc5217SJeff Kirsher void bnx2x_init_rx_rings(struct bnx2x *bp); 55155c11941SMerav Sicron void bnx2x_init_rx_rings_cnic(struct bnx2x *bp); 552adfc5217SJeff Kirsher void bnx2x_free_skbs(struct bnx2x *bp); 553adfc5217SJeff Kirsher void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw); 554adfc5217SJeff Kirsher void bnx2x_netif_start(struct bnx2x *bp); 55555c11941SMerav Sicron int bnx2x_load_cnic(struct bnx2x *bp); 556adfc5217SJeff Kirsher 557adfc5217SJeff Kirsher /** 558adfc5217SJeff Kirsher * bnx2x_enable_msix - set msix configuration. 559adfc5217SJeff Kirsher * 560adfc5217SJeff Kirsher * @bp: driver handle 561adfc5217SJeff Kirsher * 562adfc5217SJeff Kirsher * fills msix_table, requests vectors, updates num_queues 563adfc5217SJeff Kirsher * according to number of available vectors. 564adfc5217SJeff Kirsher */ 5650e8d2ec5SMerav Sicron int bnx2x_enable_msix(struct bnx2x *bp); 566adfc5217SJeff Kirsher 567adfc5217SJeff Kirsher /** 568adfc5217SJeff Kirsher * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly 569adfc5217SJeff Kirsher * 570adfc5217SJeff Kirsher * @bp: driver handle 571adfc5217SJeff Kirsher */ 572adfc5217SJeff Kirsher int bnx2x_enable_msi(struct bnx2x *bp); 573adfc5217SJeff Kirsher 574adfc5217SJeff Kirsher /** 575adfc5217SJeff Kirsher * bnx2x_alloc_mem_bp - allocate memories outsize main driver structure 576adfc5217SJeff Kirsher * 577adfc5217SJeff Kirsher * @bp: driver handle 578adfc5217SJeff Kirsher */ 5790329aba1SBill Pemberton int bnx2x_alloc_mem_bp(struct bnx2x *bp); 580adfc5217SJeff Kirsher 581adfc5217SJeff Kirsher /** 582adfc5217SJeff Kirsher * bnx2x_free_mem_bp - release memories outsize main driver structure 583adfc5217SJeff Kirsher * 584adfc5217SJeff Kirsher * @bp: driver handle 585adfc5217SJeff Kirsher */ 586adfc5217SJeff Kirsher void bnx2x_free_mem_bp(struct bnx2x *bp); 587adfc5217SJeff Kirsher 588adfc5217SJeff Kirsher /** 589adfc5217SJeff Kirsher * bnx2x_change_mtu - change mtu netdev callback 590adfc5217SJeff Kirsher * 591adfc5217SJeff Kirsher * @dev: net device 592adfc5217SJeff Kirsher * @new_mtu: requested mtu 593adfc5217SJeff Kirsher * 594adfc5217SJeff Kirsher */ 595adfc5217SJeff Kirsher int bnx2x_change_mtu(struct net_device *dev, int new_mtu); 596adfc5217SJeff Kirsher 59755c11941SMerav Sicron #ifdef NETDEV_FCOE_WWNN 598adfc5217SJeff Kirsher /** 599adfc5217SJeff Kirsher * bnx2x_fcoe_get_wwn - return the requested WWN value for this port 600adfc5217SJeff Kirsher * 601adfc5217SJeff Kirsher * @dev: net_device 602adfc5217SJeff Kirsher * @wwn: output buffer 603adfc5217SJeff Kirsher * @type: WWN type: NETDEV_FCOE_WWNN (node) or NETDEV_FCOE_WWPN (port) 604adfc5217SJeff Kirsher * 605adfc5217SJeff Kirsher */ 606adfc5217SJeff Kirsher int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type); 607adfc5217SJeff Kirsher #endif 608621b4d66SDmitry Kravkov 609c8f44affSMichał Mirosław netdev_features_t bnx2x_fix_features(struct net_device *dev, 610c8f44affSMichał Mirosław netdev_features_t features); 611c8f44affSMichał Mirosław int bnx2x_set_features(struct net_device *dev, netdev_features_t features); 612adfc5217SJeff Kirsher 613adfc5217SJeff Kirsher /** 614adfc5217SJeff Kirsher * bnx2x_tx_timeout - tx timeout netdev callback 615adfc5217SJeff Kirsher * 616adfc5217SJeff Kirsher * @dev: net device 617adfc5217SJeff Kirsher */ 6180290bd29SMichael S. Tsirkin void bnx2x_tx_timeout(struct net_device *dev, unsigned int txqueue); 619adfc5217SJeff Kirsher 620230d00ebSYuval Mintz /** bnx2x_get_c2s_mapping - read inner-to-outer vlan configuration 621230d00ebSYuval Mintz * c2s_map should have BNX2X_MAX_PRIORITY entries. 622230d00ebSYuval Mintz * @bp: driver handle 623230d00ebSYuval Mintz * @c2s_map: should have BNX2X_MAX_PRIORITY entries for mapping 624230d00ebSYuval Mintz * @c2s_default: entry for non-tagged configuration 625230d00ebSYuval Mintz */ 626230d00ebSYuval Mintz void bnx2x_get_c2s_mapping(struct bnx2x *bp, u8 *c2s_map, u8 *c2s_default); 627230d00ebSYuval Mintz 628adfc5217SJeff Kirsher /*********************** Inlines **********************************/ 629adfc5217SJeff Kirsher /*********************** Fast path ********************************/ 630adfc5217SJeff Kirsher static inline void bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp) 631adfc5217SJeff Kirsher { 632adfc5217SJeff Kirsher barrier(); /* status block is written to by the chip */ 633adfc5217SJeff Kirsher fp->fp_hc_idx = fp->sb_running_index[SM_RX_ID]; 634adfc5217SJeff Kirsher } 635adfc5217SJeff Kirsher 636adfc5217SJeff Kirsher static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id, 637adfc5217SJeff Kirsher u8 segment, u16 index, u8 op, 638adfc5217SJeff Kirsher u8 update, u32 igu_addr) 639adfc5217SJeff Kirsher { 640adfc5217SJeff Kirsher struct igu_regular cmd_data = {0}; 641adfc5217SJeff Kirsher 642adfc5217SJeff Kirsher cmd_data.sb_id_and_flags = 643adfc5217SJeff Kirsher ((index << IGU_REGULAR_SB_INDEX_SHIFT) | 644adfc5217SJeff Kirsher (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | 645adfc5217SJeff Kirsher (update << IGU_REGULAR_BUPDATE_SHIFT) | 646adfc5217SJeff Kirsher (op << IGU_REGULAR_ENABLE_INT_SHIFT)); 647adfc5217SJeff Kirsher 64851c1a580SMerav Sicron DP(NETIF_MSG_INTR, "write 0x%08x to IGU addr 0x%x\n", 649adfc5217SJeff Kirsher cmd_data.sb_id_and_flags, igu_addr); 650adfc5217SJeff Kirsher REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags); 651adfc5217SJeff Kirsher 652adfc5217SJeff Kirsher /* Make sure that ACK is written */ 653adfc5217SJeff Kirsher barrier(); 654adfc5217SJeff Kirsher } 655adfc5217SJeff Kirsher 656adfc5217SJeff Kirsher static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id, 657adfc5217SJeff Kirsher u8 storm, u16 index, u8 op, u8 update) 658adfc5217SJeff Kirsher { 659adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 660adfc5217SJeff Kirsher COMMAND_REG_INT_ACK); 661adfc5217SJeff Kirsher struct igu_ack_register igu_ack; 662adfc5217SJeff Kirsher 663adfc5217SJeff Kirsher igu_ack.status_block_index = index; 664adfc5217SJeff Kirsher igu_ack.sb_id_and_flags = 665adfc5217SJeff Kirsher ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | 666adfc5217SJeff Kirsher (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | 667adfc5217SJeff Kirsher (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | 668adfc5217SJeff Kirsher (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); 669adfc5217SJeff Kirsher 670adfc5217SJeff Kirsher REG_WR(bp, hc_addr, (*(u32 *)&igu_ack)); 671adfc5217SJeff Kirsher 672adfc5217SJeff Kirsher /* Make sure that ACK is written */ 673adfc5217SJeff Kirsher barrier(); 674adfc5217SJeff Kirsher } 675adfc5217SJeff Kirsher 676adfc5217SJeff Kirsher static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm, 677adfc5217SJeff Kirsher u16 index, u8 op, u8 update) 678adfc5217SJeff Kirsher { 679adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 680adfc5217SJeff Kirsher bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update); 681adfc5217SJeff Kirsher else { 682adfc5217SJeff Kirsher u8 segment; 683adfc5217SJeff Kirsher 684adfc5217SJeff Kirsher if (CHIP_INT_MODE_IS_BC(bp)) 685adfc5217SJeff Kirsher segment = storm; 686adfc5217SJeff Kirsher else if (igu_sb_id != bp->igu_dsb_id) 687adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 688adfc5217SJeff Kirsher else if (storm == ATTENTION_ID) 689adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_ATTN; 690adfc5217SJeff Kirsher else 691adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 692adfc5217SJeff Kirsher bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update); 693adfc5217SJeff Kirsher } 694adfc5217SJeff Kirsher } 695adfc5217SJeff Kirsher 696adfc5217SJeff Kirsher static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp) 697adfc5217SJeff Kirsher { 698adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 699adfc5217SJeff Kirsher COMMAND_REG_SIMD_MASK); 700adfc5217SJeff Kirsher u32 result = REG_RD(bp, hc_addr); 701adfc5217SJeff Kirsher 702adfc5217SJeff Kirsher barrier(); 703adfc5217SJeff Kirsher return result; 704adfc5217SJeff Kirsher } 705adfc5217SJeff Kirsher 706adfc5217SJeff Kirsher static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp) 707adfc5217SJeff Kirsher { 708adfc5217SJeff Kirsher u32 igu_addr = (BAR_IGU_INTMEM + IGU_REG_SISR_MDPC_WMASK_LSB_UPPER*8); 709adfc5217SJeff Kirsher u32 result = REG_RD(bp, igu_addr); 710adfc5217SJeff Kirsher 71151c1a580SMerav Sicron DP(NETIF_MSG_INTR, "read 0x%08x from IGU addr 0x%x\n", 712adfc5217SJeff Kirsher result, igu_addr); 713adfc5217SJeff Kirsher 714adfc5217SJeff Kirsher barrier(); 715adfc5217SJeff Kirsher return result; 716adfc5217SJeff Kirsher } 717adfc5217SJeff Kirsher 718adfc5217SJeff Kirsher static inline u16 bnx2x_ack_int(struct bnx2x *bp) 719adfc5217SJeff Kirsher { 720adfc5217SJeff Kirsher barrier(); 721adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 722adfc5217SJeff Kirsher return bnx2x_hc_ack_int(bp); 723adfc5217SJeff Kirsher else 724adfc5217SJeff Kirsher return bnx2x_igu_ack_int(bp); 725adfc5217SJeff Kirsher } 726adfc5217SJeff Kirsher 727adfc5217SJeff Kirsher static inline int bnx2x_has_tx_work_unload(struct bnx2x_fp_txdata *txdata) 728adfc5217SJeff Kirsher { 729adfc5217SJeff Kirsher /* Tell compiler that consumer and producer can change */ 730adfc5217SJeff Kirsher barrier(); 731adfc5217SJeff Kirsher return txdata->tx_pkt_prod != txdata->tx_pkt_cons; 732adfc5217SJeff Kirsher } 733adfc5217SJeff Kirsher 734adfc5217SJeff Kirsher static inline u16 bnx2x_tx_avail(struct bnx2x *bp, 735adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 736adfc5217SJeff Kirsher { 737adfc5217SJeff Kirsher s16 used; 738adfc5217SJeff Kirsher u16 prod; 739adfc5217SJeff Kirsher u16 cons; 740adfc5217SJeff Kirsher 741adfc5217SJeff Kirsher prod = txdata->tx_bd_prod; 742adfc5217SJeff Kirsher cons = txdata->tx_bd_cons; 743adfc5217SJeff Kirsher 7447b5342d9SYuval Mintz used = SUB_S16(prod, cons); 745adfc5217SJeff Kirsher 746adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 747adfc5217SJeff Kirsher WARN_ON(used < 0); 7487b5342d9SYuval Mintz WARN_ON(used > txdata->tx_ring_size); 7497b5342d9SYuval Mintz WARN_ON((txdata->tx_ring_size - used) > MAX_TX_AVAIL); 750adfc5217SJeff Kirsher #endif 751adfc5217SJeff Kirsher 7527b5342d9SYuval Mintz return (s16)(txdata->tx_ring_size) - used; 753adfc5217SJeff Kirsher } 754adfc5217SJeff Kirsher 755adfc5217SJeff Kirsher static inline int bnx2x_tx_queue_has_work(struct bnx2x_fp_txdata *txdata) 756adfc5217SJeff Kirsher { 757adfc5217SJeff Kirsher u16 hw_cons; 758adfc5217SJeff Kirsher 759adfc5217SJeff Kirsher /* Tell compiler that status block fields can change */ 760adfc5217SJeff Kirsher barrier(); 761adfc5217SJeff Kirsher hw_cons = le16_to_cpu(*txdata->tx_cons_sb); 762adfc5217SJeff Kirsher return hw_cons != txdata->tx_pkt_cons; 763adfc5217SJeff Kirsher } 764adfc5217SJeff Kirsher 765adfc5217SJeff Kirsher static inline bool bnx2x_has_tx_work(struct bnx2x_fastpath *fp) 766adfc5217SJeff Kirsher { 767adfc5217SJeff Kirsher u8 cos; 768adfc5217SJeff Kirsher for_each_cos_in_tx_queue(fp, cos) 76965565884SMerav Sicron if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos])) 770adfc5217SJeff Kirsher return true; 771adfc5217SJeff Kirsher return false; 772adfc5217SJeff Kirsher } 773adfc5217SJeff Kirsher 77475b29459SDmitry Kravkov #define BNX2X_IS_CQE_COMPLETED(cqe_fp) (cqe_fp->marker == 0x0) 77575b29459SDmitry Kravkov #define BNX2X_SEED_CQE(cqe_fp) (cqe_fp->marker = 0xFFFFFFFF) 776adfc5217SJeff Kirsher static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) 777adfc5217SJeff Kirsher { 77875b29459SDmitry Kravkov u16 cons; 77975b29459SDmitry Kravkov union eth_rx_cqe *cqe; 78075b29459SDmitry Kravkov struct eth_fast_path_rx_cqe *cqe_fp; 781adfc5217SJeff Kirsher 78275b29459SDmitry Kravkov cons = RCQ_BD(fp->rx_comp_cons); 78375b29459SDmitry Kravkov cqe = &fp->rx_comp_ring[cons]; 78475b29459SDmitry Kravkov cqe_fp = &cqe->fast_path_cqe; 78575b29459SDmitry Kravkov return BNX2X_IS_CQE_COMPLETED(cqe_fp); 786adfc5217SJeff Kirsher } 787adfc5217SJeff Kirsher 788adfc5217SJeff Kirsher /** 789adfc5217SJeff Kirsher * bnx2x_tx_disable - disables tx from stack point of view 790adfc5217SJeff Kirsher * 791adfc5217SJeff Kirsher * @bp: driver handle 792adfc5217SJeff Kirsher */ 793adfc5217SJeff Kirsher static inline void bnx2x_tx_disable(struct bnx2x *bp) 794adfc5217SJeff Kirsher { 795adfc5217SJeff Kirsher netif_tx_disable(bp->dev); 796adfc5217SJeff Kirsher netif_carrier_off(bp->dev); 797adfc5217SJeff Kirsher } 798adfc5217SJeff Kirsher 799adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge(struct bnx2x *bp, 800adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, u16 index) 801adfc5217SJeff Kirsher { 802adfc5217SJeff Kirsher struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; 803adfc5217SJeff Kirsher struct page *page = sw_buf->page; 804adfc5217SJeff Kirsher struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; 805adfc5217SJeff Kirsher 806adfc5217SJeff Kirsher /* Skip "next page" elements */ 807adfc5217SJeff Kirsher if (!page) 808adfc5217SJeff Kirsher return; 809adfc5217SJeff Kirsher 8104cace675SGabriel Krisman Bertazi /* Since many fragments can share the same page, make sure to 8114cace675SGabriel Krisman Bertazi * only unmap and free the page once. 8124cace675SGabriel Krisman Bertazi */ 8138031612dSMichal Schmidt dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping), 8144cace675SGabriel Krisman Bertazi SGE_PAGE_SIZE, DMA_FROM_DEVICE); 8154cace675SGabriel Krisman Bertazi 8164cace675SGabriel Krisman Bertazi put_page(page); 817adfc5217SJeff Kirsher 818adfc5217SJeff Kirsher sw_buf->page = NULL; 819adfc5217SJeff Kirsher sge->addr_hi = 0; 820adfc5217SJeff Kirsher sge->addr_lo = 0; 821adfc5217SJeff Kirsher } 822adfc5217SJeff Kirsher 82355c11941SMerav Sicron static inline void bnx2x_del_all_napi_cnic(struct bnx2x *bp) 82455c11941SMerav Sicron { 82555c11941SMerav Sicron int i; 82655c11941SMerav Sicron 8278f20aa57SDmitry Kravkov for_each_rx_queue_cnic(bp, i) { 8285198d545SJakub Kicinski __netif_napi_del(&bnx2x_fp(bp, i, napi)); 82955c11941SMerav Sicron } 8305198d545SJakub Kicinski synchronize_net(); 8318f20aa57SDmitry Kravkov } 83255c11941SMerav Sicron 833adfc5217SJeff Kirsher static inline void bnx2x_del_all_napi(struct bnx2x *bp) 834adfc5217SJeff Kirsher { 835adfc5217SJeff Kirsher int i; 836adfc5217SJeff Kirsher 8378f20aa57SDmitry Kravkov for_each_eth_queue(bp, i) { 8385198d545SJakub Kicinski __netif_napi_del(&bnx2x_fp(bp, i, napi)); 839adfc5217SJeff Kirsher } 8405198d545SJakub Kicinski synchronize_net(); 8418f20aa57SDmitry Kravkov } 842adfc5217SJeff Kirsher 8431ab4434cSAriel Elior int bnx2x_set_int_mode(struct bnx2x *bp); 8440e8d2ec5SMerav Sicron 845adfc5217SJeff Kirsher static inline void bnx2x_disable_msi(struct bnx2x *bp) 846adfc5217SJeff Kirsher { 847adfc5217SJeff Kirsher if (bp->flags & USING_MSIX_FLAG) { 848adfc5217SJeff Kirsher pci_disable_msix(bp->pdev); 84930a5de77SDmitry Kravkov bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG); 850adfc5217SJeff Kirsher } else if (bp->flags & USING_MSI_FLAG) { 851adfc5217SJeff Kirsher pci_disable_msi(bp->pdev); 852adfc5217SJeff Kirsher bp->flags &= ~USING_MSI_FLAG; 853adfc5217SJeff Kirsher } 854adfc5217SJeff Kirsher } 855adfc5217SJeff Kirsher 856adfc5217SJeff Kirsher static inline void bnx2x_clear_sge_mask_next_elems(struct bnx2x_fastpath *fp) 857adfc5217SJeff Kirsher { 858adfc5217SJeff Kirsher int i, j; 859adfc5217SJeff Kirsher 860adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { 861adfc5217SJeff Kirsher int idx = RX_SGE_CNT * i - 1; 862adfc5217SJeff Kirsher 863adfc5217SJeff Kirsher for (j = 0; j < 2; j++) { 864adfc5217SJeff Kirsher BIT_VEC64_CLEAR_BIT(fp->sge_mask, idx); 865adfc5217SJeff Kirsher idx--; 866adfc5217SJeff Kirsher } 867adfc5217SJeff Kirsher } 868adfc5217SJeff Kirsher } 869adfc5217SJeff Kirsher 870adfc5217SJeff Kirsher static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) 871adfc5217SJeff Kirsher { 872adfc5217SJeff Kirsher /* Set the mask to all 1-s: it's faster to compare to 0 than to 0xf-s */ 873b3637827SDmitry Kravkov memset(fp->sge_mask, 0xff, sizeof(fp->sge_mask)); 874adfc5217SJeff Kirsher 875adfc5217SJeff Kirsher /* Clear the two last indices in the page to 1: 876adfc5217SJeff Kirsher these are the indices that correspond to the "next" element, 877adfc5217SJeff Kirsher hence will never be indicated and should be removed from 878adfc5217SJeff Kirsher the calculations. */ 879adfc5217SJeff Kirsher bnx2x_clear_sge_mask_next_elems(fp); 880adfc5217SJeff Kirsher } 881adfc5217SJeff Kirsher 882e52fcb24SEric Dumazet /* note that we are not allocating a new buffer, 883adfc5217SJeff Kirsher * we are just moving one from cons to prod 884adfc5217SJeff Kirsher * we are not creating a new mapping, 885adfc5217SJeff Kirsher * so there is no need to check for dma_mapping_error(). 886adfc5217SJeff Kirsher */ 887e52fcb24SEric Dumazet static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp, 888adfc5217SJeff Kirsher u16 cons, u16 prod) 889adfc5217SJeff Kirsher { 890adfc5217SJeff Kirsher struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; 891adfc5217SJeff Kirsher struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; 892adfc5217SJeff Kirsher struct eth_rx_bd *cons_bd = &fp->rx_desc_ring[cons]; 893adfc5217SJeff Kirsher struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; 894adfc5217SJeff Kirsher 895adfc5217SJeff Kirsher dma_unmap_addr_set(prod_rx_buf, mapping, 896adfc5217SJeff Kirsher dma_unmap_addr(cons_rx_buf, mapping)); 897e52fcb24SEric Dumazet prod_rx_buf->data = cons_rx_buf->data; 898adfc5217SJeff Kirsher *prod_bd = *cons_bd; 899adfc5217SJeff Kirsher } 900adfc5217SJeff Kirsher 901adfc5217SJeff Kirsher /************************* Init ******************************************/ 902adfc5217SJeff Kirsher 903b475d78fSYuval Mintz /* returns func by VN for current port */ 904b475d78fSYuval Mintz static inline int func_by_vn(struct bnx2x *bp, int vn) 905b475d78fSYuval Mintz { 906b475d78fSYuval Mintz return 2 * vn + BP_PORT(bp); 907b475d78fSYuval Mintz } 908b475d78fSYuval Mintz 9095d317c6aSMerav Sicron static inline int bnx2x_config_rss_eth(struct bnx2x *bp, bool config_hash) 91096305234SDmitry Kravkov { 91160cad4e6SAriel Elior return bnx2x_rss(bp, &bp->rss_conf_obj, config_hash, true); 91296305234SDmitry Kravkov } 91396305234SDmitry Kravkov 914adfc5217SJeff Kirsher /** 915adfc5217SJeff Kirsher * bnx2x_func_start - init function 916adfc5217SJeff Kirsher * 917adfc5217SJeff Kirsher * @bp: driver handle 918adfc5217SJeff Kirsher * 919adfc5217SJeff Kirsher * Must be called before sending CLIENT_SETUP for the first client. 920adfc5217SJeff Kirsher */ 921adfc5217SJeff Kirsher static inline int bnx2x_func_start(struct bnx2x *bp) 922adfc5217SJeff Kirsher { 9233b603066SYuval Mintz struct bnx2x_func_state_params func_params = {NULL}; 924adfc5217SJeff Kirsher struct bnx2x_func_start_params *start_params = 925adfc5217SJeff Kirsher &func_params.params.start; 926883ce97dSYuval Mintz u16 port; 927adfc5217SJeff Kirsher 928adfc5217SJeff Kirsher /* Prepare parameters for function state transitions */ 929adfc5217SJeff Kirsher __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 930adfc5217SJeff Kirsher 931adfc5217SJeff Kirsher func_params.f_obj = &bp->func_obj; 932adfc5217SJeff Kirsher func_params.cmd = BNX2X_F_CMD_START; 933adfc5217SJeff Kirsher 934adfc5217SJeff Kirsher /* Function parameters */ 935adfc5217SJeff Kirsher start_params->mf_mode = bp->mf_mode; 936adfc5217SJeff Kirsher start_params->sd_vlan_tag = bp->mf_ov; 9378d7b0278SAriel Elior 938230d00ebSYuval Mintz /* Configure Ethertype for BD mode */ 939230d00ebSYuval Mintz if (IS_MF_BD(bp)) { 940230d00ebSYuval Mintz DP(NETIF_MSG_IFUP, "Configuring ethertype 0x88a8 for BD\n"); 941230d00ebSYuval Mintz start_params->sd_vlan_eth_type = ETH_P_8021AD; 942230d00ebSYuval Mintz REG_WR(bp, PRS_REG_VLAN_TYPE_0, ETH_P_8021AD); 943230d00ebSYuval Mintz REG_WR(bp, PBF_REG_VLAN_TYPE_0, ETH_P_8021AD); 944230d00ebSYuval Mintz REG_WR(bp, NIG_REG_LLH_E1HOV_TYPE_1, ETH_P_8021AD); 945230d00ebSYuval Mintz 946230d00ebSYuval Mintz bnx2x_get_c2s_mapping(bp, start_params->c2s_pri, 947230d00ebSYuval Mintz &start_params->c2s_pri_default); 948230d00ebSYuval Mintz start_params->c2s_pri_valid = 1; 949230d00ebSYuval Mintz 950230d00ebSYuval Mintz DP(NETIF_MSG_IFUP, 951230d00ebSYuval Mintz "Inner-to-Outer priority: %02x %02x %02x %02x %02x %02x %02x %02x [Default %02x]\n", 952230d00ebSYuval Mintz start_params->c2s_pri[0], start_params->c2s_pri[1], 953230d00ebSYuval Mintz start_params->c2s_pri[2], start_params->c2s_pri[3], 954230d00ebSYuval Mintz start_params->c2s_pri[4], start_params->c2s_pri[5], 955230d00ebSYuval Mintz start_params->c2s_pri[6], start_params->c2s_pri[7], 956230d00ebSYuval Mintz start_params->c2s_pri_default); 957230d00ebSYuval Mintz } 958230d00ebSYuval Mintz 9598d7b0278SAriel Elior if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp)) 960adfc5217SJeff Kirsher start_params->network_cos_mode = STATIC_COS; 9618d7b0278SAriel Elior else /* CHIP_IS_E1X */ 9628d7b0278SAriel Elior start_params->network_cos_mode = FW_WRR; 963085c5c42SJakub Kicinski if (bp->udp_tunnel_ports[BNX2X_UDP_PORT_VXLAN]) { 964085c5c42SJakub Kicinski port = bp->udp_tunnel_ports[BNX2X_UDP_PORT_VXLAN]; 965883ce97dSYuval Mintz start_params->vxlan_dst_port = port; 966883ce97dSYuval Mintz } 967085c5c42SJakub Kicinski if (bp->udp_tunnel_ports[BNX2X_UDP_PORT_GENEVE]) { 968085c5c42SJakub Kicinski port = bp->udp_tunnel_ports[BNX2X_UDP_PORT_GENEVE]; 969883ce97dSYuval Mintz start_params->geneve_dst_port = port; 970883ce97dSYuval Mintz } 971f34fa14cSRajesh Borundia 97228311f8eSYuval Mintz start_params->inner_rss = 1; 9731bc277f7SDmitry Kravkov 9747609647eSYuval Mintz if (IS_MF_UFP(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) { 9757609647eSYuval Mintz start_params->class_fail_ethtype = ETH_P_FIP; 9767609647eSYuval Mintz start_params->class_fail = 1; 9777609647eSYuval Mintz start_params->no_added_tags = 1; 9787609647eSYuval Mintz } 9797609647eSYuval Mintz 980adfc5217SJeff Kirsher return bnx2x_func_state_change(bp, &func_params); 981adfc5217SJeff Kirsher } 982adfc5217SJeff Kirsher 983adfc5217SJeff Kirsher /** 984adfc5217SJeff Kirsher * bnx2x_set_fw_mac_addr - fill in a MAC address in FW format 985adfc5217SJeff Kirsher * 986adfc5217SJeff Kirsher * @fw_hi: pointer to upper part 987adfc5217SJeff Kirsher * @fw_mid: pointer to middle part 988adfc5217SJeff Kirsher * @fw_lo: pointer to lower part 989adfc5217SJeff Kirsher * @mac: pointer to MAC address 990adfc5217SJeff Kirsher */ 99186564c3fSYuval Mintz static inline void bnx2x_set_fw_mac_addr(__le16 *fw_hi, __le16 *fw_mid, 99286564c3fSYuval Mintz __le16 *fw_lo, u8 *mac) 993adfc5217SJeff Kirsher { 994adfc5217SJeff Kirsher ((u8 *)fw_hi)[0] = mac[1]; 995adfc5217SJeff Kirsher ((u8 *)fw_hi)[1] = mac[0]; 996adfc5217SJeff Kirsher ((u8 *)fw_mid)[0] = mac[3]; 997adfc5217SJeff Kirsher ((u8 *)fw_mid)[1] = mac[2]; 998adfc5217SJeff Kirsher ((u8 *)fw_lo)[0] = mac[5]; 999adfc5217SJeff Kirsher ((u8 *)fw_lo)[1] = mac[4]; 1000adfc5217SJeff Kirsher } 1001adfc5217SJeff Kirsher 10024cace675SGabriel Krisman Bertazi static inline void bnx2x_free_rx_mem_pool(struct bnx2x *bp, 10034cace675SGabriel Krisman Bertazi struct bnx2x_alloc_pool *pool) 10044cace675SGabriel Krisman Bertazi { 10054cace675SGabriel Krisman Bertazi if (!pool->page) 10064cace675SGabriel Krisman Bertazi return; 10074cace675SGabriel Krisman Bertazi 10084cace675SGabriel Krisman Bertazi put_page(pool->page); 10094cace675SGabriel Krisman Bertazi 10104cace675SGabriel Krisman Bertazi pool->page = NULL; 10114cace675SGabriel Krisman Bertazi } 10124cace675SGabriel Krisman Bertazi 1013adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp, 1014adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, int last) 1015adfc5217SJeff Kirsher { 1016adfc5217SJeff Kirsher int i; 1017adfc5217SJeff Kirsher 10187e6b4d44SMichal Schmidt if (fp->mode == TPA_MODE_DISABLED) 1019adfc5217SJeff Kirsher return; 1020adfc5217SJeff Kirsher 1021adfc5217SJeff Kirsher for (i = 0; i < last; i++) 1022adfc5217SJeff Kirsher bnx2x_free_rx_sge(bp, fp, i); 10234cace675SGabriel Krisman Bertazi 10244cace675SGabriel Krisman Bertazi bnx2x_free_rx_mem_pool(bp, &fp->page_pool); 1025adfc5217SJeff Kirsher } 1026adfc5217SJeff Kirsher 1027adfc5217SJeff Kirsher static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp) 1028adfc5217SJeff Kirsher { 1029adfc5217SJeff Kirsher int i; 1030adfc5217SJeff Kirsher 1031adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_RINGS; i++) { 1032adfc5217SJeff Kirsher struct eth_rx_bd *rx_bd; 1033adfc5217SJeff Kirsher 1034adfc5217SJeff Kirsher rx_bd = &fp->rx_desc_ring[RX_DESC_CNT * i - 2]; 1035adfc5217SJeff Kirsher rx_bd->addr_hi = 1036adfc5217SJeff Kirsher cpu_to_le32(U64_HI(fp->rx_desc_mapping + 1037adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 1038adfc5217SJeff Kirsher rx_bd->addr_lo = 1039adfc5217SJeff Kirsher cpu_to_le32(U64_LO(fp->rx_desc_mapping + 1040adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 1041adfc5217SJeff Kirsher } 1042adfc5217SJeff Kirsher } 1043adfc5217SJeff Kirsher 1044adfc5217SJeff Kirsher /* Statistics ID are global per chip/path, while Client IDs for E1x are per 1045adfc5217SJeff Kirsher * port. 1046adfc5217SJeff Kirsher */ 1047adfc5217SJeff Kirsher static inline u8 bnx2x_stats_id(struct bnx2x_fastpath *fp) 1048adfc5217SJeff Kirsher { 1049de5c3741SYuval Mintz struct bnx2x *bp = fp->bp; 1050de5c3741SYuval Mintz if (!CHIP_IS_E1x(bp)) { 1051de5c3741SYuval Mintz /* there are special statistics counters for FCoE 136..140 */ 1052de5c3741SYuval Mintz if (IS_FCOE_FP(fp)) 1053de5c3741SYuval Mintz return bp->cnic_base_cl_id + (bp->pf_num >> 1); 1054adfc5217SJeff Kirsher return fp->cl_id; 1055de5c3741SYuval Mintz } 1056de5c3741SYuval Mintz return fp->cl_id + BP_PORT(bp) * FP_SB_MAX_E1x; 1057adfc5217SJeff Kirsher } 1058adfc5217SJeff Kirsher 1059adfc5217SJeff Kirsher static inline void bnx2x_init_vlan_mac_fp_objs(struct bnx2x_fastpath *fp, 1060adfc5217SJeff Kirsher bnx2x_obj_type obj_type) 1061adfc5217SJeff Kirsher { 1062adfc5217SJeff Kirsher struct bnx2x *bp = fp->bp; 1063adfc5217SJeff Kirsher 1064adfc5217SJeff Kirsher /* Configure classification DBs */ 106515192a8cSBarak Witkowski bnx2x_init_mac_obj(bp, &bnx2x_sp_obj(bp, fp).mac_obj, fp->cl_id, 106615192a8cSBarak Witkowski fp->cid, BP_FUNC(bp), bnx2x_sp(bp, mac_rdata), 1067adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mac_rdata), 1068adfc5217SJeff Kirsher BNX2X_FILTER_MAC_PENDING, 1069adfc5217SJeff Kirsher &bp->sp_state, obj_type, 1070adfc5217SJeff Kirsher &bp->macs_pool); 107105cc5a39SYuval Mintz 107205cc5a39SYuval Mintz if (!CHIP_IS_E1x(bp)) 107305cc5a39SYuval Mintz bnx2x_init_vlan_obj(bp, &bnx2x_sp_obj(bp, fp).vlan_obj, 107405cc5a39SYuval Mintz fp->cl_id, fp->cid, BP_FUNC(bp), 107505cc5a39SYuval Mintz bnx2x_sp(bp, vlan_rdata), 107605cc5a39SYuval Mintz bnx2x_sp_mapping(bp, vlan_rdata), 107705cc5a39SYuval Mintz BNX2X_FILTER_VLAN_PENDING, 107805cc5a39SYuval Mintz &bp->sp_state, obj_type, 107905cc5a39SYuval Mintz &bp->vlans_pool); 1080adfc5217SJeff Kirsher } 1081adfc5217SJeff Kirsher 1082adfc5217SJeff Kirsher /** 1083adfc5217SJeff Kirsher * bnx2x_get_path_func_num - get number of active functions 1084adfc5217SJeff Kirsher * 1085adfc5217SJeff Kirsher * @bp: driver handle 1086adfc5217SJeff Kirsher * 1087adfc5217SJeff Kirsher * Calculates the number of active (not hidden) functions on the 1088adfc5217SJeff Kirsher * current path. 1089adfc5217SJeff Kirsher */ 1090adfc5217SJeff Kirsher static inline u8 bnx2x_get_path_func_num(struct bnx2x *bp) 1091adfc5217SJeff Kirsher { 1092adfc5217SJeff Kirsher u8 func_num = 0, i; 1093adfc5217SJeff Kirsher 1094adfc5217SJeff Kirsher /* 57710 has only one function per-port */ 1095adfc5217SJeff Kirsher if (CHIP_IS_E1(bp)) 1096adfc5217SJeff Kirsher return 1; 1097adfc5217SJeff Kirsher 1098adfc5217SJeff Kirsher /* Calculate a number of functions enabled on the current 1099adfc5217SJeff Kirsher * PATH/PORT. 1100adfc5217SJeff Kirsher */ 1101adfc5217SJeff Kirsher if (CHIP_REV_IS_SLOW(bp)) { 1102adfc5217SJeff Kirsher if (IS_MF(bp)) 1103adfc5217SJeff Kirsher func_num = 4; 1104adfc5217SJeff Kirsher else 1105adfc5217SJeff Kirsher func_num = 2; 1106adfc5217SJeff Kirsher } else { 1107adfc5217SJeff Kirsher for (i = 0; i < E1H_FUNC_MAX / 2; i++) { 1108adfc5217SJeff Kirsher u32 func_config = 1109adfc5217SJeff Kirsher MF_CFG_RD(bp, 1110ee699f89SManish Chopra func_mf_config[BP_PATH(bp) + 2 * i]. 1111adfc5217SJeff Kirsher config); 1112adfc5217SJeff Kirsher func_num += 1113adfc5217SJeff Kirsher ((func_config & FUNC_MF_CFG_FUNC_HIDE) ? 0 : 1); 1114adfc5217SJeff Kirsher } 1115adfc5217SJeff Kirsher } 1116adfc5217SJeff Kirsher 1117adfc5217SJeff Kirsher WARN_ON(!func_num); 1118adfc5217SJeff Kirsher 1119adfc5217SJeff Kirsher return func_num; 1120adfc5217SJeff Kirsher } 1121adfc5217SJeff Kirsher 1122adfc5217SJeff Kirsher static inline void bnx2x_init_bp_objs(struct bnx2x *bp) 1123adfc5217SJeff Kirsher { 1124adfc5217SJeff Kirsher /* RX_MODE controlling object */ 1125adfc5217SJeff Kirsher bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj); 1126adfc5217SJeff Kirsher 1127adfc5217SJeff Kirsher /* multicast configuration controlling object */ 1128adfc5217SJeff Kirsher bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid, 1129adfc5217SJeff Kirsher BP_FUNC(bp), BP_FUNC(bp), 1130adfc5217SJeff Kirsher bnx2x_sp(bp, mcast_rdata), 1131adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mcast_rdata), 1132adfc5217SJeff Kirsher BNX2X_FILTER_MCAST_PENDING, &bp->sp_state, 1133adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 1134adfc5217SJeff Kirsher 1135adfc5217SJeff Kirsher /* Setup CAM credit pools */ 1136adfc5217SJeff Kirsher bnx2x_init_mac_credit_pool(bp, &bp->macs_pool, BP_FUNC(bp), 1137adfc5217SJeff Kirsher bnx2x_get_path_func_num(bp)); 1138adfc5217SJeff Kirsher 113905cc5a39SYuval Mintz bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool, BP_FUNC(bp), 1140b56e9670SAriel Elior bnx2x_get_path_func_num(bp)); 1141b56e9670SAriel Elior 1142adfc5217SJeff Kirsher /* RSS configuration object */ 1143adfc5217SJeff Kirsher bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id, 1144adfc5217SJeff Kirsher bp->fp->cid, BP_FUNC(bp), BP_FUNC(bp), 1145adfc5217SJeff Kirsher bnx2x_sp(bp, rss_rdata), 1146adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, rss_rdata), 1147adfc5217SJeff Kirsher BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state, 1148adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 114905cc5a39SYuval Mintz 115005cc5a39SYuval Mintz bp->vlan_credit = PF_VLAN_CREDIT_E2(bp, bnx2x_get_path_func_num(bp)); 1151adfc5217SJeff Kirsher } 1152adfc5217SJeff Kirsher 1153adfc5217SJeff Kirsher static inline u8 bnx2x_fp_qzone_id(struct bnx2x_fastpath *fp) 1154adfc5217SJeff Kirsher { 1155adfc5217SJeff Kirsher if (CHIP_IS_E1x(fp->bp)) 1156adfc5217SJeff Kirsher return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H; 1157adfc5217SJeff Kirsher else 1158adfc5217SJeff Kirsher return fp->cl_id; 1159adfc5217SJeff Kirsher } 1160adfc5217SJeff Kirsher 1161adfc5217SJeff Kirsher static inline void bnx2x_init_txdata(struct bnx2x *bp, 116265565884SMerav Sicron struct bnx2x_fp_txdata *txdata, u32 cid, 116365565884SMerav Sicron int txq_index, __le16 *tx_cons_sb, 116465565884SMerav Sicron struct bnx2x_fastpath *fp) 1165adfc5217SJeff Kirsher { 1166adfc5217SJeff Kirsher txdata->cid = cid; 1167adfc5217SJeff Kirsher txdata->txq_index = txq_index; 1168adfc5217SJeff Kirsher txdata->tx_cons_sb = tx_cons_sb; 116965565884SMerav Sicron txdata->parent_fp = fp; 11707b5342d9SYuval Mintz txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size; 1171adfc5217SJeff Kirsher 117251c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "created tx data cid %d, txq %d\n", 1173adfc5217SJeff Kirsher txdata->cid, txdata->txq_index); 1174adfc5217SJeff Kirsher } 1175adfc5217SJeff Kirsher 1176adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx) 1177adfc5217SJeff Kirsher { 1178adfc5217SJeff Kirsher return bp->cnic_base_cl_id + cl_idx + 11791805b2f0SDavid S. Miller (bp->pf_num >> 1) * BNX2X_MAX_CNIC_ETH_CL_ID_IDX; 1180adfc5217SJeff Kirsher } 1181adfc5217SJeff Kirsher 1182adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp) 1183adfc5217SJeff Kirsher { 1184adfc5217SJeff Kirsher /* the 'first' id is allocated for the cnic */ 1185adfc5217SJeff Kirsher return bp->base_fw_ndsb; 1186adfc5217SJeff Kirsher } 1187adfc5217SJeff Kirsher 1188adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp) 1189adfc5217SJeff Kirsher { 1190adfc5217SJeff Kirsher return bp->igu_base_sb; 1191adfc5217SJeff Kirsher } 1192adfc5217SJeff Kirsher 1193adfc5217SJeff Kirsher static inline int bnx2x_clean_tx_queue(struct bnx2x *bp, 1194adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 1195adfc5217SJeff Kirsher { 1196adfc5217SJeff Kirsher int cnt = 1000; 1197adfc5217SJeff Kirsher 1198adfc5217SJeff Kirsher while (bnx2x_has_tx_work_unload(txdata)) { 1199adfc5217SJeff Kirsher if (!cnt) { 120051c1a580SMerav Sicron BNX2X_ERR("timeout waiting for queue[%d]: txdata->tx_pkt_prod(%d) != txdata->tx_pkt_cons(%d)\n", 1201adfc5217SJeff Kirsher txdata->txq_index, txdata->tx_pkt_prod, 1202adfc5217SJeff Kirsher txdata->tx_pkt_cons); 1203adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 1204adfc5217SJeff Kirsher bnx2x_panic(); 1205adfc5217SJeff Kirsher return -EBUSY; 1206adfc5217SJeff Kirsher #else 1207adfc5217SJeff Kirsher break; 1208adfc5217SJeff Kirsher #endif 1209adfc5217SJeff Kirsher } 1210adfc5217SJeff Kirsher cnt--; 12110926d499SYuval Mintz usleep_range(1000, 2000); 1212adfc5217SJeff Kirsher } 1213adfc5217SJeff Kirsher 1214adfc5217SJeff Kirsher return 0; 1215adfc5217SJeff Kirsher } 1216adfc5217SJeff Kirsher 1217adfc5217SJeff Kirsher int bnx2x_get_link_cfg_idx(struct bnx2x *bp); 1218adfc5217SJeff Kirsher 1219adfc5217SJeff Kirsher static inline void __storm_memset_struct(struct bnx2x *bp, 1220adfc5217SJeff Kirsher u32 addr, size_t size, u32 *data) 1221adfc5217SJeff Kirsher { 1222adfc5217SJeff Kirsher int i; 1223adfc5217SJeff Kirsher for (i = 0; i < size/4; i++) 1224adfc5217SJeff Kirsher REG_WR(bp, addr + (i * 4), data[i]); 1225adfc5217SJeff Kirsher } 1226adfc5217SJeff Kirsher 1227adfc5217SJeff Kirsher /** 1228adfc5217SJeff Kirsher * bnx2x_wait_sp_comp - wait for the outstanding SP commands. 1229adfc5217SJeff Kirsher * 1230adfc5217SJeff Kirsher * @bp: driver handle 1231adfc5217SJeff Kirsher * @mask: bits that need to be cleared 1232adfc5217SJeff Kirsher */ 1233adfc5217SJeff Kirsher static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp, unsigned long mask) 1234adfc5217SJeff Kirsher { 1235adfc5217SJeff Kirsher int tout = 5000; /* Wait for 5 secs tops */ 1236adfc5217SJeff Kirsher 1237adfc5217SJeff Kirsher while (tout--) { 1238adfc5217SJeff Kirsher smp_mb(); 1239adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1240adfc5217SJeff Kirsher if (!(bp->sp_state & mask)) { 1241adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1242adfc5217SJeff Kirsher return true; 1243adfc5217SJeff Kirsher } 1244adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1245adfc5217SJeff Kirsher 12460926d499SYuval Mintz usleep_range(1000, 2000); 1247adfc5217SJeff Kirsher } 1248adfc5217SJeff Kirsher 1249adfc5217SJeff Kirsher smp_mb(); 1250adfc5217SJeff Kirsher 1251adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1252adfc5217SJeff Kirsher if (bp->sp_state & mask) { 125351c1a580SMerav Sicron BNX2X_ERR("Filtering completion timed out. sp_state 0x%lx, mask 0x%lx\n", 125451c1a580SMerav Sicron bp->sp_state, mask); 1255adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1256adfc5217SJeff Kirsher return false; 1257adfc5217SJeff Kirsher } 1258adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1259adfc5217SJeff Kirsher 1260adfc5217SJeff Kirsher return true; 1261adfc5217SJeff Kirsher } 1262adfc5217SJeff Kirsher 1263adfc5217SJeff Kirsher /** 1264adfc5217SJeff Kirsher * bnx2x_set_ctx_validation - set CDU context validation values 1265adfc5217SJeff Kirsher * 1266adfc5217SJeff Kirsher * @bp: driver handle 1267adfc5217SJeff Kirsher * @cxt: context of the connection on the host memory 1268adfc5217SJeff Kirsher * @cid: SW CID of the connection to be configured 1269adfc5217SJeff Kirsher */ 1270adfc5217SJeff Kirsher void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt, 1271adfc5217SJeff Kirsher u32 cid); 1272adfc5217SJeff Kirsher 1273adfc5217SJeff Kirsher void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id, 1274adfc5217SJeff Kirsher u8 sb_index, u8 disable, u16 usec); 1275adfc5217SJeff Kirsher void bnx2x_acquire_phy_lock(struct bnx2x *bp); 1276adfc5217SJeff Kirsher void bnx2x_release_phy_lock(struct bnx2x *bp); 1277adfc5217SJeff Kirsher 1278adfc5217SJeff Kirsher /** 1279adfc5217SJeff Kirsher * bnx2x_extract_max_cfg - extract MAX BW part from MF configuration. 1280adfc5217SJeff Kirsher * 1281adfc5217SJeff Kirsher * @bp: driver handle 1282adfc5217SJeff Kirsher * @mf_cfg: MF configuration 1283adfc5217SJeff Kirsher * 1284adfc5217SJeff Kirsher */ 1285adfc5217SJeff Kirsher static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg) 1286adfc5217SJeff Kirsher { 1287adfc5217SJeff Kirsher u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> 1288adfc5217SJeff Kirsher FUNC_MF_CFG_MAX_BW_SHIFT; 1289adfc5217SJeff Kirsher if (!max_cfg) { 129051c1a580SMerav Sicron DP(NETIF_MSG_IFUP | BNX2X_MSG_ETHTOOL, 129196b0accbSMichal Schmidt "Max BW configured to 0 - using 100 instead\n"); 1292adfc5217SJeff Kirsher max_cfg = 100; 1293adfc5217SJeff Kirsher } 1294adfc5217SJeff Kirsher return max_cfg; 1295adfc5217SJeff Kirsher } 1296adfc5217SJeff Kirsher 1297621b4d66SDmitry Kravkov /* checks if HW supports GRO for given MTU */ 1298621b4d66SDmitry Kravkov static inline bool bnx2x_mtu_allows_gro(int mtu) 1299621b4d66SDmitry Kravkov { 1300621b4d66SDmitry Kravkov /* gro frags per page */ 1301621b4d66SDmitry Kravkov int fpp = SGE_PAGE_SIZE / (mtu - ETH_MAX_TPA_HEADER_SIZE); 1302621b4d66SDmitry Kravkov 1303621b4d66SDmitry Kravkov /* 130416a5fd92SYuval Mintz * 1. Number of frags should not grow above MAX_SKB_FRAGS 130516a5fd92SYuval Mintz * 2. Frag must fit the page 1306621b4d66SDmitry Kravkov */ 1307621b4d66SDmitry Kravkov return mtu <= SGE_PAGE_SIZE && (U_ETH_SGL_SIZE * fpp) <= MAX_SKB_FRAGS; 1308621b4d66SDmitry Kravkov } 130955c11941SMerav Sicron 13101355b704SMintz Yuval /** 1311b306f5edSDmitry Kravkov * bnx2x_get_iscsi_info - update iSCSI params according to licensing info. 1312b306f5edSDmitry Kravkov * 1313b306f5edSDmitry Kravkov * @bp: driver handle 1314b306f5edSDmitry Kravkov * 1315b306f5edSDmitry Kravkov */ 1316b306f5edSDmitry Kravkov void bnx2x_get_iscsi_info(struct bnx2x *bp); 131700253a8cSDmitry Kravkov 131800253a8cSDmitry Kravkov /** 131900253a8cSDmitry Kravkov * bnx2x_link_sync_notify - send notification to other functions. 132000253a8cSDmitry Kravkov * 132100253a8cSDmitry Kravkov * @bp: driver handle 132200253a8cSDmitry Kravkov * 132300253a8cSDmitry Kravkov */ 132400253a8cSDmitry Kravkov static inline void bnx2x_link_sync_notify(struct bnx2x *bp) 132500253a8cSDmitry Kravkov { 132600253a8cSDmitry Kravkov int func; 132700253a8cSDmitry Kravkov int vn; 132800253a8cSDmitry Kravkov 132900253a8cSDmitry Kravkov /* Set the attention towards other drivers on the same port */ 133000253a8cSDmitry Kravkov for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { 133100253a8cSDmitry Kravkov if (vn == BP_VN(bp)) 133200253a8cSDmitry Kravkov continue; 133300253a8cSDmitry Kravkov 133400253a8cSDmitry Kravkov func = func_by_vn(bp, vn); 133500253a8cSDmitry Kravkov REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + 133600253a8cSDmitry Kravkov (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); 133700253a8cSDmitry Kravkov } 133800253a8cSDmitry Kravkov } 133900253a8cSDmitry Kravkov 134000253a8cSDmitry Kravkov /** 134100253a8cSDmitry Kravkov * bnx2x_update_drv_flags - update flags in shmem 134200253a8cSDmitry Kravkov * 134300253a8cSDmitry Kravkov * @bp: driver handle 134400253a8cSDmitry Kravkov * @flags: flags to update 134500253a8cSDmitry Kravkov * @set: set or clear 134600253a8cSDmitry Kravkov * 134700253a8cSDmitry Kravkov */ 134800253a8cSDmitry Kravkov static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set) 134900253a8cSDmitry Kravkov { 135000253a8cSDmitry Kravkov if (SHMEM2_HAS(bp, drv_flags)) { 135100253a8cSDmitry Kravkov u32 drv_flags; 1352f16da43bSAriel Elior bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 135300253a8cSDmitry Kravkov drv_flags = SHMEM2_RD(bp, drv_flags); 135400253a8cSDmitry Kravkov 135500253a8cSDmitry Kravkov if (set) 135600253a8cSDmitry Kravkov SET_FLAGS(drv_flags, flags); 135700253a8cSDmitry Kravkov else 135800253a8cSDmitry Kravkov RESET_FLAGS(drv_flags, flags); 135900253a8cSDmitry Kravkov 136000253a8cSDmitry Kravkov SHMEM2_WR(bp, drv_flags, drv_flags); 136151c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "drv_flags 0x%08x\n", drv_flags); 1362f16da43bSAriel Elior bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 136300253a8cSDmitry Kravkov } 136400253a8cSDmitry Kravkov } 136500253a8cSDmitry Kravkov 136655c11941SMerav Sicron 1367614c76dfSDmitry Kravkov 13688ca5e17eSAriel Elior /** 13692de67439SYuval Mintz * bnx2x_fill_fw_str - Fill buffer with FW version string 13708ca5e17eSAriel Elior * 13718ca5e17eSAriel Elior * @bp: driver handle 13728ca5e17eSAriel Elior * @buf: character buffer to fill with the fw name 13738ca5e17eSAriel Elior * @buf_len: length of the above buffer 13748ca5e17eSAriel Elior * 13758ca5e17eSAriel Elior */ 13768ca5e17eSAriel Elior void bnx2x_fill_fw_str(struct bnx2x *bp, char *buf, size_t buf_len); 13777fa6f340SYuval Mintz 13787fa6f340SYuval Mintz int bnx2x_drain_tx_queues(struct bnx2x *bp); 13797fa6f340SYuval Mintz void bnx2x_squeeze_objects(struct bnx2x *bp); 13807fa6f340SYuval Mintz 1381230bb0f3SYuval Mintz void bnx2x_schedule_sp_rtnl(struct bnx2x*, enum sp_rtnl_flag, 1382230bb0f3SYuval Mintz u32 verbose); 1383230bb0f3SYuval Mintz 1384230d00ebSYuval Mintz /** 1385230d00ebSYuval Mintz * bnx2x_set_os_driver_state - write driver state for management FW usage 1386230d00ebSYuval Mintz * 1387230d00ebSYuval Mintz * @bp: driver handle 1388230d00ebSYuval Mintz * @state: OS_DRIVER_STATE_* value reflecting current driver state 1389230d00ebSYuval Mintz */ 1390230d00ebSYuval Mintz void bnx2x_set_os_driver_state(struct bnx2x *bp, u32 state); 139197ac4ef7SYuval Mintz 139297ac4ef7SYuval Mintz /** 139397ac4ef7SYuval Mintz * bnx2x_nvram_read - reads data from nvram [might sleep] 139497ac4ef7SYuval Mintz * 139597ac4ef7SYuval Mintz * @bp: driver handle 139697ac4ef7SYuval Mintz * @offset: byte offset in nvram 139797ac4ef7SYuval Mintz * @ret_buf: pointer to buffer where data is to be stored 139897ac4ef7SYuval Mintz * @buf_size: Length of 'ret_buf' in bytes 139997ac4ef7SYuval Mintz */ 140097ac4ef7SYuval Mintz int bnx2x_nvram_read(struct bnx2x *bp, u32 offset, u8 *ret_buf, 140197ac4ef7SYuval Mintz int buf_size); 140297ac4ef7SYuval Mintz 1403adfc5217SJeff Kirsher #endif /* BNX2X_CMN_H */ 1404