1adfc5217SJeff Kirsher /* bnx2x_cmn.h: Broadcom Everest network driver. 2adfc5217SJeff Kirsher * 3247fa82bSYuval Mintz * Copyright (c) 2007-2013 Broadcom Corporation 4adfc5217SJeff Kirsher * 5adfc5217SJeff Kirsher * This program is free software; you can redistribute it and/or modify 6adfc5217SJeff Kirsher * it under the terms of the GNU General Public License as published by 7adfc5217SJeff Kirsher * the Free Software Foundation. 8adfc5217SJeff Kirsher * 908f6dd89SAriel Elior * Maintained by: Ariel Elior <ariel.elior@qlogic.com> 10adfc5217SJeff Kirsher * Written by: Eliezer Tamir 11adfc5217SJeff Kirsher * Based on code from Michael Chan's bnx2 driver 12adfc5217SJeff Kirsher * UDP CSUM errata workaround by Arik Gendelman 13adfc5217SJeff Kirsher * Slowpath and fastpath rework by Vladislav Zolotarov 14adfc5217SJeff Kirsher * Statistics and Link management by Yitchak Gertner 15adfc5217SJeff Kirsher * 16adfc5217SJeff Kirsher */ 17adfc5217SJeff Kirsher #ifndef BNX2X_CMN_H 18adfc5217SJeff Kirsher #define BNX2X_CMN_H 19adfc5217SJeff Kirsher 20adfc5217SJeff Kirsher #include <linux/types.h> 21adfc5217SJeff Kirsher #include <linux/pci.h> 22adfc5217SJeff Kirsher #include <linux/netdevice.h> 23614c76dfSDmitry Kravkov #include <linux/etherdevice.h> 24df1efc2dSJosh Boyer #include <linux/irq.h> 25adfc5217SJeff Kirsher 26adfc5217SJeff Kirsher #include "bnx2x.h" 276411280aSAriel Elior #include "bnx2x_sriov.h" 28adfc5217SJeff Kirsher 29adfc5217SJeff Kirsher /* This is used as a replacement for an MCP if it's not present */ 30a8f47eb7Sstephen hemminger extern int bnx2x_load_count[2][3]; /* per-path: 0-common, 1-port0, 2-port1 */ 31a8f47eb7Sstephen hemminger extern int bnx2x_num_queues; 32adfc5217SJeff Kirsher 33adfc5217SJeff Kirsher /************************ Macros ********************************/ 34adfc5217SJeff Kirsher #define BNX2X_PCI_FREE(x, y, size) \ 35adfc5217SJeff Kirsher do { \ 36adfc5217SJeff Kirsher if (x) { \ 37adfc5217SJeff Kirsher dma_free_coherent(&bp->pdev->dev, size, (void *)x, y); \ 38adfc5217SJeff Kirsher x = NULL; \ 39adfc5217SJeff Kirsher y = 0; \ 40adfc5217SJeff Kirsher } \ 41adfc5217SJeff Kirsher } while (0) 42adfc5217SJeff Kirsher 43adfc5217SJeff Kirsher #define BNX2X_FREE(x) \ 44adfc5217SJeff Kirsher do { \ 45adfc5217SJeff Kirsher if (x) { \ 46adfc5217SJeff Kirsher kfree((void *)x); \ 47adfc5217SJeff Kirsher x = NULL; \ 48adfc5217SJeff Kirsher } \ 49adfc5217SJeff Kirsher } while (0) 50adfc5217SJeff Kirsher 51cd2b0389SJoe Perches #define BNX2X_PCI_ALLOC(y, size) \ 52cd2b0389SJoe Perches ({ \ 53cd2b0389SJoe Perches void *x = dma_zalloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ 54cd2b0389SJoe Perches if (x) \ 55cd2b0389SJoe Perches DP(NETIF_MSG_HW, \ 56cd2b0389SJoe Perches "BNX2X_PCI_ALLOC: Physical %Lx Virtual %p\n", \ 576bf07b8eSYuval Mintz (unsigned long long)(*y), x); \ 58cd2b0389SJoe Perches x; \ 59cd2b0389SJoe Perches }) 60cd2b0389SJoe Perches #define BNX2X_PCI_FALLOC(y, size) \ 61cd2b0389SJoe Perches ({ \ 62cd2b0389SJoe Perches void *x = dma_alloc_coherent(&bp->pdev->dev, size, y, GFP_KERNEL); \ 63cd2b0389SJoe Perches if (x) { \ 64cd2b0389SJoe Perches memset(x, 0xff, size); \ 65cd2b0389SJoe Perches DP(NETIF_MSG_HW, \ 66cd2b0389SJoe Perches "BNX2X_PCI_FALLOC: Physical %Lx Virtual %p\n", \ 6775b29459SDmitry Kravkov (unsigned long long)(*y), x); \ 68cd2b0389SJoe Perches } \ 69cd2b0389SJoe Perches x; \ 70cd2b0389SJoe Perches }) 71adfc5217SJeff Kirsher 72adfc5217SJeff Kirsher /*********************** Interfaces **************************** 73adfc5217SJeff Kirsher * Functions that need to be implemented by each driver version 74adfc5217SJeff Kirsher */ 75adfc5217SJeff Kirsher /* Init */ 76adfc5217SJeff Kirsher 77adfc5217SJeff Kirsher /** 78adfc5217SJeff Kirsher * bnx2x_send_unload_req - request unload mode from the MCP. 79adfc5217SJeff Kirsher * 80adfc5217SJeff Kirsher * @bp: driver handle 81adfc5217SJeff Kirsher * @unload_mode: requested function's unload mode 82adfc5217SJeff Kirsher * 83adfc5217SJeff Kirsher * Return unload mode returned by the MCP: COMMON, PORT or FUNC. 84adfc5217SJeff Kirsher */ 85adfc5217SJeff Kirsher u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode); 86adfc5217SJeff Kirsher 87adfc5217SJeff Kirsher /** 88adfc5217SJeff Kirsher * bnx2x_send_unload_done - send UNLOAD_DONE command to the MCP. 89adfc5217SJeff Kirsher * 90adfc5217SJeff Kirsher * @bp: driver handle 915d07d868SYuval Mintz * @keep_link: true iff link should be kept up 92adfc5217SJeff Kirsher */ 935d07d868SYuval Mintz void bnx2x_send_unload_done(struct bnx2x *bp, bool keep_link); 94adfc5217SJeff Kirsher 95adfc5217SJeff Kirsher /** 9696305234SDmitry Kravkov * bnx2x_config_rss_pf - configure RSS parameters in a PF. 97adfc5217SJeff Kirsher * 98adfc5217SJeff Kirsher * @bp: driver handle 9949ce9c2cSBen Hutchings * @rss_obj: RSS object to use 100adfc5217SJeff Kirsher * @ind_table: indirection table to configure 101adfc5217SJeff Kirsher * @config_hash: re-configure RSS hash keys configuration 10260cad4e6SAriel Elior * @enable: enabled or disabled configuration 103adfc5217SJeff Kirsher */ 10460cad4e6SAriel Elior int bnx2x_rss(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj, 10560cad4e6SAriel Elior bool config_hash, bool enable); 106adfc5217SJeff Kirsher 107adfc5217SJeff Kirsher /** 108adfc5217SJeff Kirsher * bnx2x__init_func_obj - init function object 109adfc5217SJeff Kirsher * 110adfc5217SJeff Kirsher * @bp: driver handle 111adfc5217SJeff Kirsher * 112adfc5217SJeff Kirsher * Initializes the Function Object with the appropriate 113adfc5217SJeff Kirsher * parameters which include a function slow path driver 114adfc5217SJeff Kirsher * interface. 115adfc5217SJeff Kirsher */ 116adfc5217SJeff Kirsher void bnx2x__init_func_obj(struct bnx2x *bp); 117adfc5217SJeff Kirsher 118adfc5217SJeff Kirsher /** 119adfc5217SJeff Kirsher * bnx2x_setup_queue - setup eth queue. 120adfc5217SJeff Kirsher * 121adfc5217SJeff Kirsher * @bp: driver handle 122adfc5217SJeff Kirsher * @fp: pointer to the fastpath structure 123adfc5217SJeff Kirsher * @leading: boolean 124adfc5217SJeff Kirsher * 125adfc5217SJeff Kirsher */ 126adfc5217SJeff Kirsher int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp, 127adfc5217SJeff Kirsher bool leading); 128adfc5217SJeff Kirsher 129adfc5217SJeff Kirsher /** 130adfc5217SJeff Kirsher * bnx2x_setup_leading - bring up a leading eth queue. 131adfc5217SJeff Kirsher * 132adfc5217SJeff Kirsher * @bp: driver handle 133adfc5217SJeff Kirsher */ 134adfc5217SJeff Kirsher int bnx2x_setup_leading(struct bnx2x *bp); 135adfc5217SJeff Kirsher 136adfc5217SJeff Kirsher /** 137adfc5217SJeff Kirsher * bnx2x_fw_command - send the MCP a request 138adfc5217SJeff Kirsher * 139adfc5217SJeff Kirsher * @bp: driver handle 140adfc5217SJeff Kirsher * @command: request 141adfc5217SJeff Kirsher * @param: request's parameter 142adfc5217SJeff Kirsher * 143adfc5217SJeff Kirsher * block until there is a reply 144adfc5217SJeff Kirsher */ 145adfc5217SJeff Kirsher u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); 146adfc5217SJeff Kirsher 147adfc5217SJeff Kirsher /** 148adfc5217SJeff Kirsher * bnx2x_initial_phy_init - initialize link parameters structure variables. 149adfc5217SJeff Kirsher * 150adfc5217SJeff Kirsher * @bp: driver handle 151adfc5217SJeff Kirsher * @load_mode: current mode 152adfc5217SJeff Kirsher */ 153cd1dfce2SYuval Mintz int bnx2x_initial_phy_init(struct bnx2x *bp, int load_mode); 154adfc5217SJeff Kirsher 155adfc5217SJeff Kirsher /** 156adfc5217SJeff Kirsher * bnx2x_link_set - configure hw according to link parameters structure. 157adfc5217SJeff Kirsher * 158adfc5217SJeff Kirsher * @bp: driver handle 159adfc5217SJeff Kirsher */ 160adfc5217SJeff Kirsher void bnx2x_link_set(struct bnx2x *bp); 161adfc5217SJeff Kirsher 162adfc5217SJeff Kirsher /** 1635d07d868SYuval Mintz * bnx2x_force_link_reset - Forces link reset, and put the PHY 1645d07d868SYuval Mintz * in reset as well. 1655d07d868SYuval Mintz * 1665d07d868SYuval Mintz * @bp: driver handle 1675d07d868SYuval Mintz */ 1685d07d868SYuval Mintz void bnx2x_force_link_reset(struct bnx2x *bp); 1695d07d868SYuval Mintz 1705d07d868SYuval Mintz /** 171adfc5217SJeff Kirsher * bnx2x_link_test - query link status. 172adfc5217SJeff Kirsher * 173adfc5217SJeff Kirsher * @bp: driver handle 174adfc5217SJeff Kirsher * @is_serdes: bool 175adfc5217SJeff Kirsher * 176adfc5217SJeff Kirsher * Returns 0 if link is UP. 177adfc5217SJeff Kirsher */ 178adfc5217SJeff Kirsher u8 bnx2x_link_test(struct bnx2x *bp, u8 is_serdes); 179adfc5217SJeff Kirsher 180adfc5217SJeff Kirsher /** 181adfc5217SJeff Kirsher * bnx2x_drv_pulse - write driver pulse to shmem 182adfc5217SJeff Kirsher * 183adfc5217SJeff Kirsher * @bp: driver handle 184adfc5217SJeff Kirsher * 185adfc5217SJeff Kirsher * writes the value in bp->fw_drv_pulse_wr_seq to drv_pulse mbox 186adfc5217SJeff Kirsher * in the shmem. 187adfc5217SJeff Kirsher */ 188adfc5217SJeff Kirsher void bnx2x_drv_pulse(struct bnx2x *bp); 189adfc5217SJeff Kirsher 190adfc5217SJeff Kirsher /** 191adfc5217SJeff Kirsher * bnx2x_igu_ack_sb - update IGU with current SB value 192adfc5217SJeff Kirsher * 193adfc5217SJeff Kirsher * @bp: driver handle 194adfc5217SJeff Kirsher * @igu_sb_id: SB id 195adfc5217SJeff Kirsher * @segment: SB segment 196adfc5217SJeff Kirsher * @index: SB index 197adfc5217SJeff Kirsher * @op: SB operation 198adfc5217SJeff Kirsher * @update: is HW update required 199adfc5217SJeff Kirsher */ 200adfc5217SJeff Kirsher void bnx2x_igu_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 segment, 201adfc5217SJeff Kirsher u16 index, u8 op, u8 update); 202adfc5217SJeff Kirsher 203adfc5217SJeff Kirsher /* Disable transactions from chip to host */ 204adfc5217SJeff Kirsher void bnx2x_pf_disable(struct bnx2x *bp); 20507ba6af4SMiriam Shitrit int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val); 206adfc5217SJeff Kirsher 207adfc5217SJeff Kirsher /** 208adfc5217SJeff Kirsher * bnx2x__link_status_update - handles link status change. 209adfc5217SJeff Kirsher * 210adfc5217SJeff Kirsher * @bp: driver handle 211adfc5217SJeff Kirsher */ 212adfc5217SJeff Kirsher void bnx2x__link_status_update(struct bnx2x *bp); 213adfc5217SJeff Kirsher 214adfc5217SJeff Kirsher /** 215adfc5217SJeff Kirsher * bnx2x_link_report - report link status to upper layer. 216adfc5217SJeff Kirsher * 217adfc5217SJeff Kirsher * @bp: driver handle 218adfc5217SJeff Kirsher */ 219adfc5217SJeff Kirsher void bnx2x_link_report(struct bnx2x *bp); 220adfc5217SJeff Kirsher 221adfc5217SJeff Kirsher /* None-atomic version of bnx2x_link_report() */ 222adfc5217SJeff Kirsher void __bnx2x_link_report(struct bnx2x *bp); 223adfc5217SJeff Kirsher 224adfc5217SJeff Kirsher /** 225adfc5217SJeff Kirsher * bnx2x_get_mf_speed - calculate MF speed. 226adfc5217SJeff Kirsher * 227adfc5217SJeff Kirsher * @bp: driver handle 228adfc5217SJeff Kirsher * 229adfc5217SJeff Kirsher * Takes into account current linespeed and MF configuration. 230adfc5217SJeff Kirsher */ 231adfc5217SJeff Kirsher u16 bnx2x_get_mf_speed(struct bnx2x *bp); 232adfc5217SJeff Kirsher 233adfc5217SJeff Kirsher /** 234adfc5217SJeff Kirsher * bnx2x_msix_sp_int - MSI-X slowpath interrupt handler 235adfc5217SJeff Kirsher * 236adfc5217SJeff Kirsher * @irq: irq number 237adfc5217SJeff Kirsher * @dev_instance: private instance 238adfc5217SJeff Kirsher */ 239adfc5217SJeff Kirsher irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance); 240adfc5217SJeff Kirsher 241adfc5217SJeff Kirsher /** 242adfc5217SJeff Kirsher * bnx2x_interrupt - non MSI-X interrupt handler 243adfc5217SJeff Kirsher * 244adfc5217SJeff Kirsher * @irq: irq number 245adfc5217SJeff Kirsher * @dev_instance: private instance 246adfc5217SJeff Kirsher */ 247adfc5217SJeff Kirsher irqreturn_t bnx2x_interrupt(int irq, void *dev_instance); 248adfc5217SJeff Kirsher 249adfc5217SJeff Kirsher /** 250adfc5217SJeff Kirsher * bnx2x_cnic_notify - send command to cnic driver 251adfc5217SJeff Kirsher * 252adfc5217SJeff Kirsher * @bp: driver handle 253adfc5217SJeff Kirsher * @cmd: command 254adfc5217SJeff Kirsher */ 255adfc5217SJeff Kirsher int bnx2x_cnic_notify(struct bnx2x *bp, int cmd); 256adfc5217SJeff Kirsher 257adfc5217SJeff Kirsher /** 258adfc5217SJeff Kirsher * bnx2x_setup_cnic_irq_info - provides cnic with IRQ information 259adfc5217SJeff Kirsher * 260adfc5217SJeff Kirsher * @bp: driver handle 261adfc5217SJeff Kirsher */ 262adfc5217SJeff Kirsher void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); 26337ae41a9SMerav Sicron 26437ae41a9SMerav Sicron /** 26537ae41a9SMerav Sicron * bnx2x_setup_cnic_info - provides cnic with updated info 26637ae41a9SMerav Sicron * 26737ae41a9SMerav Sicron * @bp: driver handle 26837ae41a9SMerav Sicron */ 26937ae41a9SMerav Sicron void bnx2x_setup_cnic_info(struct bnx2x *bp); 27037ae41a9SMerav Sicron 271adfc5217SJeff Kirsher /** 272adfc5217SJeff Kirsher * bnx2x_int_enable - enable HW interrupts. 273adfc5217SJeff Kirsher * 274adfc5217SJeff Kirsher * @bp: driver handle 275adfc5217SJeff Kirsher */ 276adfc5217SJeff Kirsher void bnx2x_int_enable(struct bnx2x *bp); 277adfc5217SJeff Kirsher 278adfc5217SJeff Kirsher /** 279adfc5217SJeff Kirsher * bnx2x_int_disable_sync - disable interrupts. 280adfc5217SJeff Kirsher * 281adfc5217SJeff Kirsher * @bp: driver handle 282adfc5217SJeff Kirsher * @disable_hw: true, disable HW interrupts. 283adfc5217SJeff Kirsher * 284adfc5217SJeff Kirsher * This function ensures that there are no 285adfc5217SJeff Kirsher * ISRs or SP DPCs (sp_task) are running after it returns. 286adfc5217SJeff Kirsher */ 287adfc5217SJeff Kirsher void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw); 288adfc5217SJeff Kirsher 289adfc5217SJeff Kirsher /** 29055c11941SMerav Sicron * bnx2x_nic_init_cnic - init driver internals for cnic. 291adfc5217SJeff Kirsher * 292adfc5217SJeff Kirsher * @bp: driver handle 293adfc5217SJeff Kirsher * @load_code: COMMON, PORT or FUNCTION 294adfc5217SJeff Kirsher * 295adfc5217SJeff Kirsher * Initializes: 296adfc5217SJeff Kirsher * - rings 297adfc5217SJeff Kirsher * - status blocks 298adfc5217SJeff Kirsher * - etc. 299adfc5217SJeff Kirsher */ 30055c11941SMerav Sicron void bnx2x_nic_init_cnic(struct bnx2x *bp); 301adfc5217SJeff Kirsher 302adfc5217SJeff Kirsher /** 303ecf01c22SYuval Mintz * bnx2x_preirq_nic_init - init driver internals. 30455c11941SMerav Sicron * 30555c11941SMerav Sicron * @bp: driver handle 30655c11941SMerav Sicron * 30755c11941SMerav Sicron * Initializes: 308ecf01c22SYuval Mintz * - fastpath object 309ecf01c22SYuval Mintz * - fastpath rings 310ecf01c22SYuval Mintz * etc. 311ecf01c22SYuval Mintz */ 312ecf01c22SYuval Mintz void bnx2x_pre_irq_nic_init(struct bnx2x *bp); 313ecf01c22SYuval Mintz 314ecf01c22SYuval Mintz /** 315ecf01c22SYuval Mintz * bnx2x_postirq_nic_init - init driver internals. 316ecf01c22SYuval Mintz * 317ecf01c22SYuval Mintz * @bp: driver handle 318ecf01c22SYuval Mintz * @load_code: COMMON, PORT or FUNCTION 319ecf01c22SYuval Mintz * 320ecf01c22SYuval Mintz * Initializes: 32155c11941SMerav Sicron * - status blocks 322ecf01c22SYuval Mintz * - slowpath rings 32355c11941SMerav Sicron * - etc. 32455c11941SMerav Sicron */ 325ecf01c22SYuval Mintz void bnx2x_post_irq_nic_init(struct bnx2x *bp, u32 load_code); 32655c11941SMerav Sicron /** 32755c11941SMerav Sicron * bnx2x_alloc_mem_cnic - allocate driver's memory for cnic. 32855c11941SMerav Sicron * 32955c11941SMerav Sicron * @bp: driver handle 33055c11941SMerav Sicron */ 33155c11941SMerav Sicron int bnx2x_alloc_mem_cnic(struct bnx2x *bp); 33255c11941SMerav Sicron /** 333adfc5217SJeff Kirsher * bnx2x_alloc_mem - allocate driver's memory. 334adfc5217SJeff Kirsher * 335adfc5217SJeff Kirsher * @bp: driver handle 336adfc5217SJeff Kirsher */ 337adfc5217SJeff Kirsher int bnx2x_alloc_mem(struct bnx2x *bp); 338adfc5217SJeff Kirsher 339adfc5217SJeff Kirsher /** 34055c11941SMerav Sicron * bnx2x_free_mem_cnic - release driver's memory for cnic. 34155c11941SMerav Sicron * 34255c11941SMerav Sicron * @bp: driver handle 34355c11941SMerav Sicron */ 34455c11941SMerav Sicron void bnx2x_free_mem_cnic(struct bnx2x *bp); 34555c11941SMerav Sicron /** 346adfc5217SJeff Kirsher * bnx2x_free_mem - release driver's memory. 347adfc5217SJeff Kirsher * 348adfc5217SJeff Kirsher * @bp: driver handle 349adfc5217SJeff Kirsher */ 350adfc5217SJeff Kirsher void bnx2x_free_mem(struct bnx2x *bp); 351adfc5217SJeff Kirsher 352adfc5217SJeff Kirsher /** 353adfc5217SJeff Kirsher * bnx2x_set_num_queues - set number of queues according to mode. 354adfc5217SJeff Kirsher * 355adfc5217SJeff Kirsher * @bp: driver handle 356adfc5217SJeff Kirsher */ 357adfc5217SJeff Kirsher void bnx2x_set_num_queues(struct bnx2x *bp); 358adfc5217SJeff Kirsher 359adfc5217SJeff Kirsher /** 360adfc5217SJeff Kirsher * bnx2x_chip_cleanup - cleanup chip internals. 361adfc5217SJeff Kirsher * 362adfc5217SJeff Kirsher * @bp: driver handle 363adfc5217SJeff Kirsher * @unload_mode: COMMON, PORT, FUNCTION 3645d07d868SYuval Mintz * @keep_link: true iff link should be kept up. 365adfc5217SJeff Kirsher * 366adfc5217SJeff Kirsher * - Cleanup MAC configuration. 367adfc5217SJeff Kirsher * - Closes clients. 368adfc5217SJeff Kirsher * - etc. 369adfc5217SJeff Kirsher */ 3705d07d868SYuval Mintz void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link); 371adfc5217SJeff Kirsher 372adfc5217SJeff Kirsher /** 373adfc5217SJeff Kirsher * bnx2x_acquire_hw_lock - acquire HW lock. 374adfc5217SJeff Kirsher * 375adfc5217SJeff Kirsher * @bp: driver handle 376adfc5217SJeff Kirsher * @resource: resource bit which was locked 377adfc5217SJeff Kirsher */ 378adfc5217SJeff Kirsher int bnx2x_acquire_hw_lock(struct bnx2x *bp, u32 resource); 379adfc5217SJeff Kirsher 380adfc5217SJeff Kirsher /** 381adfc5217SJeff Kirsher * bnx2x_release_hw_lock - release HW lock. 382adfc5217SJeff Kirsher * 383adfc5217SJeff Kirsher * @bp: driver handle 384adfc5217SJeff Kirsher * @resource: resource bit which was locked 385adfc5217SJeff Kirsher */ 386adfc5217SJeff Kirsher int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); 387adfc5217SJeff Kirsher 388adfc5217SJeff Kirsher /** 389adfc5217SJeff Kirsher * bnx2x_release_leader_lock - release recovery leader lock 390adfc5217SJeff Kirsher * 391adfc5217SJeff Kirsher * @bp: driver handle 392adfc5217SJeff Kirsher */ 393adfc5217SJeff Kirsher int bnx2x_release_leader_lock(struct bnx2x *bp); 394adfc5217SJeff Kirsher 395adfc5217SJeff Kirsher /** 396adfc5217SJeff Kirsher * bnx2x_set_eth_mac - configure eth MAC address in the HW 397adfc5217SJeff Kirsher * 398adfc5217SJeff Kirsher * @bp: driver handle 399adfc5217SJeff Kirsher * @set: set or clear 400adfc5217SJeff Kirsher * 401adfc5217SJeff Kirsher * Configures according to the value in netdev->dev_addr. 402adfc5217SJeff Kirsher */ 403adfc5217SJeff Kirsher int bnx2x_set_eth_mac(struct bnx2x *bp, bool set); 404adfc5217SJeff Kirsher 405adfc5217SJeff Kirsher /** 406adfc5217SJeff Kirsher * bnx2x_set_rx_mode - set MAC filtering configurations. 407adfc5217SJeff Kirsher * 408adfc5217SJeff Kirsher * @dev: netdevice 409adfc5217SJeff Kirsher * 410adfc5217SJeff Kirsher * called with netif_tx_lock from dev_mcast.c 411adfc5217SJeff Kirsher * If bp->state is OPEN, should be called with 412adfc5217SJeff Kirsher * netif_addr_lock_bh() 413adfc5217SJeff Kirsher */ 4148b09be5fSYuval Mintz void bnx2x_set_rx_mode_inner(struct bnx2x *bp); 415adfc5217SJeff Kirsher 416adfc5217SJeff Kirsher /* Parity errors related */ 417889b9af3SAriel Elior void bnx2x_set_pf_load(struct bnx2x *bp); 418889b9af3SAriel Elior bool bnx2x_clear_pf_load(struct bnx2x *bp); 419adfc5217SJeff Kirsher bool bnx2x_chk_parity_attn(struct bnx2x *bp, bool *global, bool print); 420adfc5217SJeff Kirsher bool bnx2x_reset_is_done(struct bnx2x *bp, int engine); 421adfc5217SJeff Kirsher void bnx2x_set_reset_in_progress(struct bnx2x *bp); 422adfc5217SJeff Kirsher void bnx2x_set_reset_global(struct bnx2x *bp); 423adfc5217SJeff Kirsher void bnx2x_disable_close_the_gate(struct bnx2x *bp); 42455c11941SMerav Sicron int bnx2x_init_hw_func_cnic(struct bnx2x *bp); 425adfc5217SJeff Kirsher 426adfc5217SJeff Kirsher /** 427adfc5217SJeff Kirsher * bnx2x_sp_event - handle ramrods completion. 428adfc5217SJeff Kirsher * 429adfc5217SJeff Kirsher * @fp: fastpath handle for the event 430adfc5217SJeff Kirsher * @rr_cqe: eth_rx_cqe 431adfc5217SJeff Kirsher */ 432adfc5217SJeff Kirsher void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); 433adfc5217SJeff Kirsher 434adfc5217SJeff Kirsher /** 435adfc5217SJeff Kirsher * bnx2x_ilt_set_info - prepare ILT configurations. 436adfc5217SJeff Kirsher * 437adfc5217SJeff Kirsher * @bp: driver handle 438adfc5217SJeff Kirsher */ 439adfc5217SJeff Kirsher void bnx2x_ilt_set_info(struct bnx2x *bp); 440adfc5217SJeff Kirsher 441adfc5217SJeff Kirsher /** 44255c11941SMerav Sicron * bnx2x_ilt_set_cnic_info - prepare ILT configurations for SRC 44355c11941SMerav Sicron * and TM. 44455c11941SMerav Sicron * 44555c11941SMerav Sicron * @bp: driver handle 44655c11941SMerav Sicron */ 44755c11941SMerav Sicron void bnx2x_ilt_set_info_cnic(struct bnx2x *bp); 44855c11941SMerav Sicron 44955c11941SMerav Sicron /** 450adfc5217SJeff Kirsher * bnx2x_dcbx_init - initialize dcbx protocol. 451adfc5217SJeff Kirsher * 452adfc5217SJeff Kirsher * @bp: driver handle 453adfc5217SJeff Kirsher */ 4549876879fSBarak Witkowski void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem); 455adfc5217SJeff Kirsher 456adfc5217SJeff Kirsher /** 457adfc5217SJeff Kirsher * bnx2x_set_power_state - set power state to the requested value. 458adfc5217SJeff Kirsher * 459adfc5217SJeff Kirsher * @bp: driver handle 460adfc5217SJeff Kirsher * @state: required state D0 or D3hot 461adfc5217SJeff Kirsher * 462adfc5217SJeff Kirsher * Currently only D0 and D3hot are supported. 463adfc5217SJeff Kirsher */ 464adfc5217SJeff Kirsher int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state); 465adfc5217SJeff Kirsher 466adfc5217SJeff Kirsher /** 467adfc5217SJeff Kirsher * bnx2x_update_max_mf_config - update MAX part of MF configuration in HW. 468adfc5217SJeff Kirsher * 469adfc5217SJeff Kirsher * @bp: driver handle 470adfc5217SJeff Kirsher * @value: new value 471adfc5217SJeff Kirsher */ 472adfc5217SJeff Kirsher void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value); 473adfc5217SJeff Kirsher /* Error handling */ 474adfc5217SJeff Kirsher void bnx2x_fw_dump_lvl(struct bnx2x *bp, const char *lvl); 475adfc5217SJeff Kirsher 476adfc5217SJeff Kirsher /* dev_close main block */ 4775d07d868SYuval Mintz int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link); 478adfc5217SJeff Kirsher 479adfc5217SJeff Kirsher /* dev_open main block */ 480adfc5217SJeff Kirsher int bnx2x_nic_load(struct bnx2x *bp, int load_mode); 481adfc5217SJeff Kirsher 482adfc5217SJeff Kirsher /* hard_xmit callback */ 483adfc5217SJeff Kirsher netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev); 484adfc5217SJeff Kirsher 485adfc5217SJeff Kirsher /* setup_tc callback */ 486adfc5217SJeff Kirsher int bnx2x_setup_tc(struct net_device *dev, u8 num_tc); 487adfc5217SJeff Kirsher 4883ec9f9caSAriel Elior int bnx2x_get_vf_config(struct net_device *dev, int vf, 4893ec9f9caSAriel Elior struct ifla_vf_info *ivi); 490abc5a021SAriel Elior int bnx2x_set_vf_mac(struct net_device *dev, int queue, u8 *mac); 4913ec9f9caSAriel Elior int bnx2x_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos); 492abc5a021SAriel Elior 493adfc5217SJeff Kirsher /* select_queue callback */ 494f663dd9aSJason Wang u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb, 49599932d4fSDaniel Borkmann void *accel_priv, select_queue_fallback_t fallback); 496adfc5217SJeff Kirsher 497dc1ba591SAriel Elior static inline void bnx2x_update_rx_prod(struct bnx2x *bp, 498dc1ba591SAriel Elior struct bnx2x_fastpath *fp, 499dc1ba591SAriel Elior u16 bd_prod, u16 rx_comp_prod, 500dc1ba591SAriel Elior u16 rx_sge_prod) 501dc1ba591SAriel Elior { 502dc1ba591SAriel Elior struct ustorm_eth_rx_producers rx_prods = {0}; 503dc1ba591SAriel Elior u32 i; 504dc1ba591SAriel Elior 505dc1ba591SAriel Elior /* Update producers */ 506dc1ba591SAriel Elior rx_prods.bd_prod = bd_prod; 507dc1ba591SAriel Elior rx_prods.cqe_prod = rx_comp_prod; 508dc1ba591SAriel Elior rx_prods.sge_prod = rx_sge_prod; 509dc1ba591SAriel Elior 510dc1ba591SAriel Elior /* Make sure that the BD and SGE data is updated before updating the 511dc1ba591SAriel Elior * producers since FW might read the BD/SGE right after the producer 512dc1ba591SAriel Elior * is updated. 513dc1ba591SAriel Elior * This is only applicable for weak-ordered memory model archs such 514dc1ba591SAriel Elior * as IA-64. The following barrier is also mandatory since FW will 515dc1ba591SAriel Elior * assumes BDs must have buffers. 516dc1ba591SAriel Elior */ 517dc1ba591SAriel Elior wmb(); 518dc1ba591SAriel Elior 519dc1ba591SAriel Elior for (i = 0; i < sizeof(rx_prods)/4; i++) 520dc1ba591SAriel Elior REG_WR(bp, fp->ustorm_rx_prods_offset + i*4, 521dc1ba591SAriel Elior ((u32 *)&rx_prods)[i]); 522dc1ba591SAriel Elior 523dc1ba591SAriel Elior mmiowb(); /* keep prod updates ordered */ 524dc1ba591SAriel Elior 525dc1ba591SAriel Elior DP(NETIF_MSG_RX_STATUS, 526dc1ba591SAriel Elior "queue[%d]: wrote bd_prod %u cqe_prod %u sge_prod %u\n", 527dc1ba591SAriel Elior fp->index, bd_prod, rx_comp_prod, rx_sge_prod); 528dc1ba591SAriel Elior } 529dc1ba591SAriel Elior 530adfc5217SJeff Kirsher /* reload helper */ 531adfc5217SJeff Kirsher int bnx2x_reload_if_running(struct net_device *dev); 532adfc5217SJeff Kirsher 533adfc5217SJeff Kirsher int bnx2x_change_mac_addr(struct net_device *dev, void *p); 534adfc5217SJeff Kirsher 535adfc5217SJeff Kirsher /* NAPI poll Tx part */ 536adfc5217SJeff Kirsher int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata); 537adfc5217SJeff Kirsher 538adfc5217SJeff Kirsher /* suspend/resume callbacks */ 539adfc5217SJeff Kirsher int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state); 540adfc5217SJeff Kirsher int bnx2x_resume(struct pci_dev *pdev); 541adfc5217SJeff Kirsher 542adfc5217SJeff Kirsher /* Release IRQ vectors */ 543adfc5217SJeff Kirsher void bnx2x_free_irq(struct bnx2x *bp); 544adfc5217SJeff Kirsher 545adfc5217SJeff Kirsher void bnx2x_free_fp_mem(struct bnx2x *bp); 546adfc5217SJeff Kirsher void bnx2x_init_rx_rings(struct bnx2x *bp); 54755c11941SMerav Sicron void bnx2x_init_rx_rings_cnic(struct bnx2x *bp); 548adfc5217SJeff Kirsher void bnx2x_free_skbs(struct bnx2x *bp); 549adfc5217SJeff Kirsher void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw); 550adfc5217SJeff Kirsher void bnx2x_netif_start(struct bnx2x *bp); 55155c11941SMerav Sicron int bnx2x_load_cnic(struct bnx2x *bp); 552adfc5217SJeff Kirsher 553adfc5217SJeff Kirsher /** 554adfc5217SJeff Kirsher * bnx2x_enable_msix - set msix configuration. 555adfc5217SJeff Kirsher * 556adfc5217SJeff Kirsher * @bp: driver handle 557adfc5217SJeff Kirsher * 558adfc5217SJeff Kirsher * fills msix_table, requests vectors, updates num_queues 559adfc5217SJeff Kirsher * according to number of available vectors. 560adfc5217SJeff Kirsher */ 5610e8d2ec5SMerav Sicron int bnx2x_enable_msix(struct bnx2x *bp); 562adfc5217SJeff Kirsher 563adfc5217SJeff Kirsher /** 564adfc5217SJeff Kirsher * bnx2x_enable_msi - request msi mode from OS, updated internals accordingly 565adfc5217SJeff Kirsher * 566adfc5217SJeff Kirsher * @bp: driver handle 567adfc5217SJeff Kirsher */ 568adfc5217SJeff Kirsher int bnx2x_enable_msi(struct bnx2x *bp); 569adfc5217SJeff Kirsher 570adfc5217SJeff Kirsher /** 5718f20aa57SDmitry Kravkov * bnx2x_low_latency_recv - LL callback 5728f20aa57SDmitry Kravkov * 5738f20aa57SDmitry Kravkov * @napi: napi structure 5748f20aa57SDmitry Kravkov */ 5758f20aa57SDmitry Kravkov int bnx2x_low_latency_recv(struct napi_struct *napi); 5768f20aa57SDmitry Kravkov 5778f20aa57SDmitry Kravkov /** 578adfc5217SJeff Kirsher * bnx2x_alloc_mem_bp - allocate memories outsize main driver structure 579adfc5217SJeff Kirsher * 580adfc5217SJeff Kirsher * @bp: driver handle 581adfc5217SJeff Kirsher */ 5820329aba1SBill Pemberton int bnx2x_alloc_mem_bp(struct bnx2x *bp); 583adfc5217SJeff Kirsher 584adfc5217SJeff Kirsher /** 585adfc5217SJeff Kirsher * bnx2x_free_mem_bp - release memories outsize main driver structure 586adfc5217SJeff Kirsher * 587adfc5217SJeff Kirsher * @bp: driver handle 588adfc5217SJeff Kirsher */ 589adfc5217SJeff Kirsher void bnx2x_free_mem_bp(struct bnx2x *bp); 590adfc5217SJeff Kirsher 591adfc5217SJeff Kirsher /** 592adfc5217SJeff Kirsher * bnx2x_change_mtu - change mtu netdev callback 593adfc5217SJeff Kirsher * 594adfc5217SJeff Kirsher * @dev: net device 595adfc5217SJeff Kirsher * @new_mtu: requested mtu 596adfc5217SJeff Kirsher * 597adfc5217SJeff Kirsher */ 598adfc5217SJeff Kirsher int bnx2x_change_mtu(struct net_device *dev, int new_mtu); 599adfc5217SJeff Kirsher 60055c11941SMerav Sicron #ifdef NETDEV_FCOE_WWNN 601adfc5217SJeff Kirsher /** 602adfc5217SJeff Kirsher * bnx2x_fcoe_get_wwn - return the requested WWN value for this port 603adfc5217SJeff Kirsher * 604adfc5217SJeff Kirsher * @dev: net_device 605adfc5217SJeff Kirsher * @wwn: output buffer 606adfc5217SJeff Kirsher * @type: WWN type: NETDEV_FCOE_WWNN (node) or NETDEV_FCOE_WWPN (port) 607adfc5217SJeff Kirsher * 608adfc5217SJeff Kirsher */ 609adfc5217SJeff Kirsher int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type); 610adfc5217SJeff Kirsher #endif 611621b4d66SDmitry Kravkov 612c8f44affSMichał Mirosław netdev_features_t bnx2x_fix_features(struct net_device *dev, 613c8f44affSMichał Mirosław netdev_features_t features); 614c8f44affSMichał Mirosław int bnx2x_set_features(struct net_device *dev, netdev_features_t features); 615adfc5217SJeff Kirsher 616adfc5217SJeff Kirsher /** 617adfc5217SJeff Kirsher * bnx2x_tx_timeout - tx timeout netdev callback 618adfc5217SJeff Kirsher * 619adfc5217SJeff Kirsher * @dev: net device 620adfc5217SJeff Kirsher */ 621adfc5217SJeff Kirsher void bnx2x_tx_timeout(struct net_device *dev); 622adfc5217SJeff Kirsher 623adfc5217SJeff Kirsher /*********************** Inlines **********************************/ 624adfc5217SJeff Kirsher /*********************** Fast path ********************************/ 625adfc5217SJeff Kirsher static inline void bnx2x_update_fpsb_idx(struct bnx2x_fastpath *fp) 626adfc5217SJeff Kirsher { 627adfc5217SJeff Kirsher barrier(); /* status block is written to by the chip */ 628adfc5217SJeff Kirsher fp->fp_hc_idx = fp->sb_running_index[SM_RX_ID]; 629adfc5217SJeff Kirsher } 630adfc5217SJeff Kirsher 631adfc5217SJeff Kirsher static inline void bnx2x_igu_ack_sb_gen(struct bnx2x *bp, u8 igu_sb_id, 632adfc5217SJeff Kirsher u8 segment, u16 index, u8 op, 633adfc5217SJeff Kirsher u8 update, u32 igu_addr) 634adfc5217SJeff Kirsher { 635adfc5217SJeff Kirsher struct igu_regular cmd_data = {0}; 636adfc5217SJeff Kirsher 637adfc5217SJeff Kirsher cmd_data.sb_id_and_flags = 638adfc5217SJeff Kirsher ((index << IGU_REGULAR_SB_INDEX_SHIFT) | 639adfc5217SJeff Kirsher (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) | 640adfc5217SJeff Kirsher (update << IGU_REGULAR_BUPDATE_SHIFT) | 641adfc5217SJeff Kirsher (op << IGU_REGULAR_ENABLE_INT_SHIFT)); 642adfc5217SJeff Kirsher 64351c1a580SMerav Sicron DP(NETIF_MSG_INTR, "write 0x%08x to IGU addr 0x%x\n", 644adfc5217SJeff Kirsher cmd_data.sb_id_and_flags, igu_addr); 645adfc5217SJeff Kirsher REG_WR(bp, igu_addr, cmd_data.sb_id_and_flags); 646adfc5217SJeff Kirsher 647adfc5217SJeff Kirsher /* Make sure that ACK is written */ 648adfc5217SJeff Kirsher mmiowb(); 649adfc5217SJeff Kirsher barrier(); 650adfc5217SJeff Kirsher } 651adfc5217SJeff Kirsher 652adfc5217SJeff Kirsher static inline void bnx2x_hc_ack_sb(struct bnx2x *bp, u8 sb_id, 653adfc5217SJeff Kirsher u8 storm, u16 index, u8 op, u8 update) 654adfc5217SJeff Kirsher { 655adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 656adfc5217SJeff Kirsher COMMAND_REG_INT_ACK); 657adfc5217SJeff Kirsher struct igu_ack_register igu_ack; 658adfc5217SJeff Kirsher 659adfc5217SJeff Kirsher igu_ack.status_block_index = index; 660adfc5217SJeff Kirsher igu_ack.sb_id_and_flags = 661adfc5217SJeff Kirsher ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) | 662adfc5217SJeff Kirsher (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) | 663adfc5217SJeff Kirsher (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) | 664adfc5217SJeff Kirsher (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT)); 665adfc5217SJeff Kirsher 666adfc5217SJeff Kirsher REG_WR(bp, hc_addr, (*(u32 *)&igu_ack)); 667adfc5217SJeff Kirsher 668adfc5217SJeff Kirsher /* Make sure that ACK is written */ 669adfc5217SJeff Kirsher mmiowb(); 670adfc5217SJeff Kirsher barrier(); 671adfc5217SJeff Kirsher } 672adfc5217SJeff Kirsher 673adfc5217SJeff Kirsher static inline void bnx2x_ack_sb(struct bnx2x *bp, u8 igu_sb_id, u8 storm, 674adfc5217SJeff Kirsher u16 index, u8 op, u8 update) 675adfc5217SJeff Kirsher { 676adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 677adfc5217SJeff Kirsher bnx2x_hc_ack_sb(bp, igu_sb_id, storm, index, op, update); 678adfc5217SJeff Kirsher else { 679adfc5217SJeff Kirsher u8 segment; 680adfc5217SJeff Kirsher 681adfc5217SJeff Kirsher if (CHIP_INT_MODE_IS_BC(bp)) 682adfc5217SJeff Kirsher segment = storm; 683adfc5217SJeff Kirsher else if (igu_sb_id != bp->igu_dsb_id) 684adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 685adfc5217SJeff Kirsher else if (storm == ATTENTION_ID) 686adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_ATTN; 687adfc5217SJeff Kirsher else 688adfc5217SJeff Kirsher segment = IGU_SEG_ACCESS_DEF; 689adfc5217SJeff Kirsher bnx2x_igu_ack_sb(bp, igu_sb_id, segment, index, op, update); 690adfc5217SJeff Kirsher } 691adfc5217SJeff Kirsher } 692adfc5217SJeff Kirsher 693adfc5217SJeff Kirsher static inline u16 bnx2x_hc_ack_int(struct bnx2x *bp) 694adfc5217SJeff Kirsher { 695adfc5217SJeff Kirsher u32 hc_addr = (HC_REG_COMMAND_REG + BP_PORT(bp)*32 + 696adfc5217SJeff Kirsher COMMAND_REG_SIMD_MASK); 697adfc5217SJeff Kirsher u32 result = REG_RD(bp, hc_addr); 698adfc5217SJeff Kirsher 699adfc5217SJeff Kirsher barrier(); 700adfc5217SJeff Kirsher return result; 701adfc5217SJeff Kirsher } 702adfc5217SJeff Kirsher 703adfc5217SJeff Kirsher static inline u16 bnx2x_igu_ack_int(struct bnx2x *bp) 704adfc5217SJeff Kirsher { 705adfc5217SJeff Kirsher u32 igu_addr = (BAR_IGU_INTMEM + IGU_REG_SISR_MDPC_WMASK_LSB_UPPER*8); 706adfc5217SJeff Kirsher u32 result = REG_RD(bp, igu_addr); 707adfc5217SJeff Kirsher 70851c1a580SMerav Sicron DP(NETIF_MSG_INTR, "read 0x%08x from IGU addr 0x%x\n", 709adfc5217SJeff Kirsher result, igu_addr); 710adfc5217SJeff Kirsher 711adfc5217SJeff Kirsher barrier(); 712adfc5217SJeff Kirsher return result; 713adfc5217SJeff Kirsher } 714adfc5217SJeff Kirsher 715adfc5217SJeff Kirsher static inline u16 bnx2x_ack_int(struct bnx2x *bp) 716adfc5217SJeff Kirsher { 717adfc5217SJeff Kirsher barrier(); 718adfc5217SJeff Kirsher if (bp->common.int_block == INT_BLOCK_HC) 719adfc5217SJeff Kirsher return bnx2x_hc_ack_int(bp); 720adfc5217SJeff Kirsher else 721adfc5217SJeff Kirsher return bnx2x_igu_ack_int(bp); 722adfc5217SJeff Kirsher } 723adfc5217SJeff Kirsher 724adfc5217SJeff Kirsher static inline int bnx2x_has_tx_work_unload(struct bnx2x_fp_txdata *txdata) 725adfc5217SJeff Kirsher { 726adfc5217SJeff Kirsher /* Tell compiler that consumer and producer can change */ 727adfc5217SJeff Kirsher barrier(); 728adfc5217SJeff Kirsher return txdata->tx_pkt_prod != txdata->tx_pkt_cons; 729adfc5217SJeff Kirsher } 730adfc5217SJeff Kirsher 731adfc5217SJeff Kirsher static inline u16 bnx2x_tx_avail(struct bnx2x *bp, 732adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 733adfc5217SJeff Kirsher { 734adfc5217SJeff Kirsher s16 used; 735adfc5217SJeff Kirsher u16 prod; 736adfc5217SJeff Kirsher u16 cons; 737adfc5217SJeff Kirsher 738adfc5217SJeff Kirsher prod = txdata->tx_bd_prod; 739adfc5217SJeff Kirsher cons = txdata->tx_bd_cons; 740adfc5217SJeff Kirsher 7417b5342d9SYuval Mintz used = SUB_S16(prod, cons); 742adfc5217SJeff Kirsher 743adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 744adfc5217SJeff Kirsher WARN_ON(used < 0); 7457b5342d9SYuval Mintz WARN_ON(used > txdata->tx_ring_size); 7467b5342d9SYuval Mintz WARN_ON((txdata->tx_ring_size - used) > MAX_TX_AVAIL); 747adfc5217SJeff Kirsher #endif 748adfc5217SJeff Kirsher 7497b5342d9SYuval Mintz return (s16)(txdata->tx_ring_size) - used; 750adfc5217SJeff Kirsher } 751adfc5217SJeff Kirsher 752adfc5217SJeff Kirsher static inline int bnx2x_tx_queue_has_work(struct bnx2x_fp_txdata *txdata) 753adfc5217SJeff Kirsher { 754adfc5217SJeff Kirsher u16 hw_cons; 755adfc5217SJeff Kirsher 756adfc5217SJeff Kirsher /* Tell compiler that status block fields can change */ 757adfc5217SJeff Kirsher barrier(); 758adfc5217SJeff Kirsher hw_cons = le16_to_cpu(*txdata->tx_cons_sb); 759adfc5217SJeff Kirsher return hw_cons != txdata->tx_pkt_cons; 760adfc5217SJeff Kirsher } 761adfc5217SJeff Kirsher 762adfc5217SJeff Kirsher static inline bool bnx2x_has_tx_work(struct bnx2x_fastpath *fp) 763adfc5217SJeff Kirsher { 764adfc5217SJeff Kirsher u8 cos; 765adfc5217SJeff Kirsher for_each_cos_in_tx_queue(fp, cos) 76665565884SMerav Sicron if (bnx2x_tx_queue_has_work(fp->txdata_ptr[cos])) 767adfc5217SJeff Kirsher return true; 768adfc5217SJeff Kirsher return false; 769adfc5217SJeff Kirsher } 770adfc5217SJeff Kirsher 77175b29459SDmitry Kravkov #define BNX2X_IS_CQE_COMPLETED(cqe_fp) (cqe_fp->marker == 0x0) 77275b29459SDmitry Kravkov #define BNX2X_SEED_CQE(cqe_fp) (cqe_fp->marker = 0xFFFFFFFF) 773adfc5217SJeff Kirsher static inline int bnx2x_has_rx_work(struct bnx2x_fastpath *fp) 774adfc5217SJeff Kirsher { 77575b29459SDmitry Kravkov u16 cons; 77675b29459SDmitry Kravkov union eth_rx_cqe *cqe; 77775b29459SDmitry Kravkov struct eth_fast_path_rx_cqe *cqe_fp; 778adfc5217SJeff Kirsher 77975b29459SDmitry Kravkov cons = RCQ_BD(fp->rx_comp_cons); 78075b29459SDmitry Kravkov cqe = &fp->rx_comp_ring[cons]; 78175b29459SDmitry Kravkov cqe_fp = &cqe->fast_path_cqe; 78275b29459SDmitry Kravkov return BNX2X_IS_CQE_COMPLETED(cqe_fp); 783adfc5217SJeff Kirsher } 784adfc5217SJeff Kirsher 785adfc5217SJeff Kirsher /** 786adfc5217SJeff Kirsher * bnx2x_tx_disable - disables tx from stack point of view 787adfc5217SJeff Kirsher * 788adfc5217SJeff Kirsher * @bp: driver handle 789adfc5217SJeff Kirsher */ 790adfc5217SJeff Kirsher static inline void bnx2x_tx_disable(struct bnx2x *bp) 791adfc5217SJeff Kirsher { 792adfc5217SJeff Kirsher netif_tx_disable(bp->dev); 793adfc5217SJeff Kirsher netif_carrier_off(bp->dev); 794adfc5217SJeff Kirsher } 795adfc5217SJeff Kirsher 796adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge(struct bnx2x *bp, 797adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, u16 index) 798adfc5217SJeff Kirsher { 799adfc5217SJeff Kirsher struct sw_rx_page *sw_buf = &fp->rx_page_ring[index]; 800adfc5217SJeff Kirsher struct page *page = sw_buf->page; 801adfc5217SJeff Kirsher struct eth_rx_sge *sge = &fp->rx_sge_ring[index]; 802adfc5217SJeff Kirsher 803adfc5217SJeff Kirsher /* Skip "next page" elements */ 804adfc5217SJeff Kirsher if (!page) 805adfc5217SJeff Kirsher return; 806adfc5217SJeff Kirsher 807adfc5217SJeff Kirsher dma_unmap_page(&bp->pdev->dev, dma_unmap_addr(sw_buf, mapping), 808924d75abSYuval Mintz SGE_PAGES, DMA_FROM_DEVICE); 809adfc5217SJeff Kirsher __free_pages(page, PAGES_PER_SGE_SHIFT); 810adfc5217SJeff Kirsher 811adfc5217SJeff Kirsher sw_buf->page = NULL; 812adfc5217SJeff Kirsher sge->addr_hi = 0; 813adfc5217SJeff Kirsher sge->addr_lo = 0; 814adfc5217SJeff Kirsher } 815adfc5217SJeff Kirsher 81655c11941SMerav Sicron static inline void bnx2x_del_all_napi_cnic(struct bnx2x *bp) 81755c11941SMerav Sicron { 81855c11941SMerav Sicron int i; 81955c11941SMerav Sicron 8208f20aa57SDmitry Kravkov for_each_rx_queue_cnic(bp, i) { 8218f20aa57SDmitry Kravkov napi_hash_del(&bnx2x_fp(bp, i, napi)); 82255c11941SMerav Sicron netif_napi_del(&bnx2x_fp(bp, i, napi)); 82355c11941SMerav Sicron } 8248f20aa57SDmitry Kravkov } 82555c11941SMerav Sicron 826adfc5217SJeff Kirsher static inline void bnx2x_del_all_napi(struct bnx2x *bp) 827adfc5217SJeff Kirsher { 828adfc5217SJeff Kirsher int i; 829adfc5217SJeff Kirsher 8308f20aa57SDmitry Kravkov for_each_eth_queue(bp, i) { 8318f20aa57SDmitry Kravkov napi_hash_del(&bnx2x_fp(bp, i, napi)); 832adfc5217SJeff Kirsher netif_napi_del(&bnx2x_fp(bp, i, napi)); 833adfc5217SJeff Kirsher } 8348f20aa57SDmitry Kravkov } 835adfc5217SJeff Kirsher 8361ab4434cSAriel Elior int bnx2x_set_int_mode(struct bnx2x *bp); 8370e8d2ec5SMerav Sicron 838adfc5217SJeff Kirsher static inline void bnx2x_disable_msi(struct bnx2x *bp) 839adfc5217SJeff Kirsher { 840adfc5217SJeff Kirsher if (bp->flags & USING_MSIX_FLAG) { 841adfc5217SJeff Kirsher pci_disable_msix(bp->pdev); 84230a5de77SDmitry Kravkov bp->flags &= ~(USING_MSIX_FLAG | USING_SINGLE_MSIX_FLAG); 843adfc5217SJeff Kirsher } else if (bp->flags & USING_MSI_FLAG) { 844adfc5217SJeff Kirsher pci_disable_msi(bp->pdev); 845adfc5217SJeff Kirsher bp->flags &= ~USING_MSI_FLAG; 846adfc5217SJeff Kirsher } 847adfc5217SJeff Kirsher } 848adfc5217SJeff Kirsher 849adfc5217SJeff Kirsher static inline void bnx2x_clear_sge_mask_next_elems(struct bnx2x_fastpath *fp) 850adfc5217SJeff Kirsher { 851adfc5217SJeff Kirsher int i, j; 852adfc5217SJeff Kirsher 853adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_SGE_PAGES; i++) { 854adfc5217SJeff Kirsher int idx = RX_SGE_CNT * i - 1; 855adfc5217SJeff Kirsher 856adfc5217SJeff Kirsher for (j = 0; j < 2; j++) { 857adfc5217SJeff Kirsher BIT_VEC64_CLEAR_BIT(fp->sge_mask, idx); 858adfc5217SJeff Kirsher idx--; 859adfc5217SJeff Kirsher } 860adfc5217SJeff Kirsher } 861adfc5217SJeff Kirsher } 862adfc5217SJeff Kirsher 863adfc5217SJeff Kirsher static inline void bnx2x_init_sge_ring_bit_mask(struct bnx2x_fastpath *fp) 864adfc5217SJeff Kirsher { 865adfc5217SJeff Kirsher /* Set the mask to all 1-s: it's faster to compare to 0 than to 0xf-s */ 866b3637827SDmitry Kravkov memset(fp->sge_mask, 0xff, sizeof(fp->sge_mask)); 867adfc5217SJeff Kirsher 868adfc5217SJeff Kirsher /* Clear the two last indices in the page to 1: 869adfc5217SJeff Kirsher these are the indices that correspond to the "next" element, 870adfc5217SJeff Kirsher hence will never be indicated and should be removed from 871adfc5217SJeff Kirsher the calculations. */ 872adfc5217SJeff Kirsher bnx2x_clear_sge_mask_next_elems(fp); 873adfc5217SJeff Kirsher } 874adfc5217SJeff Kirsher 875e52fcb24SEric Dumazet /* note that we are not allocating a new buffer, 876adfc5217SJeff Kirsher * we are just moving one from cons to prod 877adfc5217SJeff Kirsher * we are not creating a new mapping, 878adfc5217SJeff Kirsher * so there is no need to check for dma_mapping_error(). 879adfc5217SJeff Kirsher */ 880e52fcb24SEric Dumazet static inline void bnx2x_reuse_rx_data(struct bnx2x_fastpath *fp, 881adfc5217SJeff Kirsher u16 cons, u16 prod) 882adfc5217SJeff Kirsher { 883adfc5217SJeff Kirsher struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons]; 884adfc5217SJeff Kirsher struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod]; 885adfc5217SJeff Kirsher struct eth_rx_bd *cons_bd = &fp->rx_desc_ring[cons]; 886adfc5217SJeff Kirsher struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod]; 887adfc5217SJeff Kirsher 888adfc5217SJeff Kirsher dma_unmap_addr_set(prod_rx_buf, mapping, 889adfc5217SJeff Kirsher dma_unmap_addr(cons_rx_buf, mapping)); 890e52fcb24SEric Dumazet prod_rx_buf->data = cons_rx_buf->data; 891adfc5217SJeff Kirsher *prod_bd = *cons_bd; 892adfc5217SJeff Kirsher } 893adfc5217SJeff Kirsher 894adfc5217SJeff Kirsher /************************* Init ******************************************/ 895adfc5217SJeff Kirsher 896b475d78fSYuval Mintz /* returns func by VN for current port */ 897b475d78fSYuval Mintz static inline int func_by_vn(struct bnx2x *bp, int vn) 898b475d78fSYuval Mintz { 899b475d78fSYuval Mintz return 2 * vn + BP_PORT(bp); 900b475d78fSYuval Mintz } 901b475d78fSYuval Mintz 9025d317c6aSMerav Sicron static inline int bnx2x_config_rss_eth(struct bnx2x *bp, bool config_hash) 90396305234SDmitry Kravkov { 90460cad4e6SAriel Elior return bnx2x_rss(bp, &bp->rss_conf_obj, config_hash, true); 90596305234SDmitry Kravkov } 90696305234SDmitry Kravkov 907adfc5217SJeff Kirsher /** 908adfc5217SJeff Kirsher * bnx2x_func_start - init function 909adfc5217SJeff Kirsher * 910adfc5217SJeff Kirsher * @bp: driver handle 911adfc5217SJeff Kirsher * 912adfc5217SJeff Kirsher * Must be called before sending CLIENT_SETUP for the first client. 913adfc5217SJeff Kirsher */ 914adfc5217SJeff Kirsher static inline int bnx2x_func_start(struct bnx2x *bp) 915adfc5217SJeff Kirsher { 9163b603066SYuval Mintz struct bnx2x_func_state_params func_params = {NULL}; 917adfc5217SJeff Kirsher struct bnx2x_func_start_params *start_params = 918adfc5217SJeff Kirsher &func_params.params.start; 919adfc5217SJeff Kirsher 920adfc5217SJeff Kirsher /* Prepare parameters for function state transitions */ 921adfc5217SJeff Kirsher __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); 922adfc5217SJeff Kirsher 923adfc5217SJeff Kirsher func_params.f_obj = &bp->func_obj; 924adfc5217SJeff Kirsher func_params.cmd = BNX2X_F_CMD_START; 925adfc5217SJeff Kirsher 926adfc5217SJeff Kirsher /* Function parameters */ 927adfc5217SJeff Kirsher start_params->mf_mode = bp->mf_mode; 928adfc5217SJeff Kirsher start_params->sd_vlan_tag = bp->mf_ov; 9298d7b0278SAriel Elior 9308d7b0278SAriel Elior if (CHIP_IS_E2(bp) || CHIP_IS_E3(bp)) 931adfc5217SJeff Kirsher start_params->network_cos_mode = STATIC_COS; 9328d7b0278SAriel Elior else /* CHIP_IS_E1X */ 9338d7b0278SAriel Elior start_params->network_cos_mode = FW_WRR; 934adfc5217SJeff Kirsher 935e8c37affSDmitry Kravkov start_params->gre_tunnel_mode = L2GRE_TUNNEL; 9361bc277f7SDmitry Kravkov start_params->gre_tunnel_rss = GRE_INNER_HEADERS_RSS; 9371bc277f7SDmitry Kravkov 938adfc5217SJeff Kirsher return bnx2x_func_state_change(bp, &func_params); 939adfc5217SJeff Kirsher } 940adfc5217SJeff Kirsher 941adfc5217SJeff Kirsher /** 942adfc5217SJeff Kirsher * bnx2x_set_fw_mac_addr - fill in a MAC address in FW format 943adfc5217SJeff Kirsher * 944adfc5217SJeff Kirsher * @fw_hi: pointer to upper part 945adfc5217SJeff Kirsher * @fw_mid: pointer to middle part 946adfc5217SJeff Kirsher * @fw_lo: pointer to lower part 947adfc5217SJeff Kirsher * @mac: pointer to MAC address 948adfc5217SJeff Kirsher */ 94986564c3fSYuval Mintz static inline void bnx2x_set_fw_mac_addr(__le16 *fw_hi, __le16 *fw_mid, 95086564c3fSYuval Mintz __le16 *fw_lo, u8 *mac) 951adfc5217SJeff Kirsher { 952adfc5217SJeff Kirsher ((u8 *)fw_hi)[0] = mac[1]; 953adfc5217SJeff Kirsher ((u8 *)fw_hi)[1] = mac[0]; 954adfc5217SJeff Kirsher ((u8 *)fw_mid)[0] = mac[3]; 955adfc5217SJeff Kirsher ((u8 *)fw_mid)[1] = mac[2]; 956adfc5217SJeff Kirsher ((u8 *)fw_lo)[0] = mac[5]; 957adfc5217SJeff Kirsher ((u8 *)fw_lo)[1] = mac[4]; 958adfc5217SJeff Kirsher } 959adfc5217SJeff Kirsher 960adfc5217SJeff Kirsher static inline void bnx2x_free_rx_sge_range(struct bnx2x *bp, 961adfc5217SJeff Kirsher struct bnx2x_fastpath *fp, int last) 962adfc5217SJeff Kirsher { 963adfc5217SJeff Kirsher int i; 964adfc5217SJeff Kirsher 965adfc5217SJeff Kirsher if (fp->disable_tpa) 966adfc5217SJeff Kirsher return; 967adfc5217SJeff Kirsher 968adfc5217SJeff Kirsher for (i = 0; i < last; i++) 969adfc5217SJeff Kirsher bnx2x_free_rx_sge(bp, fp, i); 970adfc5217SJeff Kirsher } 971adfc5217SJeff Kirsher 972adfc5217SJeff Kirsher static inline void bnx2x_set_next_page_rx_bd(struct bnx2x_fastpath *fp) 973adfc5217SJeff Kirsher { 974adfc5217SJeff Kirsher int i; 975adfc5217SJeff Kirsher 976adfc5217SJeff Kirsher for (i = 1; i <= NUM_RX_RINGS; i++) { 977adfc5217SJeff Kirsher struct eth_rx_bd *rx_bd; 978adfc5217SJeff Kirsher 979adfc5217SJeff Kirsher rx_bd = &fp->rx_desc_ring[RX_DESC_CNT * i - 2]; 980adfc5217SJeff Kirsher rx_bd->addr_hi = 981adfc5217SJeff Kirsher cpu_to_le32(U64_HI(fp->rx_desc_mapping + 982adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 983adfc5217SJeff Kirsher rx_bd->addr_lo = 984adfc5217SJeff Kirsher cpu_to_le32(U64_LO(fp->rx_desc_mapping + 985adfc5217SJeff Kirsher BCM_PAGE_SIZE*(i % NUM_RX_RINGS))); 986adfc5217SJeff Kirsher } 987adfc5217SJeff Kirsher } 988adfc5217SJeff Kirsher 989adfc5217SJeff Kirsher /* Statistics ID are global per chip/path, while Client IDs for E1x are per 990adfc5217SJeff Kirsher * port. 991adfc5217SJeff Kirsher */ 992adfc5217SJeff Kirsher static inline u8 bnx2x_stats_id(struct bnx2x_fastpath *fp) 993adfc5217SJeff Kirsher { 994de5c3741SYuval Mintz struct bnx2x *bp = fp->bp; 995de5c3741SYuval Mintz if (!CHIP_IS_E1x(bp)) { 996de5c3741SYuval Mintz /* there are special statistics counters for FCoE 136..140 */ 997de5c3741SYuval Mintz if (IS_FCOE_FP(fp)) 998de5c3741SYuval Mintz return bp->cnic_base_cl_id + (bp->pf_num >> 1); 999adfc5217SJeff Kirsher return fp->cl_id; 1000de5c3741SYuval Mintz } 1001de5c3741SYuval Mintz return fp->cl_id + BP_PORT(bp) * FP_SB_MAX_E1x; 1002adfc5217SJeff Kirsher } 1003adfc5217SJeff Kirsher 1004adfc5217SJeff Kirsher static inline void bnx2x_init_vlan_mac_fp_objs(struct bnx2x_fastpath *fp, 1005adfc5217SJeff Kirsher bnx2x_obj_type obj_type) 1006adfc5217SJeff Kirsher { 1007adfc5217SJeff Kirsher struct bnx2x *bp = fp->bp; 1008adfc5217SJeff Kirsher 1009adfc5217SJeff Kirsher /* Configure classification DBs */ 101015192a8cSBarak Witkowski bnx2x_init_mac_obj(bp, &bnx2x_sp_obj(bp, fp).mac_obj, fp->cl_id, 101115192a8cSBarak Witkowski fp->cid, BP_FUNC(bp), bnx2x_sp(bp, mac_rdata), 1012adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mac_rdata), 1013adfc5217SJeff Kirsher BNX2X_FILTER_MAC_PENDING, 1014adfc5217SJeff Kirsher &bp->sp_state, obj_type, 1015adfc5217SJeff Kirsher &bp->macs_pool); 1016adfc5217SJeff Kirsher } 1017adfc5217SJeff Kirsher 1018adfc5217SJeff Kirsher /** 1019adfc5217SJeff Kirsher * bnx2x_get_path_func_num - get number of active functions 1020adfc5217SJeff Kirsher * 1021adfc5217SJeff Kirsher * @bp: driver handle 1022adfc5217SJeff Kirsher * 1023adfc5217SJeff Kirsher * Calculates the number of active (not hidden) functions on the 1024adfc5217SJeff Kirsher * current path. 1025adfc5217SJeff Kirsher */ 1026adfc5217SJeff Kirsher static inline u8 bnx2x_get_path_func_num(struct bnx2x *bp) 1027adfc5217SJeff Kirsher { 1028adfc5217SJeff Kirsher u8 func_num = 0, i; 1029adfc5217SJeff Kirsher 1030adfc5217SJeff Kirsher /* 57710 has only one function per-port */ 1031adfc5217SJeff Kirsher if (CHIP_IS_E1(bp)) 1032adfc5217SJeff Kirsher return 1; 1033adfc5217SJeff Kirsher 1034adfc5217SJeff Kirsher /* Calculate a number of functions enabled on the current 1035adfc5217SJeff Kirsher * PATH/PORT. 1036adfc5217SJeff Kirsher */ 1037adfc5217SJeff Kirsher if (CHIP_REV_IS_SLOW(bp)) { 1038adfc5217SJeff Kirsher if (IS_MF(bp)) 1039adfc5217SJeff Kirsher func_num = 4; 1040adfc5217SJeff Kirsher else 1041adfc5217SJeff Kirsher func_num = 2; 1042adfc5217SJeff Kirsher } else { 1043adfc5217SJeff Kirsher for (i = 0; i < E1H_FUNC_MAX / 2; i++) { 1044adfc5217SJeff Kirsher u32 func_config = 1045adfc5217SJeff Kirsher MF_CFG_RD(bp, 1046adfc5217SJeff Kirsher func_mf_config[BP_PORT(bp) + 2 * i]. 1047adfc5217SJeff Kirsher config); 1048adfc5217SJeff Kirsher func_num += 1049adfc5217SJeff Kirsher ((func_config & FUNC_MF_CFG_FUNC_HIDE) ? 0 : 1); 1050adfc5217SJeff Kirsher } 1051adfc5217SJeff Kirsher } 1052adfc5217SJeff Kirsher 1053adfc5217SJeff Kirsher WARN_ON(!func_num); 1054adfc5217SJeff Kirsher 1055adfc5217SJeff Kirsher return func_num; 1056adfc5217SJeff Kirsher } 1057adfc5217SJeff Kirsher 1058adfc5217SJeff Kirsher static inline void bnx2x_init_bp_objs(struct bnx2x *bp) 1059adfc5217SJeff Kirsher { 1060adfc5217SJeff Kirsher /* RX_MODE controlling object */ 1061adfc5217SJeff Kirsher bnx2x_init_rx_mode_obj(bp, &bp->rx_mode_obj); 1062adfc5217SJeff Kirsher 1063adfc5217SJeff Kirsher /* multicast configuration controlling object */ 1064adfc5217SJeff Kirsher bnx2x_init_mcast_obj(bp, &bp->mcast_obj, bp->fp->cl_id, bp->fp->cid, 1065adfc5217SJeff Kirsher BP_FUNC(bp), BP_FUNC(bp), 1066adfc5217SJeff Kirsher bnx2x_sp(bp, mcast_rdata), 1067adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, mcast_rdata), 1068adfc5217SJeff Kirsher BNX2X_FILTER_MCAST_PENDING, &bp->sp_state, 1069adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 1070adfc5217SJeff Kirsher 1071adfc5217SJeff Kirsher /* Setup CAM credit pools */ 1072adfc5217SJeff Kirsher bnx2x_init_mac_credit_pool(bp, &bp->macs_pool, BP_FUNC(bp), 1073adfc5217SJeff Kirsher bnx2x_get_path_func_num(bp)); 1074adfc5217SJeff Kirsher 1075b56e9670SAriel Elior bnx2x_init_vlan_credit_pool(bp, &bp->vlans_pool, BP_ABS_FUNC(bp)>>1, 1076b56e9670SAriel Elior bnx2x_get_path_func_num(bp)); 1077b56e9670SAriel Elior 1078adfc5217SJeff Kirsher /* RSS configuration object */ 1079adfc5217SJeff Kirsher bnx2x_init_rss_config_obj(bp, &bp->rss_conf_obj, bp->fp->cl_id, 1080adfc5217SJeff Kirsher bp->fp->cid, BP_FUNC(bp), BP_FUNC(bp), 1081adfc5217SJeff Kirsher bnx2x_sp(bp, rss_rdata), 1082adfc5217SJeff Kirsher bnx2x_sp_mapping(bp, rss_rdata), 1083adfc5217SJeff Kirsher BNX2X_FILTER_RSS_CONF_PENDING, &bp->sp_state, 1084adfc5217SJeff Kirsher BNX2X_OBJ_TYPE_RX); 1085adfc5217SJeff Kirsher } 1086adfc5217SJeff Kirsher 1087adfc5217SJeff Kirsher static inline u8 bnx2x_fp_qzone_id(struct bnx2x_fastpath *fp) 1088adfc5217SJeff Kirsher { 1089adfc5217SJeff Kirsher if (CHIP_IS_E1x(fp->bp)) 1090adfc5217SJeff Kirsher return fp->cl_id + BP_PORT(fp->bp) * ETH_MAX_RX_CLIENTS_E1H; 1091adfc5217SJeff Kirsher else 1092adfc5217SJeff Kirsher return fp->cl_id; 1093adfc5217SJeff Kirsher } 1094adfc5217SJeff Kirsher 1095adfc5217SJeff Kirsher static inline void bnx2x_init_txdata(struct bnx2x *bp, 109665565884SMerav Sicron struct bnx2x_fp_txdata *txdata, u32 cid, 109765565884SMerav Sicron int txq_index, __le16 *tx_cons_sb, 109865565884SMerav Sicron struct bnx2x_fastpath *fp) 1099adfc5217SJeff Kirsher { 1100adfc5217SJeff Kirsher txdata->cid = cid; 1101adfc5217SJeff Kirsher txdata->txq_index = txq_index; 1102adfc5217SJeff Kirsher txdata->tx_cons_sb = tx_cons_sb; 110365565884SMerav Sicron txdata->parent_fp = fp; 11047b5342d9SYuval Mintz txdata->tx_ring_size = IS_FCOE_FP(fp) ? MAX_TX_AVAIL : bp->tx_ring_size; 1105adfc5217SJeff Kirsher 110651c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "created tx data cid %d, txq %d\n", 1107adfc5217SJeff Kirsher txdata->cid, txdata->txq_index); 1108adfc5217SJeff Kirsher } 1109adfc5217SJeff Kirsher 1110adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_eth_cl_id(struct bnx2x *bp, u8 cl_idx) 1111adfc5217SJeff Kirsher { 1112adfc5217SJeff Kirsher return bp->cnic_base_cl_id + cl_idx + 11131805b2f0SDavid S. Miller (bp->pf_num >> 1) * BNX2X_MAX_CNIC_ETH_CL_ID_IDX; 1114adfc5217SJeff Kirsher } 1115adfc5217SJeff Kirsher 1116adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_fw_sb_id(struct bnx2x *bp) 1117adfc5217SJeff Kirsher { 1118adfc5217SJeff Kirsher /* the 'first' id is allocated for the cnic */ 1119adfc5217SJeff Kirsher return bp->base_fw_ndsb; 1120adfc5217SJeff Kirsher } 1121adfc5217SJeff Kirsher 1122adfc5217SJeff Kirsher static inline u8 bnx2x_cnic_igu_sb_id(struct bnx2x *bp) 1123adfc5217SJeff Kirsher { 1124adfc5217SJeff Kirsher return bp->igu_base_sb; 1125adfc5217SJeff Kirsher } 1126adfc5217SJeff Kirsher 1127adfc5217SJeff Kirsher static inline int bnx2x_clean_tx_queue(struct bnx2x *bp, 1128adfc5217SJeff Kirsher struct bnx2x_fp_txdata *txdata) 1129adfc5217SJeff Kirsher { 1130adfc5217SJeff Kirsher int cnt = 1000; 1131adfc5217SJeff Kirsher 1132adfc5217SJeff Kirsher while (bnx2x_has_tx_work_unload(txdata)) { 1133adfc5217SJeff Kirsher if (!cnt) { 113451c1a580SMerav Sicron BNX2X_ERR("timeout waiting for queue[%d]: txdata->tx_pkt_prod(%d) != txdata->tx_pkt_cons(%d)\n", 1135adfc5217SJeff Kirsher txdata->txq_index, txdata->tx_pkt_prod, 1136adfc5217SJeff Kirsher txdata->tx_pkt_cons); 1137adfc5217SJeff Kirsher #ifdef BNX2X_STOP_ON_ERROR 1138adfc5217SJeff Kirsher bnx2x_panic(); 1139adfc5217SJeff Kirsher return -EBUSY; 1140adfc5217SJeff Kirsher #else 1141adfc5217SJeff Kirsher break; 1142adfc5217SJeff Kirsher #endif 1143adfc5217SJeff Kirsher } 1144adfc5217SJeff Kirsher cnt--; 11450926d499SYuval Mintz usleep_range(1000, 2000); 1146adfc5217SJeff Kirsher } 1147adfc5217SJeff Kirsher 1148adfc5217SJeff Kirsher return 0; 1149adfc5217SJeff Kirsher } 1150adfc5217SJeff Kirsher 1151adfc5217SJeff Kirsher int bnx2x_get_link_cfg_idx(struct bnx2x *bp); 1152adfc5217SJeff Kirsher 1153adfc5217SJeff Kirsher static inline void __storm_memset_struct(struct bnx2x *bp, 1154adfc5217SJeff Kirsher u32 addr, size_t size, u32 *data) 1155adfc5217SJeff Kirsher { 1156adfc5217SJeff Kirsher int i; 1157adfc5217SJeff Kirsher for (i = 0; i < size/4; i++) 1158adfc5217SJeff Kirsher REG_WR(bp, addr + (i * 4), data[i]); 1159adfc5217SJeff Kirsher } 1160adfc5217SJeff Kirsher 1161adfc5217SJeff Kirsher /** 1162adfc5217SJeff Kirsher * bnx2x_wait_sp_comp - wait for the outstanding SP commands. 1163adfc5217SJeff Kirsher * 1164adfc5217SJeff Kirsher * @bp: driver handle 1165adfc5217SJeff Kirsher * @mask: bits that need to be cleared 1166adfc5217SJeff Kirsher */ 1167adfc5217SJeff Kirsher static inline bool bnx2x_wait_sp_comp(struct bnx2x *bp, unsigned long mask) 1168adfc5217SJeff Kirsher { 1169adfc5217SJeff Kirsher int tout = 5000; /* Wait for 5 secs tops */ 1170adfc5217SJeff Kirsher 1171adfc5217SJeff Kirsher while (tout--) { 1172adfc5217SJeff Kirsher smp_mb(); 1173adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1174adfc5217SJeff Kirsher if (!(bp->sp_state & mask)) { 1175adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1176adfc5217SJeff Kirsher return true; 1177adfc5217SJeff Kirsher } 1178adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1179adfc5217SJeff Kirsher 11800926d499SYuval Mintz usleep_range(1000, 2000); 1181adfc5217SJeff Kirsher } 1182adfc5217SJeff Kirsher 1183adfc5217SJeff Kirsher smp_mb(); 1184adfc5217SJeff Kirsher 1185adfc5217SJeff Kirsher netif_addr_lock_bh(bp->dev); 1186adfc5217SJeff Kirsher if (bp->sp_state & mask) { 118751c1a580SMerav Sicron BNX2X_ERR("Filtering completion timed out. sp_state 0x%lx, mask 0x%lx\n", 118851c1a580SMerav Sicron bp->sp_state, mask); 1189adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1190adfc5217SJeff Kirsher return false; 1191adfc5217SJeff Kirsher } 1192adfc5217SJeff Kirsher netif_addr_unlock_bh(bp->dev); 1193adfc5217SJeff Kirsher 1194adfc5217SJeff Kirsher return true; 1195adfc5217SJeff Kirsher } 1196adfc5217SJeff Kirsher 1197adfc5217SJeff Kirsher /** 1198adfc5217SJeff Kirsher * bnx2x_set_ctx_validation - set CDU context validation values 1199adfc5217SJeff Kirsher * 1200adfc5217SJeff Kirsher * @bp: driver handle 1201adfc5217SJeff Kirsher * @cxt: context of the connection on the host memory 1202adfc5217SJeff Kirsher * @cid: SW CID of the connection to be configured 1203adfc5217SJeff Kirsher */ 1204adfc5217SJeff Kirsher void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt, 1205adfc5217SJeff Kirsher u32 cid); 1206adfc5217SJeff Kirsher 1207adfc5217SJeff Kirsher void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id, 1208adfc5217SJeff Kirsher u8 sb_index, u8 disable, u16 usec); 1209adfc5217SJeff Kirsher void bnx2x_acquire_phy_lock(struct bnx2x *bp); 1210adfc5217SJeff Kirsher void bnx2x_release_phy_lock(struct bnx2x *bp); 1211adfc5217SJeff Kirsher 1212adfc5217SJeff Kirsher /** 1213adfc5217SJeff Kirsher * bnx2x_extract_max_cfg - extract MAX BW part from MF configuration. 1214adfc5217SJeff Kirsher * 1215adfc5217SJeff Kirsher * @bp: driver handle 1216adfc5217SJeff Kirsher * @mf_cfg: MF configuration 1217adfc5217SJeff Kirsher * 1218adfc5217SJeff Kirsher */ 1219adfc5217SJeff Kirsher static inline u16 bnx2x_extract_max_cfg(struct bnx2x *bp, u32 mf_cfg) 1220adfc5217SJeff Kirsher { 1221adfc5217SJeff Kirsher u16 max_cfg = (mf_cfg & FUNC_MF_CFG_MAX_BW_MASK) >> 1222adfc5217SJeff Kirsher FUNC_MF_CFG_MAX_BW_SHIFT; 1223adfc5217SJeff Kirsher if (!max_cfg) { 122451c1a580SMerav Sicron DP(NETIF_MSG_IFUP | BNX2X_MSG_ETHTOOL, 122596b0accbSMichal Schmidt "Max BW configured to 0 - using 100 instead\n"); 1226adfc5217SJeff Kirsher max_cfg = 100; 1227adfc5217SJeff Kirsher } 1228adfc5217SJeff Kirsher return max_cfg; 1229adfc5217SJeff Kirsher } 1230adfc5217SJeff Kirsher 1231621b4d66SDmitry Kravkov /* checks if HW supports GRO for given MTU */ 1232621b4d66SDmitry Kravkov static inline bool bnx2x_mtu_allows_gro(int mtu) 1233621b4d66SDmitry Kravkov { 1234621b4d66SDmitry Kravkov /* gro frags per page */ 1235621b4d66SDmitry Kravkov int fpp = SGE_PAGE_SIZE / (mtu - ETH_MAX_TPA_HEADER_SIZE); 1236621b4d66SDmitry Kravkov 1237621b4d66SDmitry Kravkov /* 123816a5fd92SYuval Mintz * 1. Number of frags should not grow above MAX_SKB_FRAGS 123916a5fd92SYuval Mintz * 2. Frag must fit the page 1240621b4d66SDmitry Kravkov */ 1241621b4d66SDmitry Kravkov return mtu <= SGE_PAGE_SIZE && (U_ETH_SGL_SIZE * fpp) <= MAX_SKB_FRAGS; 1242621b4d66SDmitry Kravkov } 124355c11941SMerav Sicron 12441355b704SMintz Yuval /** 1245b306f5edSDmitry Kravkov * bnx2x_get_iscsi_info - update iSCSI params according to licensing info. 1246b306f5edSDmitry Kravkov * 1247b306f5edSDmitry Kravkov * @bp: driver handle 1248b306f5edSDmitry Kravkov * 1249b306f5edSDmitry Kravkov */ 1250b306f5edSDmitry Kravkov void bnx2x_get_iscsi_info(struct bnx2x *bp); 125100253a8cSDmitry Kravkov 125200253a8cSDmitry Kravkov /** 125300253a8cSDmitry Kravkov * bnx2x_link_sync_notify - send notification to other functions. 125400253a8cSDmitry Kravkov * 125500253a8cSDmitry Kravkov * @bp: driver handle 125600253a8cSDmitry Kravkov * 125700253a8cSDmitry Kravkov */ 125800253a8cSDmitry Kravkov static inline void bnx2x_link_sync_notify(struct bnx2x *bp) 125900253a8cSDmitry Kravkov { 126000253a8cSDmitry Kravkov int func; 126100253a8cSDmitry Kravkov int vn; 126200253a8cSDmitry Kravkov 126300253a8cSDmitry Kravkov /* Set the attention towards other drivers on the same port */ 126400253a8cSDmitry Kravkov for (vn = VN_0; vn < BP_MAX_VN_NUM(bp); vn++) { 126500253a8cSDmitry Kravkov if (vn == BP_VN(bp)) 126600253a8cSDmitry Kravkov continue; 126700253a8cSDmitry Kravkov 126800253a8cSDmitry Kravkov func = func_by_vn(bp, vn); 126900253a8cSDmitry Kravkov REG_WR(bp, MISC_REG_AEU_GENERAL_ATTN_0 + 127000253a8cSDmitry Kravkov (LINK_SYNC_ATTENTION_BIT_FUNC_0 + func)*4, 1); 127100253a8cSDmitry Kravkov } 127200253a8cSDmitry Kravkov } 127300253a8cSDmitry Kravkov 127400253a8cSDmitry Kravkov /** 127500253a8cSDmitry Kravkov * bnx2x_update_drv_flags - update flags in shmem 127600253a8cSDmitry Kravkov * 127700253a8cSDmitry Kravkov * @bp: driver handle 127800253a8cSDmitry Kravkov * @flags: flags to update 127900253a8cSDmitry Kravkov * @set: set or clear 128000253a8cSDmitry Kravkov * 128100253a8cSDmitry Kravkov */ 128200253a8cSDmitry Kravkov static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set) 128300253a8cSDmitry Kravkov { 128400253a8cSDmitry Kravkov if (SHMEM2_HAS(bp, drv_flags)) { 128500253a8cSDmitry Kravkov u32 drv_flags; 1286f16da43bSAriel Elior bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 128700253a8cSDmitry Kravkov drv_flags = SHMEM2_RD(bp, drv_flags); 128800253a8cSDmitry Kravkov 128900253a8cSDmitry Kravkov if (set) 129000253a8cSDmitry Kravkov SET_FLAGS(drv_flags, flags); 129100253a8cSDmitry Kravkov else 129200253a8cSDmitry Kravkov RESET_FLAGS(drv_flags, flags); 129300253a8cSDmitry Kravkov 129400253a8cSDmitry Kravkov SHMEM2_WR(bp, drv_flags, drv_flags); 129551c1a580SMerav Sicron DP(NETIF_MSG_IFUP, "drv_flags 0x%08x\n", drv_flags); 1296f16da43bSAriel Elior bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_DRV_FLAGS); 129700253a8cSDmitry Kravkov } 129800253a8cSDmitry Kravkov } 129900253a8cSDmitry Kravkov 1300614c76dfSDmitry Kravkov static inline bool bnx2x_is_valid_ether_addr(struct bnx2x *bp, u8 *addr) 1301614c76dfSDmitry Kravkov { 130255c11941SMerav Sicron if (is_valid_ether_addr(addr) || 130355c11941SMerav Sicron (is_zero_ether_addr(addr) && 130455c11941SMerav Sicron (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)))) 1305614c76dfSDmitry Kravkov return true; 130655c11941SMerav Sicron 1307614c76dfSDmitry Kravkov return false; 1308614c76dfSDmitry Kravkov } 1309614c76dfSDmitry Kravkov 13108ca5e17eSAriel Elior /** 13112de67439SYuval Mintz * bnx2x_fill_fw_str - Fill buffer with FW version string 13128ca5e17eSAriel Elior * 13138ca5e17eSAriel Elior * @bp: driver handle 13148ca5e17eSAriel Elior * @buf: character buffer to fill with the fw name 13158ca5e17eSAriel Elior * @buf_len: length of the above buffer 13168ca5e17eSAriel Elior * 13178ca5e17eSAriel Elior */ 13188ca5e17eSAriel Elior void bnx2x_fill_fw_str(struct bnx2x *bp, char *buf, size_t buf_len); 13197fa6f340SYuval Mintz 13207fa6f340SYuval Mintz int bnx2x_drain_tx_queues(struct bnx2x *bp); 13217fa6f340SYuval Mintz void bnx2x_squeeze_objects(struct bnx2x *bp); 13227fa6f340SYuval Mintz 1323230bb0f3SYuval Mintz void bnx2x_schedule_sp_rtnl(struct bnx2x*, enum sp_rtnl_flag, 1324230bb0f3SYuval Mintz u32 verbose); 1325230bb0f3SYuval Mintz 1326adfc5217SJeff Kirsher #endif /* BNX2X_CMN_H */ 1327