1 /* 2 * Broadcom BCM7xxx System Port Ethernet MAC driver 3 * 4 * Copyright (C) 2014 Broadcom Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 13 #include <linux/init.h> 14 #include <linux/interrupt.h> 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/netdevice.h> 18 #include <linux/etherdevice.h> 19 #include <linux/platform_device.h> 20 #include <linux/of.h> 21 #include <linux/of_net.h> 22 #include <linux/of_mdio.h> 23 #include <linux/phy.h> 24 #include <linux/phy_fixed.h> 25 #include <net/dsa.h> 26 #include <net/ip.h> 27 #include <net/ipv6.h> 28 29 #include "bcmsysport.h" 30 31 /* I/O accessors register helpers */ 32 #define BCM_SYSPORT_IO_MACRO(name, offset) \ 33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \ 34 { \ 35 u32 reg = readl_relaxed(priv->base + offset + off); \ 36 return reg; \ 37 } \ 38 static inline void name##_writel(struct bcm_sysport_priv *priv, \ 39 u32 val, u32 off) \ 40 { \ 41 writel_relaxed(val, priv->base + offset + off); \ 42 } \ 43 44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET); 45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET); 46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET); 47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET); 48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET); 49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET); 50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET); 51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET); 52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET); 53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET); 54 55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact 56 * same layout, except it has been moved by 4 bytes up, *sigh* 57 */ 58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off) 59 { 60 if (priv->is_lite && off >= RDMA_STATUS) 61 off += 4; 62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off); 63 } 64 65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off) 66 { 67 if (priv->is_lite && off >= RDMA_STATUS) 68 off += 4; 69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off); 70 } 71 72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit) 73 { 74 if (!priv->is_lite) { 75 return BIT(bit); 76 } else { 77 if (bit >= ACB_ALGO) 78 return BIT(bit + 1); 79 else 80 return BIT(bit); 81 } 82 } 83 84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied 85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths. 86 */ 87 #define BCM_SYSPORT_INTR_L2(which) \ 88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \ 89 u32 mask) \ 90 { \ 91 priv->irq##which##_mask &= ~(mask); \ 92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \ 93 } \ 94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \ 95 u32 mask) \ 96 { \ 97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \ 98 priv->irq##which##_mask |= (mask); \ 99 } \ 100 101 BCM_SYSPORT_INTR_L2(0) 102 BCM_SYSPORT_INTR_L2(1) 103 104 /* Register accesses to GISB/RBUS registers are expensive (few hundred 105 * nanoseconds), so keep the check for 64-bits explicit here to save 106 * one register write per-packet on 32-bits platforms. 107 */ 108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv, 109 void __iomem *d, 110 dma_addr_t addr) 111 { 112 #ifdef CONFIG_PHYS_ADDR_T_64BIT 113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK, 114 d + DESC_ADDR_HI_STATUS_LEN); 115 #endif 116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO); 117 } 118 119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv, 120 struct dma_desc *desc, 121 unsigned int port) 122 { 123 /* Ports are latched, so write upper address first */ 124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port)); 125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port)); 126 } 127 128 /* Ethtool operations */ 129 static void bcm_sysport_set_rx_csum(struct net_device *dev, 130 netdev_features_t wanted) 131 { 132 struct bcm_sysport_priv *priv = netdev_priv(dev); 133 u32 reg; 134 135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM); 136 reg = rxchk_readl(priv, RXCHK_CONTROL); 137 if (priv->rx_chk_en) 138 reg |= RXCHK_EN; 139 else 140 reg &= ~RXCHK_EN; 141 142 /* If UniMAC forwards CRC, we need to skip over it to get 143 * a valid CHK bit to be set in the per-packet status word 144 */ 145 if (priv->rx_chk_en && priv->crc_fwd) 146 reg |= RXCHK_SKIP_FCS; 147 else 148 reg &= ~RXCHK_SKIP_FCS; 149 150 /* If Broadcom tags are enabled (e.g: using a switch), make 151 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom 152 * tag after the Ethernet MAC Source Address. 153 */ 154 if (netdev_uses_dsa(dev)) 155 reg |= RXCHK_BRCM_TAG_EN; 156 else 157 reg &= ~RXCHK_BRCM_TAG_EN; 158 159 rxchk_writel(priv, reg, RXCHK_CONTROL); 160 } 161 162 static void bcm_sysport_set_tx_csum(struct net_device *dev, 163 netdev_features_t wanted) 164 { 165 struct bcm_sysport_priv *priv = netdev_priv(dev); 166 u32 reg; 167 168 /* Hardware transmit checksum requires us to enable the Transmit status 169 * block prepended to the packet contents 170 */ 171 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)); 172 reg = tdma_readl(priv, TDMA_CONTROL); 173 if (priv->tsb_en) 174 reg |= tdma_control_bit(priv, TSB_EN); 175 else 176 reg &= ~tdma_control_bit(priv, TSB_EN); 177 tdma_writel(priv, reg, TDMA_CONTROL); 178 } 179 180 static int bcm_sysport_set_features(struct net_device *dev, 181 netdev_features_t features) 182 { 183 struct bcm_sysport_priv *priv = netdev_priv(dev); 184 185 /* Read CRC forward */ 186 if (!priv->is_lite) 187 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD); 188 else 189 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) & 190 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT); 191 192 bcm_sysport_set_rx_csum(dev, features); 193 bcm_sysport_set_tx_csum(dev, features); 194 195 return 0; 196 } 197 198 /* Hardware counters must be kept in sync because the order/offset 199 * is important here (order in structure declaration = order in hardware) 200 */ 201 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = { 202 /* general stats */ 203 STAT_NETDEV64(rx_packets), 204 STAT_NETDEV64(tx_packets), 205 STAT_NETDEV64(rx_bytes), 206 STAT_NETDEV64(tx_bytes), 207 STAT_NETDEV(rx_errors), 208 STAT_NETDEV(tx_errors), 209 STAT_NETDEV(rx_dropped), 210 STAT_NETDEV(tx_dropped), 211 STAT_NETDEV(multicast), 212 /* UniMAC RSV counters */ 213 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64), 214 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127), 215 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255), 216 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511), 217 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023), 218 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518), 219 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv), 220 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047), 221 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095), 222 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216), 223 STAT_MIB_RX("rx_pkts", mib.rx.pkt), 224 STAT_MIB_RX("rx_bytes", mib.rx.bytes), 225 STAT_MIB_RX("rx_multicast", mib.rx.mca), 226 STAT_MIB_RX("rx_broadcast", mib.rx.bca), 227 STAT_MIB_RX("rx_fcs", mib.rx.fcs), 228 STAT_MIB_RX("rx_control", mib.rx.cf), 229 STAT_MIB_RX("rx_pause", mib.rx.pf), 230 STAT_MIB_RX("rx_unknown", mib.rx.uo), 231 STAT_MIB_RX("rx_align", mib.rx.aln), 232 STAT_MIB_RX("rx_outrange", mib.rx.flr), 233 STAT_MIB_RX("rx_code", mib.rx.cde), 234 STAT_MIB_RX("rx_carrier", mib.rx.fcr), 235 STAT_MIB_RX("rx_oversize", mib.rx.ovr), 236 STAT_MIB_RX("rx_jabber", mib.rx.jbr), 237 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue), 238 STAT_MIB_RX("rx_good_pkts", mib.rx.pok), 239 STAT_MIB_RX("rx_unicast", mib.rx.uc), 240 STAT_MIB_RX("rx_ppp", mib.rx.ppp), 241 STAT_MIB_RX("rx_crc", mib.rx.rcrc), 242 /* UniMAC TSV counters */ 243 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64), 244 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127), 245 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255), 246 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511), 247 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023), 248 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518), 249 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv), 250 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047), 251 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095), 252 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216), 253 STAT_MIB_TX("tx_pkts", mib.tx.pkts), 254 STAT_MIB_TX("tx_multicast", mib.tx.mca), 255 STAT_MIB_TX("tx_broadcast", mib.tx.bca), 256 STAT_MIB_TX("tx_pause", mib.tx.pf), 257 STAT_MIB_TX("tx_control", mib.tx.cf), 258 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs), 259 STAT_MIB_TX("tx_oversize", mib.tx.ovr), 260 STAT_MIB_TX("tx_defer", mib.tx.drf), 261 STAT_MIB_TX("tx_excess_defer", mib.tx.edf), 262 STAT_MIB_TX("tx_single_col", mib.tx.scl), 263 STAT_MIB_TX("tx_multi_col", mib.tx.mcl), 264 STAT_MIB_TX("tx_late_col", mib.tx.lcl), 265 STAT_MIB_TX("tx_excess_col", mib.tx.ecl), 266 STAT_MIB_TX("tx_frags", mib.tx.frg), 267 STAT_MIB_TX("tx_total_col", mib.tx.ncl), 268 STAT_MIB_TX("tx_jabber", mib.tx.jbr), 269 STAT_MIB_TX("tx_bytes", mib.tx.bytes), 270 STAT_MIB_TX("tx_good_pkts", mib.tx.pok), 271 STAT_MIB_TX("tx_unicast", mib.tx.uc), 272 /* UniMAC RUNT counters */ 273 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt), 274 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs), 275 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align), 276 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes), 277 /* RXCHK misc statistics */ 278 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR), 279 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc, 280 RXCHK_OTHER_DISC_CNTR), 281 /* RBUF misc statistics */ 282 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR), 283 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR), 284 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), 285 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed), 286 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed), 287 STAT_MIB_SOFT("tx_realloc_tsb", mib.tx_realloc_tsb), 288 STAT_MIB_SOFT("tx_realloc_tsb_failed", mib.tx_realloc_tsb_failed), 289 /* Per TX-queue statistics are dynamically appended */ 290 }; 291 292 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats) 293 294 static void bcm_sysport_get_drvinfo(struct net_device *dev, 295 struct ethtool_drvinfo *info) 296 { 297 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); 298 strlcpy(info->version, "0.1", sizeof(info->version)); 299 strlcpy(info->bus_info, "platform", sizeof(info->bus_info)); 300 } 301 302 static u32 bcm_sysport_get_msglvl(struct net_device *dev) 303 { 304 struct bcm_sysport_priv *priv = netdev_priv(dev); 305 306 return priv->msg_enable; 307 } 308 309 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable) 310 { 311 struct bcm_sysport_priv *priv = netdev_priv(dev); 312 313 priv->msg_enable = enable; 314 } 315 316 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type) 317 { 318 switch (type) { 319 case BCM_SYSPORT_STAT_NETDEV: 320 case BCM_SYSPORT_STAT_NETDEV64: 321 case BCM_SYSPORT_STAT_RXCHK: 322 case BCM_SYSPORT_STAT_RBUF: 323 case BCM_SYSPORT_STAT_SOFT: 324 return true; 325 default: 326 return false; 327 } 328 } 329 330 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set) 331 { 332 struct bcm_sysport_priv *priv = netdev_priv(dev); 333 const struct bcm_sysport_stats *s; 334 unsigned int i, j; 335 336 switch (string_set) { 337 case ETH_SS_STATS: 338 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 339 s = &bcm_sysport_gstrings_stats[i]; 340 if (priv->is_lite && 341 !bcm_sysport_lite_stat_valid(s->type)) 342 continue; 343 j++; 344 } 345 /* Include per-queue statistics */ 346 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 347 default: 348 return -EOPNOTSUPP; 349 } 350 } 351 352 static void bcm_sysport_get_strings(struct net_device *dev, 353 u32 stringset, u8 *data) 354 { 355 struct bcm_sysport_priv *priv = netdev_priv(dev); 356 const struct bcm_sysport_stats *s; 357 char buf[128]; 358 int i, j; 359 360 switch (stringset) { 361 case ETH_SS_STATS: 362 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 363 s = &bcm_sysport_gstrings_stats[i]; 364 if (priv->is_lite && 365 !bcm_sysport_lite_stat_valid(s->type)) 366 continue; 367 368 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string, 369 ETH_GSTRING_LEN); 370 j++; 371 } 372 373 for (i = 0; i < dev->num_tx_queues; i++) { 374 snprintf(buf, sizeof(buf), "txq%d_packets", i); 375 memcpy(data + j * ETH_GSTRING_LEN, buf, 376 ETH_GSTRING_LEN); 377 j++; 378 379 snprintf(buf, sizeof(buf), "txq%d_bytes", i); 380 memcpy(data + j * ETH_GSTRING_LEN, buf, 381 ETH_GSTRING_LEN); 382 j++; 383 } 384 break; 385 default: 386 break; 387 } 388 } 389 390 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv) 391 { 392 int i, j = 0; 393 394 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 395 const struct bcm_sysport_stats *s; 396 u8 offset = 0; 397 u32 val = 0; 398 char *p; 399 400 s = &bcm_sysport_gstrings_stats[i]; 401 switch (s->type) { 402 case BCM_SYSPORT_STAT_NETDEV: 403 case BCM_SYSPORT_STAT_NETDEV64: 404 case BCM_SYSPORT_STAT_SOFT: 405 continue; 406 case BCM_SYSPORT_STAT_MIB_RX: 407 case BCM_SYSPORT_STAT_MIB_TX: 408 case BCM_SYSPORT_STAT_RUNT: 409 if (priv->is_lite) 410 continue; 411 412 if (s->type != BCM_SYSPORT_STAT_MIB_RX) 413 offset = UMAC_MIB_STAT_OFFSET; 414 val = umac_readl(priv, UMAC_MIB_START + j + offset); 415 break; 416 case BCM_SYSPORT_STAT_RXCHK: 417 val = rxchk_readl(priv, s->reg_offset); 418 if (val == ~0) 419 rxchk_writel(priv, 0, s->reg_offset); 420 break; 421 case BCM_SYSPORT_STAT_RBUF: 422 val = rbuf_readl(priv, s->reg_offset); 423 if (val == ~0) 424 rbuf_writel(priv, 0, s->reg_offset); 425 break; 426 } 427 428 j += s->stat_sizeof; 429 p = (char *)priv + s->stat_offset; 430 *(u32 *)p = val; 431 } 432 433 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n"); 434 } 435 436 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv, 437 u64 *tx_bytes, u64 *tx_packets) 438 { 439 struct bcm_sysport_tx_ring *ring; 440 u64 bytes = 0, packets = 0; 441 unsigned int start; 442 unsigned int q; 443 444 for (q = 0; q < priv->netdev->num_tx_queues; q++) { 445 ring = &priv->tx_rings[q]; 446 do { 447 start = u64_stats_fetch_begin_irq(&priv->syncp); 448 bytes = ring->bytes; 449 packets = ring->packets; 450 } while (u64_stats_fetch_retry_irq(&priv->syncp, start)); 451 452 *tx_bytes += bytes; 453 *tx_packets += packets; 454 } 455 } 456 457 static void bcm_sysport_get_stats(struct net_device *dev, 458 struct ethtool_stats *stats, u64 *data) 459 { 460 struct bcm_sysport_priv *priv = netdev_priv(dev); 461 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 462 struct u64_stats_sync *syncp = &priv->syncp; 463 struct bcm_sysport_tx_ring *ring; 464 u64 tx_bytes = 0, tx_packets = 0; 465 unsigned int start; 466 int i, j; 467 468 if (netif_running(dev)) { 469 bcm_sysport_update_mib_counters(priv); 470 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets); 471 stats64->tx_bytes = tx_bytes; 472 stats64->tx_packets = tx_packets; 473 } 474 475 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 476 const struct bcm_sysport_stats *s; 477 char *p; 478 479 s = &bcm_sysport_gstrings_stats[i]; 480 if (s->type == BCM_SYSPORT_STAT_NETDEV) 481 p = (char *)&dev->stats; 482 else if (s->type == BCM_SYSPORT_STAT_NETDEV64) 483 p = (char *)stats64; 484 else 485 p = (char *)priv; 486 487 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type)) 488 continue; 489 p += s->stat_offset; 490 491 if (s->stat_sizeof == sizeof(u64) && 492 s->type == BCM_SYSPORT_STAT_NETDEV64) { 493 do { 494 start = u64_stats_fetch_begin_irq(syncp); 495 data[i] = *(u64 *)p; 496 } while (u64_stats_fetch_retry_irq(syncp, start)); 497 } else 498 data[i] = *(u32 *)p; 499 j++; 500 } 501 502 /* For SYSTEMPORT Lite since we have holes in our statistics, j would 503 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it 504 * needs to point to how many total statistics we have minus the 505 * number of per TX queue statistics 506 */ 507 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) - 508 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 509 510 for (i = 0; i < dev->num_tx_queues; i++) { 511 ring = &priv->tx_rings[i]; 512 data[j] = ring->packets; 513 j++; 514 data[j] = ring->bytes; 515 j++; 516 } 517 } 518 519 static void bcm_sysport_get_wol(struct net_device *dev, 520 struct ethtool_wolinfo *wol) 521 { 522 struct bcm_sysport_priv *priv = netdev_priv(dev); 523 u32 reg; 524 525 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 526 wol->wolopts = priv->wolopts; 527 528 if (!(priv->wolopts & WAKE_MAGICSECURE)) 529 return; 530 531 /* Return the programmed SecureOn password */ 532 reg = umac_readl(priv, UMAC_PSW_MS); 533 put_unaligned_be16(reg, &wol->sopass[0]); 534 reg = umac_readl(priv, UMAC_PSW_LS); 535 put_unaligned_be32(reg, &wol->sopass[2]); 536 } 537 538 static int bcm_sysport_set_wol(struct net_device *dev, 539 struct ethtool_wolinfo *wol) 540 { 541 struct bcm_sysport_priv *priv = netdev_priv(dev); 542 struct device *kdev = &priv->pdev->dev; 543 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 544 545 if (!device_can_wakeup(kdev)) 546 return -ENOTSUPP; 547 548 if (wol->wolopts & ~supported) 549 return -EINVAL; 550 551 /* Program the SecureOn password */ 552 if (wol->wolopts & WAKE_MAGICSECURE) { 553 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]), 554 UMAC_PSW_MS); 555 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]), 556 UMAC_PSW_LS); 557 } 558 559 /* Flag the device and relevant IRQ as wakeup capable */ 560 if (wol->wolopts) { 561 device_set_wakeup_enable(kdev, 1); 562 if (priv->wol_irq_disabled) 563 enable_irq_wake(priv->wol_irq); 564 priv->wol_irq_disabled = 0; 565 } else { 566 device_set_wakeup_enable(kdev, 0); 567 /* Avoid unbalanced disable_irq_wake calls */ 568 if (!priv->wol_irq_disabled) 569 disable_irq_wake(priv->wol_irq); 570 priv->wol_irq_disabled = 1; 571 } 572 573 priv->wolopts = wol->wolopts; 574 575 return 0; 576 } 577 578 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv, 579 u32 usecs, u32 pkts) 580 { 581 u32 reg; 582 583 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 584 reg &= ~(RDMA_INTR_THRESH_MASK | 585 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT); 586 reg |= pkts; 587 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT; 588 rdma_writel(priv, reg, RDMA_MBDONE_INTR); 589 } 590 591 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring, 592 struct ethtool_coalesce *ec) 593 { 594 struct bcm_sysport_priv *priv = ring->priv; 595 u32 reg; 596 597 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 598 reg &= ~(RING_INTR_THRESH_MASK | 599 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT); 600 reg |= ec->tx_max_coalesced_frames; 601 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) << 602 RING_TIMEOUT_SHIFT; 603 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 604 } 605 606 static int bcm_sysport_get_coalesce(struct net_device *dev, 607 struct ethtool_coalesce *ec) 608 { 609 struct bcm_sysport_priv *priv = netdev_priv(dev); 610 u32 reg; 611 612 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0)); 613 614 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000; 615 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK; 616 617 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 618 619 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000; 620 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK; 621 ec->use_adaptive_rx_coalesce = priv->dim.use_dim; 622 623 return 0; 624 } 625 626 static int bcm_sysport_set_coalesce(struct net_device *dev, 627 struct ethtool_coalesce *ec) 628 { 629 struct bcm_sysport_priv *priv = netdev_priv(dev); 630 struct net_dim_cq_moder moder; 631 u32 usecs, pkts; 632 unsigned int i; 633 634 /* Base system clock is 125Mhz, DMA timeout is this reference clock 635 * divided by 1024, which yield roughly 8.192 us, our maximum value has 636 * to fit in the RING_TIMEOUT_MASK (16 bits). 637 */ 638 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK || 639 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 || 640 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK || 641 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1) 642 return -EINVAL; 643 644 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) || 645 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0) || 646 ec->use_adaptive_tx_coalesce) 647 return -EINVAL; 648 649 for (i = 0; i < dev->num_tx_queues; i++) 650 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec); 651 652 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs; 653 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames; 654 usecs = priv->rx_coalesce_usecs; 655 pkts = priv->rx_max_coalesced_frames; 656 657 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) { 658 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode); 659 usecs = moder.usec; 660 pkts = moder.pkts; 661 } 662 663 priv->dim.use_dim = ec->use_adaptive_rx_coalesce; 664 665 /* Apply desired coalescing parameters */ 666 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 667 668 return 0; 669 } 670 671 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb) 672 { 673 dev_consume_skb_any(cb->skb); 674 cb->skb = NULL; 675 dma_unmap_addr_set(cb, dma_addr, 0); 676 } 677 678 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv, 679 struct bcm_sysport_cb *cb) 680 { 681 struct device *kdev = &priv->pdev->dev; 682 struct net_device *ndev = priv->netdev; 683 struct sk_buff *skb, *rx_skb; 684 dma_addr_t mapping; 685 686 /* Allocate a new SKB for a new packet */ 687 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH); 688 if (!skb) { 689 priv->mib.alloc_rx_buff_failed++; 690 netif_err(priv, rx_err, ndev, "SKB alloc failed\n"); 691 return NULL; 692 } 693 694 mapping = dma_map_single(kdev, skb->data, 695 RX_BUF_LENGTH, DMA_FROM_DEVICE); 696 if (dma_mapping_error(kdev, mapping)) { 697 priv->mib.rx_dma_failed++; 698 dev_kfree_skb_any(skb); 699 netif_err(priv, rx_err, ndev, "DMA mapping failure\n"); 700 return NULL; 701 } 702 703 /* Grab the current SKB on the ring */ 704 rx_skb = cb->skb; 705 if (likely(rx_skb)) 706 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 707 RX_BUF_LENGTH, DMA_FROM_DEVICE); 708 709 /* Put the new SKB on the ring */ 710 cb->skb = skb; 711 dma_unmap_addr_set(cb, dma_addr, mapping); 712 dma_desc_set_addr(priv, cb->bd_addr, mapping); 713 714 netif_dbg(priv, rx_status, ndev, "RX refill\n"); 715 716 /* Return the current SKB to the caller */ 717 return rx_skb; 718 } 719 720 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv) 721 { 722 struct bcm_sysport_cb *cb; 723 struct sk_buff *skb; 724 unsigned int i; 725 726 for (i = 0; i < priv->num_rx_bds; i++) { 727 cb = &priv->rx_cbs[i]; 728 skb = bcm_sysport_rx_refill(priv, cb); 729 if (skb) 730 dev_kfree_skb(skb); 731 if (!cb->skb) 732 return -ENOMEM; 733 } 734 735 return 0; 736 } 737 738 /* Poll the hardware for up to budget packets to process */ 739 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv, 740 unsigned int budget) 741 { 742 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 743 struct net_device *ndev = priv->netdev; 744 unsigned int processed = 0, to_process; 745 unsigned int processed_bytes = 0; 746 struct bcm_sysport_cb *cb; 747 struct sk_buff *skb; 748 unsigned int p_index; 749 u16 len, status; 750 struct bcm_rsb *rsb; 751 752 /* Clear status before servicing to reduce spurious interrupts */ 753 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR); 754 755 /* Determine how much we should process since last call, SYSTEMPORT Lite 756 * groups the producer and consumer indexes into the same 32-bit 757 * which we access using RDMA_CONS_INDEX 758 */ 759 if (!priv->is_lite) 760 p_index = rdma_readl(priv, RDMA_PROD_INDEX); 761 else 762 p_index = rdma_readl(priv, RDMA_CONS_INDEX); 763 p_index &= RDMA_PROD_INDEX_MASK; 764 765 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK; 766 767 netif_dbg(priv, rx_status, ndev, 768 "p_index=%d rx_c_index=%d to_process=%d\n", 769 p_index, priv->rx_c_index, to_process); 770 771 while ((processed < to_process) && (processed < budget)) { 772 cb = &priv->rx_cbs[priv->rx_read_ptr]; 773 skb = bcm_sysport_rx_refill(priv, cb); 774 775 776 /* We do not have a backing SKB, so we do not a corresponding 777 * DMA mapping for this incoming packet since 778 * bcm_sysport_rx_refill always either has both skb and mapping 779 * or none. 780 */ 781 if (unlikely(!skb)) { 782 netif_err(priv, rx_err, ndev, "out of memory!\n"); 783 ndev->stats.rx_dropped++; 784 ndev->stats.rx_errors++; 785 goto next; 786 } 787 788 /* Extract the Receive Status Block prepended */ 789 rsb = (struct bcm_rsb *)skb->data; 790 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK; 791 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) & 792 DESC_STATUS_MASK; 793 794 netif_dbg(priv, rx_status, ndev, 795 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n", 796 p_index, priv->rx_c_index, priv->rx_read_ptr, 797 len, status); 798 799 if (unlikely(len > RX_BUF_LENGTH)) { 800 netif_err(priv, rx_status, ndev, "oversized packet\n"); 801 ndev->stats.rx_length_errors++; 802 ndev->stats.rx_errors++; 803 dev_kfree_skb_any(skb); 804 goto next; 805 } 806 807 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) { 808 netif_err(priv, rx_status, ndev, "fragmented packet!\n"); 809 ndev->stats.rx_dropped++; 810 ndev->stats.rx_errors++; 811 dev_kfree_skb_any(skb); 812 goto next; 813 } 814 815 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) { 816 netif_err(priv, rx_err, ndev, "error packet\n"); 817 if (status & RX_STATUS_OVFLOW) 818 ndev->stats.rx_over_errors++; 819 ndev->stats.rx_dropped++; 820 ndev->stats.rx_errors++; 821 dev_kfree_skb_any(skb); 822 goto next; 823 } 824 825 skb_put(skb, len); 826 827 /* Hardware validated our checksum */ 828 if (likely(status & DESC_L4_CSUM)) 829 skb->ip_summed = CHECKSUM_UNNECESSARY; 830 831 /* Hardware pre-pends packets with 2bytes before Ethernet 832 * header plus we have the Receive Status Block, strip off all 833 * of this from the SKB. 834 */ 835 skb_pull(skb, sizeof(*rsb) + 2); 836 len -= (sizeof(*rsb) + 2); 837 processed_bytes += len; 838 839 /* UniMAC may forward CRC */ 840 if (priv->crc_fwd) { 841 skb_trim(skb, len - ETH_FCS_LEN); 842 len -= ETH_FCS_LEN; 843 } 844 845 skb->protocol = eth_type_trans(skb, ndev); 846 ndev->stats.rx_packets++; 847 ndev->stats.rx_bytes += len; 848 u64_stats_update_begin(&priv->syncp); 849 stats64->rx_packets++; 850 stats64->rx_bytes += len; 851 u64_stats_update_end(&priv->syncp); 852 853 napi_gro_receive(&priv->napi, skb); 854 next: 855 processed++; 856 priv->rx_read_ptr++; 857 858 if (priv->rx_read_ptr == priv->num_rx_bds) 859 priv->rx_read_ptr = 0; 860 } 861 862 priv->dim.packets = processed; 863 priv->dim.bytes = processed_bytes; 864 865 return processed; 866 } 867 868 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring, 869 struct bcm_sysport_cb *cb, 870 unsigned int *bytes_compl, 871 unsigned int *pkts_compl) 872 { 873 struct bcm_sysport_priv *priv = ring->priv; 874 struct device *kdev = &priv->pdev->dev; 875 876 if (cb->skb) { 877 *bytes_compl += cb->skb->len; 878 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 879 dma_unmap_len(cb, dma_len), 880 DMA_TO_DEVICE); 881 (*pkts_compl)++; 882 bcm_sysport_free_cb(cb); 883 /* SKB fragment */ 884 } else if (dma_unmap_addr(cb, dma_addr)) { 885 *bytes_compl += dma_unmap_len(cb, dma_len); 886 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr), 887 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE); 888 dma_unmap_addr_set(cb, dma_addr, 0); 889 } 890 } 891 892 /* Reclaim queued SKBs for transmission completion, lockless version */ 893 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 894 struct bcm_sysport_tx_ring *ring) 895 { 896 unsigned int pkts_compl = 0, bytes_compl = 0; 897 struct net_device *ndev = priv->netdev; 898 unsigned int txbds_processed = 0; 899 struct bcm_sysport_cb *cb; 900 unsigned int txbds_ready; 901 unsigned int c_index; 902 u32 hw_ind; 903 904 /* Clear status before servicing to reduce spurious interrupts */ 905 if (!ring->priv->is_lite) 906 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR); 907 else 908 intrl2_0_writel(ring->priv, BIT(ring->index + 909 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR); 910 911 /* Compute how many descriptors have been processed since last call */ 912 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index)); 913 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK; 914 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK; 915 916 netif_dbg(priv, tx_done, ndev, 917 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n", 918 ring->index, ring->c_index, c_index, txbds_ready); 919 920 while (txbds_processed < txbds_ready) { 921 cb = &ring->cbs[ring->clean_index]; 922 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl); 923 924 ring->desc_count++; 925 txbds_processed++; 926 927 if (likely(ring->clean_index < ring->size - 1)) 928 ring->clean_index++; 929 else 930 ring->clean_index = 0; 931 } 932 933 u64_stats_update_begin(&priv->syncp); 934 ring->packets += pkts_compl; 935 ring->bytes += bytes_compl; 936 u64_stats_update_end(&priv->syncp); 937 938 ring->c_index = c_index; 939 940 netif_dbg(priv, tx_done, ndev, 941 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n", 942 ring->index, ring->c_index, pkts_compl, bytes_compl); 943 944 return pkts_compl; 945 } 946 947 /* Locked version of the per-ring TX reclaim routine */ 948 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 949 struct bcm_sysport_tx_ring *ring) 950 { 951 struct netdev_queue *txq; 952 unsigned int released; 953 unsigned long flags; 954 955 txq = netdev_get_tx_queue(priv->netdev, ring->index); 956 957 spin_lock_irqsave(&ring->lock, flags); 958 released = __bcm_sysport_tx_reclaim(priv, ring); 959 if (released) 960 netif_tx_wake_queue(txq); 961 962 spin_unlock_irqrestore(&ring->lock, flags); 963 964 return released; 965 } 966 967 /* Locked version of the per-ring TX reclaim, but does not wake the queue */ 968 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv, 969 struct bcm_sysport_tx_ring *ring) 970 { 971 unsigned long flags; 972 973 spin_lock_irqsave(&ring->lock, flags); 974 __bcm_sysport_tx_reclaim(priv, ring); 975 spin_unlock_irqrestore(&ring->lock, flags); 976 } 977 978 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget) 979 { 980 struct bcm_sysport_tx_ring *ring = 981 container_of(napi, struct bcm_sysport_tx_ring, napi); 982 unsigned int work_done = 0; 983 984 work_done = bcm_sysport_tx_reclaim(ring->priv, ring); 985 986 if (work_done == 0) { 987 napi_complete(napi); 988 /* re-enable TX interrupt */ 989 if (!ring->priv->is_lite) 990 intrl2_1_mask_clear(ring->priv, BIT(ring->index)); 991 else 992 intrl2_0_mask_clear(ring->priv, BIT(ring->index + 993 INTRL2_0_TDMA_MBDONE_SHIFT)); 994 995 return 0; 996 } 997 998 return budget; 999 } 1000 1001 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv) 1002 { 1003 unsigned int q; 1004 1005 for (q = 0; q < priv->netdev->num_tx_queues; q++) 1006 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]); 1007 } 1008 1009 static int bcm_sysport_poll(struct napi_struct *napi, int budget) 1010 { 1011 struct bcm_sysport_priv *priv = 1012 container_of(napi, struct bcm_sysport_priv, napi); 1013 struct net_dim_sample dim_sample; 1014 unsigned int work_done = 0; 1015 1016 work_done = bcm_sysport_desc_rx(priv, budget); 1017 1018 priv->rx_c_index += work_done; 1019 priv->rx_c_index &= RDMA_CONS_INDEX_MASK; 1020 1021 /* SYSTEMPORT Lite groups the producer/consumer index, producer is 1022 * maintained by HW, but writes to it will be ignore while RDMA 1023 * is active 1024 */ 1025 if (!priv->is_lite) 1026 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX); 1027 else 1028 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX); 1029 1030 if (work_done < budget) { 1031 napi_complete_done(napi, work_done); 1032 /* re-enable RX interrupts */ 1033 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE); 1034 } 1035 1036 if (priv->dim.use_dim) { 1037 net_dim_sample(priv->dim.event_ctr, priv->dim.packets, 1038 priv->dim.bytes, &dim_sample); 1039 net_dim(&priv->dim.dim, dim_sample); 1040 } 1041 1042 return work_done; 1043 } 1044 1045 static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable) 1046 { 1047 u32 reg, bit; 1048 1049 reg = umac_readl(priv, UMAC_MPD_CTRL); 1050 if (enable) 1051 reg |= MPD_EN; 1052 else 1053 reg &= ~MPD_EN; 1054 umac_writel(priv, reg, UMAC_MPD_CTRL); 1055 1056 if (priv->is_lite) 1057 bit = RBUF_ACPI_EN_LITE; 1058 else 1059 bit = RBUF_ACPI_EN; 1060 1061 reg = rbuf_readl(priv, RBUF_CONTROL); 1062 if (enable) 1063 reg |= bit; 1064 else 1065 reg &= ~bit; 1066 rbuf_writel(priv, reg, RBUF_CONTROL); 1067 } 1068 1069 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv) 1070 { 1071 u32 reg; 1072 1073 /* Disable RXCHK, active filters and Broadcom tag matching */ 1074 reg = rxchk_readl(priv, RXCHK_CONTROL); 1075 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 1076 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN); 1077 rxchk_writel(priv, reg, RXCHK_CONTROL); 1078 1079 /* Clear the MagicPacket detection logic */ 1080 mpd_enable_set(priv, false); 1081 1082 reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS); 1083 if (reg & INTRL2_0_MPD) 1084 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n"); 1085 1086 if (reg & INTRL2_0_BRCM_MATCH_TAG) { 1087 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) & 1088 RXCHK_BRCM_TAG_MATCH_MASK; 1089 netdev_info(priv->netdev, 1090 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg); 1091 } 1092 1093 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n"); 1094 } 1095 1096 static void bcm_sysport_dim_work(struct work_struct *work) 1097 { 1098 struct net_dim *dim = container_of(work, struct net_dim, work); 1099 struct bcm_sysport_net_dim *ndim = 1100 container_of(dim, struct bcm_sysport_net_dim, dim); 1101 struct bcm_sysport_priv *priv = 1102 container_of(ndim, struct bcm_sysport_priv, dim); 1103 struct net_dim_cq_moder cur_profile = 1104 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1105 1106 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts); 1107 dim->state = NET_DIM_START_MEASURE; 1108 } 1109 1110 /* RX and misc interrupt routine */ 1111 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id) 1112 { 1113 struct net_device *dev = dev_id; 1114 struct bcm_sysport_priv *priv = netdev_priv(dev); 1115 struct bcm_sysport_tx_ring *txr; 1116 unsigned int ring, ring_bit; 1117 1118 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) & 1119 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); 1120 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); 1121 1122 if (unlikely(priv->irq0_stat == 0)) { 1123 netdev_warn(priv->netdev, "spurious RX interrupt\n"); 1124 return IRQ_NONE; 1125 } 1126 1127 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) { 1128 priv->dim.event_ctr++; 1129 if (likely(napi_schedule_prep(&priv->napi))) { 1130 /* disable RX interrupts */ 1131 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE); 1132 __napi_schedule_irqoff(&priv->napi); 1133 } 1134 } 1135 1136 /* TX ring is full, perform a full reclaim since we do not know 1137 * which one would trigger this interrupt 1138 */ 1139 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL) 1140 bcm_sysport_tx_reclaim_all(priv); 1141 1142 if (!priv->is_lite) 1143 goto out; 1144 1145 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1146 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT); 1147 if (!(priv->irq0_stat & ring_bit)) 1148 continue; 1149 1150 txr = &priv->tx_rings[ring]; 1151 1152 if (likely(napi_schedule_prep(&txr->napi))) { 1153 intrl2_0_mask_set(priv, ring_bit); 1154 __napi_schedule(&txr->napi); 1155 } 1156 } 1157 out: 1158 return IRQ_HANDLED; 1159 } 1160 1161 /* TX interrupt service routine */ 1162 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id) 1163 { 1164 struct net_device *dev = dev_id; 1165 struct bcm_sysport_priv *priv = netdev_priv(dev); 1166 struct bcm_sysport_tx_ring *txr; 1167 unsigned int ring; 1168 1169 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) & 1170 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS); 1171 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1172 1173 if (unlikely(priv->irq1_stat == 0)) { 1174 netdev_warn(priv->netdev, "spurious TX interrupt\n"); 1175 return IRQ_NONE; 1176 } 1177 1178 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1179 if (!(priv->irq1_stat & BIT(ring))) 1180 continue; 1181 1182 txr = &priv->tx_rings[ring]; 1183 1184 if (likely(napi_schedule_prep(&txr->napi))) { 1185 intrl2_1_mask_set(priv, BIT(ring)); 1186 __napi_schedule_irqoff(&txr->napi); 1187 } 1188 } 1189 1190 return IRQ_HANDLED; 1191 } 1192 1193 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id) 1194 { 1195 struct bcm_sysport_priv *priv = dev_id; 1196 1197 pm_wakeup_event(&priv->pdev->dev, 0); 1198 1199 return IRQ_HANDLED; 1200 } 1201 1202 #ifdef CONFIG_NET_POLL_CONTROLLER 1203 static void bcm_sysport_poll_controller(struct net_device *dev) 1204 { 1205 struct bcm_sysport_priv *priv = netdev_priv(dev); 1206 1207 disable_irq(priv->irq0); 1208 bcm_sysport_rx_isr(priv->irq0, priv); 1209 enable_irq(priv->irq0); 1210 1211 if (!priv->is_lite) { 1212 disable_irq(priv->irq1); 1213 bcm_sysport_tx_isr(priv->irq1, priv); 1214 enable_irq(priv->irq1); 1215 } 1216 } 1217 #endif 1218 1219 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb, 1220 struct net_device *dev) 1221 { 1222 struct bcm_sysport_priv *priv = netdev_priv(dev); 1223 struct sk_buff *nskb; 1224 struct bcm_tsb *tsb; 1225 u32 csum_info; 1226 u8 ip_proto; 1227 u16 csum_start; 1228 __be16 ip_ver; 1229 1230 /* Re-allocate SKB if needed */ 1231 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) { 1232 nskb = skb_realloc_headroom(skb, sizeof(*tsb)); 1233 if (!nskb) { 1234 dev_kfree_skb_any(skb); 1235 priv->mib.tx_realloc_tsb_failed++; 1236 dev->stats.tx_errors++; 1237 dev->stats.tx_dropped++; 1238 return NULL; 1239 } 1240 dev_consume_skb_any(skb); 1241 skb = nskb; 1242 priv->mib.tx_realloc_tsb++; 1243 } 1244 1245 tsb = skb_push(skb, sizeof(*tsb)); 1246 /* Zero-out TSB by default */ 1247 memset(tsb, 0, sizeof(*tsb)); 1248 1249 if (skb->ip_summed == CHECKSUM_PARTIAL) { 1250 ip_ver = skb->protocol; 1251 switch (ip_ver) { 1252 case htons(ETH_P_IP): 1253 ip_proto = ip_hdr(skb)->protocol; 1254 break; 1255 case htons(ETH_P_IPV6): 1256 ip_proto = ipv6_hdr(skb)->nexthdr; 1257 break; 1258 default: 1259 return skb; 1260 } 1261 1262 /* Get the checksum offset and the L4 (transport) offset */ 1263 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb); 1264 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK; 1265 csum_info |= (csum_start << L4_PTR_SHIFT); 1266 1267 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) { 1268 csum_info |= L4_LENGTH_VALID; 1269 if (ip_proto == IPPROTO_UDP && 1270 ip_ver == htons(ETH_P_IP)) 1271 csum_info |= L4_UDP; 1272 } else { 1273 csum_info = 0; 1274 } 1275 1276 tsb->l4_ptr_dest_map = csum_info; 1277 } 1278 1279 return skb; 1280 } 1281 1282 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb, 1283 struct net_device *dev) 1284 { 1285 struct bcm_sysport_priv *priv = netdev_priv(dev); 1286 struct device *kdev = &priv->pdev->dev; 1287 struct bcm_sysport_tx_ring *ring; 1288 struct bcm_sysport_cb *cb; 1289 struct netdev_queue *txq; 1290 struct dma_desc *desc; 1291 unsigned int skb_len; 1292 unsigned long flags; 1293 dma_addr_t mapping; 1294 u32 len_status; 1295 u16 queue; 1296 int ret; 1297 1298 queue = skb_get_queue_mapping(skb); 1299 txq = netdev_get_tx_queue(dev, queue); 1300 ring = &priv->tx_rings[queue]; 1301 1302 /* lock against tx reclaim in BH context and TX ring full interrupt */ 1303 spin_lock_irqsave(&ring->lock, flags); 1304 if (unlikely(ring->desc_count == 0)) { 1305 netif_tx_stop_queue(txq); 1306 netdev_err(dev, "queue %d awake and ring full!\n", queue); 1307 ret = NETDEV_TX_BUSY; 1308 goto out; 1309 } 1310 1311 /* Insert TSB and checksum infos */ 1312 if (priv->tsb_en) { 1313 skb = bcm_sysport_insert_tsb(skb, dev); 1314 if (!skb) { 1315 ret = NETDEV_TX_OK; 1316 goto out; 1317 } 1318 } 1319 1320 skb_len = skb->len; 1321 1322 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); 1323 if (dma_mapping_error(kdev, mapping)) { 1324 priv->mib.tx_dma_failed++; 1325 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n", 1326 skb->data, skb_len); 1327 ret = NETDEV_TX_OK; 1328 goto out; 1329 } 1330 1331 /* Remember the SKB for future freeing */ 1332 cb = &ring->cbs[ring->curr_desc]; 1333 cb->skb = skb; 1334 dma_unmap_addr_set(cb, dma_addr, mapping); 1335 dma_unmap_len_set(cb, dma_len, skb_len); 1336 1337 /* Fetch a descriptor entry from our pool */ 1338 desc = ring->desc_cpu; 1339 1340 desc->addr_lo = lower_32_bits(mapping); 1341 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK; 1342 len_status |= (skb_len << DESC_LEN_SHIFT); 1343 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) << 1344 DESC_STATUS_SHIFT; 1345 if (skb->ip_summed == CHECKSUM_PARTIAL) 1346 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT); 1347 1348 ring->curr_desc++; 1349 if (ring->curr_desc == ring->size) 1350 ring->curr_desc = 0; 1351 ring->desc_count--; 1352 1353 /* Ensure write completion of the descriptor status/length 1354 * in DRAM before the System Port WRITE_PORT register latches 1355 * the value 1356 */ 1357 wmb(); 1358 desc->addr_status_len = len_status; 1359 wmb(); 1360 1361 /* Write this descriptor address to the RING write port */ 1362 tdma_port_write_desc_addr(priv, desc, ring->index); 1363 1364 /* Check ring space and update SW control flow */ 1365 if (ring->desc_count == 0) 1366 netif_tx_stop_queue(txq); 1367 1368 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n", 1369 ring->index, ring->desc_count, ring->curr_desc); 1370 1371 ret = NETDEV_TX_OK; 1372 out: 1373 spin_unlock_irqrestore(&ring->lock, flags); 1374 return ret; 1375 } 1376 1377 static void bcm_sysport_tx_timeout(struct net_device *dev) 1378 { 1379 netdev_warn(dev, "transmit timeout!\n"); 1380 1381 netif_trans_update(dev); 1382 dev->stats.tx_errors++; 1383 1384 netif_tx_wake_all_queues(dev); 1385 } 1386 1387 /* phylib adjust link callback */ 1388 static void bcm_sysport_adj_link(struct net_device *dev) 1389 { 1390 struct bcm_sysport_priv *priv = netdev_priv(dev); 1391 struct phy_device *phydev = dev->phydev; 1392 unsigned int changed = 0; 1393 u32 cmd_bits = 0, reg; 1394 1395 if (priv->old_link != phydev->link) { 1396 changed = 1; 1397 priv->old_link = phydev->link; 1398 } 1399 1400 if (priv->old_duplex != phydev->duplex) { 1401 changed = 1; 1402 priv->old_duplex = phydev->duplex; 1403 } 1404 1405 if (priv->is_lite) 1406 goto out; 1407 1408 switch (phydev->speed) { 1409 case SPEED_2500: 1410 cmd_bits = CMD_SPEED_2500; 1411 break; 1412 case SPEED_1000: 1413 cmd_bits = CMD_SPEED_1000; 1414 break; 1415 case SPEED_100: 1416 cmd_bits = CMD_SPEED_100; 1417 break; 1418 case SPEED_10: 1419 cmd_bits = CMD_SPEED_10; 1420 break; 1421 default: 1422 break; 1423 } 1424 cmd_bits <<= CMD_SPEED_SHIFT; 1425 1426 if (phydev->duplex == DUPLEX_HALF) 1427 cmd_bits |= CMD_HD_EN; 1428 1429 if (priv->old_pause != phydev->pause) { 1430 changed = 1; 1431 priv->old_pause = phydev->pause; 1432 } 1433 1434 if (!phydev->pause) 1435 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE; 1436 1437 if (!changed) 1438 return; 1439 1440 if (phydev->link) { 1441 reg = umac_readl(priv, UMAC_CMD); 1442 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) | 1443 CMD_HD_EN | CMD_RX_PAUSE_IGNORE | 1444 CMD_TX_PAUSE_IGNORE); 1445 reg |= cmd_bits; 1446 umac_writel(priv, reg, UMAC_CMD); 1447 } 1448 out: 1449 if (changed) 1450 phy_print_status(phydev); 1451 } 1452 1453 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv, 1454 void (*cb)(struct work_struct *work)) 1455 { 1456 struct bcm_sysport_net_dim *dim = &priv->dim; 1457 1458 INIT_WORK(&dim->dim.work, cb); 1459 dim->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE; 1460 dim->event_ctr = 0; 1461 dim->packets = 0; 1462 dim->bytes = 0; 1463 } 1464 1465 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv) 1466 { 1467 struct bcm_sysport_net_dim *dim = &priv->dim; 1468 struct net_dim_cq_moder moder; 1469 u32 usecs, pkts; 1470 1471 usecs = priv->rx_coalesce_usecs; 1472 pkts = priv->rx_max_coalesced_frames; 1473 1474 /* If DIM was enabled, re-apply default parameters */ 1475 if (dim->use_dim) { 1476 moder = net_dim_get_def_rx_moderation(dim->dim.mode); 1477 usecs = moder.usec; 1478 pkts = moder.pkts; 1479 } 1480 1481 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 1482 } 1483 1484 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv, 1485 unsigned int index) 1486 { 1487 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1488 struct device *kdev = &priv->pdev->dev; 1489 size_t size; 1490 void *p; 1491 u32 reg; 1492 1493 /* Simple descriptors partitioning for now */ 1494 size = 256; 1495 1496 /* We just need one DMA descriptor which is DMA-able, since writing to 1497 * the port will allocate a new descriptor in its internal linked-list 1498 */ 1499 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma, 1500 GFP_KERNEL); 1501 if (!p) { 1502 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n"); 1503 return -ENOMEM; 1504 } 1505 1506 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL); 1507 if (!ring->cbs) { 1508 dma_free_coherent(kdev, sizeof(struct dma_desc), 1509 ring->desc_cpu, ring->desc_dma); 1510 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1511 return -ENOMEM; 1512 } 1513 1514 /* Initialize SW view of the ring */ 1515 spin_lock_init(&ring->lock); 1516 ring->priv = priv; 1517 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64); 1518 ring->index = index; 1519 ring->size = size; 1520 ring->clean_index = 0; 1521 ring->alloc_size = ring->size; 1522 ring->desc_cpu = p; 1523 ring->desc_count = ring->size; 1524 ring->curr_desc = 0; 1525 1526 /* Initialize HW ring */ 1527 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index)); 1528 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index)); 1529 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index)); 1530 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index)); 1531 1532 /* Configure QID and port mapping */ 1533 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index)); 1534 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT); 1535 if (ring->inspect) { 1536 reg |= ring->switch_queue & RING_QID_MASK; 1537 reg |= ring->switch_port << RING_PORT_ID_SHIFT; 1538 } else { 1539 reg |= RING_IGNORE_STATUS; 1540 } 1541 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index)); 1542 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index)); 1543 1544 /* Enable ACB algorithm 2 */ 1545 reg = tdma_readl(priv, TDMA_CONTROL); 1546 reg |= tdma_control_bit(priv, ACB_ALGO); 1547 tdma_writel(priv, reg, TDMA_CONTROL); 1548 1549 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides 1550 * with the original definition of ACB_ALGO 1551 */ 1552 reg = tdma_readl(priv, TDMA_CONTROL); 1553 if (priv->is_lite) 1554 reg &= ~BIT(TSB_SWAP1); 1555 /* Set a correct TSB format based on host endian */ 1556 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1557 reg |= tdma_control_bit(priv, TSB_SWAP0); 1558 else 1559 reg &= ~tdma_control_bit(priv, TSB_SWAP0); 1560 tdma_writel(priv, reg, TDMA_CONTROL); 1561 1562 /* Program the number of descriptors as MAX_THRESHOLD and half of 1563 * its size for the hysteresis trigger 1564 */ 1565 tdma_writel(priv, ring->size | 1566 1 << RING_HYST_THRESH_SHIFT, 1567 TDMA_DESC_RING_MAX_HYST(index)); 1568 1569 /* Enable the ring queue in the arbiter */ 1570 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN); 1571 reg |= (1 << index); 1572 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN); 1573 1574 napi_enable(&ring->napi); 1575 1576 netif_dbg(priv, hw, priv->netdev, 1577 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n", 1578 ring->size, ring->desc_cpu, ring->switch_queue, 1579 ring->switch_port); 1580 1581 return 0; 1582 } 1583 1584 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv, 1585 unsigned int index) 1586 { 1587 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1588 struct device *kdev = &priv->pdev->dev; 1589 u32 reg; 1590 1591 /* Caller should stop the TDMA engine */ 1592 reg = tdma_readl(priv, TDMA_STATUS); 1593 if (!(reg & TDMA_DISABLED)) 1594 netdev_warn(priv->netdev, "TDMA not stopped!\n"); 1595 1596 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could 1597 * fail, so by checking this pointer we know whether the TX ring was 1598 * fully initialized or not. 1599 */ 1600 if (!ring->cbs) 1601 return; 1602 1603 napi_disable(&ring->napi); 1604 netif_napi_del(&ring->napi); 1605 1606 bcm_sysport_tx_clean(priv, ring); 1607 1608 kfree(ring->cbs); 1609 ring->cbs = NULL; 1610 1611 if (ring->desc_dma) { 1612 dma_free_coherent(kdev, sizeof(struct dma_desc), 1613 ring->desc_cpu, ring->desc_dma); 1614 ring->desc_dma = 0; 1615 } 1616 ring->size = 0; 1617 ring->alloc_size = 0; 1618 1619 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n"); 1620 } 1621 1622 /* RDMA helper */ 1623 static inline int rdma_enable_set(struct bcm_sysport_priv *priv, 1624 unsigned int enable) 1625 { 1626 unsigned int timeout = 1000; 1627 u32 reg; 1628 1629 reg = rdma_readl(priv, RDMA_CONTROL); 1630 if (enable) 1631 reg |= RDMA_EN; 1632 else 1633 reg &= ~RDMA_EN; 1634 rdma_writel(priv, reg, RDMA_CONTROL); 1635 1636 /* Poll for RMDA disabling completion */ 1637 do { 1638 reg = rdma_readl(priv, RDMA_STATUS); 1639 if (!!(reg & RDMA_DISABLED) == !enable) 1640 return 0; 1641 usleep_range(1000, 2000); 1642 } while (timeout-- > 0); 1643 1644 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n"); 1645 1646 return -ETIMEDOUT; 1647 } 1648 1649 /* TDMA helper */ 1650 static inline int tdma_enable_set(struct bcm_sysport_priv *priv, 1651 unsigned int enable) 1652 { 1653 unsigned int timeout = 1000; 1654 u32 reg; 1655 1656 reg = tdma_readl(priv, TDMA_CONTROL); 1657 if (enable) 1658 reg |= tdma_control_bit(priv, TDMA_EN); 1659 else 1660 reg &= ~tdma_control_bit(priv, TDMA_EN); 1661 tdma_writel(priv, reg, TDMA_CONTROL); 1662 1663 /* Poll for TMDA disabling completion */ 1664 do { 1665 reg = tdma_readl(priv, TDMA_STATUS); 1666 if (!!(reg & TDMA_DISABLED) == !enable) 1667 return 0; 1668 1669 usleep_range(1000, 2000); 1670 } while (timeout-- > 0); 1671 1672 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n"); 1673 1674 return -ETIMEDOUT; 1675 } 1676 1677 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv) 1678 { 1679 struct bcm_sysport_cb *cb; 1680 u32 reg; 1681 int ret; 1682 int i; 1683 1684 /* Initialize SW view of the RX ring */ 1685 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC; 1686 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET; 1687 priv->rx_c_index = 0; 1688 priv->rx_read_ptr = 0; 1689 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb), 1690 GFP_KERNEL); 1691 if (!priv->rx_cbs) { 1692 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1693 return -ENOMEM; 1694 } 1695 1696 for (i = 0; i < priv->num_rx_bds; i++) { 1697 cb = priv->rx_cbs + i; 1698 cb->bd_addr = priv->rx_bds + i * DESC_SIZE; 1699 } 1700 1701 ret = bcm_sysport_alloc_rx_bufs(priv); 1702 if (ret) { 1703 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n"); 1704 return ret; 1705 } 1706 1707 /* Initialize HW, ensure RDMA is disabled */ 1708 reg = rdma_readl(priv, RDMA_STATUS); 1709 if (!(reg & RDMA_DISABLED)) 1710 rdma_enable_set(priv, 0); 1711 1712 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO); 1713 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI); 1714 rdma_writel(priv, 0, RDMA_PROD_INDEX); 1715 rdma_writel(priv, 0, RDMA_CONS_INDEX); 1716 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT | 1717 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE); 1718 /* Operate the queue in ring mode */ 1719 rdma_writel(priv, 0, RDMA_START_ADDR_HI); 1720 rdma_writel(priv, 0, RDMA_START_ADDR_LO); 1721 rdma_writel(priv, 0, RDMA_END_ADDR_HI); 1722 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO); 1723 1724 netif_dbg(priv, hw, priv->netdev, 1725 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n", 1726 priv->num_rx_bds, priv->rx_bds); 1727 1728 return 0; 1729 } 1730 1731 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv) 1732 { 1733 struct bcm_sysport_cb *cb; 1734 unsigned int i; 1735 u32 reg; 1736 1737 /* Caller should ensure RDMA is disabled */ 1738 reg = rdma_readl(priv, RDMA_STATUS); 1739 if (!(reg & RDMA_DISABLED)) 1740 netdev_warn(priv->netdev, "RDMA not stopped!\n"); 1741 1742 for (i = 0; i < priv->num_rx_bds; i++) { 1743 cb = &priv->rx_cbs[i]; 1744 if (dma_unmap_addr(cb, dma_addr)) 1745 dma_unmap_single(&priv->pdev->dev, 1746 dma_unmap_addr(cb, dma_addr), 1747 RX_BUF_LENGTH, DMA_FROM_DEVICE); 1748 bcm_sysport_free_cb(cb); 1749 } 1750 1751 kfree(priv->rx_cbs); 1752 priv->rx_cbs = NULL; 1753 1754 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n"); 1755 } 1756 1757 static void bcm_sysport_set_rx_mode(struct net_device *dev) 1758 { 1759 struct bcm_sysport_priv *priv = netdev_priv(dev); 1760 u32 reg; 1761 1762 if (priv->is_lite) 1763 return; 1764 1765 reg = umac_readl(priv, UMAC_CMD); 1766 if (dev->flags & IFF_PROMISC) 1767 reg |= CMD_PROMISC; 1768 else 1769 reg &= ~CMD_PROMISC; 1770 umac_writel(priv, reg, UMAC_CMD); 1771 1772 /* No support for ALLMULTI */ 1773 if (dev->flags & IFF_ALLMULTI) 1774 return; 1775 } 1776 1777 static inline void umac_enable_set(struct bcm_sysport_priv *priv, 1778 u32 mask, unsigned int enable) 1779 { 1780 u32 reg; 1781 1782 if (!priv->is_lite) { 1783 reg = umac_readl(priv, UMAC_CMD); 1784 if (enable) 1785 reg |= mask; 1786 else 1787 reg &= ~mask; 1788 umac_writel(priv, reg, UMAC_CMD); 1789 } else { 1790 reg = gib_readl(priv, GIB_CONTROL); 1791 if (enable) 1792 reg |= mask; 1793 else 1794 reg &= ~mask; 1795 gib_writel(priv, reg, GIB_CONTROL); 1796 } 1797 1798 /* UniMAC stops on a packet boundary, wait for a full-sized packet 1799 * to be processed (1 msec). 1800 */ 1801 if (enable == 0) 1802 usleep_range(1000, 2000); 1803 } 1804 1805 static inline void umac_reset(struct bcm_sysport_priv *priv) 1806 { 1807 u32 reg; 1808 1809 if (priv->is_lite) 1810 return; 1811 1812 reg = umac_readl(priv, UMAC_CMD); 1813 reg |= CMD_SW_RESET; 1814 umac_writel(priv, reg, UMAC_CMD); 1815 udelay(10); 1816 reg = umac_readl(priv, UMAC_CMD); 1817 reg &= ~CMD_SW_RESET; 1818 umac_writel(priv, reg, UMAC_CMD); 1819 } 1820 1821 static void umac_set_hw_addr(struct bcm_sysport_priv *priv, 1822 unsigned char *addr) 1823 { 1824 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | 1825 addr[3]; 1826 u32 mac1 = (addr[4] << 8) | addr[5]; 1827 1828 if (!priv->is_lite) { 1829 umac_writel(priv, mac0, UMAC_MAC0); 1830 umac_writel(priv, mac1, UMAC_MAC1); 1831 } else { 1832 gib_writel(priv, mac0, GIB_MAC0); 1833 gib_writel(priv, mac1, GIB_MAC1); 1834 } 1835 } 1836 1837 static void topctrl_flush(struct bcm_sysport_priv *priv) 1838 { 1839 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 1840 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 1841 mdelay(1); 1842 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 1843 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 1844 } 1845 1846 static int bcm_sysport_change_mac(struct net_device *dev, void *p) 1847 { 1848 struct bcm_sysport_priv *priv = netdev_priv(dev); 1849 struct sockaddr *addr = p; 1850 1851 if (!is_valid_ether_addr(addr->sa_data)) 1852 return -EINVAL; 1853 1854 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 1855 1856 /* interface is disabled, changes to MAC will be reflected on next 1857 * open call 1858 */ 1859 if (!netif_running(dev)) 1860 return 0; 1861 1862 umac_set_hw_addr(priv, dev->dev_addr); 1863 1864 return 0; 1865 } 1866 1867 static void bcm_sysport_get_stats64(struct net_device *dev, 1868 struct rtnl_link_stats64 *stats) 1869 { 1870 struct bcm_sysport_priv *priv = netdev_priv(dev); 1871 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 1872 unsigned int start; 1873 1874 netdev_stats_to_stats64(stats, &dev->stats); 1875 1876 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes, 1877 &stats->tx_packets); 1878 1879 do { 1880 start = u64_stats_fetch_begin_irq(&priv->syncp); 1881 stats->rx_packets = stats64->rx_packets; 1882 stats->rx_bytes = stats64->rx_bytes; 1883 } while (u64_stats_fetch_retry_irq(&priv->syncp, start)); 1884 } 1885 1886 static void bcm_sysport_netif_start(struct net_device *dev) 1887 { 1888 struct bcm_sysport_priv *priv = netdev_priv(dev); 1889 1890 /* Enable NAPI */ 1891 bcm_sysport_init_dim(priv, bcm_sysport_dim_work); 1892 bcm_sysport_init_rx_coalesce(priv); 1893 napi_enable(&priv->napi); 1894 1895 /* Enable RX interrupt and TX ring full interrupt */ 1896 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 1897 1898 phy_start(dev->phydev); 1899 1900 /* Enable TX interrupts for the TXQs */ 1901 if (!priv->is_lite) 1902 intrl2_1_mask_clear(priv, 0xffffffff); 1903 else 1904 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK); 1905 1906 /* Last call before we start the real business */ 1907 netif_tx_start_all_queues(dev); 1908 } 1909 1910 static void rbuf_init(struct bcm_sysport_priv *priv) 1911 { 1912 u32 reg; 1913 1914 reg = rbuf_readl(priv, RBUF_CONTROL); 1915 reg |= RBUF_4B_ALGN | RBUF_RSB_EN; 1916 /* Set a correct RSB format on SYSTEMPORT Lite */ 1917 if (priv->is_lite) 1918 reg &= ~RBUF_RSB_SWAP1; 1919 1920 /* Set a correct RSB format based on host endian */ 1921 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1922 reg |= RBUF_RSB_SWAP0; 1923 else 1924 reg &= ~RBUF_RSB_SWAP0; 1925 rbuf_writel(priv, reg, RBUF_CONTROL); 1926 } 1927 1928 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv) 1929 { 1930 intrl2_0_mask_set(priv, 0xffffffff); 1931 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1932 if (!priv->is_lite) { 1933 intrl2_1_mask_set(priv, 0xffffffff); 1934 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1935 } 1936 } 1937 1938 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv) 1939 { 1940 u32 reg; 1941 1942 reg = gib_readl(priv, GIB_CONTROL); 1943 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */ 1944 if (netdev_uses_dsa(priv->netdev)) { 1945 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT); 1946 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT; 1947 } 1948 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT); 1949 reg |= 12 << GIB_IPG_LEN_SHIFT; 1950 gib_writel(priv, reg, GIB_CONTROL); 1951 } 1952 1953 static int bcm_sysport_open(struct net_device *dev) 1954 { 1955 struct bcm_sysport_priv *priv = netdev_priv(dev); 1956 struct phy_device *phydev; 1957 unsigned int i; 1958 int ret; 1959 1960 /* Reset UniMAC */ 1961 umac_reset(priv); 1962 1963 /* Flush TX and RX FIFOs at TOPCTRL level */ 1964 topctrl_flush(priv); 1965 1966 /* Disable the UniMAC RX/TX */ 1967 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 1968 1969 /* Enable RBUF 2bytes alignment and Receive Status Block */ 1970 rbuf_init(priv); 1971 1972 /* Set maximum frame length */ 1973 if (!priv->is_lite) 1974 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 1975 else 1976 gib_set_pad_extension(priv); 1977 1978 /* Apply features again in case we changed them while interface was 1979 * down 1980 */ 1981 bcm_sysport_set_features(dev, dev->features); 1982 1983 /* Set MAC address */ 1984 umac_set_hw_addr(priv, dev->dev_addr); 1985 1986 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link, 1987 0, priv->phy_interface); 1988 if (!phydev) { 1989 netdev_err(dev, "could not attach to PHY\n"); 1990 return -ENODEV; 1991 } 1992 1993 /* Reset house keeping link status */ 1994 priv->old_duplex = -1; 1995 priv->old_link = -1; 1996 priv->old_pause = -1; 1997 1998 /* mask all interrupts and request them */ 1999 bcm_sysport_mask_all_intrs(priv); 2000 2001 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev); 2002 if (ret) { 2003 netdev_err(dev, "failed to request RX interrupt\n"); 2004 goto out_phy_disconnect; 2005 } 2006 2007 if (!priv->is_lite) { 2008 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, 2009 dev->name, dev); 2010 if (ret) { 2011 netdev_err(dev, "failed to request TX interrupt\n"); 2012 goto out_free_irq0; 2013 } 2014 } 2015 2016 /* Initialize both hardware and software ring */ 2017 for (i = 0; i < dev->num_tx_queues; i++) { 2018 ret = bcm_sysport_init_tx_ring(priv, i); 2019 if (ret) { 2020 netdev_err(dev, "failed to initialize TX ring %d\n", 2021 i); 2022 goto out_free_tx_ring; 2023 } 2024 } 2025 2026 /* Initialize linked-list */ 2027 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2028 2029 /* Initialize RX ring */ 2030 ret = bcm_sysport_init_rx_ring(priv); 2031 if (ret) { 2032 netdev_err(dev, "failed to initialize RX ring\n"); 2033 goto out_free_rx_ring; 2034 } 2035 2036 /* Turn on RDMA */ 2037 ret = rdma_enable_set(priv, 1); 2038 if (ret) 2039 goto out_free_rx_ring; 2040 2041 /* Turn on TDMA */ 2042 ret = tdma_enable_set(priv, 1); 2043 if (ret) 2044 goto out_clear_rx_int; 2045 2046 /* Turn on UniMAC TX/RX */ 2047 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1); 2048 2049 bcm_sysport_netif_start(dev); 2050 2051 return 0; 2052 2053 out_clear_rx_int: 2054 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 2055 out_free_rx_ring: 2056 bcm_sysport_fini_rx_ring(priv); 2057 out_free_tx_ring: 2058 for (i = 0; i < dev->num_tx_queues; i++) 2059 bcm_sysport_fini_tx_ring(priv, i); 2060 if (!priv->is_lite) 2061 free_irq(priv->irq1, dev); 2062 out_free_irq0: 2063 free_irq(priv->irq0, dev); 2064 out_phy_disconnect: 2065 phy_disconnect(phydev); 2066 return ret; 2067 } 2068 2069 static void bcm_sysport_netif_stop(struct net_device *dev) 2070 { 2071 struct bcm_sysport_priv *priv = netdev_priv(dev); 2072 2073 /* stop all software from updating hardware */ 2074 netif_tx_stop_all_queues(dev); 2075 napi_disable(&priv->napi); 2076 cancel_work_sync(&priv->dim.dim.work); 2077 phy_stop(dev->phydev); 2078 2079 /* mask all interrupts */ 2080 bcm_sysport_mask_all_intrs(priv); 2081 } 2082 2083 static int bcm_sysport_stop(struct net_device *dev) 2084 { 2085 struct bcm_sysport_priv *priv = netdev_priv(dev); 2086 unsigned int i; 2087 int ret; 2088 2089 bcm_sysport_netif_stop(dev); 2090 2091 /* Disable UniMAC RX */ 2092 umac_enable_set(priv, CMD_RX_EN, 0); 2093 2094 ret = tdma_enable_set(priv, 0); 2095 if (ret) { 2096 netdev_err(dev, "timeout disabling RDMA\n"); 2097 return ret; 2098 } 2099 2100 /* Wait for a maximum packet size to be drained */ 2101 usleep_range(2000, 3000); 2102 2103 ret = rdma_enable_set(priv, 0); 2104 if (ret) { 2105 netdev_err(dev, "timeout disabling TDMA\n"); 2106 return ret; 2107 } 2108 2109 /* Disable UniMAC TX */ 2110 umac_enable_set(priv, CMD_TX_EN, 0); 2111 2112 /* Free RX/TX rings SW structures */ 2113 for (i = 0; i < dev->num_tx_queues; i++) 2114 bcm_sysport_fini_tx_ring(priv, i); 2115 bcm_sysport_fini_rx_ring(priv); 2116 2117 free_irq(priv->irq0, dev); 2118 if (!priv->is_lite) 2119 free_irq(priv->irq1, dev); 2120 2121 /* Disconnect from PHY */ 2122 phy_disconnect(dev->phydev); 2123 2124 return 0; 2125 } 2126 2127 static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv, 2128 u64 location) 2129 { 2130 unsigned int index; 2131 u32 reg; 2132 2133 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2134 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2135 reg >>= RXCHK_BRCM_TAG_CID_SHIFT; 2136 reg &= RXCHK_BRCM_TAG_CID_MASK; 2137 if (reg == location) 2138 return index; 2139 } 2140 2141 return -EINVAL; 2142 } 2143 2144 static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv, 2145 struct ethtool_rxnfc *nfc) 2146 { 2147 int index; 2148 2149 /* This is not a rule that we know about */ 2150 index = bcm_sysport_rule_find(priv, nfc->fs.location); 2151 if (index < 0) 2152 return -EOPNOTSUPP; 2153 2154 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE; 2155 2156 return 0; 2157 } 2158 2159 static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv, 2160 struct ethtool_rxnfc *nfc) 2161 { 2162 unsigned int index; 2163 u32 reg; 2164 2165 /* We cannot match locations greater than what the classification ID 2166 * permits (256 entries) 2167 */ 2168 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK) 2169 return -E2BIG; 2170 2171 /* We cannot support flows that are not destined for a wake-up */ 2172 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE) 2173 return -EOPNOTSUPP; 2174 2175 /* All filters are already in use, we cannot match more rules */ 2176 if (bitmap_weight(priv->filters, RXCHK_BRCM_TAG_MAX) == 2177 RXCHK_BRCM_TAG_MAX) 2178 return -ENOSPC; 2179 2180 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX); 2181 if (index > RXCHK_BRCM_TAG_MAX) 2182 return -ENOSPC; 2183 2184 /* Location is the classification ID, and index is the position 2185 * within one of our 8 possible filters to be programmed 2186 */ 2187 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2188 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT); 2189 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT; 2190 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index)); 2191 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 2192 2193 set_bit(index, priv->filters); 2194 2195 return 0; 2196 } 2197 2198 static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv, 2199 u64 location) 2200 { 2201 int index; 2202 2203 /* This is not a rule that we know about */ 2204 index = bcm_sysport_rule_find(priv, location); 2205 if (index < 0) 2206 return -EOPNOTSUPP; 2207 2208 /* No need to disable this filter if it was enabled, this will 2209 * be taken care of during suspend time by bcm_sysport_suspend_to_wol 2210 */ 2211 clear_bit(index, priv->filters); 2212 2213 return 0; 2214 } 2215 2216 static int bcm_sysport_get_rxnfc(struct net_device *dev, 2217 struct ethtool_rxnfc *nfc, u32 *rule_locs) 2218 { 2219 struct bcm_sysport_priv *priv = netdev_priv(dev); 2220 int ret = -EOPNOTSUPP; 2221 2222 switch (nfc->cmd) { 2223 case ETHTOOL_GRXCLSRULE: 2224 ret = bcm_sysport_rule_get(priv, nfc); 2225 break; 2226 default: 2227 break; 2228 } 2229 2230 return ret; 2231 } 2232 2233 static int bcm_sysport_set_rxnfc(struct net_device *dev, 2234 struct ethtool_rxnfc *nfc) 2235 { 2236 struct bcm_sysport_priv *priv = netdev_priv(dev); 2237 int ret = -EOPNOTSUPP; 2238 2239 switch (nfc->cmd) { 2240 case ETHTOOL_SRXCLSRLINS: 2241 ret = bcm_sysport_rule_set(priv, nfc); 2242 break; 2243 case ETHTOOL_SRXCLSRLDEL: 2244 ret = bcm_sysport_rule_del(priv, nfc->fs.location); 2245 break; 2246 default: 2247 break; 2248 } 2249 2250 return ret; 2251 } 2252 2253 static const struct ethtool_ops bcm_sysport_ethtool_ops = { 2254 .get_drvinfo = bcm_sysport_get_drvinfo, 2255 .get_msglevel = bcm_sysport_get_msglvl, 2256 .set_msglevel = bcm_sysport_set_msglvl, 2257 .get_link = ethtool_op_get_link, 2258 .get_strings = bcm_sysport_get_strings, 2259 .get_ethtool_stats = bcm_sysport_get_stats, 2260 .get_sset_count = bcm_sysport_get_sset_count, 2261 .get_wol = bcm_sysport_get_wol, 2262 .set_wol = bcm_sysport_set_wol, 2263 .get_coalesce = bcm_sysport_get_coalesce, 2264 .set_coalesce = bcm_sysport_set_coalesce, 2265 .get_link_ksettings = phy_ethtool_get_link_ksettings, 2266 .set_link_ksettings = phy_ethtool_set_link_ksettings, 2267 .get_rxnfc = bcm_sysport_get_rxnfc, 2268 .set_rxnfc = bcm_sysport_set_rxnfc, 2269 }; 2270 2271 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb, 2272 struct net_device *sb_dev, 2273 select_queue_fallback_t fallback) 2274 { 2275 struct bcm_sysport_priv *priv = netdev_priv(dev); 2276 u16 queue = skb_get_queue_mapping(skb); 2277 struct bcm_sysport_tx_ring *tx_ring; 2278 unsigned int q, port; 2279 2280 if (!netdev_uses_dsa(dev)) 2281 return fallback(dev, skb, NULL); 2282 2283 /* DSA tagging layer will have configured the correct queue */ 2284 q = BRCM_TAG_GET_QUEUE(queue); 2285 port = BRCM_TAG_GET_PORT(queue); 2286 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues]; 2287 2288 if (unlikely(!tx_ring)) 2289 return fallback(dev, skb, NULL); 2290 2291 return tx_ring->index; 2292 } 2293 2294 static const struct net_device_ops bcm_sysport_netdev_ops = { 2295 .ndo_start_xmit = bcm_sysport_xmit, 2296 .ndo_tx_timeout = bcm_sysport_tx_timeout, 2297 .ndo_open = bcm_sysport_open, 2298 .ndo_stop = bcm_sysport_stop, 2299 .ndo_set_features = bcm_sysport_set_features, 2300 .ndo_set_rx_mode = bcm_sysport_set_rx_mode, 2301 .ndo_set_mac_address = bcm_sysport_change_mac, 2302 #ifdef CONFIG_NET_POLL_CONTROLLER 2303 .ndo_poll_controller = bcm_sysport_poll_controller, 2304 #endif 2305 .ndo_get_stats64 = bcm_sysport_get_stats64, 2306 .ndo_select_queue = bcm_sysport_select_queue, 2307 }; 2308 2309 static int bcm_sysport_map_queues(struct notifier_block *nb, 2310 struct dsa_notifier_register_info *info) 2311 { 2312 struct bcm_sysport_tx_ring *ring; 2313 struct bcm_sysport_priv *priv; 2314 struct net_device *slave_dev; 2315 unsigned int num_tx_queues; 2316 unsigned int q, start, port; 2317 struct net_device *dev; 2318 2319 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier); 2320 if (priv->netdev != info->master) 2321 return 0; 2322 2323 dev = info->master; 2324 2325 /* We can't be setting up queue inspection for non directly attached 2326 * switches 2327 */ 2328 if (info->switch_number) 2329 return 0; 2330 2331 if (dev->netdev_ops != &bcm_sysport_netdev_ops) 2332 return 0; 2333 2334 port = info->port_number; 2335 slave_dev = info->info.dev; 2336 2337 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a 2338 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of 2339 * per-port (slave_dev) network devices queue, we achieve just that. 2340 * This need to happen now before any slave network device is used such 2341 * it accurately reflects the number of real TX queues. 2342 */ 2343 if (priv->is_lite) 2344 netif_set_real_num_tx_queues(slave_dev, 2345 slave_dev->num_tx_queues / 2); 2346 2347 num_tx_queues = slave_dev->real_num_tx_queues; 2348 2349 if (priv->per_port_num_tx_queues && 2350 priv->per_port_num_tx_queues != num_tx_queues) 2351 netdev_warn(slave_dev, "asymmetric number of per-port queues\n"); 2352 2353 priv->per_port_num_tx_queues = num_tx_queues; 2354 2355 start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues); 2356 for (q = 0; q < num_tx_queues; q++) { 2357 ring = &priv->tx_rings[q + start]; 2358 2359 /* Just remember the mapping actual programming done 2360 * during bcm_sysport_init_tx_ring 2361 */ 2362 ring->switch_queue = q; 2363 ring->switch_port = port; 2364 ring->inspect = true; 2365 priv->ring_map[q + port * num_tx_queues] = ring; 2366 2367 /* Set all queues as being used now */ 2368 set_bit(q + start, &priv->queue_bitmap); 2369 } 2370 2371 return 0; 2372 } 2373 2374 static int bcm_sysport_dsa_notifier(struct notifier_block *nb, 2375 unsigned long event, void *ptr) 2376 { 2377 struct dsa_notifier_register_info *info; 2378 2379 if (event != DSA_PORT_REGISTER) 2380 return NOTIFY_DONE; 2381 2382 info = ptr; 2383 2384 return notifier_from_errno(bcm_sysport_map_queues(nb, info)); 2385 } 2386 2387 #define REV_FMT "v%2x.%02x" 2388 2389 static const struct bcm_sysport_hw_params bcm_sysport_params[] = { 2390 [SYSTEMPORT] = { 2391 .is_lite = false, 2392 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS, 2393 }, 2394 [SYSTEMPORT_LITE] = { 2395 .is_lite = true, 2396 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS, 2397 }, 2398 }; 2399 2400 static const struct of_device_id bcm_sysport_of_match[] = { 2401 { .compatible = "brcm,systemportlite-v1.00", 2402 .data = &bcm_sysport_params[SYSTEMPORT_LITE] }, 2403 { .compatible = "brcm,systemport-v1.00", 2404 .data = &bcm_sysport_params[SYSTEMPORT] }, 2405 { .compatible = "brcm,systemport", 2406 .data = &bcm_sysport_params[SYSTEMPORT] }, 2407 { /* sentinel */ } 2408 }; 2409 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match); 2410 2411 static int bcm_sysport_probe(struct platform_device *pdev) 2412 { 2413 const struct bcm_sysport_hw_params *params; 2414 const struct of_device_id *of_id = NULL; 2415 struct bcm_sysport_priv *priv; 2416 struct device_node *dn; 2417 struct net_device *dev; 2418 const void *macaddr; 2419 struct resource *r; 2420 u32 txq, rxq; 2421 int ret; 2422 2423 dn = pdev->dev.of_node; 2424 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2425 of_id = of_match_node(bcm_sysport_of_match, dn); 2426 if (!of_id || !of_id->data) 2427 return -EINVAL; 2428 2429 /* Fairly quickly we need to know the type of adapter we have */ 2430 params = of_id->data; 2431 2432 /* Read the Transmit/Receive Queue properties */ 2433 if (of_property_read_u32(dn, "systemport,num-txq", &txq)) 2434 txq = TDMA_NUM_RINGS; 2435 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq)) 2436 rxq = 1; 2437 2438 /* Sanity check the number of transmit queues */ 2439 if (!txq || txq > TDMA_NUM_RINGS) 2440 return -EINVAL; 2441 2442 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq); 2443 if (!dev) 2444 return -ENOMEM; 2445 2446 /* Initialize private members */ 2447 priv = netdev_priv(dev); 2448 2449 /* Allocate number of TX rings */ 2450 priv->tx_rings = devm_kcalloc(&pdev->dev, txq, 2451 sizeof(struct bcm_sysport_tx_ring), 2452 GFP_KERNEL); 2453 if (!priv->tx_rings) 2454 return -ENOMEM; 2455 2456 priv->is_lite = params->is_lite; 2457 priv->num_rx_desc_words = params->num_rx_desc_words; 2458 2459 priv->irq0 = platform_get_irq(pdev, 0); 2460 if (!priv->is_lite) { 2461 priv->irq1 = platform_get_irq(pdev, 1); 2462 priv->wol_irq = platform_get_irq(pdev, 2); 2463 } else { 2464 priv->wol_irq = platform_get_irq(pdev, 1); 2465 } 2466 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) { 2467 dev_err(&pdev->dev, "invalid interrupts\n"); 2468 ret = -EINVAL; 2469 goto err_free_netdev; 2470 } 2471 2472 priv->base = devm_ioremap_resource(&pdev->dev, r); 2473 if (IS_ERR(priv->base)) { 2474 ret = PTR_ERR(priv->base); 2475 goto err_free_netdev; 2476 } 2477 2478 priv->netdev = dev; 2479 priv->pdev = pdev; 2480 2481 priv->phy_interface = of_get_phy_mode(dn); 2482 /* Default to GMII interface mode */ 2483 if (priv->phy_interface < 0) 2484 priv->phy_interface = PHY_INTERFACE_MODE_GMII; 2485 2486 /* In the case of a fixed PHY, the DT node associated 2487 * to the PHY is the Ethernet MAC DT node. 2488 */ 2489 if (of_phy_is_fixed_link(dn)) { 2490 ret = of_phy_register_fixed_link(dn); 2491 if (ret) { 2492 dev_err(&pdev->dev, "failed to register fixed PHY\n"); 2493 goto err_free_netdev; 2494 } 2495 2496 priv->phy_dn = dn; 2497 } 2498 2499 /* Initialize netdevice members */ 2500 macaddr = of_get_mac_address(dn); 2501 if (!macaddr || !is_valid_ether_addr(macaddr)) { 2502 dev_warn(&pdev->dev, "using random Ethernet MAC\n"); 2503 eth_hw_addr_random(dev); 2504 } else { 2505 ether_addr_copy(dev->dev_addr, macaddr); 2506 } 2507 2508 SET_NETDEV_DEV(dev, &pdev->dev); 2509 dev_set_drvdata(&pdev->dev, dev); 2510 dev->ethtool_ops = &bcm_sysport_ethtool_ops; 2511 dev->netdev_ops = &bcm_sysport_netdev_ops; 2512 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64); 2513 2514 dev->features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA | 2515 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 2516 dev->hw_features |= dev->features; 2517 dev->vlan_features |= dev->features; 2518 2519 /* Request the WOL interrupt and advertise suspend if available */ 2520 priv->wol_irq_disabled = 1; 2521 ret = devm_request_irq(&pdev->dev, priv->wol_irq, 2522 bcm_sysport_wol_isr, 0, dev->name, priv); 2523 if (!ret) 2524 device_set_wakeup_capable(&pdev->dev, 1); 2525 2526 /* Set the needed headroom once and for all */ 2527 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8); 2528 dev->needed_headroom += sizeof(struct bcm_tsb); 2529 2530 /* libphy will adjust the link state accordingly */ 2531 netif_carrier_off(dev); 2532 2533 priv->rx_max_coalesced_frames = 1; 2534 u64_stats_init(&priv->syncp); 2535 2536 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier; 2537 2538 ret = register_dsa_notifier(&priv->dsa_notifier); 2539 if (ret) { 2540 dev_err(&pdev->dev, "failed to register DSA notifier\n"); 2541 goto err_deregister_fixed_link; 2542 } 2543 2544 ret = register_netdev(dev); 2545 if (ret) { 2546 dev_err(&pdev->dev, "failed to register net_device\n"); 2547 goto err_deregister_notifier; 2548 } 2549 2550 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK; 2551 dev_info(&pdev->dev, 2552 "Broadcom SYSTEMPORT%s" REV_FMT 2553 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n", 2554 priv->is_lite ? " Lite" : "", 2555 (priv->rev >> 8) & 0xff, priv->rev & 0xff, 2556 priv->base, priv->irq0, priv->irq1, txq, rxq); 2557 2558 return 0; 2559 2560 err_deregister_notifier: 2561 unregister_dsa_notifier(&priv->dsa_notifier); 2562 err_deregister_fixed_link: 2563 if (of_phy_is_fixed_link(dn)) 2564 of_phy_deregister_fixed_link(dn); 2565 err_free_netdev: 2566 free_netdev(dev); 2567 return ret; 2568 } 2569 2570 static int bcm_sysport_remove(struct platform_device *pdev) 2571 { 2572 struct net_device *dev = dev_get_drvdata(&pdev->dev); 2573 struct bcm_sysport_priv *priv = netdev_priv(dev); 2574 struct device_node *dn = pdev->dev.of_node; 2575 2576 /* Not much to do, ndo_close has been called 2577 * and we use managed allocations 2578 */ 2579 unregister_dsa_notifier(&priv->dsa_notifier); 2580 unregister_netdev(dev); 2581 if (of_phy_is_fixed_link(dn)) 2582 of_phy_deregister_fixed_link(dn); 2583 free_netdev(dev); 2584 dev_set_drvdata(&pdev->dev, NULL); 2585 2586 return 0; 2587 } 2588 2589 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv) 2590 { 2591 struct net_device *ndev = priv->netdev; 2592 unsigned int timeout = 1000; 2593 unsigned int index, i = 0; 2594 u32 reg; 2595 2596 /* Password has already been programmed */ 2597 reg = umac_readl(priv, UMAC_MPD_CTRL); 2598 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) 2599 reg |= MPD_EN; 2600 reg &= ~PSW_EN; 2601 if (priv->wolopts & WAKE_MAGICSECURE) 2602 reg |= PSW_EN; 2603 umac_writel(priv, reg, UMAC_MPD_CTRL); 2604 2605 if (priv->wolopts & WAKE_FILTER) { 2606 /* Turn on ACPI matching to steal packets from RBUF */ 2607 reg = rbuf_readl(priv, RBUF_CONTROL); 2608 if (priv->is_lite) 2609 reg |= RBUF_ACPI_EN_LITE; 2610 else 2611 reg |= RBUF_ACPI_EN; 2612 rbuf_writel(priv, reg, RBUF_CONTROL); 2613 2614 /* Enable RXCHK, active filters and Broadcom tag matching */ 2615 reg = rxchk_readl(priv, RXCHK_CONTROL); 2616 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 2617 RXCHK_BRCM_TAG_MATCH_SHIFT); 2618 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2619 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i); 2620 i++; 2621 } 2622 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN; 2623 rxchk_writel(priv, reg, RXCHK_CONTROL); 2624 } 2625 2626 /* Make sure RBUF entered WoL mode as result */ 2627 do { 2628 reg = rbuf_readl(priv, RBUF_STATUS); 2629 if (reg & RBUF_WOL_MODE) 2630 break; 2631 2632 udelay(10); 2633 } while (timeout-- > 0); 2634 2635 /* Do not leave the UniMAC RBUF matching only MPD packets */ 2636 if (!timeout) { 2637 mpd_enable_set(priv, false); 2638 netif_err(priv, wol, ndev, "failed to enter WOL mode\n"); 2639 return -ETIMEDOUT; 2640 } 2641 2642 /* UniMAC receive needs to be turned on */ 2643 umac_enable_set(priv, CMD_RX_EN, 1); 2644 2645 netif_dbg(priv, wol, ndev, "entered WOL mode\n"); 2646 2647 return 0; 2648 } 2649 2650 static int __maybe_unused bcm_sysport_suspend(struct device *d) 2651 { 2652 struct net_device *dev = dev_get_drvdata(d); 2653 struct bcm_sysport_priv *priv = netdev_priv(dev); 2654 unsigned int i; 2655 int ret = 0; 2656 u32 reg; 2657 2658 if (!netif_running(dev)) 2659 return 0; 2660 2661 bcm_sysport_netif_stop(dev); 2662 2663 phy_suspend(dev->phydev); 2664 2665 netif_device_detach(dev); 2666 2667 /* Disable UniMAC RX */ 2668 umac_enable_set(priv, CMD_RX_EN, 0); 2669 2670 ret = rdma_enable_set(priv, 0); 2671 if (ret) { 2672 netdev_err(dev, "RDMA timeout!\n"); 2673 return ret; 2674 } 2675 2676 /* Disable RXCHK if enabled */ 2677 if (priv->rx_chk_en) { 2678 reg = rxchk_readl(priv, RXCHK_CONTROL); 2679 reg &= ~RXCHK_EN; 2680 rxchk_writel(priv, reg, RXCHK_CONTROL); 2681 } 2682 2683 /* Flush RX pipe */ 2684 if (!priv->wolopts) 2685 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 2686 2687 ret = tdma_enable_set(priv, 0); 2688 if (ret) { 2689 netdev_err(dev, "TDMA timeout!\n"); 2690 return ret; 2691 } 2692 2693 /* Wait for a packet boundary */ 2694 usleep_range(2000, 3000); 2695 2696 umac_enable_set(priv, CMD_TX_EN, 0); 2697 2698 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 2699 2700 /* Free RX/TX rings SW structures */ 2701 for (i = 0; i < dev->num_tx_queues; i++) 2702 bcm_sysport_fini_tx_ring(priv, i); 2703 bcm_sysport_fini_rx_ring(priv); 2704 2705 /* Get prepared for Wake-on-LAN */ 2706 if (device_may_wakeup(d) && priv->wolopts) 2707 ret = bcm_sysport_suspend_to_wol(priv); 2708 2709 return ret; 2710 } 2711 2712 static int __maybe_unused bcm_sysport_resume(struct device *d) 2713 { 2714 struct net_device *dev = dev_get_drvdata(d); 2715 struct bcm_sysport_priv *priv = netdev_priv(dev); 2716 unsigned int i; 2717 int ret; 2718 2719 if (!netif_running(dev)) 2720 return 0; 2721 2722 umac_reset(priv); 2723 2724 /* We may have been suspended and never received a WOL event that 2725 * would turn off MPD detection, take care of that now 2726 */ 2727 bcm_sysport_resume_from_wol(priv); 2728 2729 /* Initialize both hardware and software ring */ 2730 for (i = 0; i < dev->num_tx_queues; i++) { 2731 ret = bcm_sysport_init_tx_ring(priv, i); 2732 if (ret) { 2733 netdev_err(dev, "failed to initialize TX ring %d\n", 2734 i); 2735 goto out_free_tx_rings; 2736 } 2737 } 2738 2739 /* Initialize linked-list */ 2740 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2741 2742 /* Initialize RX ring */ 2743 ret = bcm_sysport_init_rx_ring(priv); 2744 if (ret) { 2745 netdev_err(dev, "failed to initialize RX ring\n"); 2746 goto out_free_rx_ring; 2747 } 2748 2749 netif_device_attach(dev); 2750 2751 /* RX pipe enable */ 2752 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 2753 2754 ret = rdma_enable_set(priv, 1); 2755 if (ret) { 2756 netdev_err(dev, "failed to enable RDMA\n"); 2757 goto out_free_rx_ring; 2758 } 2759 2760 /* Restore enabled features */ 2761 bcm_sysport_set_features(dev, dev->features); 2762 2763 rbuf_init(priv); 2764 2765 /* Set maximum frame length */ 2766 if (!priv->is_lite) 2767 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 2768 else 2769 gib_set_pad_extension(priv); 2770 2771 /* Set MAC address */ 2772 umac_set_hw_addr(priv, dev->dev_addr); 2773 2774 umac_enable_set(priv, CMD_RX_EN, 1); 2775 2776 /* TX pipe enable */ 2777 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 2778 2779 umac_enable_set(priv, CMD_TX_EN, 1); 2780 2781 ret = tdma_enable_set(priv, 1); 2782 if (ret) { 2783 netdev_err(dev, "TDMA timeout!\n"); 2784 goto out_free_rx_ring; 2785 } 2786 2787 phy_resume(dev->phydev); 2788 2789 bcm_sysport_netif_start(dev); 2790 2791 return 0; 2792 2793 out_free_rx_ring: 2794 bcm_sysport_fini_rx_ring(priv); 2795 out_free_tx_rings: 2796 for (i = 0; i < dev->num_tx_queues; i++) 2797 bcm_sysport_fini_tx_ring(priv, i); 2798 return ret; 2799 } 2800 2801 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops, 2802 bcm_sysport_suspend, bcm_sysport_resume); 2803 2804 static struct platform_driver bcm_sysport_driver = { 2805 .probe = bcm_sysport_probe, 2806 .remove = bcm_sysport_remove, 2807 .driver = { 2808 .name = "brcm-systemport", 2809 .of_match_table = bcm_sysport_of_match, 2810 .pm = &bcm_sysport_pm_ops, 2811 }, 2812 }; 2813 module_platform_driver(bcm_sysport_driver); 2814 2815 MODULE_AUTHOR("Broadcom Corporation"); 2816 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver"); 2817 MODULE_ALIAS("platform:brcm-systemport"); 2818 MODULE_LICENSE("GPL"); 2819