1 /* 2 * Broadcom BCM7xxx System Port Ethernet MAC driver 3 * 4 * Copyright (C) 2014 Broadcom Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 13 #include <linux/init.h> 14 #include <linux/interrupt.h> 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/netdevice.h> 18 #include <linux/etherdevice.h> 19 #include <linux/platform_device.h> 20 #include <linux/of.h> 21 #include <linux/of_net.h> 22 #include <linux/of_mdio.h> 23 #include <linux/phy.h> 24 #include <linux/phy_fixed.h> 25 #include <net/dsa.h> 26 #include <net/ip.h> 27 #include <net/ipv6.h> 28 29 #include "bcmsysport.h" 30 31 /* I/O accessors register helpers */ 32 #define BCM_SYSPORT_IO_MACRO(name, offset) \ 33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \ 34 { \ 35 u32 reg = readl_relaxed(priv->base + offset + off); \ 36 return reg; \ 37 } \ 38 static inline void name##_writel(struct bcm_sysport_priv *priv, \ 39 u32 val, u32 off) \ 40 { \ 41 writel_relaxed(val, priv->base + offset + off); \ 42 } \ 43 44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET); 45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET); 46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET); 47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET); 48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET); 49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET); 50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET); 51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET); 52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET); 53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET); 54 55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact 56 * same layout, except it has been moved by 4 bytes up, *sigh* 57 */ 58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off) 59 { 60 if (priv->is_lite && off >= RDMA_STATUS) 61 off += 4; 62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off); 63 } 64 65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off) 66 { 67 if (priv->is_lite && off >= RDMA_STATUS) 68 off += 4; 69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off); 70 } 71 72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit) 73 { 74 if (!priv->is_lite) { 75 return BIT(bit); 76 } else { 77 if (bit >= ACB_ALGO) 78 return BIT(bit + 1); 79 else 80 return BIT(bit); 81 } 82 } 83 84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied 85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths. 86 */ 87 #define BCM_SYSPORT_INTR_L2(which) \ 88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \ 89 u32 mask) \ 90 { \ 91 priv->irq##which##_mask &= ~(mask); \ 92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \ 93 } \ 94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \ 95 u32 mask) \ 96 { \ 97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \ 98 priv->irq##which##_mask |= (mask); \ 99 } \ 100 101 BCM_SYSPORT_INTR_L2(0) 102 BCM_SYSPORT_INTR_L2(1) 103 104 /* Register accesses to GISB/RBUS registers are expensive (few hundred 105 * nanoseconds), so keep the check for 64-bits explicit here to save 106 * one register write per-packet on 32-bits platforms. 107 */ 108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv, 109 void __iomem *d, 110 dma_addr_t addr) 111 { 112 #ifdef CONFIG_PHYS_ADDR_T_64BIT 113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK, 114 d + DESC_ADDR_HI_STATUS_LEN); 115 #endif 116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO); 117 } 118 119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv, 120 struct dma_desc *desc, 121 unsigned int port) 122 { 123 /* Ports are latched, so write upper address first */ 124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port)); 125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port)); 126 } 127 128 /* Ethtool operations */ 129 static void bcm_sysport_set_rx_csum(struct net_device *dev, 130 netdev_features_t wanted) 131 { 132 struct bcm_sysport_priv *priv = netdev_priv(dev); 133 u32 reg; 134 135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM); 136 reg = rxchk_readl(priv, RXCHK_CONTROL); 137 if (priv->rx_chk_en) 138 reg |= RXCHK_EN; 139 else 140 reg &= ~RXCHK_EN; 141 142 /* If UniMAC forwards CRC, we need to skip over it to get 143 * a valid CHK bit to be set in the per-packet status word 144 */ 145 if (priv->rx_chk_en && priv->crc_fwd) 146 reg |= RXCHK_SKIP_FCS; 147 else 148 reg &= ~RXCHK_SKIP_FCS; 149 150 /* If Broadcom tags are enabled (e.g: using a switch), make 151 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom 152 * tag after the Ethernet MAC Source Address. 153 */ 154 if (netdev_uses_dsa(dev)) 155 reg |= RXCHK_BRCM_TAG_EN; 156 else 157 reg &= ~RXCHK_BRCM_TAG_EN; 158 159 rxchk_writel(priv, reg, RXCHK_CONTROL); 160 } 161 162 static void bcm_sysport_set_tx_csum(struct net_device *dev, 163 netdev_features_t wanted) 164 { 165 struct bcm_sysport_priv *priv = netdev_priv(dev); 166 u32 reg; 167 168 /* Hardware transmit checksum requires us to enable the Transmit status 169 * block prepended to the packet contents 170 */ 171 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)); 172 reg = tdma_readl(priv, TDMA_CONTROL); 173 if (priv->tsb_en) 174 reg |= tdma_control_bit(priv, TSB_EN); 175 else 176 reg &= ~tdma_control_bit(priv, TSB_EN); 177 tdma_writel(priv, reg, TDMA_CONTROL); 178 } 179 180 static int bcm_sysport_set_features(struct net_device *dev, 181 netdev_features_t features) 182 { 183 struct bcm_sysport_priv *priv = netdev_priv(dev); 184 185 /* Read CRC forward */ 186 if (!priv->is_lite) 187 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD); 188 else 189 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) & 190 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT); 191 192 bcm_sysport_set_rx_csum(dev, features); 193 bcm_sysport_set_tx_csum(dev, features); 194 195 return 0; 196 } 197 198 /* Hardware counters must be kept in sync because the order/offset 199 * is important here (order in structure declaration = order in hardware) 200 */ 201 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = { 202 /* general stats */ 203 STAT_NETDEV64(rx_packets), 204 STAT_NETDEV64(tx_packets), 205 STAT_NETDEV64(rx_bytes), 206 STAT_NETDEV64(tx_bytes), 207 STAT_NETDEV(rx_errors), 208 STAT_NETDEV(tx_errors), 209 STAT_NETDEV(rx_dropped), 210 STAT_NETDEV(tx_dropped), 211 STAT_NETDEV(multicast), 212 /* UniMAC RSV counters */ 213 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64), 214 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127), 215 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255), 216 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511), 217 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023), 218 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518), 219 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv), 220 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047), 221 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095), 222 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216), 223 STAT_MIB_RX("rx_pkts", mib.rx.pkt), 224 STAT_MIB_RX("rx_bytes", mib.rx.bytes), 225 STAT_MIB_RX("rx_multicast", mib.rx.mca), 226 STAT_MIB_RX("rx_broadcast", mib.rx.bca), 227 STAT_MIB_RX("rx_fcs", mib.rx.fcs), 228 STAT_MIB_RX("rx_control", mib.rx.cf), 229 STAT_MIB_RX("rx_pause", mib.rx.pf), 230 STAT_MIB_RX("rx_unknown", mib.rx.uo), 231 STAT_MIB_RX("rx_align", mib.rx.aln), 232 STAT_MIB_RX("rx_outrange", mib.rx.flr), 233 STAT_MIB_RX("rx_code", mib.rx.cde), 234 STAT_MIB_RX("rx_carrier", mib.rx.fcr), 235 STAT_MIB_RX("rx_oversize", mib.rx.ovr), 236 STAT_MIB_RX("rx_jabber", mib.rx.jbr), 237 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue), 238 STAT_MIB_RX("rx_good_pkts", mib.rx.pok), 239 STAT_MIB_RX("rx_unicast", mib.rx.uc), 240 STAT_MIB_RX("rx_ppp", mib.rx.ppp), 241 STAT_MIB_RX("rx_crc", mib.rx.rcrc), 242 /* UniMAC TSV counters */ 243 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64), 244 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127), 245 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255), 246 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511), 247 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023), 248 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518), 249 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv), 250 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047), 251 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095), 252 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216), 253 STAT_MIB_TX("tx_pkts", mib.tx.pkts), 254 STAT_MIB_TX("tx_multicast", mib.tx.mca), 255 STAT_MIB_TX("tx_broadcast", mib.tx.bca), 256 STAT_MIB_TX("tx_pause", mib.tx.pf), 257 STAT_MIB_TX("tx_control", mib.tx.cf), 258 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs), 259 STAT_MIB_TX("tx_oversize", mib.tx.ovr), 260 STAT_MIB_TX("tx_defer", mib.tx.drf), 261 STAT_MIB_TX("tx_excess_defer", mib.tx.edf), 262 STAT_MIB_TX("tx_single_col", mib.tx.scl), 263 STAT_MIB_TX("tx_multi_col", mib.tx.mcl), 264 STAT_MIB_TX("tx_late_col", mib.tx.lcl), 265 STAT_MIB_TX("tx_excess_col", mib.tx.ecl), 266 STAT_MIB_TX("tx_frags", mib.tx.frg), 267 STAT_MIB_TX("tx_total_col", mib.tx.ncl), 268 STAT_MIB_TX("tx_jabber", mib.tx.jbr), 269 STAT_MIB_TX("tx_bytes", mib.tx.bytes), 270 STAT_MIB_TX("tx_good_pkts", mib.tx.pok), 271 STAT_MIB_TX("tx_unicast", mib.tx.uc), 272 /* UniMAC RUNT counters */ 273 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt), 274 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs), 275 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align), 276 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes), 277 /* RXCHK misc statistics */ 278 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR), 279 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc, 280 RXCHK_OTHER_DISC_CNTR), 281 /* RBUF misc statistics */ 282 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR), 283 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR), 284 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), 285 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed), 286 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed), 287 STAT_MIB_SOFT("tx_realloc_tsb", mib.tx_realloc_tsb), 288 STAT_MIB_SOFT("tx_realloc_tsb_failed", mib.tx_realloc_tsb_failed), 289 /* Per TX-queue statistics are dynamically appended */ 290 }; 291 292 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats) 293 294 static void bcm_sysport_get_drvinfo(struct net_device *dev, 295 struct ethtool_drvinfo *info) 296 { 297 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); 298 strlcpy(info->version, "0.1", sizeof(info->version)); 299 strlcpy(info->bus_info, "platform", sizeof(info->bus_info)); 300 } 301 302 static u32 bcm_sysport_get_msglvl(struct net_device *dev) 303 { 304 struct bcm_sysport_priv *priv = netdev_priv(dev); 305 306 return priv->msg_enable; 307 } 308 309 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable) 310 { 311 struct bcm_sysport_priv *priv = netdev_priv(dev); 312 313 priv->msg_enable = enable; 314 } 315 316 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type) 317 { 318 switch (type) { 319 case BCM_SYSPORT_STAT_NETDEV: 320 case BCM_SYSPORT_STAT_NETDEV64: 321 case BCM_SYSPORT_STAT_RXCHK: 322 case BCM_SYSPORT_STAT_RBUF: 323 case BCM_SYSPORT_STAT_SOFT: 324 return true; 325 default: 326 return false; 327 } 328 } 329 330 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set) 331 { 332 struct bcm_sysport_priv *priv = netdev_priv(dev); 333 const struct bcm_sysport_stats *s; 334 unsigned int i, j; 335 336 switch (string_set) { 337 case ETH_SS_STATS: 338 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 339 s = &bcm_sysport_gstrings_stats[i]; 340 if (priv->is_lite && 341 !bcm_sysport_lite_stat_valid(s->type)) 342 continue; 343 j++; 344 } 345 /* Include per-queue statistics */ 346 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 347 default: 348 return -EOPNOTSUPP; 349 } 350 } 351 352 static void bcm_sysport_get_strings(struct net_device *dev, 353 u32 stringset, u8 *data) 354 { 355 struct bcm_sysport_priv *priv = netdev_priv(dev); 356 const struct bcm_sysport_stats *s; 357 char buf[128]; 358 int i, j; 359 360 switch (stringset) { 361 case ETH_SS_STATS: 362 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 363 s = &bcm_sysport_gstrings_stats[i]; 364 if (priv->is_lite && 365 !bcm_sysport_lite_stat_valid(s->type)) 366 continue; 367 368 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string, 369 ETH_GSTRING_LEN); 370 j++; 371 } 372 373 for (i = 0; i < dev->num_tx_queues; i++) { 374 snprintf(buf, sizeof(buf), "txq%d_packets", i); 375 memcpy(data + j * ETH_GSTRING_LEN, buf, 376 ETH_GSTRING_LEN); 377 j++; 378 379 snprintf(buf, sizeof(buf), "txq%d_bytes", i); 380 memcpy(data + j * ETH_GSTRING_LEN, buf, 381 ETH_GSTRING_LEN); 382 j++; 383 } 384 break; 385 default: 386 break; 387 } 388 } 389 390 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv) 391 { 392 int i, j = 0; 393 394 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 395 const struct bcm_sysport_stats *s; 396 u8 offset = 0; 397 u32 val = 0; 398 char *p; 399 400 s = &bcm_sysport_gstrings_stats[i]; 401 switch (s->type) { 402 case BCM_SYSPORT_STAT_NETDEV: 403 case BCM_SYSPORT_STAT_NETDEV64: 404 case BCM_SYSPORT_STAT_SOFT: 405 continue; 406 case BCM_SYSPORT_STAT_MIB_RX: 407 case BCM_SYSPORT_STAT_MIB_TX: 408 case BCM_SYSPORT_STAT_RUNT: 409 if (priv->is_lite) 410 continue; 411 412 if (s->type != BCM_SYSPORT_STAT_MIB_RX) 413 offset = UMAC_MIB_STAT_OFFSET; 414 val = umac_readl(priv, UMAC_MIB_START + j + offset); 415 break; 416 case BCM_SYSPORT_STAT_RXCHK: 417 val = rxchk_readl(priv, s->reg_offset); 418 if (val == ~0) 419 rxchk_writel(priv, 0, s->reg_offset); 420 break; 421 case BCM_SYSPORT_STAT_RBUF: 422 val = rbuf_readl(priv, s->reg_offset); 423 if (val == ~0) 424 rbuf_writel(priv, 0, s->reg_offset); 425 break; 426 } 427 428 j += s->stat_sizeof; 429 p = (char *)priv + s->stat_offset; 430 *(u32 *)p = val; 431 } 432 433 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n"); 434 } 435 436 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv, 437 u64 *tx_bytes, u64 *tx_packets) 438 { 439 struct bcm_sysport_tx_ring *ring; 440 u64 bytes = 0, packets = 0; 441 unsigned int start; 442 unsigned int q; 443 444 for (q = 0; q < priv->netdev->num_tx_queues; q++) { 445 ring = &priv->tx_rings[q]; 446 do { 447 start = u64_stats_fetch_begin_irq(&priv->syncp); 448 bytes = ring->bytes; 449 packets = ring->packets; 450 } while (u64_stats_fetch_retry_irq(&priv->syncp, start)); 451 452 *tx_bytes += bytes; 453 *tx_packets += packets; 454 } 455 } 456 457 static void bcm_sysport_get_stats(struct net_device *dev, 458 struct ethtool_stats *stats, u64 *data) 459 { 460 struct bcm_sysport_priv *priv = netdev_priv(dev); 461 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 462 struct u64_stats_sync *syncp = &priv->syncp; 463 struct bcm_sysport_tx_ring *ring; 464 u64 tx_bytes = 0, tx_packets = 0; 465 unsigned int start; 466 int i, j; 467 468 if (netif_running(dev)) { 469 bcm_sysport_update_mib_counters(priv); 470 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets); 471 stats64->tx_bytes = tx_bytes; 472 stats64->tx_packets = tx_packets; 473 } 474 475 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 476 const struct bcm_sysport_stats *s; 477 char *p; 478 479 s = &bcm_sysport_gstrings_stats[i]; 480 if (s->type == BCM_SYSPORT_STAT_NETDEV) 481 p = (char *)&dev->stats; 482 else if (s->type == BCM_SYSPORT_STAT_NETDEV64) 483 p = (char *)stats64; 484 else 485 p = (char *)priv; 486 487 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type)) 488 continue; 489 p += s->stat_offset; 490 491 if (s->stat_sizeof == sizeof(u64) && 492 s->type == BCM_SYSPORT_STAT_NETDEV64) { 493 do { 494 start = u64_stats_fetch_begin_irq(syncp); 495 data[i] = *(u64 *)p; 496 } while (u64_stats_fetch_retry_irq(syncp, start)); 497 } else 498 data[i] = *(u32 *)p; 499 j++; 500 } 501 502 /* For SYSTEMPORT Lite since we have holes in our statistics, j would 503 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it 504 * needs to point to how many total statistics we have minus the 505 * number of per TX queue statistics 506 */ 507 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) - 508 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 509 510 for (i = 0; i < dev->num_tx_queues; i++) { 511 ring = &priv->tx_rings[i]; 512 data[j] = ring->packets; 513 j++; 514 data[j] = ring->bytes; 515 j++; 516 } 517 } 518 519 static void bcm_sysport_get_wol(struct net_device *dev, 520 struct ethtool_wolinfo *wol) 521 { 522 struct bcm_sysport_priv *priv = netdev_priv(dev); 523 u32 reg; 524 525 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 526 wol->wolopts = priv->wolopts; 527 528 if (!(priv->wolopts & WAKE_MAGICSECURE)) 529 return; 530 531 /* Return the programmed SecureOn password */ 532 reg = umac_readl(priv, UMAC_PSW_MS); 533 put_unaligned_be16(reg, &wol->sopass[0]); 534 reg = umac_readl(priv, UMAC_PSW_LS); 535 put_unaligned_be32(reg, &wol->sopass[2]); 536 } 537 538 static int bcm_sysport_set_wol(struct net_device *dev, 539 struct ethtool_wolinfo *wol) 540 { 541 struct bcm_sysport_priv *priv = netdev_priv(dev); 542 struct device *kdev = &priv->pdev->dev; 543 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 544 545 if (!device_can_wakeup(kdev)) 546 return -ENOTSUPP; 547 548 if (wol->wolopts & ~supported) 549 return -EINVAL; 550 551 /* Program the SecureOn password */ 552 if (wol->wolopts & WAKE_MAGICSECURE) { 553 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]), 554 UMAC_PSW_MS); 555 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]), 556 UMAC_PSW_LS); 557 } 558 559 /* Flag the device and relevant IRQ as wakeup capable */ 560 if (wol->wolopts) { 561 device_set_wakeup_enable(kdev, 1); 562 if (priv->wol_irq_disabled) 563 enable_irq_wake(priv->wol_irq); 564 priv->wol_irq_disabled = 0; 565 } else { 566 device_set_wakeup_enable(kdev, 0); 567 /* Avoid unbalanced disable_irq_wake calls */ 568 if (!priv->wol_irq_disabled) 569 disable_irq_wake(priv->wol_irq); 570 priv->wol_irq_disabled = 1; 571 } 572 573 priv->wolopts = wol->wolopts; 574 575 return 0; 576 } 577 578 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv, 579 u32 usecs, u32 pkts) 580 { 581 u32 reg; 582 583 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 584 reg &= ~(RDMA_INTR_THRESH_MASK | 585 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT); 586 reg |= pkts; 587 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT; 588 rdma_writel(priv, reg, RDMA_MBDONE_INTR); 589 } 590 591 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring, 592 struct ethtool_coalesce *ec) 593 { 594 struct bcm_sysport_priv *priv = ring->priv; 595 u32 reg; 596 597 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 598 reg &= ~(RING_INTR_THRESH_MASK | 599 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT); 600 reg |= ec->tx_max_coalesced_frames; 601 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) << 602 RING_TIMEOUT_SHIFT; 603 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 604 } 605 606 static int bcm_sysport_get_coalesce(struct net_device *dev, 607 struct ethtool_coalesce *ec) 608 { 609 struct bcm_sysport_priv *priv = netdev_priv(dev); 610 u32 reg; 611 612 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0)); 613 614 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000; 615 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK; 616 617 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 618 619 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000; 620 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK; 621 ec->use_adaptive_rx_coalesce = priv->dim.use_dim; 622 623 return 0; 624 } 625 626 static int bcm_sysport_set_coalesce(struct net_device *dev, 627 struct ethtool_coalesce *ec) 628 { 629 struct bcm_sysport_priv *priv = netdev_priv(dev); 630 struct net_dim_cq_moder moder; 631 u32 usecs, pkts; 632 unsigned int i; 633 634 /* Base system clock is 125Mhz, DMA timeout is this reference clock 635 * divided by 1024, which yield roughly 8.192 us, our maximum value has 636 * to fit in the RING_TIMEOUT_MASK (16 bits). 637 */ 638 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK || 639 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 || 640 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK || 641 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1) 642 return -EINVAL; 643 644 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) || 645 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0) || 646 ec->use_adaptive_tx_coalesce) 647 return -EINVAL; 648 649 for (i = 0; i < dev->num_tx_queues; i++) 650 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec); 651 652 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs; 653 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames; 654 usecs = priv->rx_coalesce_usecs; 655 pkts = priv->rx_max_coalesced_frames; 656 657 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) { 658 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode); 659 usecs = moder.usec; 660 pkts = moder.pkts; 661 } 662 663 priv->dim.use_dim = ec->use_adaptive_rx_coalesce; 664 665 /* Apply desired coalescing parameters */ 666 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 667 668 return 0; 669 } 670 671 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb) 672 { 673 dev_consume_skb_any(cb->skb); 674 cb->skb = NULL; 675 dma_unmap_addr_set(cb, dma_addr, 0); 676 } 677 678 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv, 679 struct bcm_sysport_cb *cb) 680 { 681 struct device *kdev = &priv->pdev->dev; 682 struct net_device *ndev = priv->netdev; 683 struct sk_buff *skb, *rx_skb; 684 dma_addr_t mapping; 685 686 /* Allocate a new SKB for a new packet */ 687 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH); 688 if (!skb) { 689 priv->mib.alloc_rx_buff_failed++; 690 netif_err(priv, rx_err, ndev, "SKB alloc failed\n"); 691 return NULL; 692 } 693 694 mapping = dma_map_single(kdev, skb->data, 695 RX_BUF_LENGTH, DMA_FROM_DEVICE); 696 if (dma_mapping_error(kdev, mapping)) { 697 priv->mib.rx_dma_failed++; 698 dev_kfree_skb_any(skb); 699 netif_err(priv, rx_err, ndev, "DMA mapping failure\n"); 700 return NULL; 701 } 702 703 /* Grab the current SKB on the ring */ 704 rx_skb = cb->skb; 705 if (likely(rx_skb)) 706 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 707 RX_BUF_LENGTH, DMA_FROM_DEVICE); 708 709 /* Put the new SKB on the ring */ 710 cb->skb = skb; 711 dma_unmap_addr_set(cb, dma_addr, mapping); 712 dma_desc_set_addr(priv, cb->bd_addr, mapping); 713 714 netif_dbg(priv, rx_status, ndev, "RX refill\n"); 715 716 /* Return the current SKB to the caller */ 717 return rx_skb; 718 } 719 720 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv) 721 { 722 struct bcm_sysport_cb *cb; 723 struct sk_buff *skb; 724 unsigned int i; 725 726 for (i = 0; i < priv->num_rx_bds; i++) { 727 cb = &priv->rx_cbs[i]; 728 skb = bcm_sysport_rx_refill(priv, cb); 729 if (skb) 730 dev_kfree_skb(skb); 731 if (!cb->skb) 732 return -ENOMEM; 733 } 734 735 return 0; 736 } 737 738 /* Poll the hardware for up to budget packets to process */ 739 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv, 740 unsigned int budget) 741 { 742 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 743 struct net_device *ndev = priv->netdev; 744 unsigned int processed = 0, to_process; 745 unsigned int processed_bytes = 0; 746 struct bcm_sysport_cb *cb; 747 struct sk_buff *skb; 748 unsigned int p_index; 749 u16 len, status; 750 struct bcm_rsb *rsb; 751 752 /* Clear status before servicing to reduce spurious interrupts */ 753 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR); 754 755 /* Determine how much we should process since last call, SYSTEMPORT Lite 756 * groups the producer and consumer indexes into the same 32-bit 757 * which we access using RDMA_CONS_INDEX 758 */ 759 if (!priv->is_lite) 760 p_index = rdma_readl(priv, RDMA_PROD_INDEX); 761 else 762 p_index = rdma_readl(priv, RDMA_CONS_INDEX); 763 p_index &= RDMA_PROD_INDEX_MASK; 764 765 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK; 766 767 netif_dbg(priv, rx_status, ndev, 768 "p_index=%d rx_c_index=%d to_process=%d\n", 769 p_index, priv->rx_c_index, to_process); 770 771 while ((processed < to_process) && (processed < budget)) { 772 cb = &priv->rx_cbs[priv->rx_read_ptr]; 773 skb = bcm_sysport_rx_refill(priv, cb); 774 775 776 /* We do not have a backing SKB, so we do not a corresponding 777 * DMA mapping for this incoming packet since 778 * bcm_sysport_rx_refill always either has both skb and mapping 779 * or none. 780 */ 781 if (unlikely(!skb)) { 782 netif_err(priv, rx_err, ndev, "out of memory!\n"); 783 ndev->stats.rx_dropped++; 784 ndev->stats.rx_errors++; 785 goto next; 786 } 787 788 /* Extract the Receive Status Block prepended */ 789 rsb = (struct bcm_rsb *)skb->data; 790 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK; 791 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) & 792 DESC_STATUS_MASK; 793 794 netif_dbg(priv, rx_status, ndev, 795 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n", 796 p_index, priv->rx_c_index, priv->rx_read_ptr, 797 len, status); 798 799 if (unlikely(len > RX_BUF_LENGTH)) { 800 netif_err(priv, rx_status, ndev, "oversized packet\n"); 801 ndev->stats.rx_length_errors++; 802 ndev->stats.rx_errors++; 803 dev_kfree_skb_any(skb); 804 goto next; 805 } 806 807 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) { 808 netif_err(priv, rx_status, ndev, "fragmented packet!\n"); 809 ndev->stats.rx_dropped++; 810 ndev->stats.rx_errors++; 811 dev_kfree_skb_any(skb); 812 goto next; 813 } 814 815 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) { 816 netif_err(priv, rx_err, ndev, "error packet\n"); 817 if (status & RX_STATUS_OVFLOW) 818 ndev->stats.rx_over_errors++; 819 ndev->stats.rx_dropped++; 820 ndev->stats.rx_errors++; 821 dev_kfree_skb_any(skb); 822 goto next; 823 } 824 825 skb_put(skb, len); 826 827 /* Hardware validated our checksum */ 828 if (likely(status & DESC_L4_CSUM)) 829 skb->ip_summed = CHECKSUM_UNNECESSARY; 830 831 /* Hardware pre-pends packets with 2bytes before Ethernet 832 * header plus we have the Receive Status Block, strip off all 833 * of this from the SKB. 834 */ 835 skb_pull(skb, sizeof(*rsb) + 2); 836 len -= (sizeof(*rsb) + 2); 837 processed_bytes += len; 838 839 /* UniMAC may forward CRC */ 840 if (priv->crc_fwd) { 841 skb_trim(skb, len - ETH_FCS_LEN); 842 len -= ETH_FCS_LEN; 843 } 844 845 skb->protocol = eth_type_trans(skb, ndev); 846 ndev->stats.rx_packets++; 847 ndev->stats.rx_bytes += len; 848 u64_stats_update_begin(&priv->syncp); 849 stats64->rx_packets++; 850 stats64->rx_bytes += len; 851 u64_stats_update_end(&priv->syncp); 852 853 napi_gro_receive(&priv->napi, skb); 854 next: 855 processed++; 856 priv->rx_read_ptr++; 857 858 if (priv->rx_read_ptr == priv->num_rx_bds) 859 priv->rx_read_ptr = 0; 860 } 861 862 priv->dim.packets = processed; 863 priv->dim.bytes = processed_bytes; 864 865 return processed; 866 } 867 868 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring, 869 struct bcm_sysport_cb *cb, 870 unsigned int *bytes_compl, 871 unsigned int *pkts_compl) 872 { 873 struct bcm_sysport_priv *priv = ring->priv; 874 struct device *kdev = &priv->pdev->dev; 875 876 if (cb->skb) { 877 *bytes_compl += cb->skb->len; 878 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 879 dma_unmap_len(cb, dma_len), 880 DMA_TO_DEVICE); 881 (*pkts_compl)++; 882 bcm_sysport_free_cb(cb); 883 /* SKB fragment */ 884 } else if (dma_unmap_addr(cb, dma_addr)) { 885 *bytes_compl += dma_unmap_len(cb, dma_len); 886 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr), 887 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE); 888 dma_unmap_addr_set(cb, dma_addr, 0); 889 } 890 } 891 892 /* Reclaim queued SKBs for transmission completion, lockless version */ 893 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 894 struct bcm_sysport_tx_ring *ring) 895 { 896 unsigned int pkts_compl = 0, bytes_compl = 0; 897 struct net_device *ndev = priv->netdev; 898 unsigned int txbds_processed = 0; 899 struct bcm_sysport_cb *cb; 900 unsigned int txbds_ready; 901 unsigned int c_index; 902 u32 hw_ind; 903 904 /* Clear status before servicing to reduce spurious interrupts */ 905 if (!ring->priv->is_lite) 906 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR); 907 else 908 intrl2_0_writel(ring->priv, BIT(ring->index + 909 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR); 910 911 /* Compute how many descriptors have been processed since last call */ 912 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index)); 913 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK; 914 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK; 915 916 netif_dbg(priv, tx_done, ndev, 917 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n", 918 ring->index, ring->c_index, c_index, txbds_ready); 919 920 while (txbds_processed < txbds_ready) { 921 cb = &ring->cbs[ring->clean_index]; 922 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl); 923 924 ring->desc_count++; 925 txbds_processed++; 926 927 if (likely(ring->clean_index < ring->size - 1)) 928 ring->clean_index++; 929 else 930 ring->clean_index = 0; 931 } 932 933 u64_stats_update_begin(&priv->syncp); 934 ring->packets += pkts_compl; 935 ring->bytes += bytes_compl; 936 u64_stats_update_end(&priv->syncp); 937 938 ring->c_index = c_index; 939 940 netif_dbg(priv, tx_done, ndev, 941 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n", 942 ring->index, ring->c_index, pkts_compl, bytes_compl); 943 944 return pkts_compl; 945 } 946 947 /* Locked version of the per-ring TX reclaim routine */ 948 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 949 struct bcm_sysport_tx_ring *ring) 950 { 951 struct netdev_queue *txq; 952 unsigned int released; 953 unsigned long flags; 954 955 txq = netdev_get_tx_queue(priv->netdev, ring->index); 956 957 spin_lock_irqsave(&ring->lock, flags); 958 released = __bcm_sysport_tx_reclaim(priv, ring); 959 if (released) 960 netif_tx_wake_queue(txq); 961 962 spin_unlock_irqrestore(&ring->lock, flags); 963 964 return released; 965 } 966 967 /* Locked version of the per-ring TX reclaim, but does not wake the queue */ 968 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv, 969 struct bcm_sysport_tx_ring *ring) 970 { 971 unsigned long flags; 972 973 spin_lock_irqsave(&ring->lock, flags); 974 __bcm_sysport_tx_reclaim(priv, ring); 975 spin_unlock_irqrestore(&ring->lock, flags); 976 } 977 978 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget) 979 { 980 struct bcm_sysport_tx_ring *ring = 981 container_of(napi, struct bcm_sysport_tx_ring, napi); 982 unsigned int work_done = 0; 983 984 work_done = bcm_sysport_tx_reclaim(ring->priv, ring); 985 986 if (work_done == 0) { 987 napi_complete(napi); 988 /* re-enable TX interrupt */ 989 if (!ring->priv->is_lite) 990 intrl2_1_mask_clear(ring->priv, BIT(ring->index)); 991 else 992 intrl2_0_mask_clear(ring->priv, BIT(ring->index + 993 INTRL2_0_TDMA_MBDONE_SHIFT)); 994 995 return 0; 996 } 997 998 return budget; 999 } 1000 1001 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv) 1002 { 1003 unsigned int q; 1004 1005 for (q = 0; q < priv->netdev->num_tx_queues; q++) 1006 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]); 1007 } 1008 1009 static int bcm_sysport_poll(struct napi_struct *napi, int budget) 1010 { 1011 struct bcm_sysport_priv *priv = 1012 container_of(napi, struct bcm_sysport_priv, napi); 1013 struct net_dim_sample dim_sample; 1014 unsigned int work_done = 0; 1015 1016 work_done = bcm_sysport_desc_rx(priv, budget); 1017 1018 priv->rx_c_index += work_done; 1019 priv->rx_c_index &= RDMA_CONS_INDEX_MASK; 1020 1021 /* SYSTEMPORT Lite groups the producer/consumer index, producer is 1022 * maintained by HW, but writes to it will be ignore while RDMA 1023 * is active 1024 */ 1025 if (!priv->is_lite) 1026 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX); 1027 else 1028 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX); 1029 1030 if (work_done < budget) { 1031 napi_complete_done(napi, work_done); 1032 /* re-enable RX interrupts */ 1033 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE); 1034 } 1035 1036 if (priv->dim.use_dim) { 1037 net_dim_sample(priv->dim.event_ctr, priv->dim.packets, 1038 priv->dim.bytes, &dim_sample); 1039 net_dim(&priv->dim.dim, dim_sample); 1040 } 1041 1042 return work_done; 1043 } 1044 1045 static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable) 1046 { 1047 u32 reg, bit; 1048 1049 reg = umac_readl(priv, UMAC_MPD_CTRL); 1050 if (enable) 1051 reg |= MPD_EN; 1052 else 1053 reg &= ~MPD_EN; 1054 umac_writel(priv, reg, UMAC_MPD_CTRL); 1055 1056 if (priv->is_lite) 1057 bit = RBUF_ACPI_EN_LITE; 1058 else 1059 bit = RBUF_ACPI_EN; 1060 1061 reg = rbuf_readl(priv, RBUF_CONTROL); 1062 if (enable) 1063 reg |= bit; 1064 else 1065 reg &= ~bit; 1066 rbuf_writel(priv, reg, RBUF_CONTROL); 1067 } 1068 1069 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv) 1070 { 1071 unsigned int index; 1072 u32 reg; 1073 1074 /* Disable RXCHK, active filters and Broadcom tag matching */ 1075 reg = rxchk_readl(priv, RXCHK_CONTROL); 1076 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 1077 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN); 1078 rxchk_writel(priv, reg, RXCHK_CONTROL); 1079 1080 /* Make sure we restore correct CID index in case HW lost 1081 * its context during deep idle state 1082 */ 1083 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 1084 rxchk_writel(priv, priv->filters_loc[index] << 1085 RXCHK_BRCM_TAG_CID_SHIFT, RXCHK_BRCM_TAG(index)); 1086 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 1087 } 1088 1089 /* Clear the MagicPacket detection logic */ 1090 mpd_enable_set(priv, false); 1091 1092 reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS); 1093 if (reg & INTRL2_0_MPD) 1094 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n"); 1095 1096 if (reg & INTRL2_0_BRCM_MATCH_TAG) { 1097 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) & 1098 RXCHK_BRCM_TAG_MATCH_MASK; 1099 netdev_info(priv->netdev, 1100 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg); 1101 } 1102 1103 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n"); 1104 } 1105 1106 static void bcm_sysport_dim_work(struct work_struct *work) 1107 { 1108 struct net_dim *dim = container_of(work, struct net_dim, work); 1109 struct bcm_sysport_net_dim *ndim = 1110 container_of(dim, struct bcm_sysport_net_dim, dim); 1111 struct bcm_sysport_priv *priv = 1112 container_of(ndim, struct bcm_sysport_priv, dim); 1113 struct net_dim_cq_moder cur_profile = 1114 net_dim_get_rx_moderation(dim->mode, dim->profile_ix); 1115 1116 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts); 1117 dim->state = NET_DIM_START_MEASURE; 1118 } 1119 1120 /* RX and misc interrupt routine */ 1121 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id) 1122 { 1123 struct net_device *dev = dev_id; 1124 struct bcm_sysport_priv *priv = netdev_priv(dev); 1125 struct bcm_sysport_tx_ring *txr; 1126 unsigned int ring, ring_bit; 1127 1128 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) & 1129 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); 1130 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); 1131 1132 if (unlikely(priv->irq0_stat == 0)) { 1133 netdev_warn(priv->netdev, "spurious RX interrupt\n"); 1134 return IRQ_NONE; 1135 } 1136 1137 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) { 1138 priv->dim.event_ctr++; 1139 if (likely(napi_schedule_prep(&priv->napi))) { 1140 /* disable RX interrupts */ 1141 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE); 1142 __napi_schedule_irqoff(&priv->napi); 1143 } 1144 } 1145 1146 /* TX ring is full, perform a full reclaim since we do not know 1147 * which one would trigger this interrupt 1148 */ 1149 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL) 1150 bcm_sysport_tx_reclaim_all(priv); 1151 1152 if (!priv->is_lite) 1153 goto out; 1154 1155 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1156 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT); 1157 if (!(priv->irq0_stat & ring_bit)) 1158 continue; 1159 1160 txr = &priv->tx_rings[ring]; 1161 1162 if (likely(napi_schedule_prep(&txr->napi))) { 1163 intrl2_0_mask_set(priv, ring_bit); 1164 __napi_schedule(&txr->napi); 1165 } 1166 } 1167 out: 1168 return IRQ_HANDLED; 1169 } 1170 1171 /* TX interrupt service routine */ 1172 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id) 1173 { 1174 struct net_device *dev = dev_id; 1175 struct bcm_sysport_priv *priv = netdev_priv(dev); 1176 struct bcm_sysport_tx_ring *txr; 1177 unsigned int ring; 1178 1179 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) & 1180 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS); 1181 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1182 1183 if (unlikely(priv->irq1_stat == 0)) { 1184 netdev_warn(priv->netdev, "spurious TX interrupt\n"); 1185 return IRQ_NONE; 1186 } 1187 1188 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1189 if (!(priv->irq1_stat & BIT(ring))) 1190 continue; 1191 1192 txr = &priv->tx_rings[ring]; 1193 1194 if (likely(napi_schedule_prep(&txr->napi))) { 1195 intrl2_1_mask_set(priv, BIT(ring)); 1196 __napi_schedule_irqoff(&txr->napi); 1197 } 1198 } 1199 1200 return IRQ_HANDLED; 1201 } 1202 1203 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id) 1204 { 1205 struct bcm_sysport_priv *priv = dev_id; 1206 1207 pm_wakeup_event(&priv->pdev->dev, 0); 1208 1209 return IRQ_HANDLED; 1210 } 1211 1212 #ifdef CONFIG_NET_POLL_CONTROLLER 1213 static void bcm_sysport_poll_controller(struct net_device *dev) 1214 { 1215 struct bcm_sysport_priv *priv = netdev_priv(dev); 1216 1217 disable_irq(priv->irq0); 1218 bcm_sysport_rx_isr(priv->irq0, priv); 1219 enable_irq(priv->irq0); 1220 1221 if (!priv->is_lite) { 1222 disable_irq(priv->irq1); 1223 bcm_sysport_tx_isr(priv->irq1, priv); 1224 enable_irq(priv->irq1); 1225 } 1226 } 1227 #endif 1228 1229 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb, 1230 struct net_device *dev) 1231 { 1232 struct bcm_sysport_priv *priv = netdev_priv(dev); 1233 struct sk_buff *nskb; 1234 struct bcm_tsb *tsb; 1235 u32 csum_info; 1236 u8 ip_proto; 1237 u16 csum_start; 1238 __be16 ip_ver; 1239 1240 /* Re-allocate SKB if needed */ 1241 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) { 1242 nskb = skb_realloc_headroom(skb, sizeof(*tsb)); 1243 if (!nskb) { 1244 dev_kfree_skb_any(skb); 1245 priv->mib.tx_realloc_tsb_failed++; 1246 dev->stats.tx_errors++; 1247 dev->stats.tx_dropped++; 1248 return NULL; 1249 } 1250 dev_consume_skb_any(skb); 1251 skb = nskb; 1252 priv->mib.tx_realloc_tsb++; 1253 } 1254 1255 tsb = skb_push(skb, sizeof(*tsb)); 1256 /* Zero-out TSB by default */ 1257 memset(tsb, 0, sizeof(*tsb)); 1258 1259 if (skb->ip_summed == CHECKSUM_PARTIAL) { 1260 ip_ver = skb->protocol; 1261 switch (ip_ver) { 1262 case htons(ETH_P_IP): 1263 ip_proto = ip_hdr(skb)->protocol; 1264 break; 1265 case htons(ETH_P_IPV6): 1266 ip_proto = ipv6_hdr(skb)->nexthdr; 1267 break; 1268 default: 1269 return skb; 1270 } 1271 1272 /* Get the checksum offset and the L4 (transport) offset */ 1273 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb); 1274 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK; 1275 csum_info |= (csum_start << L4_PTR_SHIFT); 1276 1277 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) { 1278 csum_info |= L4_LENGTH_VALID; 1279 if (ip_proto == IPPROTO_UDP && 1280 ip_ver == htons(ETH_P_IP)) 1281 csum_info |= L4_UDP; 1282 } else { 1283 csum_info = 0; 1284 } 1285 1286 tsb->l4_ptr_dest_map = csum_info; 1287 } 1288 1289 return skb; 1290 } 1291 1292 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb, 1293 struct net_device *dev) 1294 { 1295 struct bcm_sysport_priv *priv = netdev_priv(dev); 1296 struct device *kdev = &priv->pdev->dev; 1297 struct bcm_sysport_tx_ring *ring; 1298 struct bcm_sysport_cb *cb; 1299 struct netdev_queue *txq; 1300 struct dma_desc *desc; 1301 unsigned int skb_len; 1302 unsigned long flags; 1303 dma_addr_t mapping; 1304 u32 len_status; 1305 u16 queue; 1306 int ret; 1307 1308 queue = skb_get_queue_mapping(skb); 1309 txq = netdev_get_tx_queue(dev, queue); 1310 ring = &priv->tx_rings[queue]; 1311 1312 /* lock against tx reclaim in BH context and TX ring full interrupt */ 1313 spin_lock_irqsave(&ring->lock, flags); 1314 if (unlikely(ring->desc_count == 0)) { 1315 netif_tx_stop_queue(txq); 1316 netdev_err(dev, "queue %d awake and ring full!\n", queue); 1317 ret = NETDEV_TX_BUSY; 1318 goto out; 1319 } 1320 1321 /* Insert TSB and checksum infos */ 1322 if (priv->tsb_en) { 1323 skb = bcm_sysport_insert_tsb(skb, dev); 1324 if (!skb) { 1325 ret = NETDEV_TX_OK; 1326 goto out; 1327 } 1328 } 1329 1330 skb_len = skb->len; 1331 1332 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); 1333 if (dma_mapping_error(kdev, mapping)) { 1334 priv->mib.tx_dma_failed++; 1335 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n", 1336 skb->data, skb_len); 1337 ret = NETDEV_TX_OK; 1338 goto out; 1339 } 1340 1341 /* Remember the SKB for future freeing */ 1342 cb = &ring->cbs[ring->curr_desc]; 1343 cb->skb = skb; 1344 dma_unmap_addr_set(cb, dma_addr, mapping); 1345 dma_unmap_len_set(cb, dma_len, skb_len); 1346 1347 /* Fetch a descriptor entry from our pool */ 1348 desc = ring->desc_cpu; 1349 1350 desc->addr_lo = lower_32_bits(mapping); 1351 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK; 1352 len_status |= (skb_len << DESC_LEN_SHIFT); 1353 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) << 1354 DESC_STATUS_SHIFT; 1355 if (skb->ip_summed == CHECKSUM_PARTIAL) 1356 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT); 1357 1358 ring->curr_desc++; 1359 if (ring->curr_desc == ring->size) 1360 ring->curr_desc = 0; 1361 ring->desc_count--; 1362 1363 /* Ensure write completion of the descriptor status/length 1364 * in DRAM before the System Port WRITE_PORT register latches 1365 * the value 1366 */ 1367 wmb(); 1368 desc->addr_status_len = len_status; 1369 wmb(); 1370 1371 /* Write this descriptor address to the RING write port */ 1372 tdma_port_write_desc_addr(priv, desc, ring->index); 1373 1374 /* Check ring space and update SW control flow */ 1375 if (ring->desc_count == 0) 1376 netif_tx_stop_queue(txq); 1377 1378 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n", 1379 ring->index, ring->desc_count, ring->curr_desc); 1380 1381 ret = NETDEV_TX_OK; 1382 out: 1383 spin_unlock_irqrestore(&ring->lock, flags); 1384 return ret; 1385 } 1386 1387 static void bcm_sysport_tx_timeout(struct net_device *dev) 1388 { 1389 netdev_warn(dev, "transmit timeout!\n"); 1390 1391 netif_trans_update(dev); 1392 dev->stats.tx_errors++; 1393 1394 netif_tx_wake_all_queues(dev); 1395 } 1396 1397 /* phylib adjust link callback */ 1398 static void bcm_sysport_adj_link(struct net_device *dev) 1399 { 1400 struct bcm_sysport_priv *priv = netdev_priv(dev); 1401 struct phy_device *phydev = dev->phydev; 1402 unsigned int changed = 0; 1403 u32 cmd_bits = 0, reg; 1404 1405 if (priv->old_link != phydev->link) { 1406 changed = 1; 1407 priv->old_link = phydev->link; 1408 } 1409 1410 if (priv->old_duplex != phydev->duplex) { 1411 changed = 1; 1412 priv->old_duplex = phydev->duplex; 1413 } 1414 1415 if (priv->is_lite) 1416 goto out; 1417 1418 switch (phydev->speed) { 1419 case SPEED_2500: 1420 cmd_bits = CMD_SPEED_2500; 1421 break; 1422 case SPEED_1000: 1423 cmd_bits = CMD_SPEED_1000; 1424 break; 1425 case SPEED_100: 1426 cmd_bits = CMD_SPEED_100; 1427 break; 1428 case SPEED_10: 1429 cmd_bits = CMD_SPEED_10; 1430 break; 1431 default: 1432 break; 1433 } 1434 cmd_bits <<= CMD_SPEED_SHIFT; 1435 1436 if (phydev->duplex == DUPLEX_HALF) 1437 cmd_bits |= CMD_HD_EN; 1438 1439 if (priv->old_pause != phydev->pause) { 1440 changed = 1; 1441 priv->old_pause = phydev->pause; 1442 } 1443 1444 if (!phydev->pause) 1445 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE; 1446 1447 if (!changed) 1448 return; 1449 1450 if (phydev->link) { 1451 reg = umac_readl(priv, UMAC_CMD); 1452 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) | 1453 CMD_HD_EN | CMD_RX_PAUSE_IGNORE | 1454 CMD_TX_PAUSE_IGNORE); 1455 reg |= cmd_bits; 1456 umac_writel(priv, reg, UMAC_CMD); 1457 } 1458 out: 1459 if (changed) 1460 phy_print_status(phydev); 1461 } 1462 1463 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv, 1464 void (*cb)(struct work_struct *work)) 1465 { 1466 struct bcm_sysport_net_dim *dim = &priv->dim; 1467 1468 INIT_WORK(&dim->dim.work, cb); 1469 dim->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE; 1470 dim->event_ctr = 0; 1471 dim->packets = 0; 1472 dim->bytes = 0; 1473 } 1474 1475 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv) 1476 { 1477 struct bcm_sysport_net_dim *dim = &priv->dim; 1478 struct net_dim_cq_moder moder; 1479 u32 usecs, pkts; 1480 1481 usecs = priv->rx_coalesce_usecs; 1482 pkts = priv->rx_max_coalesced_frames; 1483 1484 /* If DIM was enabled, re-apply default parameters */ 1485 if (dim->use_dim) { 1486 moder = net_dim_get_def_rx_moderation(dim->dim.mode); 1487 usecs = moder.usec; 1488 pkts = moder.pkts; 1489 } 1490 1491 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 1492 } 1493 1494 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv, 1495 unsigned int index) 1496 { 1497 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1498 struct device *kdev = &priv->pdev->dev; 1499 size_t size; 1500 void *p; 1501 u32 reg; 1502 1503 /* Simple descriptors partitioning for now */ 1504 size = 256; 1505 1506 /* We just need one DMA descriptor which is DMA-able, since writing to 1507 * the port will allocate a new descriptor in its internal linked-list 1508 */ 1509 p = dma_alloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma, 1510 GFP_KERNEL); 1511 if (!p) { 1512 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n"); 1513 return -ENOMEM; 1514 } 1515 1516 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL); 1517 if (!ring->cbs) { 1518 dma_free_coherent(kdev, sizeof(struct dma_desc), 1519 ring->desc_cpu, ring->desc_dma); 1520 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1521 return -ENOMEM; 1522 } 1523 1524 /* Initialize SW view of the ring */ 1525 spin_lock_init(&ring->lock); 1526 ring->priv = priv; 1527 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64); 1528 ring->index = index; 1529 ring->size = size; 1530 ring->clean_index = 0; 1531 ring->alloc_size = ring->size; 1532 ring->desc_cpu = p; 1533 ring->desc_count = ring->size; 1534 ring->curr_desc = 0; 1535 1536 /* Initialize HW ring */ 1537 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index)); 1538 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index)); 1539 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index)); 1540 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index)); 1541 1542 /* Configure QID and port mapping */ 1543 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index)); 1544 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT); 1545 if (ring->inspect) { 1546 reg |= ring->switch_queue & RING_QID_MASK; 1547 reg |= ring->switch_port << RING_PORT_ID_SHIFT; 1548 } else { 1549 reg |= RING_IGNORE_STATUS; 1550 } 1551 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index)); 1552 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index)); 1553 1554 /* Enable ACB algorithm 2 */ 1555 reg = tdma_readl(priv, TDMA_CONTROL); 1556 reg |= tdma_control_bit(priv, ACB_ALGO); 1557 tdma_writel(priv, reg, TDMA_CONTROL); 1558 1559 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides 1560 * with the original definition of ACB_ALGO 1561 */ 1562 reg = tdma_readl(priv, TDMA_CONTROL); 1563 if (priv->is_lite) 1564 reg &= ~BIT(TSB_SWAP1); 1565 /* Set a correct TSB format based on host endian */ 1566 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1567 reg |= tdma_control_bit(priv, TSB_SWAP0); 1568 else 1569 reg &= ~tdma_control_bit(priv, TSB_SWAP0); 1570 tdma_writel(priv, reg, TDMA_CONTROL); 1571 1572 /* Program the number of descriptors as MAX_THRESHOLD and half of 1573 * its size for the hysteresis trigger 1574 */ 1575 tdma_writel(priv, ring->size | 1576 1 << RING_HYST_THRESH_SHIFT, 1577 TDMA_DESC_RING_MAX_HYST(index)); 1578 1579 /* Enable the ring queue in the arbiter */ 1580 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN); 1581 reg |= (1 << index); 1582 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN); 1583 1584 napi_enable(&ring->napi); 1585 1586 netif_dbg(priv, hw, priv->netdev, 1587 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n", 1588 ring->size, ring->desc_cpu, ring->switch_queue, 1589 ring->switch_port); 1590 1591 return 0; 1592 } 1593 1594 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv, 1595 unsigned int index) 1596 { 1597 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1598 struct device *kdev = &priv->pdev->dev; 1599 u32 reg; 1600 1601 /* Caller should stop the TDMA engine */ 1602 reg = tdma_readl(priv, TDMA_STATUS); 1603 if (!(reg & TDMA_DISABLED)) 1604 netdev_warn(priv->netdev, "TDMA not stopped!\n"); 1605 1606 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could 1607 * fail, so by checking this pointer we know whether the TX ring was 1608 * fully initialized or not. 1609 */ 1610 if (!ring->cbs) 1611 return; 1612 1613 napi_disable(&ring->napi); 1614 netif_napi_del(&ring->napi); 1615 1616 bcm_sysport_tx_clean(priv, ring); 1617 1618 kfree(ring->cbs); 1619 ring->cbs = NULL; 1620 1621 if (ring->desc_dma) { 1622 dma_free_coherent(kdev, sizeof(struct dma_desc), 1623 ring->desc_cpu, ring->desc_dma); 1624 ring->desc_dma = 0; 1625 } 1626 ring->size = 0; 1627 ring->alloc_size = 0; 1628 1629 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n"); 1630 } 1631 1632 /* RDMA helper */ 1633 static inline int rdma_enable_set(struct bcm_sysport_priv *priv, 1634 unsigned int enable) 1635 { 1636 unsigned int timeout = 1000; 1637 u32 reg; 1638 1639 reg = rdma_readl(priv, RDMA_CONTROL); 1640 if (enable) 1641 reg |= RDMA_EN; 1642 else 1643 reg &= ~RDMA_EN; 1644 rdma_writel(priv, reg, RDMA_CONTROL); 1645 1646 /* Poll for RMDA disabling completion */ 1647 do { 1648 reg = rdma_readl(priv, RDMA_STATUS); 1649 if (!!(reg & RDMA_DISABLED) == !enable) 1650 return 0; 1651 usleep_range(1000, 2000); 1652 } while (timeout-- > 0); 1653 1654 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n"); 1655 1656 return -ETIMEDOUT; 1657 } 1658 1659 /* TDMA helper */ 1660 static inline int tdma_enable_set(struct bcm_sysport_priv *priv, 1661 unsigned int enable) 1662 { 1663 unsigned int timeout = 1000; 1664 u32 reg; 1665 1666 reg = tdma_readl(priv, TDMA_CONTROL); 1667 if (enable) 1668 reg |= tdma_control_bit(priv, TDMA_EN); 1669 else 1670 reg &= ~tdma_control_bit(priv, TDMA_EN); 1671 tdma_writel(priv, reg, TDMA_CONTROL); 1672 1673 /* Poll for TMDA disabling completion */ 1674 do { 1675 reg = tdma_readl(priv, TDMA_STATUS); 1676 if (!!(reg & TDMA_DISABLED) == !enable) 1677 return 0; 1678 1679 usleep_range(1000, 2000); 1680 } while (timeout-- > 0); 1681 1682 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n"); 1683 1684 return -ETIMEDOUT; 1685 } 1686 1687 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv) 1688 { 1689 struct bcm_sysport_cb *cb; 1690 u32 reg; 1691 int ret; 1692 int i; 1693 1694 /* Initialize SW view of the RX ring */ 1695 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC; 1696 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET; 1697 priv->rx_c_index = 0; 1698 priv->rx_read_ptr = 0; 1699 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb), 1700 GFP_KERNEL); 1701 if (!priv->rx_cbs) { 1702 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1703 return -ENOMEM; 1704 } 1705 1706 for (i = 0; i < priv->num_rx_bds; i++) { 1707 cb = priv->rx_cbs + i; 1708 cb->bd_addr = priv->rx_bds + i * DESC_SIZE; 1709 } 1710 1711 ret = bcm_sysport_alloc_rx_bufs(priv); 1712 if (ret) { 1713 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n"); 1714 return ret; 1715 } 1716 1717 /* Initialize HW, ensure RDMA is disabled */ 1718 reg = rdma_readl(priv, RDMA_STATUS); 1719 if (!(reg & RDMA_DISABLED)) 1720 rdma_enable_set(priv, 0); 1721 1722 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO); 1723 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI); 1724 rdma_writel(priv, 0, RDMA_PROD_INDEX); 1725 rdma_writel(priv, 0, RDMA_CONS_INDEX); 1726 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT | 1727 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE); 1728 /* Operate the queue in ring mode */ 1729 rdma_writel(priv, 0, RDMA_START_ADDR_HI); 1730 rdma_writel(priv, 0, RDMA_START_ADDR_LO); 1731 rdma_writel(priv, 0, RDMA_END_ADDR_HI); 1732 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO); 1733 1734 netif_dbg(priv, hw, priv->netdev, 1735 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n", 1736 priv->num_rx_bds, priv->rx_bds); 1737 1738 return 0; 1739 } 1740 1741 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv) 1742 { 1743 struct bcm_sysport_cb *cb; 1744 unsigned int i; 1745 u32 reg; 1746 1747 /* Caller should ensure RDMA is disabled */ 1748 reg = rdma_readl(priv, RDMA_STATUS); 1749 if (!(reg & RDMA_DISABLED)) 1750 netdev_warn(priv->netdev, "RDMA not stopped!\n"); 1751 1752 for (i = 0; i < priv->num_rx_bds; i++) { 1753 cb = &priv->rx_cbs[i]; 1754 if (dma_unmap_addr(cb, dma_addr)) 1755 dma_unmap_single(&priv->pdev->dev, 1756 dma_unmap_addr(cb, dma_addr), 1757 RX_BUF_LENGTH, DMA_FROM_DEVICE); 1758 bcm_sysport_free_cb(cb); 1759 } 1760 1761 kfree(priv->rx_cbs); 1762 priv->rx_cbs = NULL; 1763 1764 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n"); 1765 } 1766 1767 static void bcm_sysport_set_rx_mode(struct net_device *dev) 1768 { 1769 struct bcm_sysport_priv *priv = netdev_priv(dev); 1770 u32 reg; 1771 1772 if (priv->is_lite) 1773 return; 1774 1775 reg = umac_readl(priv, UMAC_CMD); 1776 if (dev->flags & IFF_PROMISC) 1777 reg |= CMD_PROMISC; 1778 else 1779 reg &= ~CMD_PROMISC; 1780 umac_writel(priv, reg, UMAC_CMD); 1781 1782 /* No support for ALLMULTI */ 1783 if (dev->flags & IFF_ALLMULTI) 1784 return; 1785 } 1786 1787 static inline void umac_enable_set(struct bcm_sysport_priv *priv, 1788 u32 mask, unsigned int enable) 1789 { 1790 u32 reg; 1791 1792 if (!priv->is_lite) { 1793 reg = umac_readl(priv, UMAC_CMD); 1794 if (enable) 1795 reg |= mask; 1796 else 1797 reg &= ~mask; 1798 umac_writel(priv, reg, UMAC_CMD); 1799 } else { 1800 reg = gib_readl(priv, GIB_CONTROL); 1801 if (enable) 1802 reg |= mask; 1803 else 1804 reg &= ~mask; 1805 gib_writel(priv, reg, GIB_CONTROL); 1806 } 1807 1808 /* UniMAC stops on a packet boundary, wait for a full-sized packet 1809 * to be processed (1 msec). 1810 */ 1811 if (enable == 0) 1812 usleep_range(1000, 2000); 1813 } 1814 1815 static inline void umac_reset(struct bcm_sysport_priv *priv) 1816 { 1817 u32 reg; 1818 1819 if (priv->is_lite) 1820 return; 1821 1822 reg = umac_readl(priv, UMAC_CMD); 1823 reg |= CMD_SW_RESET; 1824 umac_writel(priv, reg, UMAC_CMD); 1825 udelay(10); 1826 reg = umac_readl(priv, UMAC_CMD); 1827 reg &= ~CMD_SW_RESET; 1828 umac_writel(priv, reg, UMAC_CMD); 1829 } 1830 1831 static void umac_set_hw_addr(struct bcm_sysport_priv *priv, 1832 unsigned char *addr) 1833 { 1834 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | 1835 addr[3]; 1836 u32 mac1 = (addr[4] << 8) | addr[5]; 1837 1838 if (!priv->is_lite) { 1839 umac_writel(priv, mac0, UMAC_MAC0); 1840 umac_writel(priv, mac1, UMAC_MAC1); 1841 } else { 1842 gib_writel(priv, mac0, GIB_MAC0); 1843 gib_writel(priv, mac1, GIB_MAC1); 1844 } 1845 } 1846 1847 static void topctrl_flush(struct bcm_sysport_priv *priv) 1848 { 1849 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 1850 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 1851 mdelay(1); 1852 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 1853 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 1854 } 1855 1856 static int bcm_sysport_change_mac(struct net_device *dev, void *p) 1857 { 1858 struct bcm_sysport_priv *priv = netdev_priv(dev); 1859 struct sockaddr *addr = p; 1860 1861 if (!is_valid_ether_addr(addr->sa_data)) 1862 return -EINVAL; 1863 1864 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 1865 1866 /* interface is disabled, changes to MAC will be reflected on next 1867 * open call 1868 */ 1869 if (!netif_running(dev)) 1870 return 0; 1871 1872 umac_set_hw_addr(priv, dev->dev_addr); 1873 1874 return 0; 1875 } 1876 1877 static void bcm_sysport_get_stats64(struct net_device *dev, 1878 struct rtnl_link_stats64 *stats) 1879 { 1880 struct bcm_sysport_priv *priv = netdev_priv(dev); 1881 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 1882 unsigned int start; 1883 1884 netdev_stats_to_stats64(stats, &dev->stats); 1885 1886 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes, 1887 &stats->tx_packets); 1888 1889 do { 1890 start = u64_stats_fetch_begin_irq(&priv->syncp); 1891 stats->rx_packets = stats64->rx_packets; 1892 stats->rx_bytes = stats64->rx_bytes; 1893 } while (u64_stats_fetch_retry_irq(&priv->syncp, start)); 1894 } 1895 1896 static void bcm_sysport_netif_start(struct net_device *dev) 1897 { 1898 struct bcm_sysport_priv *priv = netdev_priv(dev); 1899 1900 /* Enable NAPI */ 1901 bcm_sysport_init_dim(priv, bcm_sysport_dim_work); 1902 bcm_sysport_init_rx_coalesce(priv); 1903 napi_enable(&priv->napi); 1904 1905 /* Enable RX interrupt and TX ring full interrupt */ 1906 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 1907 1908 phy_start(dev->phydev); 1909 1910 /* Enable TX interrupts for the TXQs */ 1911 if (!priv->is_lite) 1912 intrl2_1_mask_clear(priv, 0xffffffff); 1913 else 1914 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK); 1915 } 1916 1917 static void rbuf_init(struct bcm_sysport_priv *priv) 1918 { 1919 u32 reg; 1920 1921 reg = rbuf_readl(priv, RBUF_CONTROL); 1922 reg |= RBUF_4B_ALGN | RBUF_RSB_EN; 1923 /* Set a correct RSB format on SYSTEMPORT Lite */ 1924 if (priv->is_lite) 1925 reg &= ~RBUF_RSB_SWAP1; 1926 1927 /* Set a correct RSB format based on host endian */ 1928 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1929 reg |= RBUF_RSB_SWAP0; 1930 else 1931 reg &= ~RBUF_RSB_SWAP0; 1932 rbuf_writel(priv, reg, RBUF_CONTROL); 1933 } 1934 1935 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv) 1936 { 1937 intrl2_0_mask_set(priv, 0xffffffff); 1938 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1939 if (!priv->is_lite) { 1940 intrl2_1_mask_set(priv, 0xffffffff); 1941 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1942 } 1943 } 1944 1945 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv) 1946 { 1947 u32 reg; 1948 1949 reg = gib_readl(priv, GIB_CONTROL); 1950 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */ 1951 if (netdev_uses_dsa(priv->netdev)) { 1952 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT); 1953 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT; 1954 } 1955 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT); 1956 reg |= 12 << GIB_IPG_LEN_SHIFT; 1957 gib_writel(priv, reg, GIB_CONTROL); 1958 } 1959 1960 static int bcm_sysport_open(struct net_device *dev) 1961 { 1962 struct bcm_sysport_priv *priv = netdev_priv(dev); 1963 struct phy_device *phydev; 1964 unsigned int i; 1965 int ret; 1966 1967 /* Reset UniMAC */ 1968 umac_reset(priv); 1969 1970 /* Flush TX and RX FIFOs at TOPCTRL level */ 1971 topctrl_flush(priv); 1972 1973 /* Disable the UniMAC RX/TX */ 1974 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 1975 1976 /* Enable RBUF 2bytes alignment and Receive Status Block */ 1977 rbuf_init(priv); 1978 1979 /* Set maximum frame length */ 1980 if (!priv->is_lite) 1981 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 1982 else 1983 gib_set_pad_extension(priv); 1984 1985 /* Apply features again in case we changed them while interface was 1986 * down 1987 */ 1988 bcm_sysport_set_features(dev, dev->features); 1989 1990 /* Set MAC address */ 1991 umac_set_hw_addr(priv, dev->dev_addr); 1992 1993 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link, 1994 0, priv->phy_interface); 1995 if (!phydev) { 1996 netdev_err(dev, "could not attach to PHY\n"); 1997 return -ENODEV; 1998 } 1999 2000 /* Reset house keeping link status */ 2001 priv->old_duplex = -1; 2002 priv->old_link = -1; 2003 priv->old_pause = -1; 2004 2005 /* mask all interrupts and request them */ 2006 bcm_sysport_mask_all_intrs(priv); 2007 2008 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev); 2009 if (ret) { 2010 netdev_err(dev, "failed to request RX interrupt\n"); 2011 goto out_phy_disconnect; 2012 } 2013 2014 if (!priv->is_lite) { 2015 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, 2016 dev->name, dev); 2017 if (ret) { 2018 netdev_err(dev, "failed to request TX interrupt\n"); 2019 goto out_free_irq0; 2020 } 2021 } 2022 2023 /* Initialize both hardware and software ring */ 2024 for (i = 0; i < dev->num_tx_queues; i++) { 2025 ret = bcm_sysport_init_tx_ring(priv, i); 2026 if (ret) { 2027 netdev_err(dev, "failed to initialize TX ring %d\n", 2028 i); 2029 goto out_free_tx_ring; 2030 } 2031 } 2032 2033 /* Initialize linked-list */ 2034 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2035 2036 /* Initialize RX ring */ 2037 ret = bcm_sysport_init_rx_ring(priv); 2038 if (ret) { 2039 netdev_err(dev, "failed to initialize RX ring\n"); 2040 goto out_free_rx_ring; 2041 } 2042 2043 /* Turn on RDMA */ 2044 ret = rdma_enable_set(priv, 1); 2045 if (ret) 2046 goto out_free_rx_ring; 2047 2048 /* Turn on TDMA */ 2049 ret = tdma_enable_set(priv, 1); 2050 if (ret) 2051 goto out_clear_rx_int; 2052 2053 /* Turn on UniMAC TX/RX */ 2054 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1); 2055 2056 bcm_sysport_netif_start(dev); 2057 2058 netif_tx_start_all_queues(dev); 2059 2060 return 0; 2061 2062 out_clear_rx_int: 2063 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 2064 out_free_rx_ring: 2065 bcm_sysport_fini_rx_ring(priv); 2066 out_free_tx_ring: 2067 for (i = 0; i < dev->num_tx_queues; i++) 2068 bcm_sysport_fini_tx_ring(priv, i); 2069 if (!priv->is_lite) 2070 free_irq(priv->irq1, dev); 2071 out_free_irq0: 2072 free_irq(priv->irq0, dev); 2073 out_phy_disconnect: 2074 phy_disconnect(phydev); 2075 return ret; 2076 } 2077 2078 static void bcm_sysport_netif_stop(struct net_device *dev) 2079 { 2080 struct bcm_sysport_priv *priv = netdev_priv(dev); 2081 2082 /* stop all software from updating hardware */ 2083 netif_tx_disable(dev); 2084 napi_disable(&priv->napi); 2085 cancel_work_sync(&priv->dim.dim.work); 2086 phy_stop(dev->phydev); 2087 2088 /* mask all interrupts */ 2089 bcm_sysport_mask_all_intrs(priv); 2090 } 2091 2092 static int bcm_sysport_stop(struct net_device *dev) 2093 { 2094 struct bcm_sysport_priv *priv = netdev_priv(dev); 2095 unsigned int i; 2096 int ret; 2097 2098 bcm_sysport_netif_stop(dev); 2099 2100 /* Disable UniMAC RX */ 2101 umac_enable_set(priv, CMD_RX_EN, 0); 2102 2103 ret = tdma_enable_set(priv, 0); 2104 if (ret) { 2105 netdev_err(dev, "timeout disabling RDMA\n"); 2106 return ret; 2107 } 2108 2109 /* Wait for a maximum packet size to be drained */ 2110 usleep_range(2000, 3000); 2111 2112 ret = rdma_enable_set(priv, 0); 2113 if (ret) { 2114 netdev_err(dev, "timeout disabling TDMA\n"); 2115 return ret; 2116 } 2117 2118 /* Disable UniMAC TX */ 2119 umac_enable_set(priv, CMD_TX_EN, 0); 2120 2121 /* Free RX/TX rings SW structures */ 2122 for (i = 0; i < dev->num_tx_queues; i++) 2123 bcm_sysport_fini_tx_ring(priv, i); 2124 bcm_sysport_fini_rx_ring(priv); 2125 2126 free_irq(priv->irq0, dev); 2127 if (!priv->is_lite) 2128 free_irq(priv->irq1, dev); 2129 2130 /* Disconnect from PHY */ 2131 phy_disconnect(dev->phydev); 2132 2133 return 0; 2134 } 2135 2136 static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv, 2137 u64 location) 2138 { 2139 unsigned int index; 2140 u32 reg; 2141 2142 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2143 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2144 reg >>= RXCHK_BRCM_TAG_CID_SHIFT; 2145 reg &= RXCHK_BRCM_TAG_CID_MASK; 2146 if (reg == location) 2147 return index; 2148 } 2149 2150 return -EINVAL; 2151 } 2152 2153 static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv, 2154 struct ethtool_rxnfc *nfc) 2155 { 2156 int index; 2157 2158 /* This is not a rule that we know about */ 2159 index = bcm_sysport_rule_find(priv, nfc->fs.location); 2160 if (index < 0) 2161 return -EOPNOTSUPP; 2162 2163 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE; 2164 2165 return 0; 2166 } 2167 2168 static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv, 2169 struct ethtool_rxnfc *nfc) 2170 { 2171 unsigned int index; 2172 u32 reg; 2173 2174 /* We cannot match locations greater than what the classification ID 2175 * permits (256 entries) 2176 */ 2177 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK) 2178 return -E2BIG; 2179 2180 /* We cannot support flows that are not destined for a wake-up */ 2181 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE) 2182 return -EOPNOTSUPP; 2183 2184 /* All filters are already in use, we cannot match more rules */ 2185 if (bitmap_weight(priv->filters, RXCHK_BRCM_TAG_MAX) == 2186 RXCHK_BRCM_TAG_MAX) 2187 return -ENOSPC; 2188 2189 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX); 2190 if (index > RXCHK_BRCM_TAG_MAX) 2191 return -ENOSPC; 2192 2193 /* Location is the classification ID, and index is the position 2194 * within one of our 8 possible filters to be programmed 2195 */ 2196 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2197 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT); 2198 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT; 2199 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index)); 2200 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 2201 2202 priv->filters_loc[index] = nfc->fs.location; 2203 set_bit(index, priv->filters); 2204 2205 return 0; 2206 } 2207 2208 static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv, 2209 u64 location) 2210 { 2211 int index; 2212 2213 /* This is not a rule that we know about */ 2214 index = bcm_sysport_rule_find(priv, location); 2215 if (index < 0) 2216 return -EOPNOTSUPP; 2217 2218 /* No need to disable this filter if it was enabled, this will 2219 * be taken care of during suspend time by bcm_sysport_suspend_to_wol 2220 */ 2221 clear_bit(index, priv->filters); 2222 priv->filters_loc[index] = 0; 2223 2224 return 0; 2225 } 2226 2227 static int bcm_sysport_get_rxnfc(struct net_device *dev, 2228 struct ethtool_rxnfc *nfc, u32 *rule_locs) 2229 { 2230 struct bcm_sysport_priv *priv = netdev_priv(dev); 2231 int ret = -EOPNOTSUPP; 2232 2233 switch (nfc->cmd) { 2234 case ETHTOOL_GRXCLSRULE: 2235 ret = bcm_sysport_rule_get(priv, nfc); 2236 break; 2237 default: 2238 break; 2239 } 2240 2241 return ret; 2242 } 2243 2244 static int bcm_sysport_set_rxnfc(struct net_device *dev, 2245 struct ethtool_rxnfc *nfc) 2246 { 2247 struct bcm_sysport_priv *priv = netdev_priv(dev); 2248 int ret = -EOPNOTSUPP; 2249 2250 switch (nfc->cmd) { 2251 case ETHTOOL_SRXCLSRLINS: 2252 ret = bcm_sysport_rule_set(priv, nfc); 2253 break; 2254 case ETHTOOL_SRXCLSRLDEL: 2255 ret = bcm_sysport_rule_del(priv, nfc->fs.location); 2256 break; 2257 default: 2258 break; 2259 } 2260 2261 return ret; 2262 } 2263 2264 static const struct ethtool_ops bcm_sysport_ethtool_ops = { 2265 .get_drvinfo = bcm_sysport_get_drvinfo, 2266 .get_msglevel = bcm_sysport_get_msglvl, 2267 .set_msglevel = bcm_sysport_set_msglvl, 2268 .get_link = ethtool_op_get_link, 2269 .get_strings = bcm_sysport_get_strings, 2270 .get_ethtool_stats = bcm_sysport_get_stats, 2271 .get_sset_count = bcm_sysport_get_sset_count, 2272 .get_wol = bcm_sysport_get_wol, 2273 .set_wol = bcm_sysport_set_wol, 2274 .get_coalesce = bcm_sysport_get_coalesce, 2275 .set_coalesce = bcm_sysport_set_coalesce, 2276 .get_link_ksettings = phy_ethtool_get_link_ksettings, 2277 .set_link_ksettings = phy_ethtool_set_link_ksettings, 2278 .get_rxnfc = bcm_sysport_get_rxnfc, 2279 .set_rxnfc = bcm_sysport_set_rxnfc, 2280 }; 2281 2282 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb, 2283 struct net_device *sb_dev, 2284 select_queue_fallback_t fallback) 2285 { 2286 struct bcm_sysport_priv *priv = netdev_priv(dev); 2287 u16 queue = skb_get_queue_mapping(skb); 2288 struct bcm_sysport_tx_ring *tx_ring; 2289 unsigned int q, port; 2290 2291 if (!netdev_uses_dsa(dev)) 2292 return fallback(dev, skb, NULL); 2293 2294 /* DSA tagging layer will have configured the correct queue */ 2295 q = BRCM_TAG_GET_QUEUE(queue); 2296 port = BRCM_TAG_GET_PORT(queue); 2297 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues]; 2298 2299 if (unlikely(!tx_ring)) 2300 return fallback(dev, skb, NULL); 2301 2302 return tx_ring->index; 2303 } 2304 2305 static const struct net_device_ops bcm_sysport_netdev_ops = { 2306 .ndo_start_xmit = bcm_sysport_xmit, 2307 .ndo_tx_timeout = bcm_sysport_tx_timeout, 2308 .ndo_open = bcm_sysport_open, 2309 .ndo_stop = bcm_sysport_stop, 2310 .ndo_set_features = bcm_sysport_set_features, 2311 .ndo_set_rx_mode = bcm_sysport_set_rx_mode, 2312 .ndo_set_mac_address = bcm_sysport_change_mac, 2313 #ifdef CONFIG_NET_POLL_CONTROLLER 2314 .ndo_poll_controller = bcm_sysport_poll_controller, 2315 #endif 2316 .ndo_get_stats64 = bcm_sysport_get_stats64, 2317 .ndo_select_queue = bcm_sysport_select_queue, 2318 }; 2319 2320 static int bcm_sysport_map_queues(struct notifier_block *nb, 2321 struct dsa_notifier_register_info *info) 2322 { 2323 struct bcm_sysport_tx_ring *ring; 2324 struct bcm_sysport_priv *priv; 2325 struct net_device *slave_dev; 2326 unsigned int num_tx_queues; 2327 unsigned int q, qp, port; 2328 struct net_device *dev; 2329 2330 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier); 2331 if (priv->netdev != info->master) 2332 return 0; 2333 2334 dev = info->master; 2335 2336 /* We can't be setting up queue inspection for non directly attached 2337 * switches 2338 */ 2339 if (info->switch_number) 2340 return 0; 2341 2342 if (dev->netdev_ops != &bcm_sysport_netdev_ops) 2343 return 0; 2344 2345 port = info->port_number; 2346 slave_dev = info->info.dev; 2347 2348 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a 2349 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of 2350 * per-port (slave_dev) network devices queue, we achieve just that. 2351 * This need to happen now before any slave network device is used such 2352 * it accurately reflects the number of real TX queues. 2353 */ 2354 if (priv->is_lite) 2355 netif_set_real_num_tx_queues(slave_dev, 2356 slave_dev->num_tx_queues / 2); 2357 2358 num_tx_queues = slave_dev->real_num_tx_queues; 2359 2360 if (priv->per_port_num_tx_queues && 2361 priv->per_port_num_tx_queues != num_tx_queues) 2362 netdev_warn(slave_dev, "asymmetric number of per-port queues\n"); 2363 2364 priv->per_port_num_tx_queues = num_tx_queues; 2365 2366 for (q = 0, qp = 0; q < dev->num_tx_queues && qp < num_tx_queues; 2367 q++) { 2368 ring = &priv->tx_rings[q]; 2369 2370 if (ring->inspect) 2371 continue; 2372 2373 /* Just remember the mapping actual programming done 2374 * during bcm_sysport_init_tx_ring 2375 */ 2376 ring->switch_queue = qp; 2377 ring->switch_port = port; 2378 ring->inspect = true; 2379 priv->ring_map[q + port * num_tx_queues] = ring; 2380 qp++; 2381 } 2382 2383 return 0; 2384 } 2385 2386 static int bcm_sysport_unmap_queues(struct notifier_block *nb, 2387 struct dsa_notifier_register_info *info) 2388 { 2389 struct bcm_sysport_tx_ring *ring; 2390 struct bcm_sysport_priv *priv; 2391 struct net_device *slave_dev; 2392 unsigned int num_tx_queues; 2393 struct net_device *dev; 2394 unsigned int q, port; 2395 2396 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier); 2397 if (priv->netdev != info->master) 2398 return 0; 2399 2400 dev = info->master; 2401 2402 if (dev->netdev_ops != &bcm_sysport_netdev_ops) 2403 return 0; 2404 2405 port = info->port_number; 2406 slave_dev = info->info.dev; 2407 2408 num_tx_queues = slave_dev->real_num_tx_queues; 2409 2410 for (q = 0; q < dev->num_tx_queues; q++) { 2411 ring = &priv->tx_rings[q]; 2412 2413 if (ring->switch_port != port) 2414 continue; 2415 2416 if (!ring->inspect) 2417 continue; 2418 2419 ring->inspect = false; 2420 priv->ring_map[q + port * num_tx_queues] = NULL; 2421 } 2422 2423 return 0; 2424 } 2425 2426 static int bcm_sysport_dsa_notifier(struct notifier_block *nb, 2427 unsigned long event, void *ptr) 2428 { 2429 int ret = NOTIFY_DONE; 2430 2431 switch (event) { 2432 case DSA_PORT_REGISTER: 2433 ret = bcm_sysport_map_queues(nb, ptr); 2434 break; 2435 case DSA_PORT_UNREGISTER: 2436 ret = bcm_sysport_unmap_queues(nb, ptr); 2437 break; 2438 } 2439 2440 return notifier_from_errno(ret); 2441 } 2442 2443 #define REV_FMT "v%2x.%02x" 2444 2445 static const struct bcm_sysport_hw_params bcm_sysport_params[] = { 2446 [SYSTEMPORT] = { 2447 .is_lite = false, 2448 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS, 2449 }, 2450 [SYSTEMPORT_LITE] = { 2451 .is_lite = true, 2452 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS, 2453 }, 2454 }; 2455 2456 static const struct of_device_id bcm_sysport_of_match[] = { 2457 { .compatible = "brcm,systemportlite-v1.00", 2458 .data = &bcm_sysport_params[SYSTEMPORT_LITE] }, 2459 { .compatible = "brcm,systemport-v1.00", 2460 .data = &bcm_sysport_params[SYSTEMPORT] }, 2461 { .compatible = "brcm,systemport", 2462 .data = &bcm_sysport_params[SYSTEMPORT] }, 2463 { /* sentinel */ } 2464 }; 2465 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match); 2466 2467 static int bcm_sysport_probe(struct platform_device *pdev) 2468 { 2469 const struct bcm_sysport_hw_params *params; 2470 const struct of_device_id *of_id = NULL; 2471 struct bcm_sysport_priv *priv; 2472 struct device_node *dn; 2473 struct net_device *dev; 2474 const void *macaddr; 2475 struct resource *r; 2476 u32 txq, rxq; 2477 int ret; 2478 2479 dn = pdev->dev.of_node; 2480 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2481 of_id = of_match_node(bcm_sysport_of_match, dn); 2482 if (!of_id || !of_id->data) 2483 return -EINVAL; 2484 2485 /* Fairly quickly we need to know the type of adapter we have */ 2486 params = of_id->data; 2487 2488 /* Read the Transmit/Receive Queue properties */ 2489 if (of_property_read_u32(dn, "systemport,num-txq", &txq)) 2490 txq = TDMA_NUM_RINGS; 2491 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq)) 2492 rxq = 1; 2493 2494 /* Sanity check the number of transmit queues */ 2495 if (!txq || txq > TDMA_NUM_RINGS) 2496 return -EINVAL; 2497 2498 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq); 2499 if (!dev) 2500 return -ENOMEM; 2501 2502 /* Initialize private members */ 2503 priv = netdev_priv(dev); 2504 2505 /* Allocate number of TX rings */ 2506 priv->tx_rings = devm_kcalloc(&pdev->dev, txq, 2507 sizeof(struct bcm_sysport_tx_ring), 2508 GFP_KERNEL); 2509 if (!priv->tx_rings) 2510 return -ENOMEM; 2511 2512 priv->is_lite = params->is_lite; 2513 priv->num_rx_desc_words = params->num_rx_desc_words; 2514 2515 priv->irq0 = platform_get_irq(pdev, 0); 2516 if (!priv->is_lite) { 2517 priv->irq1 = platform_get_irq(pdev, 1); 2518 priv->wol_irq = platform_get_irq(pdev, 2); 2519 } else { 2520 priv->wol_irq = platform_get_irq(pdev, 1); 2521 } 2522 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) { 2523 dev_err(&pdev->dev, "invalid interrupts\n"); 2524 ret = -EINVAL; 2525 goto err_free_netdev; 2526 } 2527 2528 priv->base = devm_ioremap_resource(&pdev->dev, r); 2529 if (IS_ERR(priv->base)) { 2530 ret = PTR_ERR(priv->base); 2531 goto err_free_netdev; 2532 } 2533 2534 priv->netdev = dev; 2535 priv->pdev = pdev; 2536 2537 priv->phy_interface = of_get_phy_mode(dn); 2538 /* Default to GMII interface mode */ 2539 if (priv->phy_interface < 0) 2540 priv->phy_interface = PHY_INTERFACE_MODE_GMII; 2541 2542 /* In the case of a fixed PHY, the DT node associated 2543 * to the PHY is the Ethernet MAC DT node. 2544 */ 2545 if (of_phy_is_fixed_link(dn)) { 2546 ret = of_phy_register_fixed_link(dn); 2547 if (ret) { 2548 dev_err(&pdev->dev, "failed to register fixed PHY\n"); 2549 goto err_free_netdev; 2550 } 2551 2552 priv->phy_dn = dn; 2553 } 2554 2555 /* Initialize netdevice members */ 2556 macaddr = of_get_mac_address(dn); 2557 if (!macaddr || !is_valid_ether_addr(macaddr)) { 2558 dev_warn(&pdev->dev, "using random Ethernet MAC\n"); 2559 eth_hw_addr_random(dev); 2560 } else { 2561 ether_addr_copy(dev->dev_addr, macaddr); 2562 } 2563 2564 SET_NETDEV_DEV(dev, &pdev->dev); 2565 dev_set_drvdata(&pdev->dev, dev); 2566 dev->ethtool_ops = &bcm_sysport_ethtool_ops; 2567 dev->netdev_ops = &bcm_sysport_netdev_ops; 2568 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64); 2569 2570 dev->features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA | 2571 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 2572 dev->hw_features |= dev->features; 2573 dev->vlan_features |= dev->features; 2574 2575 /* Request the WOL interrupt and advertise suspend if available */ 2576 priv->wol_irq_disabled = 1; 2577 ret = devm_request_irq(&pdev->dev, priv->wol_irq, 2578 bcm_sysport_wol_isr, 0, dev->name, priv); 2579 if (!ret) 2580 device_set_wakeup_capable(&pdev->dev, 1); 2581 2582 /* Set the needed headroom once and for all */ 2583 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8); 2584 dev->needed_headroom += sizeof(struct bcm_tsb); 2585 2586 /* libphy will adjust the link state accordingly */ 2587 netif_carrier_off(dev); 2588 2589 priv->rx_max_coalesced_frames = 1; 2590 u64_stats_init(&priv->syncp); 2591 2592 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier; 2593 2594 ret = register_dsa_notifier(&priv->dsa_notifier); 2595 if (ret) { 2596 dev_err(&pdev->dev, "failed to register DSA notifier\n"); 2597 goto err_deregister_fixed_link; 2598 } 2599 2600 ret = register_netdev(dev); 2601 if (ret) { 2602 dev_err(&pdev->dev, "failed to register net_device\n"); 2603 goto err_deregister_notifier; 2604 } 2605 2606 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK; 2607 dev_info(&pdev->dev, 2608 "Broadcom SYSTEMPORT%s" REV_FMT 2609 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n", 2610 priv->is_lite ? " Lite" : "", 2611 (priv->rev >> 8) & 0xff, priv->rev & 0xff, 2612 priv->base, priv->irq0, priv->irq1, txq, rxq); 2613 2614 return 0; 2615 2616 err_deregister_notifier: 2617 unregister_dsa_notifier(&priv->dsa_notifier); 2618 err_deregister_fixed_link: 2619 if (of_phy_is_fixed_link(dn)) 2620 of_phy_deregister_fixed_link(dn); 2621 err_free_netdev: 2622 free_netdev(dev); 2623 return ret; 2624 } 2625 2626 static int bcm_sysport_remove(struct platform_device *pdev) 2627 { 2628 struct net_device *dev = dev_get_drvdata(&pdev->dev); 2629 struct bcm_sysport_priv *priv = netdev_priv(dev); 2630 struct device_node *dn = pdev->dev.of_node; 2631 2632 /* Not much to do, ndo_close has been called 2633 * and we use managed allocations 2634 */ 2635 unregister_dsa_notifier(&priv->dsa_notifier); 2636 unregister_netdev(dev); 2637 if (of_phy_is_fixed_link(dn)) 2638 of_phy_deregister_fixed_link(dn); 2639 free_netdev(dev); 2640 dev_set_drvdata(&pdev->dev, NULL); 2641 2642 return 0; 2643 } 2644 2645 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv) 2646 { 2647 struct net_device *ndev = priv->netdev; 2648 unsigned int timeout = 1000; 2649 unsigned int index, i = 0; 2650 u32 reg; 2651 2652 /* Password has already been programmed */ 2653 reg = umac_readl(priv, UMAC_MPD_CTRL); 2654 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) 2655 reg |= MPD_EN; 2656 reg &= ~PSW_EN; 2657 if (priv->wolopts & WAKE_MAGICSECURE) 2658 reg |= PSW_EN; 2659 umac_writel(priv, reg, UMAC_MPD_CTRL); 2660 2661 if (priv->wolopts & WAKE_FILTER) { 2662 /* Turn on ACPI matching to steal packets from RBUF */ 2663 reg = rbuf_readl(priv, RBUF_CONTROL); 2664 if (priv->is_lite) 2665 reg |= RBUF_ACPI_EN_LITE; 2666 else 2667 reg |= RBUF_ACPI_EN; 2668 rbuf_writel(priv, reg, RBUF_CONTROL); 2669 2670 /* Enable RXCHK, active filters and Broadcom tag matching */ 2671 reg = rxchk_readl(priv, RXCHK_CONTROL); 2672 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 2673 RXCHK_BRCM_TAG_MATCH_SHIFT); 2674 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2675 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i); 2676 i++; 2677 } 2678 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN; 2679 rxchk_writel(priv, reg, RXCHK_CONTROL); 2680 } 2681 2682 /* Make sure RBUF entered WoL mode as result */ 2683 do { 2684 reg = rbuf_readl(priv, RBUF_STATUS); 2685 if (reg & RBUF_WOL_MODE) 2686 break; 2687 2688 udelay(10); 2689 } while (timeout-- > 0); 2690 2691 /* Do not leave the UniMAC RBUF matching only MPD packets */ 2692 if (!timeout) { 2693 mpd_enable_set(priv, false); 2694 netif_err(priv, wol, ndev, "failed to enter WOL mode\n"); 2695 return -ETIMEDOUT; 2696 } 2697 2698 /* UniMAC receive needs to be turned on */ 2699 umac_enable_set(priv, CMD_RX_EN, 1); 2700 2701 netif_dbg(priv, wol, ndev, "entered WOL mode\n"); 2702 2703 return 0; 2704 } 2705 2706 static int __maybe_unused bcm_sysport_suspend(struct device *d) 2707 { 2708 struct net_device *dev = dev_get_drvdata(d); 2709 struct bcm_sysport_priv *priv = netdev_priv(dev); 2710 unsigned int i; 2711 int ret = 0; 2712 u32 reg; 2713 2714 if (!netif_running(dev)) 2715 return 0; 2716 2717 netif_device_detach(dev); 2718 2719 bcm_sysport_netif_stop(dev); 2720 2721 phy_suspend(dev->phydev); 2722 2723 /* Disable UniMAC RX */ 2724 umac_enable_set(priv, CMD_RX_EN, 0); 2725 2726 ret = rdma_enable_set(priv, 0); 2727 if (ret) { 2728 netdev_err(dev, "RDMA timeout!\n"); 2729 return ret; 2730 } 2731 2732 /* Disable RXCHK if enabled */ 2733 if (priv->rx_chk_en) { 2734 reg = rxchk_readl(priv, RXCHK_CONTROL); 2735 reg &= ~RXCHK_EN; 2736 rxchk_writel(priv, reg, RXCHK_CONTROL); 2737 } 2738 2739 /* Flush RX pipe */ 2740 if (!priv->wolopts) 2741 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 2742 2743 ret = tdma_enable_set(priv, 0); 2744 if (ret) { 2745 netdev_err(dev, "TDMA timeout!\n"); 2746 return ret; 2747 } 2748 2749 /* Wait for a packet boundary */ 2750 usleep_range(2000, 3000); 2751 2752 umac_enable_set(priv, CMD_TX_EN, 0); 2753 2754 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 2755 2756 /* Free RX/TX rings SW structures */ 2757 for (i = 0; i < dev->num_tx_queues; i++) 2758 bcm_sysport_fini_tx_ring(priv, i); 2759 bcm_sysport_fini_rx_ring(priv); 2760 2761 /* Get prepared for Wake-on-LAN */ 2762 if (device_may_wakeup(d) && priv->wolopts) 2763 ret = bcm_sysport_suspend_to_wol(priv); 2764 2765 return ret; 2766 } 2767 2768 static int __maybe_unused bcm_sysport_resume(struct device *d) 2769 { 2770 struct net_device *dev = dev_get_drvdata(d); 2771 struct bcm_sysport_priv *priv = netdev_priv(dev); 2772 unsigned int i; 2773 int ret; 2774 2775 if (!netif_running(dev)) 2776 return 0; 2777 2778 umac_reset(priv); 2779 2780 /* We may have been suspended and never received a WOL event that 2781 * would turn off MPD detection, take care of that now 2782 */ 2783 bcm_sysport_resume_from_wol(priv); 2784 2785 /* Initialize both hardware and software ring */ 2786 for (i = 0; i < dev->num_tx_queues; i++) { 2787 ret = bcm_sysport_init_tx_ring(priv, i); 2788 if (ret) { 2789 netdev_err(dev, "failed to initialize TX ring %d\n", 2790 i); 2791 goto out_free_tx_rings; 2792 } 2793 } 2794 2795 /* Initialize linked-list */ 2796 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2797 2798 /* Initialize RX ring */ 2799 ret = bcm_sysport_init_rx_ring(priv); 2800 if (ret) { 2801 netdev_err(dev, "failed to initialize RX ring\n"); 2802 goto out_free_rx_ring; 2803 } 2804 2805 /* RX pipe enable */ 2806 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 2807 2808 ret = rdma_enable_set(priv, 1); 2809 if (ret) { 2810 netdev_err(dev, "failed to enable RDMA\n"); 2811 goto out_free_rx_ring; 2812 } 2813 2814 /* Restore enabled features */ 2815 bcm_sysport_set_features(dev, dev->features); 2816 2817 rbuf_init(priv); 2818 2819 /* Set maximum frame length */ 2820 if (!priv->is_lite) 2821 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 2822 else 2823 gib_set_pad_extension(priv); 2824 2825 /* Set MAC address */ 2826 umac_set_hw_addr(priv, dev->dev_addr); 2827 2828 umac_enable_set(priv, CMD_RX_EN, 1); 2829 2830 /* TX pipe enable */ 2831 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 2832 2833 umac_enable_set(priv, CMD_TX_EN, 1); 2834 2835 ret = tdma_enable_set(priv, 1); 2836 if (ret) { 2837 netdev_err(dev, "TDMA timeout!\n"); 2838 goto out_free_rx_ring; 2839 } 2840 2841 phy_resume(dev->phydev); 2842 2843 bcm_sysport_netif_start(dev); 2844 2845 netif_device_attach(dev); 2846 2847 return 0; 2848 2849 out_free_rx_ring: 2850 bcm_sysport_fini_rx_ring(priv); 2851 out_free_tx_rings: 2852 for (i = 0; i < dev->num_tx_queues; i++) 2853 bcm_sysport_fini_tx_ring(priv, i); 2854 return ret; 2855 } 2856 2857 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops, 2858 bcm_sysport_suspend, bcm_sysport_resume); 2859 2860 static struct platform_driver bcm_sysport_driver = { 2861 .probe = bcm_sysport_probe, 2862 .remove = bcm_sysport_remove, 2863 .driver = { 2864 .name = "brcm-systemport", 2865 .of_match_table = bcm_sysport_of_match, 2866 .pm = &bcm_sysport_pm_ops, 2867 }, 2868 }; 2869 module_platform_driver(bcm_sysport_driver); 2870 2871 MODULE_AUTHOR("Broadcom Corporation"); 2872 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver"); 2873 MODULE_ALIAS("platform:brcm-systemport"); 2874 MODULE_LICENSE("GPL"); 2875