1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Broadcom BCM7xxx System Port Ethernet MAC driver 4 * 5 * Copyright (C) 2014 Broadcom Corporation 6 */ 7 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/netdevice.h> 15 #include <linux/etherdevice.h> 16 #include <linux/platform_device.h> 17 #include <linux/of.h> 18 #include <linux/of_net.h> 19 #include <linux/of_mdio.h> 20 #include <linux/phy.h> 21 #include <linux/phy_fixed.h> 22 #include <net/dsa.h> 23 #include <net/ip.h> 24 #include <net/ipv6.h> 25 26 #include "bcmsysport.h" 27 28 /* I/O accessors register helpers */ 29 #define BCM_SYSPORT_IO_MACRO(name, offset) \ 30 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \ 31 { \ 32 u32 reg = readl_relaxed(priv->base + offset + off); \ 33 return reg; \ 34 } \ 35 static inline void name##_writel(struct bcm_sysport_priv *priv, \ 36 u32 val, u32 off) \ 37 { \ 38 writel_relaxed(val, priv->base + offset + off); \ 39 } \ 40 41 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET); 42 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET); 43 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET); 44 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET); 45 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET); 46 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET); 47 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET); 48 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET); 49 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET); 50 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET); 51 52 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact 53 * same layout, except it has been moved by 4 bytes up, *sigh* 54 */ 55 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off) 56 { 57 if (priv->is_lite && off >= RDMA_STATUS) 58 off += 4; 59 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off); 60 } 61 62 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off) 63 { 64 if (priv->is_lite && off >= RDMA_STATUS) 65 off += 4; 66 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off); 67 } 68 69 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit) 70 { 71 if (!priv->is_lite) { 72 return BIT(bit); 73 } else { 74 if (bit >= ACB_ALGO) 75 return BIT(bit + 1); 76 else 77 return BIT(bit); 78 } 79 } 80 81 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied 82 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths. 83 */ 84 #define BCM_SYSPORT_INTR_L2(which) \ 85 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \ 86 u32 mask) \ 87 { \ 88 priv->irq##which##_mask &= ~(mask); \ 89 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \ 90 } \ 91 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \ 92 u32 mask) \ 93 { \ 94 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \ 95 priv->irq##which##_mask |= (mask); \ 96 } \ 97 98 BCM_SYSPORT_INTR_L2(0) 99 BCM_SYSPORT_INTR_L2(1) 100 101 /* Register accesses to GISB/RBUS registers are expensive (few hundred 102 * nanoseconds), so keep the check for 64-bits explicit here to save 103 * one register write per-packet on 32-bits platforms. 104 */ 105 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv, 106 void __iomem *d, 107 dma_addr_t addr) 108 { 109 #ifdef CONFIG_PHYS_ADDR_T_64BIT 110 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK, 111 d + DESC_ADDR_HI_STATUS_LEN); 112 #endif 113 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO); 114 } 115 116 /* Ethtool operations */ 117 static void bcm_sysport_set_rx_csum(struct net_device *dev, 118 netdev_features_t wanted) 119 { 120 struct bcm_sysport_priv *priv = netdev_priv(dev); 121 u32 reg; 122 123 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM); 124 reg = rxchk_readl(priv, RXCHK_CONTROL); 125 /* Clear L2 header checks, which would prevent BPDUs 126 * from being received. 127 */ 128 reg &= ~RXCHK_L2_HDR_DIS; 129 if (priv->rx_chk_en) 130 reg |= RXCHK_EN; 131 else 132 reg &= ~RXCHK_EN; 133 134 /* If UniMAC forwards CRC, we need to skip over it to get 135 * a valid CHK bit to be set in the per-packet status word 136 */ 137 if (priv->rx_chk_en && priv->crc_fwd) 138 reg |= RXCHK_SKIP_FCS; 139 else 140 reg &= ~RXCHK_SKIP_FCS; 141 142 /* If Broadcom tags are enabled (e.g: using a switch), make 143 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom 144 * tag after the Ethernet MAC Source Address. 145 */ 146 if (netdev_uses_dsa(dev)) 147 reg |= RXCHK_BRCM_TAG_EN; 148 else 149 reg &= ~RXCHK_BRCM_TAG_EN; 150 151 rxchk_writel(priv, reg, RXCHK_CONTROL); 152 } 153 154 static void bcm_sysport_set_tx_csum(struct net_device *dev, 155 netdev_features_t wanted) 156 { 157 struct bcm_sysport_priv *priv = netdev_priv(dev); 158 u32 reg; 159 160 /* Hardware transmit checksum requires us to enable the Transmit status 161 * block prepended to the packet contents 162 */ 163 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)); 164 reg = tdma_readl(priv, TDMA_CONTROL); 165 if (priv->tsb_en) 166 reg |= tdma_control_bit(priv, TSB_EN); 167 else 168 reg &= ~tdma_control_bit(priv, TSB_EN); 169 tdma_writel(priv, reg, TDMA_CONTROL); 170 } 171 172 static int bcm_sysport_set_features(struct net_device *dev, 173 netdev_features_t features) 174 { 175 struct bcm_sysport_priv *priv = netdev_priv(dev); 176 177 /* Read CRC forward */ 178 if (!priv->is_lite) 179 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD); 180 else 181 priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) & 182 GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT); 183 184 bcm_sysport_set_rx_csum(dev, features); 185 bcm_sysport_set_tx_csum(dev, features); 186 187 return 0; 188 } 189 190 /* Hardware counters must be kept in sync because the order/offset 191 * is important here (order in structure declaration = order in hardware) 192 */ 193 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = { 194 /* general stats */ 195 STAT_NETDEV64(rx_packets), 196 STAT_NETDEV64(tx_packets), 197 STAT_NETDEV64(rx_bytes), 198 STAT_NETDEV64(tx_bytes), 199 STAT_NETDEV(rx_errors), 200 STAT_NETDEV(tx_errors), 201 STAT_NETDEV(rx_dropped), 202 STAT_NETDEV(tx_dropped), 203 STAT_NETDEV(multicast), 204 /* UniMAC RSV counters */ 205 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64), 206 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127), 207 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255), 208 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511), 209 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023), 210 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518), 211 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv), 212 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047), 213 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095), 214 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216), 215 STAT_MIB_RX("rx_pkts", mib.rx.pkt), 216 STAT_MIB_RX("rx_bytes", mib.rx.bytes), 217 STAT_MIB_RX("rx_multicast", mib.rx.mca), 218 STAT_MIB_RX("rx_broadcast", mib.rx.bca), 219 STAT_MIB_RX("rx_fcs", mib.rx.fcs), 220 STAT_MIB_RX("rx_control", mib.rx.cf), 221 STAT_MIB_RX("rx_pause", mib.rx.pf), 222 STAT_MIB_RX("rx_unknown", mib.rx.uo), 223 STAT_MIB_RX("rx_align", mib.rx.aln), 224 STAT_MIB_RX("rx_outrange", mib.rx.flr), 225 STAT_MIB_RX("rx_code", mib.rx.cde), 226 STAT_MIB_RX("rx_carrier", mib.rx.fcr), 227 STAT_MIB_RX("rx_oversize", mib.rx.ovr), 228 STAT_MIB_RX("rx_jabber", mib.rx.jbr), 229 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue), 230 STAT_MIB_RX("rx_good_pkts", mib.rx.pok), 231 STAT_MIB_RX("rx_unicast", mib.rx.uc), 232 STAT_MIB_RX("rx_ppp", mib.rx.ppp), 233 STAT_MIB_RX("rx_crc", mib.rx.rcrc), 234 /* UniMAC TSV counters */ 235 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64), 236 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127), 237 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255), 238 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511), 239 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023), 240 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518), 241 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv), 242 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047), 243 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095), 244 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216), 245 STAT_MIB_TX("tx_pkts", mib.tx.pkts), 246 STAT_MIB_TX("tx_multicast", mib.tx.mca), 247 STAT_MIB_TX("tx_broadcast", mib.tx.bca), 248 STAT_MIB_TX("tx_pause", mib.tx.pf), 249 STAT_MIB_TX("tx_control", mib.tx.cf), 250 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs), 251 STAT_MIB_TX("tx_oversize", mib.tx.ovr), 252 STAT_MIB_TX("tx_defer", mib.tx.drf), 253 STAT_MIB_TX("tx_excess_defer", mib.tx.edf), 254 STAT_MIB_TX("tx_single_col", mib.tx.scl), 255 STAT_MIB_TX("tx_multi_col", mib.tx.mcl), 256 STAT_MIB_TX("tx_late_col", mib.tx.lcl), 257 STAT_MIB_TX("tx_excess_col", mib.tx.ecl), 258 STAT_MIB_TX("tx_frags", mib.tx.frg), 259 STAT_MIB_TX("tx_total_col", mib.tx.ncl), 260 STAT_MIB_TX("tx_jabber", mib.tx.jbr), 261 STAT_MIB_TX("tx_bytes", mib.tx.bytes), 262 STAT_MIB_TX("tx_good_pkts", mib.tx.pok), 263 STAT_MIB_TX("tx_unicast", mib.tx.uc), 264 /* UniMAC RUNT counters */ 265 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt), 266 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs), 267 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align), 268 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes), 269 /* RXCHK misc statistics */ 270 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR), 271 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc, 272 RXCHK_OTHER_DISC_CNTR), 273 /* RBUF misc statistics */ 274 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR), 275 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR), 276 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), 277 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed), 278 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed), 279 STAT_MIB_SOFT("tx_realloc_tsb", mib.tx_realloc_tsb), 280 STAT_MIB_SOFT("tx_realloc_tsb_failed", mib.tx_realloc_tsb_failed), 281 /* Per TX-queue statistics are dynamically appended */ 282 }; 283 284 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats) 285 286 static void bcm_sysport_get_drvinfo(struct net_device *dev, 287 struct ethtool_drvinfo *info) 288 { 289 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); 290 strlcpy(info->bus_info, "platform", sizeof(info->bus_info)); 291 } 292 293 static u32 bcm_sysport_get_msglvl(struct net_device *dev) 294 { 295 struct bcm_sysport_priv *priv = netdev_priv(dev); 296 297 return priv->msg_enable; 298 } 299 300 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable) 301 { 302 struct bcm_sysport_priv *priv = netdev_priv(dev); 303 304 priv->msg_enable = enable; 305 } 306 307 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type) 308 { 309 switch (type) { 310 case BCM_SYSPORT_STAT_NETDEV: 311 case BCM_SYSPORT_STAT_NETDEV64: 312 case BCM_SYSPORT_STAT_RXCHK: 313 case BCM_SYSPORT_STAT_RBUF: 314 case BCM_SYSPORT_STAT_SOFT: 315 return true; 316 default: 317 return false; 318 } 319 } 320 321 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set) 322 { 323 struct bcm_sysport_priv *priv = netdev_priv(dev); 324 const struct bcm_sysport_stats *s; 325 unsigned int i, j; 326 327 switch (string_set) { 328 case ETH_SS_STATS: 329 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 330 s = &bcm_sysport_gstrings_stats[i]; 331 if (priv->is_lite && 332 !bcm_sysport_lite_stat_valid(s->type)) 333 continue; 334 j++; 335 } 336 /* Include per-queue statistics */ 337 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 338 default: 339 return -EOPNOTSUPP; 340 } 341 } 342 343 static void bcm_sysport_get_strings(struct net_device *dev, 344 u32 stringset, u8 *data) 345 { 346 struct bcm_sysport_priv *priv = netdev_priv(dev); 347 const struct bcm_sysport_stats *s; 348 char buf[128]; 349 int i, j; 350 351 switch (stringset) { 352 case ETH_SS_STATS: 353 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 354 s = &bcm_sysport_gstrings_stats[i]; 355 if (priv->is_lite && 356 !bcm_sysport_lite_stat_valid(s->type)) 357 continue; 358 359 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string, 360 ETH_GSTRING_LEN); 361 j++; 362 } 363 364 for (i = 0; i < dev->num_tx_queues; i++) { 365 snprintf(buf, sizeof(buf), "txq%d_packets", i); 366 memcpy(data + j * ETH_GSTRING_LEN, buf, 367 ETH_GSTRING_LEN); 368 j++; 369 370 snprintf(buf, sizeof(buf), "txq%d_bytes", i); 371 memcpy(data + j * ETH_GSTRING_LEN, buf, 372 ETH_GSTRING_LEN); 373 j++; 374 } 375 break; 376 default: 377 break; 378 } 379 } 380 381 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv) 382 { 383 int i, j = 0; 384 385 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 386 const struct bcm_sysport_stats *s; 387 u8 offset = 0; 388 u32 val = 0; 389 char *p; 390 391 s = &bcm_sysport_gstrings_stats[i]; 392 switch (s->type) { 393 case BCM_SYSPORT_STAT_NETDEV: 394 case BCM_SYSPORT_STAT_NETDEV64: 395 case BCM_SYSPORT_STAT_SOFT: 396 continue; 397 case BCM_SYSPORT_STAT_MIB_RX: 398 case BCM_SYSPORT_STAT_MIB_TX: 399 case BCM_SYSPORT_STAT_RUNT: 400 if (priv->is_lite) 401 continue; 402 403 if (s->type != BCM_SYSPORT_STAT_MIB_RX) 404 offset = UMAC_MIB_STAT_OFFSET; 405 val = umac_readl(priv, UMAC_MIB_START + j + offset); 406 break; 407 case BCM_SYSPORT_STAT_RXCHK: 408 val = rxchk_readl(priv, s->reg_offset); 409 if (val == ~0) 410 rxchk_writel(priv, 0, s->reg_offset); 411 break; 412 case BCM_SYSPORT_STAT_RBUF: 413 val = rbuf_readl(priv, s->reg_offset); 414 if (val == ~0) 415 rbuf_writel(priv, 0, s->reg_offset); 416 break; 417 } 418 419 j += s->stat_sizeof; 420 p = (char *)priv + s->stat_offset; 421 *(u32 *)p = val; 422 } 423 424 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n"); 425 } 426 427 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv, 428 u64 *tx_bytes, u64 *tx_packets) 429 { 430 struct bcm_sysport_tx_ring *ring; 431 u64 bytes = 0, packets = 0; 432 unsigned int start; 433 unsigned int q; 434 435 for (q = 0; q < priv->netdev->num_tx_queues; q++) { 436 ring = &priv->tx_rings[q]; 437 do { 438 start = u64_stats_fetch_begin_irq(&priv->syncp); 439 bytes = ring->bytes; 440 packets = ring->packets; 441 } while (u64_stats_fetch_retry_irq(&priv->syncp, start)); 442 443 *tx_bytes += bytes; 444 *tx_packets += packets; 445 } 446 } 447 448 static void bcm_sysport_get_stats(struct net_device *dev, 449 struct ethtool_stats *stats, u64 *data) 450 { 451 struct bcm_sysport_priv *priv = netdev_priv(dev); 452 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 453 struct u64_stats_sync *syncp = &priv->syncp; 454 struct bcm_sysport_tx_ring *ring; 455 u64 tx_bytes = 0, tx_packets = 0; 456 unsigned int start; 457 int i, j; 458 459 if (netif_running(dev)) { 460 bcm_sysport_update_mib_counters(priv); 461 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets); 462 stats64->tx_bytes = tx_bytes; 463 stats64->tx_packets = tx_packets; 464 } 465 466 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) { 467 const struct bcm_sysport_stats *s; 468 char *p; 469 470 s = &bcm_sysport_gstrings_stats[i]; 471 if (s->type == BCM_SYSPORT_STAT_NETDEV) 472 p = (char *)&dev->stats; 473 else if (s->type == BCM_SYSPORT_STAT_NETDEV64) 474 p = (char *)stats64; 475 else 476 p = (char *)priv; 477 478 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type)) 479 continue; 480 p += s->stat_offset; 481 482 if (s->stat_sizeof == sizeof(u64) && 483 s->type == BCM_SYSPORT_STAT_NETDEV64) { 484 do { 485 start = u64_stats_fetch_begin_irq(syncp); 486 data[i] = *(u64 *)p; 487 } while (u64_stats_fetch_retry_irq(syncp, start)); 488 } else 489 data[i] = *(u32 *)p; 490 j++; 491 } 492 493 /* For SYSTEMPORT Lite since we have holes in our statistics, j would 494 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it 495 * needs to point to how many total statistics we have minus the 496 * number of per TX queue statistics 497 */ 498 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) - 499 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT; 500 501 for (i = 0; i < dev->num_tx_queues; i++) { 502 ring = &priv->tx_rings[i]; 503 data[j] = ring->packets; 504 j++; 505 data[j] = ring->bytes; 506 j++; 507 } 508 } 509 510 static void bcm_sysport_get_wol(struct net_device *dev, 511 struct ethtool_wolinfo *wol) 512 { 513 struct bcm_sysport_priv *priv = netdev_priv(dev); 514 515 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 516 wol->wolopts = priv->wolopts; 517 518 if (!(priv->wolopts & WAKE_MAGICSECURE)) 519 return; 520 521 memcpy(wol->sopass, priv->sopass, sizeof(priv->sopass)); 522 } 523 524 static int bcm_sysport_set_wol(struct net_device *dev, 525 struct ethtool_wolinfo *wol) 526 { 527 struct bcm_sysport_priv *priv = netdev_priv(dev); 528 struct device *kdev = &priv->pdev->dev; 529 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER; 530 531 if (!device_can_wakeup(kdev)) 532 return -ENOTSUPP; 533 534 if (wol->wolopts & ~supported) 535 return -EINVAL; 536 537 if (wol->wolopts & WAKE_MAGICSECURE) 538 memcpy(priv->sopass, wol->sopass, sizeof(priv->sopass)); 539 540 /* Flag the device and relevant IRQ as wakeup capable */ 541 if (wol->wolopts) { 542 device_set_wakeup_enable(kdev, 1); 543 if (priv->wol_irq_disabled) 544 enable_irq_wake(priv->wol_irq); 545 priv->wol_irq_disabled = 0; 546 } else { 547 device_set_wakeup_enable(kdev, 0); 548 /* Avoid unbalanced disable_irq_wake calls */ 549 if (!priv->wol_irq_disabled) 550 disable_irq_wake(priv->wol_irq); 551 priv->wol_irq_disabled = 1; 552 } 553 554 priv->wolopts = wol->wolopts; 555 556 return 0; 557 } 558 559 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv, 560 u32 usecs, u32 pkts) 561 { 562 u32 reg; 563 564 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 565 reg &= ~(RDMA_INTR_THRESH_MASK | 566 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT); 567 reg |= pkts; 568 reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT; 569 rdma_writel(priv, reg, RDMA_MBDONE_INTR); 570 } 571 572 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring, 573 struct ethtool_coalesce *ec) 574 { 575 struct bcm_sysport_priv *priv = ring->priv; 576 u32 reg; 577 578 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 579 reg &= ~(RING_INTR_THRESH_MASK | 580 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT); 581 reg |= ec->tx_max_coalesced_frames; 582 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) << 583 RING_TIMEOUT_SHIFT; 584 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index)); 585 } 586 587 static int bcm_sysport_get_coalesce(struct net_device *dev, 588 struct ethtool_coalesce *ec) 589 { 590 struct bcm_sysport_priv *priv = netdev_priv(dev); 591 u32 reg; 592 593 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0)); 594 595 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000; 596 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK; 597 598 reg = rdma_readl(priv, RDMA_MBDONE_INTR); 599 600 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000; 601 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK; 602 ec->use_adaptive_rx_coalesce = priv->dim.use_dim; 603 604 return 0; 605 } 606 607 static int bcm_sysport_set_coalesce(struct net_device *dev, 608 struct ethtool_coalesce *ec) 609 { 610 struct bcm_sysport_priv *priv = netdev_priv(dev); 611 struct dim_cq_moder moder; 612 u32 usecs, pkts; 613 unsigned int i; 614 615 /* Base system clock is 125Mhz, DMA timeout is this reference clock 616 * divided by 1024, which yield roughly 8.192 us, our maximum value has 617 * to fit in the RING_TIMEOUT_MASK (16 bits). 618 */ 619 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK || 620 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 || 621 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK || 622 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1) 623 return -EINVAL; 624 625 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) || 626 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0)) 627 return -EINVAL; 628 629 for (i = 0; i < dev->num_tx_queues; i++) 630 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec); 631 632 priv->rx_coalesce_usecs = ec->rx_coalesce_usecs; 633 priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames; 634 usecs = priv->rx_coalesce_usecs; 635 pkts = priv->rx_max_coalesced_frames; 636 637 if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) { 638 moder = net_dim_get_def_rx_moderation(priv->dim.dim.mode); 639 usecs = moder.usec; 640 pkts = moder.pkts; 641 } 642 643 priv->dim.use_dim = ec->use_adaptive_rx_coalesce; 644 645 /* Apply desired coalescing parameters */ 646 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 647 648 return 0; 649 } 650 651 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb) 652 { 653 dev_consume_skb_any(cb->skb); 654 cb->skb = NULL; 655 dma_unmap_addr_set(cb, dma_addr, 0); 656 } 657 658 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv, 659 struct bcm_sysport_cb *cb) 660 { 661 struct device *kdev = &priv->pdev->dev; 662 struct net_device *ndev = priv->netdev; 663 struct sk_buff *skb, *rx_skb; 664 dma_addr_t mapping; 665 666 /* Allocate a new SKB for a new packet */ 667 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH); 668 if (!skb) { 669 priv->mib.alloc_rx_buff_failed++; 670 netif_err(priv, rx_err, ndev, "SKB alloc failed\n"); 671 return NULL; 672 } 673 674 mapping = dma_map_single(kdev, skb->data, 675 RX_BUF_LENGTH, DMA_FROM_DEVICE); 676 if (dma_mapping_error(kdev, mapping)) { 677 priv->mib.rx_dma_failed++; 678 dev_kfree_skb_any(skb); 679 netif_err(priv, rx_err, ndev, "DMA mapping failure\n"); 680 return NULL; 681 } 682 683 /* Grab the current SKB on the ring */ 684 rx_skb = cb->skb; 685 if (likely(rx_skb)) 686 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 687 RX_BUF_LENGTH, DMA_FROM_DEVICE); 688 689 /* Put the new SKB on the ring */ 690 cb->skb = skb; 691 dma_unmap_addr_set(cb, dma_addr, mapping); 692 dma_desc_set_addr(priv, cb->bd_addr, mapping); 693 694 netif_dbg(priv, rx_status, ndev, "RX refill\n"); 695 696 /* Return the current SKB to the caller */ 697 return rx_skb; 698 } 699 700 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv) 701 { 702 struct bcm_sysport_cb *cb; 703 struct sk_buff *skb; 704 unsigned int i; 705 706 for (i = 0; i < priv->num_rx_bds; i++) { 707 cb = &priv->rx_cbs[i]; 708 skb = bcm_sysport_rx_refill(priv, cb); 709 dev_kfree_skb(skb); 710 if (!cb->skb) 711 return -ENOMEM; 712 } 713 714 return 0; 715 } 716 717 /* Poll the hardware for up to budget packets to process */ 718 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv, 719 unsigned int budget) 720 { 721 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 722 struct net_device *ndev = priv->netdev; 723 unsigned int processed = 0, to_process; 724 unsigned int processed_bytes = 0; 725 struct bcm_sysport_cb *cb; 726 struct sk_buff *skb; 727 unsigned int p_index; 728 u16 len, status; 729 struct bcm_rsb *rsb; 730 731 /* Clear status before servicing to reduce spurious interrupts */ 732 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR); 733 734 /* Determine how much we should process since last call, SYSTEMPORT Lite 735 * groups the producer and consumer indexes into the same 32-bit 736 * which we access using RDMA_CONS_INDEX 737 */ 738 if (!priv->is_lite) 739 p_index = rdma_readl(priv, RDMA_PROD_INDEX); 740 else 741 p_index = rdma_readl(priv, RDMA_CONS_INDEX); 742 p_index &= RDMA_PROD_INDEX_MASK; 743 744 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK; 745 746 netif_dbg(priv, rx_status, ndev, 747 "p_index=%d rx_c_index=%d to_process=%d\n", 748 p_index, priv->rx_c_index, to_process); 749 750 while ((processed < to_process) && (processed < budget)) { 751 cb = &priv->rx_cbs[priv->rx_read_ptr]; 752 skb = bcm_sysport_rx_refill(priv, cb); 753 754 755 /* We do not have a backing SKB, so we do not a corresponding 756 * DMA mapping for this incoming packet since 757 * bcm_sysport_rx_refill always either has both skb and mapping 758 * or none. 759 */ 760 if (unlikely(!skb)) { 761 netif_err(priv, rx_err, ndev, "out of memory!\n"); 762 ndev->stats.rx_dropped++; 763 ndev->stats.rx_errors++; 764 goto next; 765 } 766 767 /* Extract the Receive Status Block prepended */ 768 rsb = (struct bcm_rsb *)skb->data; 769 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK; 770 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) & 771 DESC_STATUS_MASK; 772 773 netif_dbg(priv, rx_status, ndev, 774 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n", 775 p_index, priv->rx_c_index, priv->rx_read_ptr, 776 len, status); 777 778 if (unlikely(len > RX_BUF_LENGTH)) { 779 netif_err(priv, rx_status, ndev, "oversized packet\n"); 780 ndev->stats.rx_length_errors++; 781 ndev->stats.rx_errors++; 782 dev_kfree_skb_any(skb); 783 goto next; 784 } 785 786 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) { 787 netif_err(priv, rx_status, ndev, "fragmented packet!\n"); 788 ndev->stats.rx_dropped++; 789 ndev->stats.rx_errors++; 790 dev_kfree_skb_any(skb); 791 goto next; 792 } 793 794 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) { 795 netif_err(priv, rx_err, ndev, "error packet\n"); 796 if (status & RX_STATUS_OVFLOW) 797 ndev->stats.rx_over_errors++; 798 ndev->stats.rx_dropped++; 799 ndev->stats.rx_errors++; 800 dev_kfree_skb_any(skb); 801 goto next; 802 } 803 804 skb_put(skb, len); 805 806 /* Hardware validated our checksum */ 807 if (likely(status & DESC_L4_CSUM)) 808 skb->ip_summed = CHECKSUM_UNNECESSARY; 809 810 /* Hardware pre-pends packets with 2bytes before Ethernet 811 * header plus we have the Receive Status Block, strip off all 812 * of this from the SKB. 813 */ 814 skb_pull(skb, sizeof(*rsb) + 2); 815 len -= (sizeof(*rsb) + 2); 816 processed_bytes += len; 817 818 /* UniMAC may forward CRC */ 819 if (priv->crc_fwd) { 820 skb_trim(skb, len - ETH_FCS_LEN); 821 len -= ETH_FCS_LEN; 822 } 823 824 skb->protocol = eth_type_trans(skb, ndev); 825 ndev->stats.rx_packets++; 826 ndev->stats.rx_bytes += len; 827 u64_stats_update_begin(&priv->syncp); 828 stats64->rx_packets++; 829 stats64->rx_bytes += len; 830 u64_stats_update_end(&priv->syncp); 831 832 napi_gro_receive(&priv->napi, skb); 833 next: 834 processed++; 835 priv->rx_read_ptr++; 836 837 if (priv->rx_read_ptr == priv->num_rx_bds) 838 priv->rx_read_ptr = 0; 839 } 840 841 priv->dim.packets = processed; 842 priv->dim.bytes = processed_bytes; 843 844 return processed; 845 } 846 847 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring, 848 struct bcm_sysport_cb *cb, 849 unsigned int *bytes_compl, 850 unsigned int *pkts_compl) 851 { 852 struct bcm_sysport_priv *priv = ring->priv; 853 struct device *kdev = &priv->pdev->dev; 854 855 if (cb->skb) { 856 *bytes_compl += cb->skb->len; 857 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr), 858 dma_unmap_len(cb, dma_len), 859 DMA_TO_DEVICE); 860 (*pkts_compl)++; 861 bcm_sysport_free_cb(cb); 862 /* SKB fragment */ 863 } else if (dma_unmap_addr(cb, dma_addr)) { 864 *bytes_compl += dma_unmap_len(cb, dma_len); 865 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr), 866 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE); 867 dma_unmap_addr_set(cb, dma_addr, 0); 868 } 869 } 870 871 /* Reclaim queued SKBs for transmission completion, lockless version */ 872 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 873 struct bcm_sysport_tx_ring *ring) 874 { 875 unsigned int pkts_compl = 0, bytes_compl = 0; 876 struct net_device *ndev = priv->netdev; 877 unsigned int txbds_processed = 0; 878 struct bcm_sysport_cb *cb; 879 unsigned int txbds_ready; 880 unsigned int c_index; 881 u32 hw_ind; 882 883 /* Clear status before servicing to reduce spurious interrupts */ 884 if (!ring->priv->is_lite) 885 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR); 886 else 887 intrl2_0_writel(ring->priv, BIT(ring->index + 888 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR); 889 890 /* Compute how many descriptors have been processed since last call */ 891 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index)); 892 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK; 893 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK; 894 895 netif_dbg(priv, tx_done, ndev, 896 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n", 897 ring->index, ring->c_index, c_index, txbds_ready); 898 899 while (txbds_processed < txbds_ready) { 900 cb = &ring->cbs[ring->clean_index]; 901 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl); 902 903 ring->desc_count++; 904 txbds_processed++; 905 906 if (likely(ring->clean_index < ring->size - 1)) 907 ring->clean_index++; 908 else 909 ring->clean_index = 0; 910 } 911 912 u64_stats_update_begin(&priv->syncp); 913 ring->packets += pkts_compl; 914 ring->bytes += bytes_compl; 915 u64_stats_update_end(&priv->syncp); 916 917 ring->c_index = c_index; 918 919 netif_dbg(priv, tx_done, ndev, 920 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n", 921 ring->index, ring->c_index, pkts_compl, bytes_compl); 922 923 return pkts_compl; 924 } 925 926 /* Locked version of the per-ring TX reclaim routine */ 927 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv, 928 struct bcm_sysport_tx_ring *ring) 929 { 930 struct netdev_queue *txq; 931 unsigned int released; 932 unsigned long flags; 933 934 txq = netdev_get_tx_queue(priv->netdev, ring->index); 935 936 spin_lock_irqsave(&ring->lock, flags); 937 released = __bcm_sysport_tx_reclaim(priv, ring); 938 if (released) 939 netif_tx_wake_queue(txq); 940 941 spin_unlock_irqrestore(&ring->lock, flags); 942 943 return released; 944 } 945 946 /* Locked version of the per-ring TX reclaim, but does not wake the queue */ 947 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv, 948 struct bcm_sysport_tx_ring *ring) 949 { 950 unsigned long flags; 951 952 spin_lock_irqsave(&ring->lock, flags); 953 __bcm_sysport_tx_reclaim(priv, ring); 954 spin_unlock_irqrestore(&ring->lock, flags); 955 } 956 957 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget) 958 { 959 struct bcm_sysport_tx_ring *ring = 960 container_of(napi, struct bcm_sysport_tx_ring, napi); 961 unsigned int work_done = 0; 962 963 work_done = bcm_sysport_tx_reclaim(ring->priv, ring); 964 965 if (work_done == 0) { 966 napi_complete(napi); 967 /* re-enable TX interrupt */ 968 if (!ring->priv->is_lite) 969 intrl2_1_mask_clear(ring->priv, BIT(ring->index)); 970 else 971 intrl2_0_mask_clear(ring->priv, BIT(ring->index + 972 INTRL2_0_TDMA_MBDONE_SHIFT)); 973 974 return 0; 975 } 976 977 return budget; 978 } 979 980 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv) 981 { 982 unsigned int q; 983 984 for (q = 0; q < priv->netdev->num_tx_queues; q++) 985 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]); 986 } 987 988 static int bcm_sysport_poll(struct napi_struct *napi, int budget) 989 { 990 struct bcm_sysport_priv *priv = 991 container_of(napi, struct bcm_sysport_priv, napi); 992 struct dim_sample dim_sample = {}; 993 unsigned int work_done = 0; 994 995 work_done = bcm_sysport_desc_rx(priv, budget); 996 997 priv->rx_c_index += work_done; 998 priv->rx_c_index &= RDMA_CONS_INDEX_MASK; 999 1000 /* SYSTEMPORT Lite groups the producer/consumer index, producer is 1001 * maintained by HW, but writes to it will be ignore while RDMA 1002 * is active 1003 */ 1004 if (!priv->is_lite) 1005 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX); 1006 else 1007 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX); 1008 1009 if (work_done < budget) { 1010 napi_complete_done(napi, work_done); 1011 /* re-enable RX interrupts */ 1012 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE); 1013 } 1014 1015 if (priv->dim.use_dim) { 1016 dim_update_sample(priv->dim.event_ctr, priv->dim.packets, 1017 priv->dim.bytes, &dim_sample); 1018 net_dim(&priv->dim.dim, dim_sample); 1019 } 1020 1021 return work_done; 1022 } 1023 1024 static void mpd_enable_set(struct bcm_sysport_priv *priv, bool enable) 1025 { 1026 u32 reg, bit; 1027 1028 reg = umac_readl(priv, UMAC_MPD_CTRL); 1029 if (enable) 1030 reg |= MPD_EN; 1031 else 1032 reg &= ~MPD_EN; 1033 umac_writel(priv, reg, UMAC_MPD_CTRL); 1034 1035 if (priv->is_lite) 1036 bit = RBUF_ACPI_EN_LITE; 1037 else 1038 bit = RBUF_ACPI_EN; 1039 1040 reg = rbuf_readl(priv, RBUF_CONTROL); 1041 if (enable) 1042 reg |= bit; 1043 else 1044 reg &= ~bit; 1045 rbuf_writel(priv, reg, RBUF_CONTROL); 1046 } 1047 1048 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv) 1049 { 1050 unsigned int index; 1051 u32 reg; 1052 1053 /* Disable RXCHK, active filters and Broadcom tag matching */ 1054 reg = rxchk_readl(priv, RXCHK_CONTROL); 1055 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 1056 RXCHK_BRCM_TAG_MATCH_SHIFT | RXCHK_EN | RXCHK_BRCM_TAG_EN); 1057 rxchk_writel(priv, reg, RXCHK_CONTROL); 1058 1059 /* Make sure we restore correct CID index in case HW lost 1060 * its context during deep idle state 1061 */ 1062 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 1063 rxchk_writel(priv, priv->filters_loc[index] << 1064 RXCHK_BRCM_TAG_CID_SHIFT, RXCHK_BRCM_TAG(index)); 1065 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 1066 } 1067 1068 /* Clear the MagicPacket detection logic */ 1069 mpd_enable_set(priv, false); 1070 1071 reg = intrl2_0_readl(priv, INTRL2_CPU_STATUS); 1072 if (reg & INTRL2_0_MPD) 1073 netdev_info(priv->netdev, "Wake-on-LAN (MPD) interrupt!\n"); 1074 1075 if (reg & INTRL2_0_BRCM_MATCH_TAG) { 1076 reg = rxchk_readl(priv, RXCHK_BRCM_TAG_MATCH_STATUS) & 1077 RXCHK_BRCM_TAG_MATCH_MASK; 1078 netdev_info(priv->netdev, 1079 "Wake-on-LAN (filters 0x%02x) interrupt!\n", reg); 1080 } 1081 1082 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n"); 1083 } 1084 1085 static void bcm_sysport_dim_work(struct work_struct *work) 1086 { 1087 struct dim *dim = container_of(work, struct dim, work); 1088 struct bcm_sysport_net_dim *ndim = 1089 container_of(dim, struct bcm_sysport_net_dim, dim); 1090 struct bcm_sysport_priv *priv = 1091 container_of(ndim, struct bcm_sysport_priv, dim); 1092 struct dim_cq_moder cur_profile = net_dim_get_rx_moderation(dim->mode, 1093 dim->profile_ix); 1094 1095 bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts); 1096 dim->state = DIM_START_MEASURE; 1097 } 1098 1099 /* RX and misc interrupt routine */ 1100 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id) 1101 { 1102 struct net_device *dev = dev_id; 1103 struct bcm_sysport_priv *priv = netdev_priv(dev); 1104 struct bcm_sysport_tx_ring *txr; 1105 unsigned int ring, ring_bit; 1106 1107 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) & 1108 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS); 1109 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR); 1110 1111 if (unlikely(priv->irq0_stat == 0)) { 1112 netdev_warn(priv->netdev, "spurious RX interrupt\n"); 1113 return IRQ_NONE; 1114 } 1115 1116 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) { 1117 priv->dim.event_ctr++; 1118 if (likely(napi_schedule_prep(&priv->napi))) { 1119 /* disable RX interrupts */ 1120 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE); 1121 __napi_schedule_irqoff(&priv->napi); 1122 } 1123 } 1124 1125 /* TX ring is full, perform a full reclaim since we do not know 1126 * which one would trigger this interrupt 1127 */ 1128 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL) 1129 bcm_sysport_tx_reclaim_all(priv); 1130 1131 if (!priv->is_lite) 1132 goto out; 1133 1134 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1135 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT); 1136 if (!(priv->irq0_stat & ring_bit)) 1137 continue; 1138 1139 txr = &priv->tx_rings[ring]; 1140 1141 if (likely(napi_schedule_prep(&txr->napi))) { 1142 intrl2_0_mask_set(priv, ring_bit); 1143 __napi_schedule(&txr->napi); 1144 } 1145 } 1146 out: 1147 return IRQ_HANDLED; 1148 } 1149 1150 /* TX interrupt service routine */ 1151 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id) 1152 { 1153 struct net_device *dev = dev_id; 1154 struct bcm_sysport_priv *priv = netdev_priv(dev); 1155 struct bcm_sysport_tx_ring *txr; 1156 unsigned int ring; 1157 1158 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) & 1159 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS); 1160 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1161 1162 if (unlikely(priv->irq1_stat == 0)) { 1163 netdev_warn(priv->netdev, "spurious TX interrupt\n"); 1164 return IRQ_NONE; 1165 } 1166 1167 for (ring = 0; ring < dev->num_tx_queues; ring++) { 1168 if (!(priv->irq1_stat & BIT(ring))) 1169 continue; 1170 1171 txr = &priv->tx_rings[ring]; 1172 1173 if (likely(napi_schedule_prep(&txr->napi))) { 1174 intrl2_1_mask_set(priv, BIT(ring)); 1175 __napi_schedule_irqoff(&txr->napi); 1176 } 1177 } 1178 1179 return IRQ_HANDLED; 1180 } 1181 1182 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id) 1183 { 1184 struct bcm_sysport_priv *priv = dev_id; 1185 1186 pm_wakeup_event(&priv->pdev->dev, 0); 1187 1188 return IRQ_HANDLED; 1189 } 1190 1191 #ifdef CONFIG_NET_POLL_CONTROLLER 1192 static void bcm_sysport_poll_controller(struct net_device *dev) 1193 { 1194 struct bcm_sysport_priv *priv = netdev_priv(dev); 1195 1196 disable_irq(priv->irq0); 1197 bcm_sysport_rx_isr(priv->irq0, priv); 1198 enable_irq(priv->irq0); 1199 1200 if (!priv->is_lite) { 1201 disable_irq(priv->irq1); 1202 bcm_sysport_tx_isr(priv->irq1, priv); 1203 enable_irq(priv->irq1); 1204 } 1205 } 1206 #endif 1207 1208 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb, 1209 struct net_device *dev) 1210 { 1211 struct bcm_sysport_priv *priv = netdev_priv(dev); 1212 struct sk_buff *nskb; 1213 struct bcm_tsb *tsb; 1214 u32 csum_info; 1215 u8 ip_proto; 1216 u16 csum_start; 1217 __be16 ip_ver; 1218 1219 /* Re-allocate SKB if needed */ 1220 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) { 1221 nskb = skb_realloc_headroom(skb, sizeof(*tsb)); 1222 if (!nskb) { 1223 dev_kfree_skb_any(skb); 1224 priv->mib.tx_realloc_tsb_failed++; 1225 dev->stats.tx_errors++; 1226 dev->stats.tx_dropped++; 1227 return NULL; 1228 } 1229 dev_consume_skb_any(skb); 1230 skb = nskb; 1231 priv->mib.tx_realloc_tsb++; 1232 } 1233 1234 tsb = skb_push(skb, sizeof(*tsb)); 1235 /* Zero-out TSB by default */ 1236 memset(tsb, 0, sizeof(*tsb)); 1237 1238 if (skb->ip_summed == CHECKSUM_PARTIAL) { 1239 ip_ver = skb->protocol; 1240 switch (ip_ver) { 1241 case htons(ETH_P_IP): 1242 ip_proto = ip_hdr(skb)->protocol; 1243 break; 1244 case htons(ETH_P_IPV6): 1245 ip_proto = ipv6_hdr(skb)->nexthdr; 1246 break; 1247 default: 1248 return skb; 1249 } 1250 1251 /* Get the checksum offset and the L4 (transport) offset */ 1252 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb); 1253 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK; 1254 csum_info |= (csum_start << L4_PTR_SHIFT); 1255 1256 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) { 1257 csum_info |= L4_LENGTH_VALID; 1258 if (ip_proto == IPPROTO_UDP && 1259 ip_ver == htons(ETH_P_IP)) 1260 csum_info |= L4_UDP; 1261 } else { 1262 csum_info = 0; 1263 } 1264 1265 tsb->l4_ptr_dest_map = csum_info; 1266 } 1267 1268 return skb; 1269 } 1270 1271 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb, 1272 struct net_device *dev) 1273 { 1274 struct bcm_sysport_priv *priv = netdev_priv(dev); 1275 struct device *kdev = &priv->pdev->dev; 1276 struct bcm_sysport_tx_ring *ring; 1277 struct bcm_sysport_cb *cb; 1278 struct netdev_queue *txq; 1279 u32 len_status, addr_lo; 1280 unsigned int skb_len; 1281 unsigned long flags; 1282 dma_addr_t mapping; 1283 u16 queue; 1284 int ret; 1285 1286 queue = skb_get_queue_mapping(skb); 1287 txq = netdev_get_tx_queue(dev, queue); 1288 ring = &priv->tx_rings[queue]; 1289 1290 /* lock against tx reclaim in BH context and TX ring full interrupt */ 1291 spin_lock_irqsave(&ring->lock, flags); 1292 if (unlikely(ring->desc_count == 0)) { 1293 netif_tx_stop_queue(txq); 1294 netdev_err(dev, "queue %d awake and ring full!\n", queue); 1295 ret = NETDEV_TX_BUSY; 1296 goto out; 1297 } 1298 1299 /* Insert TSB and checksum infos */ 1300 if (priv->tsb_en) { 1301 skb = bcm_sysport_insert_tsb(skb, dev); 1302 if (!skb) { 1303 ret = NETDEV_TX_OK; 1304 goto out; 1305 } 1306 } 1307 1308 skb_len = skb->len; 1309 1310 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE); 1311 if (dma_mapping_error(kdev, mapping)) { 1312 priv->mib.tx_dma_failed++; 1313 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n", 1314 skb->data, skb_len); 1315 ret = NETDEV_TX_OK; 1316 goto out; 1317 } 1318 1319 /* Remember the SKB for future freeing */ 1320 cb = &ring->cbs[ring->curr_desc]; 1321 cb->skb = skb; 1322 dma_unmap_addr_set(cb, dma_addr, mapping); 1323 dma_unmap_len_set(cb, dma_len, skb_len); 1324 1325 addr_lo = lower_32_bits(mapping); 1326 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK; 1327 len_status |= (skb_len << DESC_LEN_SHIFT); 1328 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) << 1329 DESC_STATUS_SHIFT; 1330 if (skb->ip_summed == CHECKSUM_PARTIAL) 1331 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT); 1332 1333 ring->curr_desc++; 1334 if (ring->curr_desc == ring->size) 1335 ring->curr_desc = 0; 1336 ring->desc_count--; 1337 1338 /* Ports are latched, so write upper address first */ 1339 tdma_writel(priv, len_status, TDMA_WRITE_PORT_HI(ring->index)); 1340 tdma_writel(priv, addr_lo, TDMA_WRITE_PORT_LO(ring->index)); 1341 1342 /* Check ring space and update SW control flow */ 1343 if (ring->desc_count == 0) 1344 netif_tx_stop_queue(txq); 1345 1346 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n", 1347 ring->index, ring->desc_count, ring->curr_desc); 1348 1349 ret = NETDEV_TX_OK; 1350 out: 1351 spin_unlock_irqrestore(&ring->lock, flags); 1352 return ret; 1353 } 1354 1355 static void bcm_sysport_tx_timeout(struct net_device *dev, unsigned int txqueue) 1356 { 1357 netdev_warn(dev, "transmit timeout!\n"); 1358 1359 netif_trans_update(dev); 1360 dev->stats.tx_errors++; 1361 1362 netif_tx_wake_all_queues(dev); 1363 } 1364 1365 /* phylib adjust link callback */ 1366 static void bcm_sysport_adj_link(struct net_device *dev) 1367 { 1368 struct bcm_sysport_priv *priv = netdev_priv(dev); 1369 struct phy_device *phydev = dev->phydev; 1370 unsigned int changed = 0; 1371 u32 cmd_bits = 0, reg; 1372 1373 if (priv->old_link != phydev->link) { 1374 changed = 1; 1375 priv->old_link = phydev->link; 1376 } 1377 1378 if (priv->old_duplex != phydev->duplex) { 1379 changed = 1; 1380 priv->old_duplex = phydev->duplex; 1381 } 1382 1383 if (priv->is_lite) 1384 goto out; 1385 1386 switch (phydev->speed) { 1387 case SPEED_2500: 1388 cmd_bits = CMD_SPEED_2500; 1389 break; 1390 case SPEED_1000: 1391 cmd_bits = CMD_SPEED_1000; 1392 break; 1393 case SPEED_100: 1394 cmd_bits = CMD_SPEED_100; 1395 break; 1396 case SPEED_10: 1397 cmd_bits = CMD_SPEED_10; 1398 break; 1399 default: 1400 break; 1401 } 1402 cmd_bits <<= CMD_SPEED_SHIFT; 1403 1404 if (phydev->duplex == DUPLEX_HALF) 1405 cmd_bits |= CMD_HD_EN; 1406 1407 if (priv->old_pause != phydev->pause) { 1408 changed = 1; 1409 priv->old_pause = phydev->pause; 1410 } 1411 1412 if (!phydev->pause) 1413 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE; 1414 1415 if (!changed) 1416 return; 1417 1418 if (phydev->link) { 1419 reg = umac_readl(priv, UMAC_CMD); 1420 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) | 1421 CMD_HD_EN | CMD_RX_PAUSE_IGNORE | 1422 CMD_TX_PAUSE_IGNORE); 1423 reg |= cmd_bits; 1424 umac_writel(priv, reg, UMAC_CMD); 1425 } 1426 out: 1427 if (changed) 1428 phy_print_status(phydev); 1429 } 1430 1431 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv, 1432 void (*cb)(struct work_struct *work)) 1433 { 1434 struct bcm_sysport_net_dim *dim = &priv->dim; 1435 1436 INIT_WORK(&dim->dim.work, cb); 1437 dim->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; 1438 dim->event_ctr = 0; 1439 dim->packets = 0; 1440 dim->bytes = 0; 1441 } 1442 1443 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv) 1444 { 1445 struct bcm_sysport_net_dim *dim = &priv->dim; 1446 struct dim_cq_moder moder; 1447 u32 usecs, pkts; 1448 1449 usecs = priv->rx_coalesce_usecs; 1450 pkts = priv->rx_max_coalesced_frames; 1451 1452 /* If DIM was enabled, re-apply default parameters */ 1453 if (dim->use_dim) { 1454 moder = net_dim_get_def_rx_moderation(dim->dim.mode); 1455 usecs = moder.usec; 1456 pkts = moder.pkts; 1457 } 1458 1459 bcm_sysport_set_rx_coalesce(priv, usecs, pkts); 1460 } 1461 1462 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv, 1463 unsigned int index) 1464 { 1465 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1466 size_t size; 1467 u32 reg; 1468 1469 /* Simple descriptors partitioning for now */ 1470 size = 256; 1471 1472 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL); 1473 if (!ring->cbs) { 1474 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1475 return -ENOMEM; 1476 } 1477 1478 /* Initialize SW view of the ring */ 1479 spin_lock_init(&ring->lock); 1480 ring->priv = priv; 1481 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64); 1482 ring->index = index; 1483 ring->size = size; 1484 ring->clean_index = 0; 1485 ring->alloc_size = ring->size; 1486 ring->desc_count = ring->size; 1487 ring->curr_desc = 0; 1488 1489 /* Initialize HW ring */ 1490 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index)); 1491 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index)); 1492 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index)); 1493 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index)); 1494 1495 /* Configure QID and port mapping */ 1496 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index)); 1497 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT); 1498 if (ring->inspect) { 1499 reg |= ring->switch_queue & RING_QID_MASK; 1500 reg |= ring->switch_port << RING_PORT_ID_SHIFT; 1501 } else { 1502 reg |= RING_IGNORE_STATUS; 1503 } 1504 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index)); 1505 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index)); 1506 1507 /* Enable ACB algorithm 2 */ 1508 reg = tdma_readl(priv, TDMA_CONTROL); 1509 reg |= tdma_control_bit(priv, ACB_ALGO); 1510 tdma_writel(priv, reg, TDMA_CONTROL); 1511 1512 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides 1513 * with the original definition of ACB_ALGO 1514 */ 1515 reg = tdma_readl(priv, TDMA_CONTROL); 1516 if (priv->is_lite) 1517 reg &= ~BIT(TSB_SWAP1); 1518 /* Set a correct TSB format based on host endian */ 1519 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1520 reg |= tdma_control_bit(priv, TSB_SWAP0); 1521 else 1522 reg &= ~tdma_control_bit(priv, TSB_SWAP0); 1523 tdma_writel(priv, reg, TDMA_CONTROL); 1524 1525 /* Program the number of descriptors as MAX_THRESHOLD and half of 1526 * its size for the hysteresis trigger 1527 */ 1528 tdma_writel(priv, ring->size | 1529 1 << RING_HYST_THRESH_SHIFT, 1530 TDMA_DESC_RING_MAX_HYST(index)); 1531 1532 /* Enable the ring queue in the arbiter */ 1533 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN); 1534 reg |= (1 << index); 1535 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN); 1536 1537 napi_enable(&ring->napi); 1538 1539 netif_dbg(priv, hw, priv->netdev, 1540 "TDMA cfg, size=%d, switch q=%d,port=%d\n", 1541 ring->size, ring->switch_queue, 1542 ring->switch_port); 1543 1544 return 0; 1545 } 1546 1547 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv, 1548 unsigned int index) 1549 { 1550 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index]; 1551 u32 reg; 1552 1553 /* Caller should stop the TDMA engine */ 1554 reg = tdma_readl(priv, TDMA_STATUS); 1555 if (!(reg & TDMA_DISABLED)) 1556 netdev_warn(priv->netdev, "TDMA not stopped!\n"); 1557 1558 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could 1559 * fail, so by checking this pointer we know whether the TX ring was 1560 * fully initialized or not. 1561 */ 1562 if (!ring->cbs) 1563 return; 1564 1565 napi_disable(&ring->napi); 1566 netif_napi_del(&ring->napi); 1567 1568 bcm_sysport_tx_clean(priv, ring); 1569 1570 kfree(ring->cbs); 1571 ring->cbs = NULL; 1572 ring->size = 0; 1573 ring->alloc_size = 0; 1574 1575 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n"); 1576 } 1577 1578 /* RDMA helper */ 1579 static inline int rdma_enable_set(struct bcm_sysport_priv *priv, 1580 unsigned int enable) 1581 { 1582 unsigned int timeout = 1000; 1583 u32 reg; 1584 1585 reg = rdma_readl(priv, RDMA_CONTROL); 1586 if (enable) 1587 reg |= RDMA_EN; 1588 else 1589 reg &= ~RDMA_EN; 1590 rdma_writel(priv, reg, RDMA_CONTROL); 1591 1592 /* Poll for RMDA disabling completion */ 1593 do { 1594 reg = rdma_readl(priv, RDMA_STATUS); 1595 if (!!(reg & RDMA_DISABLED) == !enable) 1596 return 0; 1597 usleep_range(1000, 2000); 1598 } while (timeout-- > 0); 1599 1600 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n"); 1601 1602 return -ETIMEDOUT; 1603 } 1604 1605 /* TDMA helper */ 1606 static inline int tdma_enable_set(struct bcm_sysport_priv *priv, 1607 unsigned int enable) 1608 { 1609 unsigned int timeout = 1000; 1610 u32 reg; 1611 1612 reg = tdma_readl(priv, TDMA_CONTROL); 1613 if (enable) 1614 reg |= tdma_control_bit(priv, TDMA_EN); 1615 else 1616 reg &= ~tdma_control_bit(priv, TDMA_EN); 1617 tdma_writel(priv, reg, TDMA_CONTROL); 1618 1619 /* Poll for TMDA disabling completion */ 1620 do { 1621 reg = tdma_readl(priv, TDMA_STATUS); 1622 if (!!(reg & TDMA_DISABLED) == !enable) 1623 return 0; 1624 1625 usleep_range(1000, 2000); 1626 } while (timeout-- > 0); 1627 1628 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n"); 1629 1630 return -ETIMEDOUT; 1631 } 1632 1633 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv) 1634 { 1635 struct bcm_sysport_cb *cb; 1636 u32 reg; 1637 int ret; 1638 int i; 1639 1640 /* Initialize SW view of the RX ring */ 1641 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC; 1642 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET; 1643 priv->rx_c_index = 0; 1644 priv->rx_read_ptr = 0; 1645 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb), 1646 GFP_KERNEL); 1647 if (!priv->rx_cbs) { 1648 netif_err(priv, hw, priv->netdev, "CB allocation failed\n"); 1649 return -ENOMEM; 1650 } 1651 1652 for (i = 0; i < priv->num_rx_bds; i++) { 1653 cb = priv->rx_cbs + i; 1654 cb->bd_addr = priv->rx_bds + i * DESC_SIZE; 1655 } 1656 1657 ret = bcm_sysport_alloc_rx_bufs(priv); 1658 if (ret) { 1659 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n"); 1660 return ret; 1661 } 1662 1663 /* Initialize HW, ensure RDMA is disabled */ 1664 reg = rdma_readl(priv, RDMA_STATUS); 1665 if (!(reg & RDMA_DISABLED)) 1666 rdma_enable_set(priv, 0); 1667 1668 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO); 1669 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI); 1670 rdma_writel(priv, 0, RDMA_PROD_INDEX); 1671 rdma_writel(priv, 0, RDMA_CONS_INDEX); 1672 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT | 1673 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE); 1674 /* Operate the queue in ring mode */ 1675 rdma_writel(priv, 0, RDMA_START_ADDR_HI); 1676 rdma_writel(priv, 0, RDMA_START_ADDR_LO); 1677 rdma_writel(priv, 0, RDMA_END_ADDR_HI); 1678 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO); 1679 1680 netif_dbg(priv, hw, priv->netdev, 1681 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n", 1682 priv->num_rx_bds, priv->rx_bds); 1683 1684 return 0; 1685 } 1686 1687 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv) 1688 { 1689 struct bcm_sysport_cb *cb; 1690 unsigned int i; 1691 u32 reg; 1692 1693 /* Caller should ensure RDMA is disabled */ 1694 reg = rdma_readl(priv, RDMA_STATUS); 1695 if (!(reg & RDMA_DISABLED)) 1696 netdev_warn(priv->netdev, "RDMA not stopped!\n"); 1697 1698 for (i = 0; i < priv->num_rx_bds; i++) { 1699 cb = &priv->rx_cbs[i]; 1700 if (dma_unmap_addr(cb, dma_addr)) 1701 dma_unmap_single(&priv->pdev->dev, 1702 dma_unmap_addr(cb, dma_addr), 1703 RX_BUF_LENGTH, DMA_FROM_DEVICE); 1704 bcm_sysport_free_cb(cb); 1705 } 1706 1707 kfree(priv->rx_cbs); 1708 priv->rx_cbs = NULL; 1709 1710 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n"); 1711 } 1712 1713 static void bcm_sysport_set_rx_mode(struct net_device *dev) 1714 { 1715 struct bcm_sysport_priv *priv = netdev_priv(dev); 1716 u32 reg; 1717 1718 if (priv->is_lite) 1719 return; 1720 1721 reg = umac_readl(priv, UMAC_CMD); 1722 if (dev->flags & IFF_PROMISC) 1723 reg |= CMD_PROMISC; 1724 else 1725 reg &= ~CMD_PROMISC; 1726 umac_writel(priv, reg, UMAC_CMD); 1727 1728 /* No support for ALLMULTI */ 1729 if (dev->flags & IFF_ALLMULTI) 1730 return; 1731 } 1732 1733 static inline void umac_enable_set(struct bcm_sysport_priv *priv, 1734 u32 mask, unsigned int enable) 1735 { 1736 u32 reg; 1737 1738 if (!priv->is_lite) { 1739 reg = umac_readl(priv, UMAC_CMD); 1740 if (enable) 1741 reg |= mask; 1742 else 1743 reg &= ~mask; 1744 umac_writel(priv, reg, UMAC_CMD); 1745 } else { 1746 reg = gib_readl(priv, GIB_CONTROL); 1747 if (enable) 1748 reg |= mask; 1749 else 1750 reg &= ~mask; 1751 gib_writel(priv, reg, GIB_CONTROL); 1752 } 1753 1754 /* UniMAC stops on a packet boundary, wait for a full-sized packet 1755 * to be processed (1 msec). 1756 */ 1757 if (enable == 0) 1758 usleep_range(1000, 2000); 1759 } 1760 1761 static inline void umac_reset(struct bcm_sysport_priv *priv) 1762 { 1763 u32 reg; 1764 1765 if (priv->is_lite) 1766 return; 1767 1768 reg = umac_readl(priv, UMAC_CMD); 1769 reg |= CMD_SW_RESET; 1770 umac_writel(priv, reg, UMAC_CMD); 1771 udelay(10); 1772 reg = umac_readl(priv, UMAC_CMD); 1773 reg &= ~CMD_SW_RESET; 1774 umac_writel(priv, reg, UMAC_CMD); 1775 } 1776 1777 static void umac_set_hw_addr(struct bcm_sysport_priv *priv, 1778 unsigned char *addr) 1779 { 1780 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | 1781 addr[3]; 1782 u32 mac1 = (addr[4] << 8) | addr[5]; 1783 1784 if (!priv->is_lite) { 1785 umac_writel(priv, mac0, UMAC_MAC0); 1786 umac_writel(priv, mac1, UMAC_MAC1); 1787 } else { 1788 gib_writel(priv, mac0, GIB_MAC0); 1789 gib_writel(priv, mac1, GIB_MAC1); 1790 } 1791 } 1792 1793 static void topctrl_flush(struct bcm_sysport_priv *priv) 1794 { 1795 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 1796 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 1797 mdelay(1); 1798 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 1799 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 1800 } 1801 1802 static int bcm_sysport_change_mac(struct net_device *dev, void *p) 1803 { 1804 struct bcm_sysport_priv *priv = netdev_priv(dev); 1805 struct sockaddr *addr = p; 1806 1807 if (!is_valid_ether_addr(addr->sa_data)) 1808 return -EINVAL; 1809 1810 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 1811 1812 /* interface is disabled, changes to MAC will be reflected on next 1813 * open call 1814 */ 1815 if (!netif_running(dev)) 1816 return 0; 1817 1818 umac_set_hw_addr(priv, dev->dev_addr); 1819 1820 return 0; 1821 } 1822 1823 static void bcm_sysport_get_stats64(struct net_device *dev, 1824 struct rtnl_link_stats64 *stats) 1825 { 1826 struct bcm_sysport_priv *priv = netdev_priv(dev); 1827 struct bcm_sysport_stats64 *stats64 = &priv->stats64; 1828 unsigned int start; 1829 1830 netdev_stats_to_stats64(stats, &dev->stats); 1831 1832 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes, 1833 &stats->tx_packets); 1834 1835 do { 1836 start = u64_stats_fetch_begin_irq(&priv->syncp); 1837 stats->rx_packets = stats64->rx_packets; 1838 stats->rx_bytes = stats64->rx_bytes; 1839 } while (u64_stats_fetch_retry_irq(&priv->syncp, start)); 1840 } 1841 1842 static void bcm_sysport_netif_start(struct net_device *dev) 1843 { 1844 struct bcm_sysport_priv *priv = netdev_priv(dev); 1845 1846 /* Enable NAPI */ 1847 bcm_sysport_init_dim(priv, bcm_sysport_dim_work); 1848 bcm_sysport_init_rx_coalesce(priv); 1849 napi_enable(&priv->napi); 1850 1851 /* Enable RX interrupt and TX ring full interrupt */ 1852 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 1853 1854 phy_start(dev->phydev); 1855 1856 /* Enable TX interrupts for the TXQs */ 1857 if (!priv->is_lite) 1858 intrl2_1_mask_clear(priv, 0xffffffff); 1859 else 1860 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK); 1861 } 1862 1863 static void rbuf_init(struct bcm_sysport_priv *priv) 1864 { 1865 u32 reg; 1866 1867 reg = rbuf_readl(priv, RBUF_CONTROL); 1868 reg |= RBUF_4B_ALGN | RBUF_RSB_EN; 1869 /* Set a correct RSB format on SYSTEMPORT Lite */ 1870 if (priv->is_lite) 1871 reg &= ~RBUF_RSB_SWAP1; 1872 1873 /* Set a correct RSB format based on host endian */ 1874 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) 1875 reg |= RBUF_RSB_SWAP0; 1876 else 1877 reg &= ~RBUF_RSB_SWAP0; 1878 rbuf_writel(priv, reg, RBUF_CONTROL); 1879 } 1880 1881 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv) 1882 { 1883 intrl2_0_mask_set(priv, 0xffffffff); 1884 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1885 if (!priv->is_lite) { 1886 intrl2_1_mask_set(priv, 0xffffffff); 1887 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR); 1888 } 1889 } 1890 1891 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv) 1892 { 1893 u32 reg; 1894 1895 reg = gib_readl(priv, GIB_CONTROL); 1896 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */ 1897 if (netdev_uses_dsa(priv->netdev)) { 1898 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT); 1899 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT; 1900 } 1901 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT); 1902 reg |= 12 << GIB_IPG_LEN_SHIFT; 1903 gib_writel(priv, reg, GIB_CONTROL); 1904 } 1905 1906 static int bcm_sysport_open(struct net_device *dev) 1907 { 1908 struct bcm_sysport_priv *priv = netdev_priv(dev); 1909 struct phy_device *phydev; 1910 unsigned int i; 1911 int ret; 1912 1913 /* Reset UniMAC */ 1914 umac_reset(priv); 1915 1916 /* Flush TX and RX FIFOs at TOPCTRL level */ 1917 topctrl_flush(priv); 1918 1919 /* Disable the UniMAC RX/TX */ 1920 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 1921 1922 /* Enable RBUF 2bytes alignment and Receive Status Block */ 1923 rbuf_init(priv); 1924 1925 /* Set maximum frame length */ 1926 if (!priv->is_lite) 1927 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 1928 else 1929 gib_set_pad_extension(priv); 1930 1931 /* Apply features again in case we changed them while interface was 1932 * down 1933 */ 1934 bcm_sysport_set_features(dev, dev->features); 1935 1936 /* Set MAC address */ 1937 umac_set_hw_addr(priv, dev->dev_addr); 1938 1939 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link, 1940 0, priv->phy_interface); 1941 if (!phydev) { 1942 netdev_err(dev, "could not attach to PHY\n"); 1943 return -ENODEV; 1944 } 1945 1946 /* Reset house keeping link status */ 1947 priv->old_duplex = -1; 1948 priv->old_link = -1; 1949 priv->old_pause = -1; 1950 1951 /* mask all interrupts and request them */ 1952 bcm_sysport_mask_all_intrs(priv); 1953 1954 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev); 1955 if (ret) { 1956 netdev_err(dev, "failed to request RX interrupt\n"); 1957 goto out_phy_disconnect; 1958 } 1959 1960 if (!priv->is_lite) { 1961 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, 1962 dev->name, dev); 1963 if (ret) { 1964 netdev_err(dev, "failed to request TX interrupt\n"); 1965 goto out_free_irq0; 1966 } 1967 } 1968 1969 /* Initialize both hardware and software ring */ 1970 for (i = 0; i < dev->num_tx_queues; i++) { 1971 ret = bcm_sysport_init_tx_ring(priv, i); 1972 if (ret) { 1973 netdev_err(dev, "failed to initialize TX ring %d\n", 1974 i); 1975 goto out_free_tx_ring; 1976 } 1977 } 1978 1979 /* Initialize linked-list */ 1980 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 1981 1982 /* Initialize RX ring */ 1983 ret = bcm_sysport_init_rx_ring(priv); 1984 if (ret) { 1985 netdev_err(dev, "failed to initialize RX ring\n"); 1986 goto out_free_rx_ring; 1987 } 1988 1989 /* Turn on RDMA */ 1990 ret = rdma_enable_set(priv, 1); 1991 if (ret) 1992 goto out_free_rx_ring; 1993 1994 /* Turn on TDMA */ 1995 ret = tdma_enable_set(priv, 1); 1996 if (ret) 1997 goto out_clear_rx_int; 1998 1999 /* Turn on UniMAC TX/RX */ 2000 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1); 2001 2002 bcm_sysport_netif_start(dev); 2003 2004 netif_tx_start_all_queues(dev); 2005 2006 return 0; 2007 2008 out_clear_rx_int: 2009 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL); 2010 out_free_rx_ring: 2011 bcm_sysport_fini_rx_ring(priv); 2012 out_free_tx_ring: 2013 for (i = 0; i < dev->num_tx_queues; i++) 2014 bcm_sysport_fini_tx_ring(priv, i); 2015 if (!priv->is_lite) 2016 free_irq(priv->irq1, dev); 2017 out_free_irq0: 2018 free_irq(priv->irq0, dev); 2019 out_phy_disconnect: 2020 phy_disconnect(phydev); 2021 return ret; 2022 } 2023 2024 static void bcm_sysport_netif_stop(struct net_device *dev) 2025 { 2026 struct bcm_sysport_priv *priv = netdev_priv(dev); 2027 2028 /* stop all software from updating hardware */ 2029 netif_tx_disable(dev); 2030 napi_disable(&priv->napi); 2031 cancel_work_sync(&priv->dim.dim.work); 2032 phy_stop(dev->phydev); 2033 2034 /* mask all interrupts */ 2035 bcm_sysport_mask_all_intrs(priv); 2036 } 2037 2038 static int bcm_sysport_stop(struct net_device *dev) 2039 { 2040 struct bcm_sysport_priv *priv = netdev_priv(dev); 2041 unsigned int i; 2042 int ret; 2043 2044 bcm_sysport_netif_stop(dev); 2045 2046 /* Disable UniMAC RX */ 2047 umac_enable_set(priv, CMD_RX_EN, 0); 2048 2049 ret = tdma_enable_set(priv, 0); 2050 if (ret) { 2051 netdev_err(dev, "timeout disabling RDMA\n"); 2052 return ret; 2053 } 2054 2055 /* Wait for a maximum packet size to be drained */ 2056 usleep_range(2000, 3000); 2057 2058 ret = rdma_enable_set(priv, 0); 2059 if (ret) { 2060 netdev_err(dev, "timeout disabling TDMA\n"); 2061 return ret; 2062 } 2063 2064 /* Disable UniMAC TX */ 2065 umac_enable_set(priv, CMD_TX_EN, 0); 2066 2067 /* Free RX/TX rings SW structures */ 2068 for (i = 0; i < dev->num_tx_queues; i++) 2069 bcm_sysport_fini_tx_ring(priv, i); 2070 bcm_sysport_fini_rx_ring(priv); 2071 2072 free_irq(priv->irq0, dev); 2073 if (!priv->is_lite) 2074 free_irq(priv->irq1, dev); 2075 2076 /* Disconnect from PHY */ 2077 phy_disconnect(dev->phydev); 2078 2079 return 0; 2080 } 2081 2082 static int bcm_sysport_rule_find(struct bcm_sysport_priv *priv, 2083 u64 location) 2084 { 2085 unsigned int index; 2086 u32 reg; 2087 2088 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2089 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2090 reg >>= RXCHK_BRCM_TAG_CID_SHIFT; 2091 reg &= RXCHK_BRCM_TAG_CID_MASK; 2092 if (reg == location) 2093 return index; 2094 } 2095 2096 return -EINVAL; 2097 } 2098 2099 static int bcm_sysport_rule_get(struct bcm_sysport_priv *priv, 2100 struct ethtool_rxnfc *nfc) 2101 { 2102 int index; 2103 2104 /* This is not a rule that we know about */ 2105 index = bcm_sysport_rule_find(priv, nfc->fs.location); 2106 if (index < 0) 2107 return -EOPNOTSUPP; 2108 2109 nfc->fs.ring_cookie = RX_CLS_FLOW_WAKE; 2110 2111 return 0; 2112 } 2113 2114 static int bcm_sysport_rule_set(struct bcm_sysport_priv *priv, 2115 struct ethtool_rxnfc *nfc) 2116 { 2117 unsigned int index; 2118 u32 reg; 2119 2120 /* We cannot match locations greater than what the classification ID 2121 * permits (256 entries) 2122 */ 2123 if (nfc->fs.location > RXCHK_BRCM_TAG_CID_MASK) 2124 return -E2BIG; 2125 2126 /* We cannot support flows that are not destined for a wake-up */ 2127 if (nfc->fs.ring_cookie != RX_CLS_FLOW_WAKE) 2128 return -EOPNOTSUPP; 2129 2130 /* All filters are already in use, we cannot match more rules */ 2131 if (bitmap_weight(priv->filters, RXCHK_BRCM_TAG_MAX) == 2132 RXCHK_BRCM_TAG_MAX) 2133 return -ENOSPC; 2134 2135 index = find_first_zero_bit(priv->filters, RXCHK_BRCM_TAG_MAX); 2136 if (index >= RXCHK_BRCM_TAG_MAX) 2137 return -ENOSPC; 2138 2139 /* Location is the classification ID, and index is the position 2140 * within one of our 8 possible filters to be programmed 2141 */ 2142 reg = rxchk_readl(priv, RXCHK_BRCM_TAG(index)); 2143 reg &= ~(RXCHK_BRCM_TAG_CID_MASK << RXCHK_BRCM_TAG_CID_SHIFT); 2144 reg |= nfc->fs.location << RXCHK_BRCM_TAG_CID_SHIFT; 2145 rxchk_writel(priv, reg, RXCHK_BRCM_TAG(index)); 2146 rxchk_writel(priv, 0xff00ffff, RXCHK_BRCM_TAG_MASK(index)); 2147 2148 priv->filters_loc[index] = nfc->fs.location; 2149 set_bit(index, priv->filters); 2150 2151 return 0; 2152 } 2153 2154 static int bcm_sysport_rule_del(struct bcm_sysport_priv *priv, 2155 u64 location) 2156 { 2157 int index; 2158 2159 /* This is not a rule that we know about */ 2160 index = bcm_sysport_rule_find(priv, location); 2161 if (index < 0) 2162 return -EOPNOTSUPP; 2163 2164 /* No need to disable this filter if it was enabled, this will 2165 * be taken care of during suspend time by bcm_sysport_suspend_to_wol 2166 */ 2167 clear_bit(index, priv->filters); 2168 priv->filters_loc[index] = 0; 2169 2170 return 0; 2171 } 2172 2173 static int bcm_sysport_get_rxnfc(struct net_device *dev, 2174 struct ethtool_rxnfc *nfc, u32 *rule_locs) 2175 { 2176 struct bcm_sysport_priv *priv = netdev_priv(dev); 2177 int ret = -EOPNOTSUPP; 2178 2179 switch (nfc->cmd) { 2180 case ETHTOOL_GRXCLSRULE: 2181 ret = bcm_sysport_rule_get(priv, nfc); 2182 break; 2183 default: 2184 break; 2185 } 2186 2187 return ret; 2188 } 2189 2190 static int bcm_sysport_set_rxnfc(struct net_device *dev, 2191 struct ethtool_rxnfc *nfc) 2192 { 2193 struct bcm_sysport_priv *priv = netdev_priv(dev); 2194 int ret = -EOPNOTSUPP; 2195 2196 switch (nfc->cmd) { 2197 case ETHTOOL_SRXCLSRLINS: 2198 ret = bcm_sysport_rule_set(priv, nfc); 2199 break; 2200 case ETHTOOL_SRXCLSRLDEL: 2201 ret = bcm_sysport_rule_del(priv, nfc->fs.location); 2202 break; 2203 default: 2204 break; 2205 } 2206 2207 return ret; 2208 } 2209 2210 static const struct ethtool_ops bcm_sysport_ethtool_ops = { 2211 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | 2212 ETHTOOL_COALESCE_MAX_FRAMES | 2213 ETHTOOL_COALESCE_USE_ADAPTIVE_RX, 2214 .get_drvinfo = bcm_sysport_get_drvinfo, 2215 .get_msglevel = bcm_sysport_get_msglvl, 2216 .set_msglevel = bcm_sysport_set_msglvl, 2217 .get_link = ethtool_op_get_link, 2218 .get_strings = bcm_sysport_get_strings, 2219 .get_ethtool_stats = bcm_sysport_get_stats, 2220 .get_sset_count = bcm_sysport_get_sset_count, 2221 .get_wol = bcm_sysport_get_wol, 2222 .set_wol = bcm_sysport_set_wol, 2223 .get_coalesce = bcm_sysport_get_coalesce, 2224 .set_coalesce = bcm_sysport_set_coalesce, 2225 .get_link_ksettings = phy_ethtool_get_link_ksettings, 2226 .set_link_ksettings = phy_ethtool_set_link_ksettings, 2227 .get_rxnfc = bcm_sysport_get_rxnfc, 2228 .set_rxnfc = bcm_sysport_set_rxnfc, 2229 }; 2230 2231 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb, 2232 struct net_device *sb_dev) 2233 { 2234 struct bcm_sysport_priv *priv = netdev_priv(dev); 2235 u16 queue = skb_get_queue_mapping(skb); 2236 struct bcm_sysport_tx_ring *tx_ring; 2237 unsigned int q, port; 2238 2239 if (!netdev_uses_dsa(dev)) 2240 return netdev_pick_tx(dev, skb, NULL); 2241 2242 /* DSA tagging layer will have configured the correct queue */ 2243 q = BRCM_TAG_GET_QUEUE(queue); 2244 port = BRCM_TAG_GET_PORT(queue); 2245 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues]; 2246 2247 if (unlikely(!tx_ring)) 2248 return netdev_pick_tx(dev, skb, NULL); 2249 2250 return tx_ring->index; 2251 } 2252 2253 static const struct net_device_ops bcm_sysport_netdev_ops = { 2254 .ndo_start_xmit = bcm_sysport_xmit, 2255 .ndo_tx_timeout = bcm_sysport_tx_timeout, 2256 .ndo_open = bcm_sysport_open, 2257 .ndo_stop = bcm_sysport_stop, 2258 .ndo_set_features = bcm_sysport_set_features, 2259 .ndo_set_rx_mode = bcm_sysport_set_rx_mode, 2260 .ndo_set_mac_address = bcm_sysport_change_mac, 2261 #ifdef CONFIG_NET_POLL_CONTROLLER 2262 .ndo_poll_controller = bcm_sysport_poll_controller, 2263 #endif 2264 .ndo_get_stats64 = bcm_sysport_get_stats64, 2265 .ndo_select_queue = bcm_sysport_select_queue, 2266 }; 2267 2268 static int bcm_sysport_map_queues(struct notifier_block *nb, 2269 struct dsa_notifier_register_info *info) 2270 { 2271 struct bcm_sysport_tx_ring *ring; 2272 struct bcm_sysport_priv *priv; 2273 struct net_device *slave_dev; 2274 unsigned int num_tx_queues; 2275 unsigned int q, qp, port; 2276 struct net_device *dev; 2277 2278 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier); 2279 if (priv->netdev != info->master) 2280 return 0; 2281 2282 dev = info->master; 2283 2284 /* We can't be setting up queue inspection for non directly attached 2285 * switches 2286 */ 2287 if (info->switch_number) 2288 return 0; 2289 2290 if (dev->netdev_ops != &bcm_sysport_netdev_ops) 2291 return 0; 2292 2293 port = info->port_number; 2294 slave_dev = info->info.dev; 2295 2296 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a 2297 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of 2298 * per-port (slave_dev) network devices queue, we achieve just that. 2299 * This need to happen now before any slave network device is used such 2300 * it accurately reflects the number of real TX queues. 2301 */ 2302 if (priv->is_lite) 2303 netif_set_real_num_tx_queues(slave_dev, 2304 slave_dev->num_tx_queues / 2); 2305 2306 num_tx_queues = slave_dev->real_num_tx_queues; 2307 2308 if (priv->per_port_num_tx_queues && 2309 priv->per_port_num_tx_queues != num_tx_queues) 2310 netdev_warn(slave_dev, "asymmetric number of per-port queues\n"); 2311 2312 priv->per_port_num_tx_queues = num_tx_queues; 2313 2314 for (q = 0, qp = 0; q < dev->num_tx_queues && qp < num_tx_queues; 2315 q++) { 2316 ring = &priv->tx_rings[q]; 2317 2318 if (ring->inspect) 2319 continue; 2320 2321 /* Just remember the mapping actual programming done 2322 * during bcm_sysport_init_tx_ring 2323 */ 2324 ring->switch_queue = qp; 2325 ring->switch_port = port; 2326 ring->inspect = true; 2327 priv->ring_map[qp + port * num_tx_queues] = ring; 2328 qp++; 2329 } 2330 2331 return 0; 2332 } 2333 2334 static int bcm_sysport_unmap_queues(struct notifier_block *nb, 2335 struct dsa_notifier_register_info *info) 2336 { 2337 struct bcm_sysport_tx_ring *ring; 2338 struct bcm_sysport_priv *priv; 2339 struct net_device *slave_dev; 2340 unsigned int num_tx_queues; 2341 struct net_device *dev; 2342 unsigned int q, qp, port; 2343 2344 priv = container_of(nb, struct bcm_sysport_priv, dsa_notifier); 2345 if (priv->netdev != info->master) 2346 return 0; 2347 2348 dev = info->master; 2349 2350 if (dev->netdev_ops != &bcm_sysport_netdev_ops) 2351 return 0; 2352 2353 port = info->port_number; 2354 slave_dev = info->info.dev; 2355 2356 num_tx_queues = slave_dev->real_num_tx_queues; 2357 2358 for (q = 0; q < dev->num_tx_queues; q++) { 2359 ring = &priv->tx_rings[q]; 2360 2361 if (ring->switch_port != port) 2362 continue; 2363 2364 if (!ring->inspect) 2365 continue; 2366 2367 ring->inspect = false; 2368 qp = ring->switch_queue; 2369 priv->ring_map[qp + port * num_tx_queues] = NULL; 2370 } 2371 2372 return 0; 2373 } 2374 2375 static int bcm_sysport_dsa_notifier(struct notifier_block *nb, 2376 unsigned long event, void *ptr) 2377 { 2378 int ret = NOTIFY_DONE; 2379 2380 switch (event) { 2381 case DSA_PORT_REGISTER: 2382 ret = bcm_sysport_map_queues(nb, ptr); 2383 break; 2384 case DSA_PORT_UNREGISTER: 2385 ret = bcm_sysport_unmap_queues(nb, ptr); 2386 break; 2387 } 2388 2389 return notifier_from_errno(ret); 2390 } 2391 2392 #define REV_FMT "v%2x.%02x" 2393 2394 static const struct bcm_sysport_hw_params bcm_sysport_params[] = { 2395 [SYSTEMPORT] = { 2396 .is_lite = false, 2397 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS, 2398 }, 2399 [SYSTEMPORT_LITE] = { 2400 .is_lite = true, 2401 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS, 2402 }, 2403 }; 2404 2405 static const struct of_device_id bcm_sysport_of_match[] = { 2406 { .compatible = "brcm,systemportlite-v1.00", 2407 .data = &bcm_sysport_params[SYSTEMPORT_LITE] }, 2408 { .compatible = "brcm,systemport-v1.00", 2409 .data = &bcm_sysport_params[SYSTEMPORT] }, 2410 { .compatible = "brcm,systemport", 2411 .data = &bcm_sysport_params[SYSTEMPORT] }, 2412 { /* sentinel */ } 2413 }; 2414 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match); 2415 2416 static int bcm_sysport_probe(struct platform_device *pdev) 2417 { 2418 const struct bcm_sysport_hw_params *params; 2419 const struct of_device_id *of_id = NULL; 2420 struct bcm_sysport_priv *priv; 2421 struct device_node *dn; 2422 struct net_device *dev; 2423 const void *macaddr; 2424 u32 txq, rxq; 2425 int ret; 2426 2427 dn = pdev->dev.of_node; 2428 of_id = of_match_node(bcm_sysport_of_match, dn); 2429 if (!of_id || !of_id->data) 2430 return -EINVAL; 2431 2432 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40)); 2433 if (ret) 2434 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2435 if (ret) { 2436 dev_err(&pdev->dev, "unable to set DMA mask: %d\n", ret); 2437 return ret; 2438 } 2439 2440 /* Fairly quickly we need to know the type of adapter we have */ 2441 params = of_id->data; 2442 2443 /* Read the Transmit/Receive Queue properties */ 2444 if (of_property_read_u32(dn, "systemport,num-txq", &txq)) 2445 txq = TDMA_NUM_RINGS; 2446 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq)) 2447 rxq = 1; 2448 2449 /* Sanity check the number of transmit queues */ 2450 if (!txq || txq > TDMA_NUM_RINGS) 2451 return -EINVAL; 2452 2453 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq); 2454 if (!dev) 2455 return -ENOMEM; 2456 2457 /* Initialize private members */ 2458 priv = netdev_priv(dev); 2459 2460 /* Allocate number of TX rings */ 2461 priv->tx_rings = devm_kcalloc(&pdev->dev, txq, 2462 sizeof(struct bcm_sysport_tx_ring), 2463 GFP_KERNEL); 2464 if (!priv->tx_rings) 2465 return -ENOMEM; 2466 2467 priv->is_lite = params->is_lite; 2468 priv->num_rx_desc_words = params->num_rx_desc_words; 2469 2470 priv->irq0 = platform_get_irq(pdev, 0); 2471 if (!priv->is_lite) { 2472 priv->irq1 = platform_get_irq(pdev, 1); 2473 priv->wol_irq = platform_get_irq(pdev, 2); 2474 } else { 2475 priv->wol_irq = platform_get_irq(pdev, 1); 2476 } 2477 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) { 2478 dev_err(&pdev->dev, "invalid interrupts\n"); 2479 ret = -EINVAL; 2480 goto err_free_netdev; 2481 } 2482 2483 priv->base = devm_platform_ioremap_resource(pdev, 0); 2484 if (IS_ERR(priv->base)) { 2485 ret = PTR_ERR(priv->base); 2486 goto err_free_netdev; 2487 } 2488 2489 priv->netdev = dev; 2490 priv->pdev = pdev; 2491 2492 ret = of_get_phy_mode(dn, &priv->phy_interface); 2493 /* Default to GMII interface mode */ 2494 if (ret) 2495 priv->phy_interface = PHY_INTERFACE_MODE_GMII; 2496 2497 /* In the case of a fixed PHY, the DT node associated 2498 * to the PHY is the Ethernet MAC DT node. 2499 */ 2500 if (of_phy_is_fixed_link(dn)) { 2501 ret = of_phy_register_fixed_link(dn); 2502 if (ret) { 2503 dev_err(&pdev->dev, "failed to register fixed PHY\n"); 2504 goto err_free_netdev; 2505 } 2506 2507 priv->phy_dn = dn; 2508 } 2509 2510 /* Initialize netdevice members */ 2511 macaddr = of_get_mac_address(dn); 2512 if (IS_ERR(macaddr)) { 2513 dev_warn(&pdev->dev, "using random Ethernet MAC\n"); 2514 eth_hw_addr_random(dev); 2515 } else { 2516 ether_addr_copy(dev->dev_addr, macaddr); 2517 } 2518 2519 SET_NETDEV_DEV(dev, &pdev->dev); 2520 dev_set_drvdata(&pdev->dev, dev); 2521 dev->ethtool_ops = &bcm_sysport_ethtool_ops; 2522 dev->netdev_ops = &bcm_sysport_netdev_ops; 2523 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64); 2524 2525 dev->features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA | 2526 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 2527 dev->hw_features |= dev->features; 2528 dev->vlan_features |= dev->features; 2529 2530 /* Request the WOL interrupt and advertise suspend if available */ 2531 priv->wol_irq_disabled = 1; 2532 ret = devm_request_irq(&pdev->dev, priv->wol_irq, 2533 bcm_sysport_wol_isr, 0, dev->name, priv); 2534 if (!ret) 2535 device_set_wakeup_capable(&pdev->dev, 1); 2536 2537 /* Set the needed headroom once and for all */ 2538 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8); 2539 dev->needed_headroom += sizeof(struct bcm_tsb); 2540 2541 /* libphy will adjust the link state accordingly */ 2542 netif_carrier_off(dev); 2543 2544 priv->rx_max_coalesced_frames = 1; 2545 u64_stats_init(&priv->syncp); 2546 2547 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier; 2548 2549 ret = register_dsa_notifier(&priv->dsa_notifier); 2550 if (ret) { 2551 dev_err(&pdev->dev, "failed to register DSA notifier\n"); 2552 goto err_deregister_fixed_link; 2553 } 2554 2555 ret = register_netdev(dev); 2556 if (ret) { 2557 dev_err(&pdev->dev, "failed to register net_device\n"); 2558 goto err_deregister_notifier; 2559 } 2560 2561 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK; 2562 dev_info(&pdev->dev, 2563 "Broadcom SYSTEMPORT%s " REV_FMT 2564 " (irqs: %d, %d, TXQs: %d, RXQs: %d)\n", 2565 priv->is_lite ? " Lite" : "", 2566 (priv->rev >> 8) & 0xff, priv->rev & 0xff, 2567 priv->irq0, priv->irq1, txq, rxq); 2568 2569 return 0; 2570 2571 err_deregister_notifier: 2572 unregister_dsa_notifier(&priv->dsa_notifier); 2573 err_deregister_fixed_link: 2574 if (of_phy_is_fixed_link(dn)) 2575 of_phy_deregister_fixed_link(dn); 2576 err_free_netdev: 2577 free_netdev(dev); 2578 return ret; 2579 } 2580 2581 static int bcm_sysport_remove(struct platform_device *pdev) 2582 { 2583 struct net_device *dev = dev_get_drvdata(&pdev->dev); 2584 struct bcm_sysport_priv *priv = netdev_priv(dev); 2585 struct device_node *dn = pdev->dev.of_node; 2586 2587 /* Not much to do, ndo_close has been called 2588 * and we use managed allocations 2589 */ 2590 unregister_dsa_notifier(&priv->dsa_notifier); 2591 unregister_netdev(dev); 2592 if (of_phy_is_fixed_link(dn)) 2593 of_phy_deregister_fixed_link(dn); 2594 free_netdev(dev); 2595 dev_set_drvdata(&pdev->dev, NULL); 2596 2597 return 0; 2598 } 2599 2600 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv) 2601 { 2602 struct net_device *ndev = priv->netdev; 2603 unsigned int timeout = 1000; 2604 unsigned int index, i = 0; 2605 u32 reg; 2606 2607 reg = umac_readl(priv, UMAC_MPD_CTRL); 2608 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) 2609 reg |= MPD_EN; 2610 reg &= ~PSW_EN; 2611 if (priv->wolopts & WAKE_MAGICSECURE) { 2612 /* Program the SecureOn password */ 2613 umac_writel(priv, get_unaligned_be16(&priv->sopass[0]), 2614 UMAC_PSW_MS); 2615 umac_writel(priv, get_unaligned_be32(&priv->sopass[2]), 2616 UMAC_PSW_LS); 2617 reg |= PSW_EN; 2618 } 2619 umac_writel(priv, reg, UMAC_MPD_CTRL); 2620 2621 if (priv->wolopts & WAKE_FILTER) { 2622 /* Turn on ACPI matching to steal packets from RBUF */ 2623 reg = rbuf_readl(priv, RBUF_CONTROL); 2624 if (priv->is_lite) 2625 reg |= RBUF_ACPI_EN_LITE; 2626 else 2627 reg |= RBUF_ACPI_EN; 2628 rbuf_writel(priv, reg, RBUF_CONTROL); 2629 2630 /* Enable RXCHK, active filters and Broadcom tag matching */ 2631 reg = rxchk_readl(priv, RXCHK_CONTROL); 2632 reg &= ~(RXCHK_BRCM_TAG_MATCH_MASK << 2633 RXCHK_BRCM_TAG_MATCH_SHIFT); 2634 for_each_set_bit(index, priv->filters, RXCHK_BRCM_TAG_MAX) { 2635 reg |= BIT(RXCHK_BRCM_TAG_MATCH_SHIFT + i); 2636 i++; 2637 } 2638 reg |= RXCHK_EN | RXCHK_BRCM_TAG_EN; 2639 rxchk_writel(priv, reg, RXCHK_CONTROL); 2640 } 2641 2642 /* Make sure RBUF entered WoL mode as result */ 2643 do { 2644 reg = rbuf_readl(priv, RBUF_STATUS); 2645 if (reg & RBUF_WOL_MODE) 2646 break; 2647 2648 udelay(10); 2649 } while (timeout-- > 0); 2650 2651 /* Do not leave the UniMAC RBUF matching only MPD packets */ 2652 if (!timeout) { 2653 mpd_enable_set(priv, false); 2654 netif_err(priv, wol, ndev, "failed to enter WOL mode\n"); 2655 return -ETIMEDOUT; 2656 } 2657 2658 /* UniMAC receive needs to be turned on */ 2659 umac_enable_set(priv, CMD_RX_EN, 1); 2660 2661 netif_dbg(priv, wol, ndev, "entered WOL mode\n"); 2662 2663 return 0; 2664 } 2665 2666 static int __maybe_unused bcm_sysport_suspend(struct device *d) 2667 { 2668 struct net_device *dev = dev_get_drvdata(d); 2669 struct bcm_sysport_priv *priv = netdev_priv(dev); 2670 unsigned int i; 2671 int ret = 0; 2672 u32 reg; 2673 2674 if (!netif_running(dev)) 2675 return 0; 2676 2677 netif_device_detach(dev); 2678 2679 bcm_sysport_netif_stop(dev); 2680 2681 phy_suspend(dev->phydev); 2682 2683 /* Disable UniMAC RX */ 2684 umac_enable_set(priv, CMD_RX_EN, 0); 2685 2686 ret = rdma_enable_set(priv, 0); 2687 if (ret) { 2688 netdev_err(dev, "RDMA timeout!\n"); 2689 return ret; 2690 } 2691 2692 /* Disable RXCHK if enabled */ 2693 if (priv->rx_chk_en) { 2694 reg = rxchk_readl(priv, RXCHK_CONTROL); 2695 reg &= ~RXCHK_EN; 2696 rxchk_writel(priv, reg, RXCHK_CONTROL); 2697 } 2698 2699 /* Flush RX pipe */ 2700 if (!priv->wolopts) 2701 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL); 2702 2703 ret = tdma_enable_set(priv, 0); 2704 if (ret) { 2705 netdev_err(dev, "TDMA timeout!\n"); 2706 return ret; 2707 } 2708 2709 /* Wait for a packet boundary */ 2710 usleep_range(2000, 3000); 2711 2712 umac_enable_set(priv, CMD_TX_EN, 0); 2713 2714 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL); 2715 2716 /* Free RX/TX rings SW structures */ 2717 for (i = 0; i < dev->num_tx_queues; i++) 2718 bcm_sysport_fini_tx_ring(priv, i); 2719 bcm_sysport_fini_rx_ring(priv); 2720 2721 /* Get prepared for Wake-on-LAN */ 2722 if (device_may_wakeup(d) && priv->wolopts) 2723 ret = bcm_sysport_suspend_to_wol(priv); 2724 2725 return ret; 2726 } 2727 2728 static int __maybe_unused bcm_sysport_resume(struct device *d) 2729 { 2730 struct net_device *dev = dev_get_drvdata(d); 2731 struct bcm_sysport_priv *priv = netdev_priv(dev); 2732 unsigned int i; 2733 int ret; 2734 2735 if (!netif_running(dev)) 2736 return 0; 2737 2738 umac_reset(priv); 2739 2740 /* Disable the UniMAC RX/TX */ 2741 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0); 2742 2743 /* We may have been suspended and never received a WOL event that 2744 * would turn off MPD detection, take care of that now 2745 */ 2746 bcm_sysport_resume_from_wol(priv); 2747 2748 /* Initialize both hardware and software ring */ 2749 for (i = 0; i < dev->num_tx_queues; i++) { 2750 ret = bcm_sysport_init_tx_ring(priv, i); 2751 if (ret) { 2752 netdev_err(dev, "failed to initialize TX ring %d\n", 2753 i); 2754 goto out_free_tx_rings; 2755 } 2756 } 2757 2758 /* Initialize linked-list */ 2759 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS); 2760 2761 /* Initialize RX ring */ 2762 ret = bcm_sysport_init_rx_ring(priv); 2763 if (ret) { 2764 netdev_err(dev, "failed to initialize RX ring\n"); 2765 goto out_free_rx_ring; 2766 } 2767 2768 /* RX pipe enable */ 2769 topctrl_writel(priv, 0, RX_FLUSH_CNTL); 2770 2771 ret = rdma_enable_set(priv, 1); 2772 if (ret) { 2773 netdev_err(dev, "failed to enable RDMA\n"); 2774 goto out_free_rx_ring; 2775 } 2776 2777 /* Restore enabled features */ 2778 bcm_sysport_set_features(dev, dev->features); 2779 2780 rbuf_init(priv); 2781 2782 /* Set maximum frame length */ 2783 if (!priv->is_lite) 2784 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN); 2785 else 2786 gib_set_pad_extension(priv); 2787 2788 /* Set MAC address */ 2789 umac_set_hw_addr(priv, dev->dev_addr); 2790 2791 umac_enable_set(priv, CMD_RX_EN, 1); 2792 2793 /* TX pipe enable */ 2794 topctrl_writel(priv, 0, TX_FLUSH_CNTL); 2795 2796 umac_enable_set(priv, CMD_TX_EN, 1); 2797 2798 ret = tdma_enable_set(priv, 1); 2799 if (ret) { 2800 netdev_err(dev, "TDMA timeout!\n"); 2801 goto out_free_rx_ring; 2802 } 2803 2804 phy_resume(dev->phydev); 2805 2806 bcm_sysport_netif_start(dev); 2807 2808 netif_device_attach(dev); 2809 2810 return 0; 2811 2812 out_free_rx_ring: 2813 bcm_sysport_fini_rx_ring(priv); 2814 out_free_tx_rings: 2815 for (i = 0; i < dev->num_tx_queues; i++) 2816 bcm_sysport_fini_tx_ring(priv, i); 2817 return ret; 2818 } 2819 2820 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops, 2821 bcm_sysport_suspend, bcm_sysport_resume); 2822 2823 static struct platform_driver bcm_sysport_driver = { 2824 .probe = bcm_sysport_probe, 2825 .remove = bcm_sysport_remove, 2826 .driver = { 2827 .name = "brcm-systemport", 2828 .of_match_table = bcm_sysport_of_match, 2829 .pm = &bcm_sysport_pm_ops, 2830 }, 2831 }; 2832 module_platform_driver(bcm_sysport_driver); 2833 2834 MODULE_AUTHOR("Broadcom Corporation"); 2835 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver"); 2836 MODULE_ALIAS("platform:brcm-systemport"); 2837 MODULE_LICENSE("GPL"); 2838