1 /* 2 * Copyright(c) 2007 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1e.h" 23 24 #define DRV_VERSION "1.0.0.7-NAPI" 25 26 char atl1e_driver_name[] = "ATL1E"; 27 char atl1e_driver_version[] = DRV_VERSION; 28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026 29 /* 30 * atl1e_pci_tbl - PCI Device ID Table 31 * 32 * Wildcard entries (PCI_ANY_ID) should come last 33 * Last entry must be all 0s 34 * 35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 36 * Class, Class Mask, private data (not used) } 37 */ 38 static const struct pci_device_id atl1e_pci_tbl[] = { 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)}, 41 /* required last entry */ 42 { 0 } 43 }; 44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl); 45 46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>"); 47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); 48 MODULE_LICENSE("GPL"); 49 MODULE_VERSION(DRV_VERSION); 50 51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter); 52 53 static const u16 54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 55 { 56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD}, 57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD}, 58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD}, 59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD} 60 }; 61 62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] = 63 { 64 REG_RXF0_BASE_ADDR_HI, 65 REG_RXF1_BASE_ADDR_HI, 66 REG_RXF2_BASE_ADDR_HI, 67 REG_RXF3_BASE_ADDR_HI 68 }; 69 70 static const u16 71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 72 { 73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO}, 74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO}, 75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO}, 76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO} 77 }; 78 79 static const u16 80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 81 { 82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO}, 83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO}, 84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO}, 85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO} 86 }; 87 88 static const u16 atl1e_pay_load_size[] = { 89 128, 256, 512, 1024, 2048, 4096, 90 }; 91 92 /** 93 * atl1e_irq_enable - Enable default interrupt generation settings 94 * @adapter: board private structure 95 */ 96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter) 97 { 98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK); 101 AT_WRITE_FLUSH(&adapter->hw); 102 } 103 } 104 105 /** 106 * atl1e_irq_disable - Mask off interrupt generation on the NIC 107 * @adapter: board private structure 108 */ 109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter) 110 { 111 atomic_inc(&adapter->irq_sem); 112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 113 AT_WRITE_FLUSH(&adapter->hw); 114 synchronize_irq(adapter->pdev->irq); 115 } 116 117 /** 118 * atl1e_irq_reset - reset interrupt confiure on the NIC 119 * @adapter: board private structure 120 */ 121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter) 122 { 123 atomic_set(&adapter->irq_sem, 0); 124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 126 AT_WRITE_FLUSH(&adapter->hw); 127 } 128 129 /** 130 * atl1e_phy_config - Timer Call-back 131 * @data: pointer to netdev cast into an unsigned long 132 */ 133 static void atl1e_phy_config(unsigned long data) 134 { 135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data; 136 struct atl1e_hw *hw = &adapter->hw; 137 unsigned long flags; 138 139 spin_lock_irqsave(&adapter->mdio_lock, flags); 140 atl1e_restart_autoneg(hw); 141 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 142 } 143 144 void atl1e_reinit_locked(struct atl1e_adapter *adapter) 145 { 146 147 WARN_ON(in_interrupt()); 148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 149 msleep(1); 150 atl1e_down(adapter); 151 atl1e_up(adapter); 152 clear_bit(__AT_RESETTING, &adapter->flags); 153 } 154 155 static void atl1e_reset_task(struct work_struct *work) 156 { 157 struct atl1e_adapter *adapter; 158 adapter = container_of(work, struct atl1e_adapter, reset_task); 159 160 atl1e_reinit_locked(adapter); 161 } 162 163 static int atl1e_check_link(struct atl1e_adapter *adapter) 164 { 165 struct atl1e_hw *hw = &adapter->hw; 166 struct net_device *netdev = adapter->netdev; 167 int err = 0; 168 u16 speed, duplex, phy_data; 169 170 /* MII_BMSR must read twice */ 171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 173 if ((phy_data & BMSR_LSTATUS) == 0) { 174 /* link down */ 175 if (netif_carrier_ok(netdev)) { /* old link state: Up */ 176 u32 value; 177 /* disable rx */ 178 value = AT_READ_REG(hw, REG_MAC_CTRL); 179 value &= ~MAC_CTRL_RX_EN; 180 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 181 adapter->link_speed = SPEED_0; 182 netif_carrier_off(netdev); 183 netif_stop_queue(netdev); 184 } 185 } else { 186 /* Link Up */ 187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex); 188 if (unlikely(err)) 189 return err; 190 191 /* link result is our setting */ 192 if (adapter->link_speed != speed || 193 adapter->link_duplex != duplex) { 194 adapter->link_speed = speed; 195 adapter->link_duplex = duplex; 196 atl1e_setup_mac_ctrl(adapter); 197 netdev_info(netdev, 198 "NIC Link is Up <%d Mbps %s Duplex>\n", 199 adapter->link_speed, 200 adapter->link_duplex == FULL_DUPLEX ? 201 "Full" : "Half"); 202 } 203 204 if (!netif_carrier_ok(netdev)) { 205 /* Link down -> Up */ 206 netif_carrier_on(netdev); 207 netif_wake_queue(netdev); 208 } 209 } 210 return 0; 211 } 212 213 /** 214 * atl1e_link_chg_task - deal with link change event Out of interrupt context 215 * @netdev: network interface device structure 216 */ 217 static void atl1e_link_chg_task(struct work_struct *work) 218 { 219 struct atl1e_adapter *adapter; 220 unsigned long flags; 221 222 adapter = container_of(work, struct atl1e_adapter, link_chg_task); 223 spin_lock_irqsave(&adapter->mdio_lock, flags); 224 atl1e_check_link(adapter); 225 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 226 } 227 228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter) 229 { 230 struct net_device *netdev = adapter->netdev; 231 u16 phy_data = 0; 232 u16 link_up = 0; 233 234 spin_lock(&adapter->mdio_lock); 235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 237 spin_unlock(&adapter->mdio_lock); 238 link_up = phy_data & BMSR_LSTATUS; 239 /* notify upper layer link down ASAP */ 240 if (!link_up) { 241 if (netif_carrier_ok(netdev)) { 242 /* old link state: Up */ 243 netdev_info(netdev, "NIC Link is Down\n"); 244 adapter->link_speed = SPEED_0; 245 netif_stop_queue(netdev); 246 } 247 } 248 schedule_work(&adapter->link_chg_task); 249 } 250 251 static void atl1e_del_timer(struct atl1e_adapter *adapter) 252 { 253 del_timer_sync(&adapter->phy_config_timer); 254 } 255 256 static void atl1e_cancel_work(struct atl1e_adapter *adapter) 257 { 258 cancel_work_sync(&adapter->reset_task); 259 cancel_work_sync(&adapter->link_chg_task); 260 } 261 262 /** 263 * atl1e_tx_timeout - Respond to a Tx Hang 264 * @netdev: network interface device structure 265 */ 266 static void atl1e_tx_timeout(struct net_device *netdev) 267 { 268 struct atl1e_adapter *adapter = netdev_priv(netdev); 269 270 /* Do the reset outside of interrupt context */ 271 schedule_work(&adapter->reset_task); 272 } 273 274 /** 275 * atl1e_set_multi - Multicast and Promiscuous mode set 276 * @netdev: network interface device structure 277 * 278 * The set_multi entry point is called whenever the multicast address 279 * list or the network interface flags are updated. This routine is 280 * responsible for configuring the hardware for proper multicast, 281 * promiscuous mode, and all-multi behavior. 282 */ 283 static void atl1e_set_multi(struct net_device *netdev) 284 { 285 struct atl1e_adapter *adapter = netdev_priv(netdev); 286 struct atl1e_hw *hw = &adapter->hw; 287 struct netdev_hw_addr *ha; 288 u32 mac_ctrl_data = 0; 289 u32 hash_value; 290 291 /* Check for Promiscuous and All Multicast modes */ 292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL); 293 294 if (netdev->flags & IFF_PROMISC) { 295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 296 } else if (netdev->flags & IFF_ALLMULTI) { 297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 299 } else { 300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 301 } 302 303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 304 305 /* clear the old settings from the multicast hash table */ 306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 308 309 /* comoute mc addresses' hash value ,and put it into hash table */ 310 netdev_for_each_mc_addr(ha, netdev) { 311 hash_value = atl1e_hash_mc_addr(hw, ha->addr); 312 atl1e_hash_set(hw, hash_value); 313 } 314 } 315 316 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data) 317 { 318 319 if (features & NETIF_F_RXALL) { 320 /* enable RX of ALL frames */ 321 *mac_ctrl_data |= MAC_CTRL_DBG; 322 } else { 323 /* disable RX of ALL frames */ 324 *mac_ctrl_data &= ~MAC_CTRL_DBG; 325 } 326 } 327 328 static void atl1e_rx_mode(struct net_device *netdev, 329 netdev_features_t features) 330 { 331 struct atl1e_adapter *adapter = netdev_priv(netdev); 332 u32 mac_ctrl_data = 0; 333 334 netdev_dbg(adapter->netdev, "%s\n", __func__); 335 336 atl1e_irq_disable(adapter); 337 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 338 __atl1e_rx_mode(features, &mac_ctrl_data); 339 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 340 atl1e_irq_enable(adapter); 341 } 342 343 344 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 345 { 346 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 347 /* enable VLAN tag insert/strip */ 348 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 349 } else { 350 /* disable VLAN tag insert/strip */ 351 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 352 } 353 } 354 355 static void atl1e_vlan_mode(struct net_device *netdev, 356 netdev_features_t features) 357 { 358 struct atl1e_adapter *adapter = netdev_priv(netdev); 359 u32 mac_ctrl_data = 0; 360 361 netdev_dbg(adapter->netdev, "%s\n", __func__); 362 363 atl1e_irq_disable(adapter); 364 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 365 __atl1e_vlan_mode(features, &mac_ctrl_data); 366 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 367 atl1e_irq_enable(adapter); 368 } 369 370 static void atl1e_restore_vlan(struct atl1e_adapter *adapter) 371 { 372 netdev_dbg(adapter->netdev, "%s\n", __func__); 373 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features); 374 } 375 376 /** 377 * atl1e_set_mac - Change the Ethernet Address of the NIC 378 * @netdev: network interface device structure 379 * @p: pointer to an address structure 380 * 381 * Returns 0 on success, negative on failure 382 */ 383 static int atl1e_set_mac_addr(struct net_device *netdev, void *p) 384 { 385 struct atl1e_adapter *adapter = netdev_priv(netdev); 386 struct sockaddr *addr = p; 387 388 if (!is_valid_ether_addr(addr->sa_data)) 389 return -EADDRNOTAVAIL; 390 391 if (netif_running(netdev)) 392 return -EBUSY; 393 394 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 395 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 396 397 atl1e_hw_set_mac_addr(&adapter->hw); 398 399 return 0; 400 } 401 402 static netdev_features_t atl1e_fix_features(struct net_device *netdev, 403 netdev_features_t features) 404 { 405 /* 406 * Since there is no support for separate rx/tx vlan accel 407 * enable/disable make sure tx flag is always in same state as rx. 408 */ 409 if (features & NETIF_F_HW_VLAN_CTAG_RX) 410 features |= NETIF_F_HW_VLAN_CTAG_TX; 411 else 412 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 413 414 return features; 415 } 416 417 static int atl1e_set_features(struct net_device *netdev, 418 netdev_features_t features) 419 { 420 netdev_features_t changed = netdev->features ^ features; 421 422 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 423 atl1e_vlan_mode(netdev, features); 424 425 if (changed & NETIF_F_RXALL) 426 atl1e_rx_mode(netdev, features); 427 428 429 return 0; 430 } 431 432 /** 433 * atl1e_change_mtu - Change the Maximum Transfer Unit 434 * @netdev: network interface device structure 435 * @new_mtu: new value for maximum frame size 436 * 437 * Returns 0 on success, negative on failure 438 */ 439 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu) 440 { 441 struct atl1e_adapter *adapter = netdev_priv(netdev); 442 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 443 444 /* set MTU */ 445 if (netif_running(netdev)) { 446 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 447 msleep(1); 448 netdev->mtu = new_mtu; 449 adapter->hw.max_frame_size = new_mtu; 450 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3; 451 atl1e_down(adapter); 452 atl1e_up(adapter); 453 clear_bit(__AT_RESETTING, &adapter->flags); 454 } 455 return 0; 456 } 457 458 /* 459 * caller should hold mdio_lock 460 */ 461 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 462 { 463 struct atl1e_adapter *adapter = netdev_priv(netdev); 464 u16 result; 465 466 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); 467 return result; 468 } 469 470 static void atl1e_mdio_write(struct net_device *netdev, int phy_id, 471 int reg_num, int val) 472 { 473 struct atl1e_adapter *adapter = netdev_priv(netdev); 474 475 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); 476 } 477 478 static int atl1e_mii_ioctl(struct net_device *netdev, 479 struct ifreq *ifr, int cmd) 480 { 481 struct atl1e_adapter *adapter = netdev_priv(netdev); 482 struct mii_ioctl_data *data = if_mii(ifr); 483 unsigned long flags; 484 int retval = 0; 485 486 if (!netif_running(netdev)) 487 return -EINVAL; 488 489 spin_lock_irqsave(&adapter->mdio_lock, flags); 490 switch (cmd) { 491 case SIOCGMIIPHY: 492 data->phy_id = 0; 493 break; 494 495 case SIOCGMIIREG: 496 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 497 &data->val_out)) { 498 retval = -EIO; 499 goto out; 500 } 501 break; 502 503 case SIOCSMIIREG: 504 if (data->reg_num & ~(0x1F)) { 505 retval = -EFAULT; 506 goto out; 507 } 508 509 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n", 510 data->reg_num, data->val_in); 511 if (atl1e_write_phy_reg(&adapter->hw, 512 data->reg_num, data->val_in)) { 513 retval = -EIO; 514 goto out; 515 } 516 break; 517 518 default: 519 retval = -EOPNOTSUPP; 520 break; 521 } 522 out: 523 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 524 return retval; 525 526 } 527 528 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 529 { 530 switch (cmd) { 531 case SIOCGMIIPHY: 532 case SIOCGMIIREG: 533 case SIOCSMIIREG: 534 return atl1e_mii_ioctl(netdev, ifr, cmd); 535 default: 536 return -EOPNOTSUPP; 537 } 538 } 539 540 static void atl1e_setup_pcicmd(struct pci_dev *pdev) 541 { 542 u16 cmd; 543 544 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 545 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO); 546 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); 547 pci_write_config_word(pdev, PCI_COMMAND, cmd); 548 549 /* 550 * some motherboards BIOS(PXE/EFI) driver may set PME 551 * while they transfer control to OS (Windows/Linux) 552 * so we should clear this bit before NIC work normally 553 */ 554 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0); 555 msleep(1); 556 } 557 558 /** 559 * atl1e_alloc_queues - Allocate memory for all rings 560 * @adapter: board private structure to initialize 561 * 562 */ 563 static int atl1e_alloc_queues(struct atl1e_adapter *adapter) 564 { 565 return 0; 566 } 567 568 /** 569 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter) 570 * @adapter: board private structure to initialize 571 * 572 * atl1e_sw_init initializes the Adapter private data structure. 573 * Fields are initialized based on PCI device information and 574 * OS network device settings (MTU size). 575 */ 576 static int atl1e_sw_init(struct atl1e_adapter *adapter) 577 { 578 struct atl1e_hw *hw = &adapter->hw; 579 struct pci_dev *pdev = adapter->pdev; 580 u32 phy_status_data = 0; 581 582 adapter->wol = 0; 583 adapter->link_speed = SPEED_0; /* hardware init */ 584 adapter->link_duplex = FULL_DUPLEX; 585 adapter->num_rx_queues = 1; 586 587 /* PCI config space info */ 588 hw->vendor_id = pdev->vendor; 589 hw->device_id = pdev->device; 590 hw->subsystem_vendor_id = pdev->subsystem_vendor; 591 hw->subsystem_id = pdev->subsystem_device; 592 hw->revision_id = pdev->revision; 593 594 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 595 596 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 597 /* nic type */ 598 if (hw->revision_id >= 0xF0) { 599 hw->nic_type = athr_l2e_revB; 600 } else { 601 if (phy_status_data & PHY_STATUS_100M) 602 hw->nic_type = athr_l1e; 603 else 604 hw->nic_type = athr_l2e_revA; 605 } 606 607 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 608 609 if (phy_status_data & PHY_STATUS_EMI_CA) 610 hw->emi_ca = true; 611 else 612 hw->emi_ca = false; 613 614 hw->phy_configured = false; 615 hw->preamble_len = 7; 616 hw->max_frame_size = adapter->netdev->mtu; 617 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN + 618 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3; 619 620 hw->rrs_type = atl1e_rrs_disable; 621 hw->indirect_tab = 0; 622 hw->base_cpu = 0; 623 624 /* need confirm */ 625 626 hw->ict = 50000; /* 100ms */ 627 hw->smb_timer = 200000; /* 200ms */ 628 hw->tpd_burst = 5; 629 hw->rrd_thresh = 1; 630 hw->tpd_thresh = adapter->tx_ring.count / 2; 631 hw->rx_count_down = 4; /* 2us resolution */ 632 hw->tx_count_down = hw->imt * 4 / 3; 633 hw->dmar_block = atl1e_dma_req_1024; 634 hw->dmaw_block = atl1e_dma_req_1024; 635 hw->dmar_dly_cnt = 15; 636 hw->dmaw_dly_cnt = 4; 637 638 if (atl1e_alloc_queues(adapter)) { 639 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n"); 640 return -ENOMEM; 641 } 642 643 atomic_set(&adapter->irq_sem, 1); 644 spin_lock_init(&adapter->mdio_lock); 645 646 set_bit(__AT_DOWN, &adapter->flags); 647 648 return 0; 649 } 650 651 /** 652 * atl1e_clean_tx_ring - Free Tx-skb 653 * @adapter: board private structure 654 */ 655 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter) 656 { 657 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 658 struct atl1e_tx_buffer *tx_buffer = NULL; 659 struct pci_dev *pdev = adapter->pdev; 660 u16 index, ring_count; 661 662 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL) 663 return; 664 665 ring_count = tx_ring->count; 666 /* first unmmap dma */ 667 for (index = 0; index < ring_count; index++) { 668 tx_buffer = &tx_ring->tx_buffer[index]; 669 if (tx_buffer->dma) { 670 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 671 pci_unmap_single(pdev, tx_buffer->dma, 672 tx_buffer->length, PCI_DMA_TODEVICE); 673 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 674 pci_unmap_page(pdev, tx_buffer->dma, 675 tx_buffer->length, PCI_DMA_TODEVICE); 676 tx_buffer->dma = 0; 677 } 678 } 679 /* second free skb */ 680 for (index = 0; index < ring_count; index++) { 681 tx_buffer = &tx_ring->tx_buffer[index]; 682 if (tx_buffer->skb) { 683 dev_kfree_skb_any(tx_buffer->skb); 684 tx_buffer->skb = NULL; 685 } 686 } 687 /* Zero out Tx-buffers */ 688 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) * 689 ring_count); 690 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) * 691 ring_count); 692 } 693 694 /** 695 * atl1e_clean_rx_ring - Free rx-reservation skbs 696 * @adapter: board private structure 697 */ 698 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter) 699 { 700 struct atl1e_rx_ring *rx_ring = 701 &adapter->rx_ring; 702 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc; 703 u16 i, j; 704 705 706 if (adapter->ring_vir_addr == NULL) 707 return; 708 /* Zero out the descriptor ring */ 709 for (i = 0; i < adapter->num_rx_queues; i++) { 710 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 711 if (rx_page_desc[i].rx_page[j].addr != NULL) { 712 memset(rx_page_desc[i].rx_page[j].addr, 0, 713 rx_ring->real_page_size); 714 } 715 } 716 } 717 } 718 719 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size) 720 { 721 *ring_size = ((u32)(adapter->tx_ring.count * 722 sizeof(struct atl1e_tpd_desc) + 7 723 /* tx ring, qword align */ 724 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE * 725 adapter->num_rx_queues + 31 726 /* rx ring, 32 bytes align */ 727 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) * 728 sizeof(u32) + 3)); 729 /* tx, rx cmd, dword align */ 730 } 731 732 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter) 733 { 734 struct atl1e_rx_ring *rx_ring = NULL; 735 736 rx_ring = &adapter->rx_ring; 737 738 rx_ring->real_page_size = adapter->rx_ring.page_size 739 + adapter->hw.max_frame_size 740 + ETH_HLEN + VLAN_HLEN 741 + ETH_FCS_LEN; 742 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32); 743 atl1e_cal_ring_size(adapter, &adapter->ring_size); 744 745 adapter->ring_vir_addr = NULL; 746 adapter->rx_ring.desc = NULL; 747 rwlock_init(&adapter->tx_ring.tx_lock); 748 } 749 750 /* 751 * Read / Write Ptr Initialize: 752 */ 753 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter) 754 { 755 struct atl1e_tx_ring *tx_ring = NULL; 756 struct atl1e_rx_ring *rx_ring = NULL; 757 struct atl1e_rx_page_desc *rx_page_desc = NULL; 758 int i, j; 759 760 tx_ring = &adapter->tx_ring; 761 rx_ring = &adapter->rx_ring; 762 rx_page_desc = rx_ring->rx_page_desc; 763 764 tx_ring->next_to_use = 0; 765 atomic_set(&tx_ring->next_to_clean, 0); 766 767 for (i = 0; i < adapter->num_rx_queues; i++) { 768 rx_page_desc[i].rx_using = 0; 769 rx_page_desc[i].rx_nxseq = 0; 770 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 771 *rx_page_desc[i].rx_page[j].write_offset_addr = 0; 772 rx_page_desc[i].rx_page[j].read_offset = 0; 773 } 774 } 775 } 776 777 /** 778 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources 779 * @adapter: board private structure 780 * 781 * Free all transmit software resources 782 */ 783 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter) 784 { 785 struct pci_dev *pdev = adapter->pdev; 786 787 atl1e_clean_tx_ring(adapter); 788 atl1e_clean_rx_ring(adapter); 789 790 if (adapter->ring_vir_addr) { 791 pci_free_consistent(pdev, adapter->ring_size, 792 adapter->ring_vir_addr, adapter->ring_dma); 793 adapter->ring_vir_addr = NULL; 794 } 795 796 if (adapter->tx_ring.tx_buffer) { 797 kfree(adapter->tx_ring.tx_buffer); 798 adapter->tx_ring.tx_buffer = NULL; 799 } 800 } 801 802 /** 803 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources 804 * @adapter: board private structure 805 * 806 * Return 0 on success, negative on failure 807 */ 808 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter) 809 { 810 struct pci_dev *pdev = adapter->pdev; 811 struct atl1e_tx_ring *tx_ring; 812 struct atl1e_rx_ring *rx_ring; 813 struct atl1e_rx_page_desc *rx_page_desc; 814 int size, i, j; 815 u32 offset = 0; 816 int err = 0; 817 818 if (adapter->ring_vir_addr != NULL) 819 return 0; /* alloced already */ 820 821 tx_ring = &adapter->tx_ring; 822 rx_ring = &adapter->rx_ring; 823 824 /* real ring DMA buffer */ 825 826 size = adapter->ring_size; 827 adapter->ring_vir_addr = pci_zalloc_consistent(pdev, adapter->ring_size, 828 &adapter->ring_dma); 829 if (adapter->ring_vir_addr == NULL) { 830 netdev_err(adapter->netdev, 831 "pci_alloc_consistent failed, size = D%d\n", size); 832 return -ENOMEM; 833 } 834 835 rx_page_desc = rx_ring->rx_page_desc; 836 837 /* Init TPD Ring */ 838 tx_ring->dma = roundup(adapter->ring_dma, 8); 839 offset = tx_ring->dma - adapter->ring_dma; 840 tx_ring->desc = adapter->ring_vir_addr + offset; 841 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count); 842 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL); 843 if (tx_ring->tx_buffer == NULL) { 844 err = -ENOMEM; 845 goto failed; 846 } 847 848 /* Init RXF-Pages */ 849 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count); 850 offset = roundup(offset, 32); 851 852 for (i = 0; i < adapter->num_rx_queues; i++) { 853 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 854 rx_page_desc[i].rx_page[j].dma = 855 adapter->ring_dma + offset; 856 rx_page_desc[i].rx_page[j].addr = 857 adapter->ring_vir_addr + offset; 858 offset += rx_ring->real_page_size; 859 } 860 } 861 862 /* Init CMB dma address */ 863 tx_ring->cmb_dma = adapter->ring_dma + offset; 864 tx_ring->cmb = adapter->ring_vir_addr + offset; 865 offset += sizeof(u32); 866 867 for (i = 0; i < adapter->num_rx_queues; i++) { 868 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 869 rx_page_desc[i].rx_page[j].write_offset_dma = 870 adapter->ring_dma + offset; 871 rx_page_desc[i].rx_page[j].write_offset_addr = 872 adapter->ring_vir_addr + offset; 873 offset += sizeof(u32); 874 } 875 } 876 877 if (unlikely(offset > adapter->ring_size)) { 878 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n", 879 offset, adapter->ring_size); 880 err = -1; 881 goto failed; 882 } 883 884 return 0; 885 failed: 886 if (adapter->ring_vir_addr != NULL) { 887 pci_free_consistent(pdev, adapter->ring_size, 888 adapter->ring_vir_addr, adapter->ring_dma); 889 adapter->ring_vir_addr = NULL; 890 } 891 return err; 892 } 893 894 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter) 895 { 896 897 struct atl1e_hw *hw = &adapter->hw; 898 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 899 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 900 struct atl1e_rx_page_desc *rx_page_desc = NULL; 901 int i, j; 902 903 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI, 904 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32)); 905 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO, 906 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK)); 907 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count)); 908 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO, 909 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK)); 910 911 rx_page_desc = rx_ring->rx_page_desc; 912 /* RXF Page Physical address / Page Length */ 913 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) { 914 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i], 915 (u32)((adapter->ring_dma & 916 AT_DMA_HI_ADDR_MASK) >> 32)); 917 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 918 u32 page_phy_addr; 919 u32 offset_phy_addr; 920 921 page_phy_addr = rx_page_desc[i].rx_page[j].dma; 922 offset_phy_addr = 923 rx_page_desc[i].rx_page[j].write_offset_dma; 924 925 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j], 926 page_phy_addr & AT_DMA_LO_ADDR_MASK); 927 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j], 928 offset_phy_addr & AT_DMA_LO_ADDR_MASK); 929 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1); 930 } 931 } 932 /* Page Length */ 933 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size); 934 /* Load all of base address above */ 935 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 936 } 937 938 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter) 939 { 940 struct atl1e_hw *hw = &adapter->hw; 941 u32 dev_ctrl_data = 0; 942 u32 max_pay_load = 0; 943 u32 jumbo_thresh = 0; 944 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ 945 946 /* configure TXQ param */ 947 if (hw->nic_type != athr_l2e_revB) { 948 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; 949 if (hw->max_frame_size <= 1500) { 950 jumbo_thresh = hw->max_frame_size + extra_size; 951 } else if (hw->max_frame_size < 6*1024) { 952 jumbo_thresh = 953 (hw->max_frame_size + extra_size) * 2 / 3; 954 } else { 955 jumbo_thresh = (hw->max_frame_size + extra_size) / 2; 956 } 957 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3); 958 } 959 960 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL); 961 962 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) & 963 DEVICE_CTRL_MAX_PAYLOAD_MASK; 964 965 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); 966 967 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) & 968 DEVICE_CTRL_MAX_RREQ_SZ_MASK; 969 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 970 971 if (hw->nic_type != athr_l2e_revB) 972 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2, 973 atl1e_pay_load_size[hw->dmar_block]); 974 /* enable TXQ */ 975 AT_WRITE_REGW(hw, REG_TXQ_CTRL, 976 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK) 977 << TXQ_CTRL_NUM_TPD_BURST_SHIFT) 978 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN); 979 } 980 981 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter) 982 { 983 struct atl1e_hw *hw = &adapter->hw; 984 u32 rxf_len = 0; 985 u32 rxf_low = 0; 986 u32 rxf_high = 0; 987 u32 rxf_thresh_data = 0; 988 u32 rxq_ctrl_data = 0; 989 990 if (hw->nic_type != athr_l2e_revB) { 991 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM, 992 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) << 993 RXQ_JMBOSZ_TH_SHIFT | 994 (1 & RXQ_JMBO_LKAH_MASK) << 995 RXQ_JMBO_LKAH_SHIFT)); 996 997 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN); 998 rxf_high = rxf_len * 4 / 5; 999 rxf_low = rxf_len / 5; 1000 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK) 1001 << RXQ_RXF_PAUSE_TH_HI_SHIFT) | 1002 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK) 1003 << RXQ_RXF_PAUSE_TH_LO_SHIFT); 1004 1005 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data); 1006 } 1007 1008 /* RRS */ 1009 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); 1010 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); 1011 1012 if (hw->rrs_type & atl1e_rrs_ipv4) 1013 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4; 1014 1015 if (hw->rrs_type & atl1e_rrs_ipv4_tcp) 1016 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP; 1017 1018 if (hw->rrs_type & atl1e_rrs_ipv6) 1019 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6; 1020 1021 if (hw->rrs_type & atl1e_rrs_ipv6_tcp) 1022 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP; 1023 1024 if (hw->rrs_type != atl1e_rrs_disable) 1025 rxq_ctrl_data |= 1026 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT); 1027 1028 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 | 1029 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN; 1030 1031 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1032 } 1033 1034 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter) 1035 { 1036 struct atl1e_hw *hw = &adapter->hw; 1037 u32 dma_ctrl_data = 0; 1038 1039 dma_ctrl_data = DMA_CTRL_RXCMB_EN; 1040 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) 1041 << DMA_CTRL_DMAR_BURST_LEN_SHIFT; 1042 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) 1043 << DMA_CTRL_DMAW_BURST_LEN_SHIFT; 1044 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER; 1045 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) 1046 << DMA_CTRL_DMAR_DLY_CNT_SHIFT; 1047 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) 1048 << DMA_CTRL_DMAW_DLY_CNT_SHIFT; 1049 1050 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1051 } 1052 1053 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter) 1054 { 1055 u32 value; 1056 struct atl1e_hw *hw = &adapter->hw; 1057 struct net_device *netdev = adapter->netdev; 1058 1059 /* Config MAC CTRL Register */ 1060 value = MAC_CTRL_TX_EN | 1061 MAC_CTRL_RX_EN ; 1062 1063 if (FULL_DUPLEX == adapter->link_duplex) 1064 value |= MAC_CTRL_DUPLX; 1065 1066 value |= ((u32)((SPEED_1000 == adapter->link_speed) ? 1067 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) << 1068 MAC_CTRL_SPEED_SHIFT); 1069 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1070 1071 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1072 value |= (((u32)adapter->hw.preamble_len & 1073 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); 1074 1075 __atl1e_vlan_mode(netdev->features, &value); 1076 1077 value |= MAC_CTRL_BC_EN; 1078 if (netdev->flags & IFF_PROMISC) 1079 value |= MAC_CTRL_PROMIS_EN; 1080 if (netdev->flags & IFF_ALLMULTI) 1081 value |= MAC_CTRL_MC_ALL_EN; 1082 if (netdev->features & NETIF_F_RXALL) 1083 value |= MAC_CTRL_DBG; 1084 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 1085 } 1086 1087 /** 1088 * atl1e_configure - Configure Transmit&Receive Unit after Reset 1089 * @adapter: board private structure 1090 * 1091 * Configure the Tx /Rx unit of the MAC after a reset. 1092 */ 1093 static int atl1e_configure(struct atl1e_adapter *adapter) 1094 { 1095 struct atl1e_hw *hw = &adapter->hw; 1096 1097 u32 intr_status_data = 0; 1098 1099 /* clear interrupt status */ 1100 AT_WRITE_REG(hw, REG_ISR, ~0); 1101 1102 /* 1. set MAC Address */ 1103 atl1e_hw_set_mac_addr(hw); 1104 1105 /* 2. Init the Multicast HASH table done by set_muti */ 1106 1107 /* 3. Clear any WOL status */ 1108 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1109 1110 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr 1111 * TPD Ring/SMB/RXF0 Page CMBs, they use the same 1112 * High 32bits memory */ 1113 atl1e_configure_des_ring(adapter); 1114 1115 /* 5. set Interrupt Moderator Timer */ 1116 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt); 1117 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt); 1118 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE | 1119 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN); 1120 1121 /* 6. rx/tx threshold to trig interrupt */ 1122 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh); 1123 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh); 1124 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down); 1125 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down); 1126 1127 /* 7. set Interrupt Clear Timer */ 1128 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict); 1129 1130 /* 8. set MTU */ 1131 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1132 VLAN_HLEN + ETH_FCS_LEN); 1133 1134 /* 9. config TXQ early tx threshold */ 1135 atl1e_configure_tx(adapter); 1136 1137 /* 10. config RXQ */ 1138 atl1e_configure_rx(adapter); 1139 1140 /* 11. config DMA Engine */ 1141 atl1e_configure_dma(adapter); 1142 1143 /* 12. smb timer to trig interrupt */ 1144 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer); 1145 1146 intr_status_data = AT_READ_REG(hw, REG_ISR); 1147 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) { 1148 netdev_err(adapter->netdev, 1149 "atl1e_configure failed, PCIE phy link down\n"); 1150 return -1; 1151 } 1152 1153 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff); 1154 return 0; 1155 } 1156 1157 /** 1158 * atl1e_get_stats - Get System Network Statistics 1159 * @netdev: network interface device structure 1160 * 1161 * Returns the address of the device statistics structure. 1162 * The statistics are actually updated from the timer callback. 1163 */ 1164 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev) 1165 { 1166 struct atl1e_adapter *adapter = netdev_priv(netdev); 1167 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats; 1168 struct net_device_stats *net_stats = &netdev->stats; 1169 1170 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1171 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1172 net_stats->multicast = hw_stats->rx_mcast; 1173 net_stats->collisions = hw_stats->tx_1_col + 1174 hw_stats->tx_2_col + 1175 hw_stats->tx_late_col + 1176 hw_stats->tx_abort_col; 1177 1178 net_stats->rx_errors = hw_stats->rx_frag + 1179 hw_stats->rx_fcs_err + 1180 hw_stats->rx_len_err + 1181 hw_stats->rx_sz_ov + 1182 hw_stats->rx_rrd_ov + 1183 hw_stats->rx_align_err + 1184 hw_stats->rx_rxf_ov; 1185 1186 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1187 net_stats->rx_length_errors = hw_stats->rx_len_err; 1188 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1189 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1190 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1191 1192 net_stats->tx_errors = hw_stats->tx_late_col + 1193 hw_stats->tx_abort_col + 1194 hw_stats->tx_underrun + 1195 hw_stats->tx_trunc; 1196 1197 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1198 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1199 net_stats->tx_window_errors = hw_stats->tx_late_col; 1200 1201 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1202 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1203 1204 return net_stats; 1205 } 1206 1207 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter) 1208 { 1209 u16 hw_reg_addr = 0; 1210 unsigned long *stats_item = NULL; 1211 1212 /* update rx status */ 1213 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1214 stats_item = &adapter->hw_stats.rx_ok; 1215 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1216 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1217 stats_item++; 1218 hw_reg_addr += 4; 1219 } 1220 /* update tx status */ 1221 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1222 stats_item = &adapter->hw_stats.tx_ok; 1223 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1224 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1225 stats_item++; 1226 hw_reg_addr += 4; 1227 } 1228 } 1229 1230 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter) 1231 { 1232 u16 phy_data; 1233 1234 spin_lock(&adapter->mdio_lock); 1235 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data); 1236 spin_unlock(&adapter->mdio_lock); 1237 } 1238 1239 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter) 1240 { 1241 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1242 struct atl1e_tx_buffer *tx_buffer = NULL; 1243 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX); 1244 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1245 1246 while (next_to_clean != hw_next_to_clean) { 1247 tx_buffer = &tx_ring->tx_buffer[next_to_clean]; 1248 if (tx_buffer->dma) { 1249 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 1250 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1251 tx_buffer->length, PCI_DMA_TODEVICE); 1252 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 1253 pci_unmap_page(adapter->pdev, tx_buffer->dma, 1254 tx_buffer->length, PCI_DMA_TODEVICE); 1255 tx_buffer->dma = 0; 1256 } 1257 1258 if (tx_buffer->skb) { 1259 dev_kfree_skb_irq(tx_buffer->skb); 1260 tx_buffer->skb = NULL; 1261 } 1262 1263 if (++next_to_clean == tx_ring->count) 1264 next_to_clean = 0; 1265 } 1266 1267 atomic_set(&tx_ring->next_to_clean, next_to_clean); 1268 1269 if (netif_queue_stopped(adapter->netdev) && 1270 netif_carrier_ok(adapter->netdev)) { 1271 netif_wake_queue(adapter->netdev); 1272 } 1273 1274 return true; 1275 } 1276 1277 /** 1278 * atl1e_intr - Interrupt Handler 1279 * @irq: interrupt number 1280 * @data: pointer to a network interface device structure 1281 */ 1282 static irqreturn_t atl1e_intr(int irq, void *data) 1283 { 1284 struct net_device *netdev = data; 1285 struct atl1e_adapter *adapter = netdev_priv(netdev); 1286 struct atl1e_hw *hw = &adapter->hw; 1287 int max_ints = AT_MAX_INT_WORK; 1288 int handled = IRQ_NONE; 1289 u32 status; 1290 1291 do { 1292 status = AT_READ_REG(hw, REG_ISR); 1293 if ((status & IMR_NORMAL_MASK) == 0 || 1294 (status & ISR_DIS_INT) != 0) { 1295 if (max_ints != AT_MAX_INT_WORK) 1296 handled = IRQ_HANDLED; 1297 break; 1298 } 1299 /* link event */ 1300 if (status & ISR_GPHY) 1301 atl1e_clear_phy_int(adapter); 1302 /* Ack ISR */ 1303 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1304 1305 handled = IRQ_HANDLED; 1306 /* check if PCIE PHY Link down */ 1307 if (status & ISR_PHY_LINKDOWN) { 1308 netdev_err(adapter->netdev, 1309 "pcie phy linkdown %x\n", status); 1310 if (netif_running(adapter->netdev)) { 1311 /* reset MAC */ 1312 atl1e_irq_reset(adapter); 1313 schedule_work(&adapter->reset_task); 1314 break; 1315 } 1316 } 1317 1318 /* check if DMA read/write error */ 1319 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { 1320 netdev_err(adapter->netdev, 1321 "PCIE DMA RW error (status = 0x%x)\n", 1322 status); 1323 atl1e_irq_reset(adapter); 1324 schedule_work(&adapter->reset_task); 1325 break; 1326 } 1327 1328 if (status & ISR_SMB) 1329 atl1e_update_hw_stats(adapter); 1330 1331 /* link event */ 1332 if (status & (ISR_GPHY | ISR_MANUAL)) { 1333 netdev->stats.tx_carrier_errors++; 1334 atl1e_link_chg_event(adapter); 1335 break; 1336 } 1337 1338 /* transmit event */ 1339 if (status & ISR_TX_EVENT) 1340 atl1e_clean_tx_irq(adapter); 1341 1342 if (status & ISR_RX_EVENT) { 1343 /* 1344 * disable rx interrupts, without 1345 * the synchronize_irq bit 1346 */ 1347 AT_WRITE_REG(hw, REG_IMR, 1348 IMR_NORMAL_MASK & ~ISR_RX_EVENT); 1349 AT_WRITE_FLUSH(hw); 1350 if (likely(napi_schedule_prep( 1351 &adapter->napi))) 1352 __napi_schedule(&adapter->napi); 1353 } 1354 } while (--max_ints > 0); 1355 /* re-enable Interrupt*/ 1356 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1357 1358 return handled; 1359 } 1360 1361 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter, 1362 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs) 1363 { 1364 u8 *packet = (u8 *)(prrs + 1); 1365 struct iphdr *iph; 1366 u16 head_len = ETH_HLEN; 1367 u16 pkt_flags; 1368 u16 err_flags; 1369 1370 skb_checksum_none_assert(skb); 1371 pkt_flags = prrs->pkt_flag; 1372 err_flags = prrs->err_flag; 1373 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) && 1374 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) { 1375 if (pkt_flags & RRS_IS_IPV4) { 1376 if (pkt_flags & RRS_IS_802_3) 1377 head_len += 8; 1378 iph = (struct iphdr *) (packet + head_len); 1379 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF)) 1380 goto hw_xsum; 1381 } 1382 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) { 1383 skb->ip_summed = CHECKSUM_UNNECESSARY; 1384 return; 1385 } 1386 } 1387 1388 hw_xsum : 1389 return; 1390 } 1391 1392 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter, 1393 u8 que) 1394 { 1395 struct atl1e_rx_page_desc *rx_page_desc = 1396 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc; 1397 u8 rx_using = rx_page_desc[que].rx_using; 1398 1399 return &(rx_page_desc[que].rx_page[rx_using]); 1400 } 1401 1402 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que, 1403 int *work_done, int work_to_do) 1404 { 1405 struct net_device *netdev = adapter->netdev; 1406 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 1407 struct atl1e_rx_page_desc *rx_page_desc = 1408 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc; 1409 struct sk_buff *skb = NULL; 1410 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que); 1411 u32 packet_size, write_offset; 1412 struct atl1e_recv_ret_status *prrs; 1413 1414 write_offset = *(rx_page->write_offset_addr); 1415 if (likely(rx_page->read_offset < write_offset)) { 1416 do { 1417 if (*work_done >= work_to_do) 1418 break; 1419 (*work_done)++; 1420 /* get new packet's rrs */ 1421 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr + 1422 rx_page->read_offset); 1423 /* check sequence number */ 1424 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) { 1425 netdev_err(netdev, 1426 "rx sequence number error (rx=%d) (expect=%d)\n", 1427 prrs->seq_num, 1428 rx_page_desc[que].rx_nxseq); 1429 rx_page_desc[que].rx_nxseq++; 1430 /* just for debug use */ 1431 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0, 1432 (((u32)prrs->seq_num) << 16) | 1433 rx_page_desc[que].rx_nxseq); 1434 goto fatal_err; 1435 } 1436 rx_page_desc[que].rx_nxseq++; 1437 1438 /* error packet */ 1439 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) && 1440 !(netdev->features & NETIF_F_RXALL)) { 1441 if (prrs->err_flag & (RRS_ERR_BAD_CRC | 1442 RRS_ERR_DRIBBLE | RRS_ERR_CODE | 1443 RRS_ERR_TRUNC)) { 1444 /* hardware error, discard this packet*/ 1445 netdev_err(netdev, 1446 "rx packet desc error %x\n", 1447 *((u32 *)prrs + 1)); 1448 goto skip_pkt; 1449 } 1450 } 1451 1452 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1453 RRS_PKT_SIZE_MASK); 1454 if (likely(!(netdev->features & NETIF_F_RXFCS))) 1455 packet_size -= 4; /* CRC */ 1456 1457 skb = netdev_alloc_skb_ip_align(netdev, packet_size); 1458 if (skb == NULL) 1459 goto skip_pkt; 1460 1461 memcpy(skb->data, (u8 *)(prrs + 1), packet_size); 1462 skb_put(skb, packet_size); 1463 skb->protocol = eth_type_trans(skb, netdev); 1464 atl1e_rx_checksum(adapter, skb, prrs); 1465 1466 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) { 1467 u16 vlan_tag = (prrs->vtag >> 4) | 1468 ((prrs->vtag & 7) << 13) | 1469 ((prrs->vtag & 8) << 9); 1470 netdev_dbg(netdev, 1471 "RXD VLAN TAG<RRD>=0x%04x\n", 1472 prrs->vtag); 1473 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1474 } 1475 netif_receive_skb(skb); 1476 1477 skip_pkt: 1478 /* skip current packet whether it's ok or not. */ 1479 rx_page->read_offset += 1480 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1481 RRS_PKT_SIZE_MASK) + 1482 sizeof(struct atl1e_recv_ret_status) + 31) & 1483 0xFFFFFFE0); 1484 1485 if (rx_page->read_offset >= rx_ring->page_size) { 1486 /* mark this page clean */ 1487 u16 reg_addr; 1488 u8 rx_using; 1489 1490 rx_page->read_offset = 1491 *(rx_page->write_offset_addr) = 0; 1492 rx_using = rx_page_desc[que].rx_using; 1493 reg_addr = 1494 atl1e_rx_page_vld_regs[que][rx_using]; 1495 AT_WRITE_REGB(&adapter->hw, reg_addr, 1); 1496 rx_page_desc[que].rx_using ^= 1; 1497 rx_page = atl1e_get_rx_page(adapter, que); 1498 } 1499 write_offset = *(rx_page->write_offset_addr); 1500 } while (rx_page->read_offset < write_offset); 1501 } 1502 1503 return; 1504 1505 fatal_err: 1506 if (!test_bit(__AT_DOWN, &adapter->flags)) 1507 schedule_work(&adapter->reset_task); 1508 } 1509 1510 /** 1511 * atl1e_clean - NAPI Rx polling callback 1512 */ 1513 static int atl1e_clean(struct napi_struct *napi, int budget) 1514 { 1515 struct atl1e_adapter *adapter = 1516 container_of(napi, struct atl1e_adapter, napi); 1517 u32 imr_data; 1518 int work_done = 0; 1519 1520 /* Keep link state information with original netdev */ 1521 if (!netif_carrier_ok(adapter->netdev)) 1522 goto quit_polling; 1523 1524 atl1e_clean_rx_irq(adapter, 0, &work_done, budget); 1525 1526 /* If no Tx and not enough Rx work done, exit the polling mode */ 1527 if (work_done < budget) { 1528 quit_polling: 1529 napi_complete(napi); 1530 imr_data = AT_READ_REG(&adapter->hw, REG_IMR); 1531 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT); 1532 /* test debug */ 1533 if (test_bit(__AT_DOWN, &adapter->flags)) { 1534 atomic_dec(&adapter->irq_sem); 1535 netdev_err(adapter->netdev, 1536 "atl1e_clean is called when AT_DOWN\n"); 1537 } 1538 /* reenable RX intr */ 1539 /*atl1e_irq_enable(adapter); */ 1540 1541 } 1542 return work_done; 1543 } 1544 1545 #ifdef CONFIG_NET_POLL_CONTROLLER 1546 1547 /* 1548 * Polling 'interrupt' - used by things like netconsole to send skbs 1549 * without having to re-enable interrupts. It's not called while 1550 * the interrupt routine is executing. 1551 */ 1552 static void atl1e_netpoll(struct net_device *netdev) 1553 { 1554 struct atl1e_adapter *adapter = netdev_priv(netdev); 1555 1556 disable_irq(adapter->pdev->irq); 1557 atl1e_intr(adapter->pdev->irq, netdev); 1558 enable_irq(adapter->pdev->irq); 1559 } 1560 #endif 1561 1562 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter) 1563 { 1564 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1565 u16 next_to_use = 0; 1566 u16 next_to_clean = 0; 1567 1568 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1569 next_to_use = tx_ring->next_to_use; 1570 1571 return (u16)(next_to_clean > next_to_use) ? 1572 (next_to_clean - next_to_use - 1) : 1573 (tx_ring->count + next_to_clean - next_to_use - 1); 1574 } 1575 1576 /* 1577 * get next usable tpd 1578 * Note: should call atl1e_tdp_avail to make sure 1579 * there is enough tpd to use 1580 */ 1581 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter) 1582 { 1583 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1584 u16 next_to_use = 0; 1585 1586 next_to_use = tx_ring->next_to_use; 1587 if (++tx_ring->next_to_use == tx_ring->count) 1588 tx_ring->next_to_use = 0; 1589 1590 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc)); 1591 return &tx_ring->desc[next_to_use]; 1592 } 1593 1594 static struct atl1e_tx_buffer * 1595 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd) 1596 { 1597 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1598 1599 return &tx_ring->tx_buffer[tpd - tx_ring->desc]; 1600 } 1601 1602 /* Calculate the transmit packet descript needed*/ 1603 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb) 1604 { 1605 int i = 0; 1606 u16 tpd_req = 1; 1607 u16 fg_size = 0; 1608 u16 proto_hdr_len = 0; 1609 1610 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1611 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]); 1612 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT); 1613 } 1614 1615 if (skb_is_gso(skb)) { 1616 if (skb->protocol == htons(ETH_P_IP) || 1617 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) { 1618 proto_hdr_len = skb_transport_offset(skb) + 1619 tcp_hdrlen(skb); 1620 if (proto_hdr_len < skb_headlen(skb)) { 1621 tpd_req += ((skb_headlen(skb) - proto_hdr_len + 1622 MAX_TX_BUF_LEN - 1) >> 1623 MAX_TX_BUF_SHIFT); 1624 } 1625 } 1626 1627 } 1628 return tpd_req; 1629 } 1630 1631 static int atl1e_tso_csum(struct atl1e_adapter *adapter, 1632 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1633 { 1634 unsigned short offload_type; 1635 u8 hdr_len; 1636 u32 real_len; 1637 1638 if (skb_is_gso(skb)) { 1639 int err; 1640 1641 err = skb_cow_head(skb, 0); 1642 if (err < 0) 1643 return err; 1644 1645 offload_type = skb_shinfo(skb)->gso_type; 1646 1647 if (offload_type & SKB_GSO_TCPV4) { 1648 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1649 + ntohs(ip_hdr(skb)->tot_len)); 1650 1651 if (real_len < skb->len) 1652 pskb_trim(skb, real_len); 1653 1654 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1655 if (unlikely(skb->len == hdr_len)) { 1656 /* only xsum need */ 1657 netdev_warn(adapter->netdev, 1658 "IPV4 tso with zero data??\n"); 1659 goto check_sum; 1660 } else { 1661 ip_hdr(skb)->check = 0; 1662 ip_hdr(skb)->tot_len = 0; 1663 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1664 ip_hdr(skb)->saddr, 1665 ip_hdr(skb)->daddr, 1666 0, IPPROTO_TCP, 0); 1667 tpd->word3 |= (ip_hdr(skb)->ihl & 1668 TDP_V4_IPHL_MASK) << 1669 TPD_V4_IPHL_SHIFT; 1670 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) & 1671 TPD_TCPHDRLEN_MASK) << 1672 TPD_TCPHDRLEN_SHIFT; 1673 tpd->word3 |= ((skb_shinfo(skb)->gso_size) & 1674 TPD_MSS_MASK) << TPD_MSS_SHIFT; 1675 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT; 1676 } 1677 return 0; 1678 } 1679 } 1680 1681 check_sum: 1682 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1683 u8 css, cso; 1684 1685 cso = skb_checksum_start_offset(skb); 1686 if (unlikely(cso & 0x1)) { 1687 netdev_err(adapter->netdev, 1688 "payload offset should not ant event number\n"); 1689 return -1; 1690 } else { 1691 css = cso + skb->csum_offset; 1692 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) << 1693 TPD_PLOADOFFSET_SHIFT; 1694 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) << 1695 TPD_CCSUMOFFSET_SHIFT; 1696 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT; 1697 } 1698 } 1699 1700 return 0; 1701 } 1702 1703 static int atl1e_tx_map(struct atl1e_adapter *adapter, 1704 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1705 { 1706 struct atl1e_tpd_desc *use_tpd = NULL; 1707 struct atl1e_tx_buffer *tx_buffer = NULL; 1708 u16 buf_len = skb_headlen(skb); 1709 u16 map_len = 0; 1710 u16 mapped_len = 0; 1711 u16 hdr_len = 0; 1712 u16 nr_frags; 1713 u16 f; 1714 int segment; 1715 int ring_start = adapter->tx_ring.next_to_use; 1716 int ring_end; 1717 1718 nr_frags = skb_shinfo(skb)->nr_frags; 1719 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK; 1720 if (segment) { 1721 /* TSO */ 1722 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1723 use_tpd = tpd; 1724 1725 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1726 tx_buffer->length = map_len; 1727 tx_buffer->dma = pci_map_single(adapter->pdev, 1728 skb->data, hdr_len, PCI_DMA_TODEVICE); 1729 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) 1730 return -ENOSPC; 1731 1732 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1733 mapped_len += map_len; 1734 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1735 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1736 ((cpu_to_le32(tx_buffer->length) & 1737 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1738 } 1739 1740 while (mapped_len < buf_len) { 1741 /* mapped_len == 0, means we should use the first tpd, 1742 which is given by caller */ 1743 if (mapped_len == 0) { 1744 use_tpd = tpd; 1745 } else { 1746 use_tpd = atl1e_get_tpd(adapter); 1747 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1748 } 1749 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1750 tx_buffer->skb = NULL; 1751 1752 tx_buffer->length = map_len = 1753 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ? 1754 MAX_TX_BUF_LEN : (buf_len - mapped_len); 1755 tx_buffer->dma = 1756 pci_map_single(adapter->pdev, skb->data + mapped_len, 1757 map_len, PCI_DMA_TODEVICE); 1758 1759 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1760 /* We need to unwind the mappings we've done */ 1761 ring_end = adapter->tx_ring.next_to_use; 1762 adapter->tx_ring.next_to_use = ring_start; 1763 while (adapter->tx_ring.next_to_use != ring_end) { 1764 tpd = atl1e_get_tpd(adapter); 1765 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1766 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1767 tx_buffer->length, PCI_DMA_TODEVICE); 1768 } 1769 /* Reset the tx rings next pointer */ 1770 adapter->tx_ring.next_to_use = ring_start; 1771 return -ENOSPC; 1772 } 1773 1774 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1775 mapped_len += map_len; 1776 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1777 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1778 ((cpu_to_le32(tx_buffer->length) & 1779 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1780 } 1781 1782 for (f = 0; f < nr_frags; f++) { 1783 const struct skb_frag_struct *frag; 1784 u16 i; 1785 u16 seg_num; 1786 1787 frag = &skb_shinfo(skb)->frags[f]; 1788 buf_len = skb_frag_size(frag); 1789 1790 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN; 1791 for (i = 0; i < seg_num; i++) { 1792 use_tpd = atl1e_get_tpd(adapter); 1793 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1794 1795 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1796 BUG_ON(tx_buffer->skb); 1797 1798 tx_buffer->skb = NULL; 1799 tx_buffer->length = 1800 (buf_len > MAX_TX_BUF_LEN) ? 1801 MAX_TX_BUF_LEN : buf_len; 1802 buf_len -= tx_buffer->length; 1803 1804 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev, 1805 frag, 1806 (i * MAX_TX_BUF_LEN), 1807 tx_buffer->length, 1808 DMA_TO_DEVICE); 1809 1810 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1811 /* We need to unwind the mappings we've done */ 1812 ring_end = adapter->tx_ring.next_to_use; 1813 adapter->tx_ring.next_to_use = ring_start; 1814 while (adapter->tx_ring.next_to_use != ring_end) { 1815 tpd = atl1e_get_tpd(adapter); 1816 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1817 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma, 1818 tx_buffer->length, DMA_TO_DEVICE); 1819 } 1820 1821 /* Reset the ring next to use pointer */ 1822 adapter->tx_ring.next_to_use = ring_start; 1823 return -ENOSPC; 1824 } 1825 1826 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE); 1827 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1828 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1829 ((cpu_to_le32(tx_buffer->length) & 1830 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1831 } 1832 } 1833 1834 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK) 1835 /* note this one is a tcp header */ 1836 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT; 1837 /* The last tpd */ 1838 1839 use_tpd->word3 |= 1 << TPD_EOP_SHIFT; 1840 /* The last buffer info contain the skb address, 1841 so it will be free after unmap */ 1842 tx_buffer->skb = skb; 1843 return 0; 1844 } 1845 1846 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count, 1847 struct atl1e_tpd_desc *tpd) 1848 { 1849 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1850 /* Force memory writes to complete before letting h/w 1851 * know there are new descriptors to fetch. (Only 1852 * applicable for weak-ordered memory model archs, 1853 * such as IA-64). */ 1854 wmb(); 1855 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use); 1856 } 1857 1858 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb, 1859 struct net_device *netdev) 1860 { 1861 struct atl1e_adapter *adapter = netdev_priv(netdev); 1862 u16 tpd_req = 1; 1863 struct atl1e_tpd_desc *tpd; 1864 1865 if (test_bit(__AT_DOWN, &adapter->flags)) { 1866 dev_kfree_skb_any(skb); 1867 return NETDEV_TX_OK; 1868 } 1869 1870 if (unlikely(skb->len <= 0)) { 1871 dev_kfree_skb_any(skb); 1872 return NETDEV_TX_OK; 1873 } 1874 tpd_req = atl1e_cal_tdp_req(skb); 1875 1876 if (atl1e_tpd_avail(adapter) < tpd_req) { 1877 /* no enough descriptor, just stop queue */ 1878 netif_stop_queue(netdev); 1879 return NETDEV_TX_BUSY; 1880 } 1881 1882 tpd = atl1e_get_tpd(adapter); 1883 1884 if (skb_vlan_tag_present(skb)) { 1885 u16 vlan_tag = skb_vlan_tag_get(skb); 1886 u16 atl1e_vlan_tag; 1887 1888 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT; 1889 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag); 1890 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) << 1891 TPD_VLAN_SHIFT; 1892 } 1893 1894 if (skb->protocol == htons(ETH_P_8021Q)) 1895 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT; 1896 1897 if (skb_network_offset(skb) != ETH_HLEN) 1898 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */ 1899 1900 /* do TSO and check sum */ 1901 if (atl1e_tso_csum(adapter, skb, tpd) != 0) { 1902 dev_kfree_skb_any(skb); 1903 return NETDEV_TX_OK; 1904 } 1905 1906 if (atl1e_tx_map(adapter, skb, tpd)) { 1907 dev_kfree_skb_any(skb); 1908 goto out; 1909 } 1910 1911 atl1e_tx_queue(adapter, tpd_req, tpd); 1912 out: 1913 return NETDEV_TX_OK; 1914 } 1915 1916 static void atl1e_free_irq(struct atl1e_adapter *adapter) 1917 { 1918 struct net_device *netdev = adapter->netdev; 1919 1920 free_irq(adapter->pdev->irq, netdev); 1921 } 1922 1923 static int atl1e_request_irq(struct atl1e_adapter *adapter) 1924 { 1925 struct pci_dev *pdev = adapter->pdev; 1926 struct net_device *netdev = adapter->netdev; 1927 int err = 0; 1928 1929 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name, 1930 netdev); 1931 if (err) { 1932 netdev_dbg(adapter->netdev, 1933 "Unable to allocate interrupt Error: %d\n", err); 1934 return err; 1935 } 1936 netdev_dbg(netdev, "atl1e_request_irq OK\n"); 1937 return err; 1938 } 1939 1940 int atl1e_up(struct atl1e_adapter *adapter) 1941 { 1942 struct net_device *netdev = adapter->netdev; 1943 int err = 0; 1944 u32 val; 1945 1946 /* hardware has been reset, we need to reload some things */ 1947 err = atl1e_init_hw(&adapter->hw); 1948 if (err) { 1949 err = -EIO; 1950 return err; 1951 } 1952 atl1e_init_ring_ptrs(adapter); 1953 atl1e_set_multi(netdev); 1954 atl1e_restore_vlan(adapter); 1955 1956 if (atl1e_configure(adapter)) { 1957 err = -EIO; 1958 goto err_up; 1959 } 1960 1961 clear_bit(__AT_DOWN, &adapter->flags); 1962 napi_enable(&adapter->napi); 1963 atl1e_irq_enable(adapter); 1964 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL); 1965 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, 1966 val | MASTER_CTRL_MANUAL_INT); 1967 1968 err_up: 1969 return err; 1970 } 1971 1972 void atl1e_down(struct atl1e_adapter *adapter) 1973 { 1974 struct net_device *netdev = adapter->netdev; 1975 1976 /* signal that we're down so the interrupt handler does not 1977 * reschedule our watchdog timer */ 1978 set_bit(__AT_DOWN, &adapter->flags); 1979 1980 netif_stop_queue(netdev); 1981 1982 /* reset MAC to disable all RX/TX */ 1983 atl1e_reset_hw(&adapter->hw); 1984 msleep(1); 1985 1986 napi_disable(&adapter->napi); 1987 atl1e_del_timer(adapter); 1988 atl1e_irq_disable(adapter); 1989 1990 netif_carrier_off(netdev); 1991 adapter->link_speed = SPEED_0; 1992 adapter->link_duplex = -1; 1993 atl1e_clean_tx_ring(adapter); 1994 atl1e_clean_rx_ring(adapter); 1995 } 1996 1997 /** 1998 * atl1e_open - Called when a network interface is made active 1999 * @netdev: network interface device structure 2000 * 2001 * Returns 0 on success, negative value on failure 2002 * 2003 * The open entry point is called when a network interface is made 2004 * active by the system (IFF_UP). At this point all resources needed 2005 * for transmit and receive operations are allocated, the interrupt 2006 * handler is registered with the OS, the watchdog timer is started, 2007 * and the stack is notified that the interface is ready. 2008 */ 2009 static int atl1e_open(struct net_device *netdev) 2010 { 2011 struct atl1e_adapter *adapter = netdev_priv(netdev); 2012 int err; 2013 2014 /* disallow open during test */ 2015 if (test_bit(__AT_TESTING, &adapter->flags)) 2016 return -EBUSY; 2017 2018 /* allocate rx/tx dma buffer & descriptors */ 2019 atl1e_init_ring_resources(adapter); 2020 err = atl1e_setup_ring_resources(adapter); 2021 if (unlikely(err)) 2022 return err; 2023 2024 err = atl1e_request_irq(adapter); 2025 if (unlikely(err)) 2026 goto err_req_irq; 2027 2028 err = atl1e_up(adapter); 2029 if (unlikely(err)) 2030 goto err_up; 2031 2032 return 0; 2033 2034 err_up: 2035 atl1e_free_irq(adapter); 2036 err_req_irq: 2037 atl1e_free_ring_resources(adapter); 2038 atl1e_reset_hw(&adapter->hw); 2039 2040 return err; 2041 } 2042 2043 /** 2044 * atl1e_close - Disables a network interface 2045 * @netdev: network interface device structure 2046 * 2047 * Returns 0, this is not allowed to fail 2048 * 2049 * The close entry point is called when an interface is de-activated 2050 * by the OS. The hardware is still under the drivers control, but 2051 * needs to be disabled. A global MAC reset is issued to stop the 2052 * hardware, and all transmit and receive resources are freed. 2053 */ 2054 static int atl1e_close(struct net_device *netdev) 2055 { 2056 struct atl1e_adapter *adapter = netdev_priv(netdev); 2057 2058 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2059 atl1e_down(adapter); 2060 atl1e_free_irq(adapter); 2061 atl1e_free_ring_resources(adapter); 2062 2063 return 0; 2064 } 2065 2066 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state) 2067 { 2068 struct net_device *netdev = pci_get_drvdata(pdev); 2069 struct atl1e_adapter *adapter = netdev_priv(netdev); 2070 struct atl1e_hw *hw = &adapter->hw; 2071 u32 ctrl = 0; 2072 u32 mac_ctrl_data = 0; 2073 u32 wol_ctrl_data = 0; 2074 u16 mii_advertise_data = 0; 2075 u16 mii_bmsr_data = 0; 2076 u16 mii_intr_status_data = 0; 2077 u32 wufc = adapter->wol; 2078 u32 i; 2079 #ifdef CONFIG_PM 2080 int retval = 0; 2081 #endif 2082 2083 if (netif_running(netdev)) { 2084 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2085 atl1e_down(adapter); 2086 } 2087 netif_device_detach(netdev); 2088 2089 #ifdef CONFIG_PM 2090 retval = pci_save_state(pdev); 2091 if (retval) 2092 return retval; 2093 #endif 2094 2095 if (wufc) { 2096 /* get link status */ 2097 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2098 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2099 2100 mii_advertise_data = ADVERTISE_10HALF; 2101 2102 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) || 2103 (atl1e_write_phy_reg(hw, 2104 MII_ADVERTISE, mii_advertise_data) != 0) || 2105 (atl1e_phy_commit(hw)) != 0) { 2106 netdev_dbg(adapter->netdev, "set phy register failed\n"); 2107 goto wol_dis; 2108 } 2109 2110 hw->phy_configured = false; /* re-init PHY when resume */ 2111 2112 /* turn on magic packet wol */ 2113 if (wufc & AT_WUFC_MAG) 2114 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2115 2116 if (wufc & AT_WUFC_LNKC) { 2117 /* if orignal link status is link, just wait for retrive link */ 2118 if (mii_bmsr_data & BMSR_LSTATUS) { 2119 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { 2120 msleep(100); 2121 atl1e_read_phy_reg(hw, MII_BMSR, 2122 &mii_bmsr_data); 2123 if (mii_bmsr_data & BMSR_LSTATUS) 2124 break; 2125 } 2126 2127 if ((mii_bmsr_data & BMSR_LSTATUS) == 0) 2128 netdev_dbg(adapter->netdev, 2129 "Link may change when suspend\n"); 2130 } 2131 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2132 /* only link up can wake up */ 2133 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) { 2134 netdev_dbg(adapter->netdev, 2135 "read write phy register failed\n"); 2136 goto wol_dis; 2137 } 2138 } 2139 /* clear phy interrupt */ 2140 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data); 2141 /* Config MAC Ctrl register */ 2142 mac_ctrl_data = MAC_CTRL_RX_EN; 2143 /* set to 10/100M halt duplex */ 2144 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT; 2145 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2146 MAC_CTRL_PRMLEN_MASK) << 2147 MAC_CTRL_PRMLEN_SHIFT); 2148 2149 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data); 2150 2151 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2152 if (wufc & AT_WUFC_MAG) 2153 mac_ctrl_data |= MAC_CTRL_BC_EN; 2154 2155 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n", 2156 mac_ctrl_data); 2157 2158 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2159 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2160 /* pcie patch */ 2161 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2162 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2163 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2164 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); 2165 goto suspend_exit; 2166 } 2167 wol_dis: 2168 2169 /* WOL disabled */ 2170 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2171 2172 /* pcie patch */ 2173 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2174 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2175 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2176 2177 atl1e_force_ps(hw); 2178 hw->phy_configured = false; /* re-init PHY when resume */ 2179 2180 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); 2181 2182 suspend_exit: 2183 2184 if (netif_running(netdev)) 2185 atl1e_free_irq(adapter); 2186 2187 pci_disable_device(pdev); 2188 2189 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 2190 2191 return 0; 2192 } 2193 2194 #ifdef CONFIG_PM 2195 static int atl1e_resume(struct pci_dev *pdev) 2196 { 2197 struct net_device *netdev = pci_get_drvdata(pdev); 2198 struct atl1e_adapter *adapter = netdev_priv(netdev); 2199 u32 err; 2200 2201 pci_set_power_state(pdev, PCI_D0); 2202 pci_restore_state(pdev); 2203 2204 err = pci_enable_device(pdev); 2205 if (err) { 2206 netdev_err(adapter->netdev, 2207 "Cannot enable PCI device from suspend\n"); 2208 return err; 2209 } 2210 2211 pci_set_master(pdev); 2212 2213 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */ 2214 2215 pci_enable_wake(pdev, PCI_D3hot, 0); 2216 pci_enable_wake(pdev, PCI_D3cold, 0); 2217 2218 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2219 2220 if (netif_running(netdev)) { 2221 err = atl1e_request_irq(adapter); 2222 if (err) 2223 return err; 2224 } 2225 2226 atl1e_reset_hw(&adapter->hw); 2227 2228 if (netif_running(netdev)) 2229 atl1e_up(adapter); 2230 2231 netif_device_attach(netdev); 2232 2233 return 0; 2234 } 2235 #endif 2236 2237 static void atl1e_shutdown(struct pci_dev *pdev) 2238 { 2239 atl1e_suspend(pdev, PMSG_SUSPEND); 2240 } 2241 2242 static const struct net_device_ops atl1e_netdev_ops = { 2243 .ndo_open = atl1e_open, 2244 .ndo_stop = atl1e_close, 2245 .ndo_start_xmit = atl1e_xmit_frame, 2246 .ndo_get_stats = atl1e_get_stats, 2247 .ndo_set_rx_mode = atl1e_set_multi, 2248 .ndo_validate_addr = eth_validate_addr, 2249 .ndo_set_mac_address = atl1e_set_mac_addr, 2250 .ndo_fix_features = atl1e_fix_features, 2251 .ndo_set_features = atl1e_set_features, 2252 .ndo_change_mtu = atl1e_change_mtu, 2253 .ndo_do_ioctl = atl1e_ioctl, 2254 .ndo_tx_timeout = atl1e_tx_timeout, 2255 #ifdef CONFIG_NET_POLL_CONTROLLER 2256 .ndo_poll_controller = atl1e_netpoll, 2257 #endif 2258 2259 }; 2260 2261 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2262 { 2263 SET_NETDEV_DEV(netdev, &pdev->dev); 2264 pci_set_drvdata(pdev, netdev); 2265 2266 netdev->netdev_ops = &atl1e_netdev_ops; 2267 2268 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2269 /* MTU range: 42 - 8170 */ 2270 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2271 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 2272 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 2273 atl1e_set_ethtool_ops(netdev); 2274 2275 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO | 2276 NETIF_F_HW_VLAN_CTAG_RX; 2277 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX; 2278 /* not enabled by default */ 2279 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS; 2280 return 0; 2281 } 2282 2283 /** 2284 * atl1e_probe - Device Initialization Routine 2285 * @pdev: PCI device information struct 2286 * @ent: entry in atl1e_pci_tbl 2287 * 2288 * Returns 0 on success, negative on failure 2289 * 2290 * atl1e_probe initializes an adapter identified by a pci_dev structure. 2291 * The OS initialization, configuring of the adapter private structure, 2292 * and a hardware reset occur. 2293 */ 2294 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2295 { 2296 struct net_device *netdev; 2297 struct atl1e_adapter *adapter = NULL; 2298 static int cards_found; 2299 2300 int err = 0; 2301 2302 err = pci_enable_device(pdev); 2303 if (err) { 2304 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2305 return err; 2306 } 2307 2308 /* 2309 * The atl1e chip can DMA to 64-bit addresses, but it uses a single 2310 * shared register for the high 32 bits, so only a single, aligned, 2311 * 4 GB physical address range can be used at a time. 2312 * 2313 * Supporting 64-bit DMA on this hardware is more trouble than it's 2314 * worth. It is far easier to limit to 32-bit DMA than update 2315 * various kernel subsystems to support the mechanics required by a 2316 * fixed-high-32-bit system. 2317 */ 2318 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2319 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2320 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2321 goto err_dma; 2322 } 2323 2324 err = pci_request_regions(pdev, atl1e_driver_name); 2325 if (err) { 2326 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2327 goto err_pci_reg; 2328 } 2329 2330 pci_set_master(pdev); 2331 2332 netdev = alloc_etherdev(sizeof(struct atl1e_adapter)); 2333 if (netdev == NULL) { 2334 err = -ENOMEM; 2335 goto err_alloc_etherdev; 2336 } 2337 2338 err = atl1e_init_netdev(netdev, pdev); 2339 if (err) { 2340 netdev_err(netdev, "init netdevice failed\n"); 2341 goto err_init_netdev; 2342 } 2343 adapter = netdev_priv(netdev); 2344 adapter->bd_number = cards_found; 2345 adapter->netdev = netdev; 2346 adapter->pdev = pdev; 2347 adapter->hw.adapter = adapter; 2348 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0); 2349 if (!adapter->hw.hw_addr) { 2350 err = -EIO; 2351 netdev_err(netdev, "cannot map device registers\n"); 2352 goto err_ioremap; 2353 } 2354 2355 /* init mii data */ 2356 adapter->mii.dev = netdev; 2357 adapter->mii.mdio_read = atl1e_mdio_read; 2358 adapter->mii.mdio_write = atl1e_mdio_write; 2359 adapter->mii.phy_id_mask = 0x1f; 2360 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2361 2362 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64); 2363 2364 setup_timer(&adapter->phy_config_timer, atl1e_phy_config, 2365 (unsigned long)adapter); 2366 2367 /* get user settings */ 2368 atl1e_check_options(adapter); 2369 /* 2370 * Mark all PCI regions associated with PCI device 2371 * pdev as being reserved by owner atl1e_driver_name 2372 * Enables bus-mastering on the device and calls 2373 * pcibios_set_master to do the needed arch specific settings 2374 */ 2375 atl1e_setup_pcicmd(pdev); 2376 /* setup the private structure */ 2377 err = atl1e_sw_init(adapter); 2378 if (err) { 2379 netdev_err(netdev, "net device private data init failed\n"); 2380 goto err_sw_init; 2381 } 2382 2383 /* Init GPHY as early as possible due to power saving issue */ 2384 atl1e_phy_init(&adapter->hw); 2385 /* reset the controller to 2386 * put the device in a known good starting state */ 2387 err = atl1e_reset_hw(&adapter->hw); 2388 if (err) { 2389 err = -EIO; 2390 goto err_reset; 2391 } 2392 2393 if (atl1e_read_mac_addr(&adapter->hw) != 0) { 2394 err = -EIO; 2395 netdev_err(netdev, "get mac address failed\n"); 2396 goto err_eeprom; 2397 } 2398 2399 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2400 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr); 2401 2402 INIT_WORK(&adapter->reset_task, atl1e_reset_task); 2403 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task); 2404 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE); 2405 err = register_netdev(netdev); 2406 if (err) { 2407 netdev_err(netdev, "register netdevice failed\n"); 2408 goto err_register; 2409 } 2410 2411 /* assume we have no link for now */ 2412 netif_stop_queue(netdev); 2413 netif_carrier_off(netdev); 2414 2415 cards_found++; 2416 2417 return 0; 2418 2419 err_reset: 2420 err_register: 2421 err_sw_init: 2422 err_eeprom: 2423 pci_iounmap(pdev, adapter->hw.hw_addr); 2424 err_init_netdev: 2425 err_ioremap: 2426 free_netdev(netdev); 2427 err_alloc_etherdev: 2428 pci_release_regions(pdev); 2429 err_pci_reg: 2430 err_dma: 2431 pci_disable_device(pdev); 2432 return err; 2433 } 2434 2435 /** 2436 * atl1e_remove - Device Removal Routine 2437 * @pdev: PCI device information struct 2438 * 2439 * atl1e_remove is called by the PCI subsystem to alert the driver 2440 * that it should release a PCI device. The could be caused by a 2441 * Hot-Plug event, or because the driver is going to be removed from 2442 * memory. 2443 */ 2444 static void atl1e_remove(struct pci_dev *pdev) 2445 { 2446 struct net_device *netdev = pci_get_drvdata(pdev); 2447 struct atl1e_adapter *adapter = netdev_priv(netdev); 2448 2449 /* 2450 * flush_scheduled work may reschedule our watchdog task, so 2451 * explicitly disable watchdog tasks from being rescheduled 2452 */ 2453 set_bit(__AT_DOWN, &adapter->flags); 2454 2455 atl1e_del_timer(adapter); 2456 atl1e_cancel_work(adapter); 2457 2458 unregister_netdev(netdev); 2459 atl1e_free_ring_resources(adapter); 2460 atl1e_force_ps(&adapter->hw); 2461 pci_iounmap(pdev, adapter->hw.hw_addr); 2462 pci_release_regions(pdev); 2463 free_netdev(netdev); 2464 pci_disable_device(pdev); 2465 } 2466 2467 /** 2468 * atl1e_io_error_detected - called when PCI error is detected 2469 * @pdev: Pointer to PCI device 2470 * @state: The current pci connection state 2471 * 2472 * This function is called after a PCI bus error affecting 2473 * this device has been detected. 2474 */ 2475 static pci_ers_result_t 2476 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2477 { 2478 struct net_device *netdev = pci_get_drvdata(pdev); 2479 struct atl1e_adapter *adapter = netdev_priv(netdev); 2480 2481 netif_device_detach(netdev); 2482 2483 if (state == pci_channel_io_perm_failure) 2484 return PCI_ERS_RESULT_DISCONNECT; 2485 2486 if (netif_running(netdev)) 2487 atl1e_down(adapter); 2488 2489 pci_disable_device(pdev); 2490 2491 /* Request a slot slot reset. */ 2492 return PCI_ERS_RESULT_NEED_RESET; 2493 } 2494 2495 /** 2496 * atl1e_io_slot_reset - called after the pci bus has been reset. 2497 * @pdev: Pointer to PCI device 2498 * 2499 * Restart the card from scratch, as if from a cold-boot. Implementation 2500 * resembles the first-half of the e1000_resume routine. 2501 */ 2502 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev) 2503 { 2504 struct net_device *netdev = pci_get_drvdata(pdev); 2505 struct atl1e_adapter *adapter = netdev_priv(netdev); 2506 2507 if (pci_enable_device(pdev)) { 2508 netdev_err(adapter->netdev, 2509 "Cannot re-enable PCI device after reset\n"); 2510 return PCI_ERS_RESULT_DISCONNECT; 2511 } 2512 pci_set_master(pdev); 2513 2514 pci_enable_wake(pdev, PCI_D3hot, 0); 2515 pci_enable_wake(pdev, PCI_D3cold, 0); 2516 2517 atl1e_reset_hw(&adapter->hw); 2518 2519 return PCI_ERS_RESULT_RECOVERED; 2520 } 2521 2522 /** 2523 * atl1e_io_resume - called when traffic can start flowing again. 2524 * @pdev: Pointer to PCI device 2525 * 2526 * This callback is called when the error recovery driver tells us that 2527 * its OK to resume normal operation. Implementation resembles the 2528 * second-half of the atl1e_resume routine. 2529 */ 2530 static void atl1e_io_resume(struct pci_dev *pdev) 2531 { 2532 struct net_device *netdev = pci_get_drvdata(pdev); 2533 struct atl1e_adapter *adapter = netdev_priv(netdev); 2534 2535 if (netif_running(netdev)) { 2536 if (atl1e_up(adapter)) { 2537 netdev_err(adapter->netdev, 2538 "can't bring device back up after reset\n"); 2539 return; 2540 } 2541 } 2542 2543 netif_device_attach(netdev); 2544 } 2545 2546 static const struct pci_error_handlers atl1e_err_handler = { 2547 .error_detected = atl1e_io_error_detected, 2548 .slot_reset = atl1e_io_slot_reset, 2549 .resume = atl1e_io_resume, 2550 }; 2551 2552 static struct pci_driver atl1e_driver = { 2553 .name = atl1e_driver_name, 2554 .id_table = atl1e_pci_tbl, 2555 .probe = atl1e_probe, 2556 .remove = atl1e_remove, 2557 /* Power Management Hooks */ 2558 #ifdef CONFIG_PM 2559 .suspend = atl1e_suspend, 2560 .resume = atl1e_resume, 2561 #endif 2562 .shutdown = atl1e_shutdown, 2563 .err_handler = &atl1e_err_handler 2564 }; 2565 2566 module_pci_driver(atl1e_driver); 2567