1 /* 2 * Copyright(c) 2007 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1e.h" 23 24 #define DRV_VERSION "1.0.0.7-NAPI" 25 26 char atl1e_driver_name[] = "ATL1E"; 27 char atl1e_driver_version[] = DRV_VERSION; 28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026 29 /* 30 * atl1e_pci_tbl - PCI Device ID Table 31 * 32 * Wildcard entries (PCI_ANY_ID) should come last 33 * Last entry must be all 0s 34 * 35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 36 * Class, Class Mask, private data (not used) } 37 */ 38 static const struct pci_device_id atl1e_pci_tbl[] = { 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)}, 41 /* required last entry */ 42 { 0 } 43 }; 44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl); 45 46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>"); 47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); 48 MODULE_LICENSE("GPL"); 49 MODULE_VERSION(DRV_VERSION); 50 51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter); 52 53 static const u16 54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 55 { 56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD}, 57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD}, 58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD}, 59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD} 60 }; 61 62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] = 63 { 64 REG_RXF0_BASE_ADDR_HI, 65 REG_RXF1_BASE_ADDR_HI, 66 REG_RXF2_BASE_ADDR_HI, 67 REG_RXF3_BASE_ADDR_HI 68 }; 69 70 static const u16 71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 72 { 73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO}, 74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO}, 75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO}, 76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO} 77 }; 78 79 static const u16 80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 81 { 82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO}, 83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO}, 84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO}, 85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO} 86 }; 87 88 static const u16 atl1e_pay_load_size[] = { 89 128, 256, 512, 1024, 2048, 4096, 90 }; 91 92 /** 93 * atl1e_irq_enable - Enable default interrupt generation settings 94 * @adapter: board private structure 95 */ 96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter) 97 { 98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK); 101 AT_WRITE_FLUSH(&adapter->hw); 102 } 103 } 104 105 /** 106 * atl1e_irq_disable - Mask off interrupt generation on the NIC 107 * @adapter: board private structure 108 */ 109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter) 110 { 111 atomic_inc(&adapter->irq_sem); 112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 113 AT_WRITE_FLUSH(&adapter->hw); 114 synchronize_irq(adapter->pdev->irq); 115 } 116 117 /** 118 * atl1e_irq_reset - reset interrupt confiure on the NIC 119 * @adapter: board private structure 120 */ 121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter) 122 { 123 atomic_set(&adapter->irq_sem, 0); 124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 126 AT_WRITE_FLUSH(&adapter->hw); 127 } 128 129 /** 130 * atl1e_phy_config - Timer Call-back 131 * @data: pointer to netdev cast into an unsigned long 132 */ 133 static void atl1e_phy_config(struct timer_list *t) 134 { 135 struct atl1e_adapter *adapter = from_timer(adapter, t, 136 phy_config_timer); 137 struct atl1e_hw *hw = &adapter->hw; 138 unsigned long flags; 139 140 spin_lock_irqsave(&adapter->mdio_lock, flags); 141 atl1e_restart_autoneg(hw); 142 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 143 } 144 145 void atl1e_reinit_locked(struct atl1e_adapter *adapter) 146 { 147 148 WARN_ON(in_interrupt()); 149 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 150 msleep(1); 151 atl1e_down(adapter); 152 atl1e_up(adapter); 153 clear_bit(__AT_RESETTING, &adapter->flags); 154 } 155 156 static void atl1e_reset_task(struct work_struct *work) 157 { 158 struct atl1e_adapter *adapter; 159 adapter = container_of(work, struct atl1e_adapter, reset_task); 160 161 atl1e_reinit_locked(adapter); 162 } 163 164 static int atl1e_check_link(struct atl1e_adapter *adapter) 165 { 166 struct atl1e_hw *hw = &adapter->hw; 167 struct net_device *netdev = adapter->netdev; 168 int err = 0; 169 u16 speed, duplex, phy_data; 170 171 /* MII_BMSR must read twice */ 172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 173 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 174 if ((phy_data & BMSR_LSTATUS) == 0) { 175 /* link down */ 176 if (netif_carrier_ok(netdev)) { /* old link state: Up */ 177 u32 value; 178 /* disable rx */ 179 value = AT_READ_REG(hw, REG_MAC_CTRL); 180 value &= ~MAC_CTRL_RX_EN; 181 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 182 adapter->link_speed = SPEED_0; 183 netif_carrier_off(netdev); 184 netif_stop_queue(netdev); 185 } 186 } else { 187 /* Link Up */ 188 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex); 189 if (unlikely(err)) 190 return err; 191 192 /* link result is our setting */ 193 if (adapter->link_speed != speed || 194 adapter->link_duplex != duplex) { 195 adapter->link_speed = speed; 196 adapter->link_duplex = duplex; 197 atl1e_setup_mac_ctrl(adapter); 198 netdev_info(netdev, 199 "NIC Link is Up <%d Mbps %s Duplex>\n", 200 adapter->link_speed, 201 adapter->link_duplex == FULL_DUPLEX ? 202 "Full" : "Half"); 203 } 204 205 if (!netif_carrier_ok(netdev)) { 206 /* Link down -> Up */ 207 netif_carrier_on(netdev); 208 netif_wake_queue(netdev); 209 } 210 } 211 return 0; 212 } 213 214 /** 215 * atl1e_link_chg_task - deal with link change event Out of interrupt context 216 * @netdev: network interface device structure 217 */ 218 static void atl1e_link_chg_task(struct work_struct *work) 219 { 220 struct atl1e_adapter *adapter; 221 unsigned long flags; 222 223 adapter = container_of(work, struct atl1e_adapter, link_chg_task); 224 spin_lock_irqsave(&adapter->mdio_lock, flags); 225 atl1e_check_link(adapter); 226 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 227 } 228 229 static void atl1e_link_chg_event(struct atl1e_adapter *adapter) 230 { 231 struct net_device *netdev = adapter->netdev; 232 u16 phy_data = 0; 233 u16 link_up = 0; 234 235 spin_lock(&adapter->mdio_lock); 236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 237 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 238 spin_unlock(&adapter->mdio_lock); 239 link_up = phy_data & BMSR_LSTATUS; 240 /* notify upper layer link down ASAP */ 241 if (!link_up) { 242 if (netif_carrier_ok(netdev)) { 243 /* old link state: Up */ 244 netdev_info(netdev, "NIC Link is Down\n"); 245 adapter->link_speed = SPEED_0; 246 netif_stop_queue(netdev); 247 } 248 } 249 schedule_work(&adapter->link_chg_task); 250 } 251 252 static void atl1e_del_timer(struct atl1e_adapter *adapter) 253 { 254 del_timer_sync(&adapter->phy_config_timer); 255 } 256 257 static void atl1e_cancel_work(struct atl1e_adapter *adapter) 258 { 259 cancel_work_sync(&adapter->reset_task); 260 cancel_work_sync(&adapter->link_chg_task); 261 } 262 263 /** 264 * atl1e_tx_timeout - Respond to a Tx Hang 265 * @netdev: network interface device structure 266 */ 267 static void atl1e_tx_timeout(struct net_device *netdev) 268 { 269 struct atl1e_adapter *adapter = netdev_priv(netdev); 270 271 /* Do the reset outside of interrupt context */ 272 schedule_work(&adapter->reset_task); 273 } 274 275 /** 276 * atl1e_set_multi - Multicast and Promiscuous mode set 277 * @netdev: network interface device structure 278 * 279 * The set_multi entry point is called whenever the multicast address 280 * list or the network interface flags are updated. This routine is 281 * responsible for configuring the hardware for proper multicast, 282 * promiscuous mode, and all-multi behavior. 283 */ 284 static void atl1e_set_multi(struct net_device *netdev) 285 { 286 struct atl1e_adapter *adapter = netdev_priv(netdev); 287 struct atl1e_hw *hw = &adapter->hw; 288 struct netdev_hw_addr *ha; 289 u32 mac_ctrl_data = 0; 290 u32 hash_value; 291 292 /* Check for Promiscuous and All Multicast modes */ 293 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL); 294 295 if (netdev->flags & IFF_PROMISC) { 296 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 297 } else if (netdev->flags & IFF_ALLMULTI) { 298 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 299 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 300 } else { 301 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 302 } 303 304 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 305 306 /* clear the old settings from the multicast hash table */ 307 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 308 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 309 310 /* comoute mc addresses' hash value ,and put it into hash table */ 311 netdev_for_each_mc_addr(ha, netdev) { 312 hash_value = atl1e_hash_mc_addr(hw, ha->addr); 313 atl1e_hash_set(hw, hash_value); 314 } 315 } 316 317 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data) 318 { 319 320 if (features & NETIF_F_RXALL) { 321 /* enable RX of ALL frames */ 322 *mac_ctrl_data |= MAC_CTRL_DBG; 323 } else { 324 /* disable RX of ALL frames */ 325 *mac_ctrl_data &= ~MAC_CTRL_DBG; 326 } 327 } 328 329 static void atl1e_rx_mode(struct net_device *netdev, 330 netdev_features_t features) 331 { 332 struct atl1e_adapter *adapter = netdev_priv(netdev); 333 u32 mac_ctrl_data = 0; 334 335 netdev_dbg(adapter->netdev, "%s\n", __func__); 336 337 atl1e_irq_disable(adapter); 338 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 339 __atl1e_rx_mode(features, &mac_ctrl_data); 340 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 341 atl1e_irq_enable(adapter); 342 } 343 344 345 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 346 { 347 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 348 /* enable VLAN tag insert/strip */ 349 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 350 } else { 351 /* disable VLAN tag insert/strip */ 352 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 353 } 354 } 355 356 static void atl1e_vlan_mode(struct net_device *netdev, 357 netdev_features_t features) 358 { 359 struct atl1e_adapter *adapter = netdev_priv(netdev); 360 u32 mac_ctrl_data = 0; 361 362 netdev_dbg(adapter->netdev, "%s\n", __func__); 363 364 atl1e_irq_disable(adapter); 365 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 366 __atl1e_vlan_mode(features, &mac_ctrl_data); 367 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 368 atl1e_irq_enable(adapter); 369 } 370 371 static void atl1e_restore_vlan(struct atl1e_adapter *adapter) 372 { 373 netdev_dbg(adapter->netdev, "%s\n", __func__); 374 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features); 375 } 376 377 /** 378 * atl1e_set_mac - Change the Ethernet Address of the NIC 379 * @netdev: network interface device structure 380 * @p: pointer to an address structure 381 * 382 * Returns 0 on success, negative on failure 383 */ 384 static int atl1e_set_mac_addr(struct net_device *netdev, void *p) 385 { 386 struct atl1e_adapter *adapter = netdev_priv(netdev); 387 struct sockaddr *addr = p; 388 389 if (!is_valid_ether_addr(addr->sa_data)) 390 return -EADDRNOTAVAIL; 391 392 if (netif_running(netdev)) 393 return -EBUSY; 394 395 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 396 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 397 398 atl1e_hw_set_mac_addr(&adapter->hw); 399 400 return 0; 401 } 402 403 static netdev_features_t atl1e_fix_features(struct net_device *netdev, 404 netdev_features_t features) 405 { 406 /* 407 * Since there is no support for separate rx/tx vlan accel 408 * enable/disable make sure tx flag is always in same state as rx. 409 */ 410 if (features & NETIF_F_HW_VLAN_CTAG_RX) 411 features |= NETIF_F_HW_VLAN_CTAG_TX; 412 else 413 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 414 415 return features; 416 } 417 418 static int atl1e_set_features(struct net_device *netdev, 419 netdev_features_t features) 420 { 421 netdev_features_t changed = netdev->features ^ features; 422 423 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 424 atl1e_vlan_mode(netdev, features); 425 426 if (changed & NETIF_F_RXALL) 427 atl1e_rx_mode(netdev, features); 428 429 430 return 0; 431 } 432 433 /** 434 * atl1e_change_mtu - Change the Maximum Transfer Unit 435 * @netdev: network interface device structure 436 * @new_mtu: new value for maximum frame size 437 * 438 * Returns 0 on success, negative on failure 439 */ 440 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu) 441 { 442 struct atl1e_adapter *adapter = netdev_priv(netdev); 443 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 444 445 /* set MTU */ 446 if (netif_running(netdev)) { 447 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 448 msleep(1); 449 netdev->mtu = new_mtu; 450 adapter->hw.max_frame_size = new_mtu; 451 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3; 452 atl1e_down(adapter); 453 atl1e_up(adapter); 454 clear_bit(__AT_RESETTING, &adapter->flags); 455 } 456 return 0; 457 } 458 459 /* 460 * caller should hold mdio_lock 461 */ 462 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 463 { 464 struct atl1e_adapter *adapter = netdev_priv(netdev); 465 u16 result; 466 467 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); 468 return result; 469 } 470 471 static void atl1e_mdio_write(struct net_device *netdev, int phy_id, 472 int reg_num, int val) 473 { 474 struct atl1e_adapter *adapter = netdev_priv(netdev); 475 476 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); 477 } 478 479 static int atl1e_mii_ioctl(struct net_device *netdev, 480 struct ifreq *ifr, int cmd) 481 { 482 struct atl1e_adapter *adapter = netdev_priv(netdev); 483 struct mii_ioctl_data *data = if_mii(ifr); 484 unsigned long flags; 485 int retval = 0; 486 487 if (!netif_running(netdev)) 488 return -EINVAL; 489 490 spin_lock_irqsave(&adapter->mdio_lock, flags); 491 switch (cmd) { 492 case SIOCGMIIPHY: 493 data->phy_id = 0; 494 break; 495 496 case SIOCGMIIREG: 497 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 498 &data->val_out)) { 499 retval = -EIO; 500 goto out; 501 } 502 break; 503 504 case SIOCSMIIREG: 505 if (data->reg_num & ~(0x1F)) { 506 retval = -EFAULT; 507 goto out; 508 } 509 510 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n", 511 data->reg_num, data->val_in); 512 if (atl1e_write_phy_reg(&adapter->hw, 513 data->reg_num, data->val_in)) { 514 retval = -EIO; 515 goto out; 516 } 517 break; 518 519 default: 520 retval = -EOPNOTSUPP; 521 break; 522 } 523 out: 524 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 525 return retval; 526 527 } 528 529 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 530 { 531 switch (cmd) { 532 case SIOCGMIIPHY: 533 case SIOCGMIIREG: 534 case SIOCSMIIREG: 535 return atl1e_mii_ioctl(netdev, ifr, cmd); 536 default: 537 return -EOPNOTSUPP; 538 } 539 } 540 541 static void atl1e_setup_pcicmd(struct pci_dev *pdev) 542 { 543 u16 cmd; 544 545 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 546 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO); 547 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); 548 pci_write_config_word(pdev, PCI_COMMAND, cmd); 549 550 /* 551 * some motherboards BIOS(PXE/EFI) driver may set PME 552 * while they transfer control to OS (Windows/Linux) 553 * so we should clear this bit before NIC work normally 554 */ 555 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0); 556 msleep(1); 557 } 558 559 /** 560 * atl1e_alloc_queues - Allocate memory for all rings 561 * @adapter: board private structure to initialize 562 * 563 */ 564 static int atl1e_alloc_queues(struct atl1e_adapter *adapter) 565 { 566 return 0; 567 } 568 569 /** 570 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter) 571 * @adapter: board private structure to initialize 572 * 573 * atl1e_sw_init initializes the Adapter private data structure. 574 * Fields are initialized based on PCI device information and 575 * OS network device settings (MTU size). 576 */ 577 static int atl1e_sw_init(struct atl1e_adapter *adapter) 578 { 579 struct atl1e_hw *hw = &adapter->hw; 580 struct pci_dev *pdev = adapter->pdev; 581 u32 phy_status_data = 0; 582 583 adapter->wol = 0; 584 adapter->link_speed = SPEED_0; /* hardware init */ 585 adapter->link_duplex = FULL_DUPLEX; 586 adapter->num_rx_queues = 1; 587 588 /* PCI config space info */ 589 hw->vendor_id = pdev->vendor; 590 hw->device_id = pdev->device; 591 hw->subsystem_vendor_id = pdev->subsystem_vendor; 592 hw->subsystem_id = pdev->subsystem_device; 593 hw->revision_id = pdev->revision; 594 595 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 596 597 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 598 /* nic type */ 599 if (hw->revision_id >= 0xF0) { 600 hw->nic_type = athr_l2e_revB; 601 } else { 602 if (phy_status_data & PHY_STATUS_100M) 603 hw->nic_type = athr_l1e; 604 else 605 hw->nic_type = athr_l2e_revA; 606 } 607 608 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 609 610 if (phy_status_data & PHY_STATUS_EMI_CA) 611 hw->emi_ca = true; 612 else 613 hw->emi_ca = false; 614 615 hw->phy_configured = false; 616 hw->preamble_len = 7; 617 hw->max_frame_size = adapter->netdev->mtu; 618 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN + 619 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3; 620 621 hw->rrs_type = atl1e_rrs_disable; 622 hw->indirect_tab = 0; 623 hw->base_cpu = 0; 624 625 /* need confirm */ 626 627 hw->ict = 50000; /* 100ms */ 628 hw->smb_timer = 200000; /* 200ms */ 629 hw->tpd_burst = 5; 630 hw->rrd_thresh = 1; 631 hw->tpd_thresh = adapter->tx_ring.count / 2; 632 hw->rx_count_down = 4; /* 2us resolution */ 633 hw->tx_count_down = hw->imt * 4 / 3; 634 hw->dmar_block = atl1e_dma_req_1024; 635 hw->dmaw_block = atl1e_dma_req_1024; 636 hw->dmar_dly_cnt = 15; 637 hw->dmaw_dly_cnt = 4; 638 639 if (atl1e_alloc_queues(adapter)) { 640 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n"); 641 return -ENOMEM; 642 } 643 644 atomic_set(&adapter->irq_sem, 1); 645 spin_lock_init(&adapter->mdio_lock); 646 647 set_bit(__AT_DOWN, &adapter->flags); 648 649 return 0; 650 } 651 652 /** 653 * atl1e_clean_tx_ring - Free Tx-skb 654 * @adapter: board private structure 655 */ 656 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter) 657 { 658 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 659 struct atl1e_tx_buffer *tx_buffer = NULL; 660 struct pci_dev *pdev = adapter->pdev; 661 u16 index, ring_count; 662 663 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL) 664 return; 665 666 ring_count = tx_ring->count; 667 /* first unmmap dma */ 668 for (index = 0; index < ring_count; index++) { 669 tx_buffer = &tx_ring->tx_buffer[index]; 670 if (tx_buffer->dma) { 671 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 672 pci_unmap_single(pdev, tx_buffer->dma, 673 tx_buffer->length, PCI_DMA_TODEVICE); 674 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 675 pci_unmap_page(pdev, tx_buffer->dma, 676 tx_buffer->length, PCI_DMA_TODEVICE); 677 tx_buffer->dma = 0; 678 } 679 } 680 /* second free skb */ 681 for (index = 0; index < ring_count; index++) { 682 tx_buffer = &tx_ring->tx_buffer[index]; 683 if (tx_buffer->skb) { 684 dev_kfree_skb_any(tx_buffer->skb); 685 tx_buffer->skb = NULL; 686 } 687 } 688 /* Zero out Tx-buffers */ 689 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) * 690 ring_count); 691 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) * 692 ring_count); 693 } 694 695 /** 696 * atl1e_clean_rx_ring - Free rx-reservation skbs 697 * @adapter: board private structure 698 */ 699 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter) 700 { 701 struct atl1e_rx_ring *rx_ring = 702 &adapter->rx_ring; 703 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc; 704 u16 i, j; 705 706 707 if (adapter->ring_vir_addr == NULL) 708 return; 709 /* Zero out the descriptor ring */ 710 for (i = 0; i < adapter->num_rx_queues; i++) { 711 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 712 if (rx_page_desc[i].rx_page[j].addr != NULL) { 713 memset(rx_page_desc[i].rx_page[j].addr, 0, 714 rx_ring->real_page_size); 715 } 716 } 717 } 718 } 719 720 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size) 721 { 722 *ring_size = ((u32)(adapter->tx_ring.count * 723 sizeof(struct atl1e_tpd_desc) + 7 724 /* tx ring, qword align */ 725 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE * 726 adapter->num_rx_queues + 31 727 /* rx ring, 32 bytes align */ 728 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) * 729 sizeof(u32) + 3)); 730 /* tx, rx cmd, dword align */ 731 } 732 733 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter) 734 { 735 struct atl1e_rx_ring *rx_ring = NULL; 736 737 rx_ring = &adapter->rx_ring; 738 739 rx_ring->real_page_size = adapter->rx_ring.page_size 740 + adapter->hw.max_frame_size 741 + ETH_HLEN + VLAN_HLEN 742 + ETH_FCS_LEN; 743 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32); 744 atl1e_cal_ring_size(adapter, &adapter->ring_size); 745 746 adapter->ring_vir_addr = NULL; 747 adapter->rx_ring.desc = NULL; 748 rwlock_init(&adapter->tx_ring.tx_lock); 749 } 750 751 /* 752 * Read / Write Ptr Initialize: 753 */ 754 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter) 755 { 756 struct atl1e_tx_ring *tx_ring = NULL; 757 struct atl1e_rx_ring *rx_ring = NULL; 758 struct atl1e_rx_page_desc *rx_page_desc = NULL; 759 int i, j; 760 761 tx_ring = &adapter->tx_ring; 762 rx_ring = &adapter->rx_ring; 763 rx_page_desc = rx_ring->rx_page_desc; 764 765 tx_ring->next_to_use = 0; 766 atomic_set(&tx_ring->next_to_clean, 0); 767 768 for (i = 0; i < adapter->num_rx_queues; i++) { 769 rx_page_desc[i].rx_using = 0; 770 rx_page_desc[i].rx_nxseq = 0; 771 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 772 *rx_page_desc[i].rx_page[j].write_offset_addr = 0; 773 rx_page_desc[i].rx_page[j].read_offset = 0; 774 } 775 } 776 } 777 778 /** 779 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources 780 * @adapter: board private structure 781 * 782 * Free all transmit software resources 783 */ 784 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter) 785 { 786 struct pci_dev *pdev = adapter->pdev; 787 788 atl1e_clean_tx_ring(adapter); 789 atl1e_clean_rx_ring(adapter); 790 791 if (adapter->ring_vir_addr) { 792 pci_free_consistent(pdev, adapter->ring_size, 793 adapter->ring_vir_addr, adapter->ring_dma); 794 adapter->ring_vir_addr = NULL; 795 } 796 797 if (adapter->tx_ring.tx_buffer) { 798 kfree(adapter->tx_ring.tx_buffer); 799 adapter->tx_ring.tx_buffer = NULL; 800 } 801 } 802 803 /** 804 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources 805 * @adapter: board private structure 806 * 807 * Return 0 on success, negative on failure 808 */ 809 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter) 810 { 811 struct pci_dev *pdev = adapter->pdev; 812 struct atl1e_tx_ring *tx_ring; 813 struct atl1e_rx_ring *rx_ring; 814 struct atl1e_rx_page_desc *rx_page_desc; 815 int size, i, j; 816 u32 offset = 0; 817 int err = 0; 818 819 if (adapter->ring_vir_addr != NULL) 820 return 0; /* alloced already */ 821 822 tx_ring = &adapter->tx_ring; 823 rx_ring = &adapter->rx_ring; 824 825 /* real ring DMA buffer */ 826 827 size = adapter->ring_size; 828 adapter->ring_vir_addr = pci_zalloc_consistent(pdev, adapter->ring_size, 829 &adapter->ring_dma); 830 if (adapter->ring_vir_addr == NULL) { 831 netdev_err(adapter->netdev, 832 "pci_alloc_consistent failed, size = D%d\n", size); 833 return -ENOMEM; 834 } 835 836 rx_page_desc = rx_ring->rx_page_desc; 837 838 /* Init TPD Ring */ 839 tx_ring->dma = roundup(adapter->ring_dma, 8); 840 offset = tx_ring->dma - adapter->ring_dma; 841 tx_ring->desc = adapter->ring_vir_addr + offset; 842 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count); 843 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL); 844 if (tx_ring->tx_buffer == NULL) { 845 err = -ENOMEM; 846 goto failed; 847 } 848 849 /* Init RXF-Pages */ 850 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count); 851 offset = roundup(offset, 32); 852 853 for (i = 0; i < adapter->num_rx_queues; i++) { 854 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 855 rx_page_desc[i].rx_page[j].dma = 856 adapter->ring_dma + offset; 857 rx_page_desc[i].rx_page[j].addr = 858 adapter->ring_vir_addr + offset; 859 offset += rx_ring->real_page_size; 860 } 861 } 862 863 /* Init CMB dma address */ 864 tx_ring->cmb_dma = adapter->ring_dma + offset; 865 tx_ring->cmb = adapter->ring_vir_addr + offset; 866 offset += sizeof(u32); 867 868 for (i = 0; i < adapter->num_rx_queues; i++) { 869 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 870 rx_page_desc[i].rx_page[j].write_offset_dma = 871 adapter->ring_dma + offset; 872 rx_page_desc[i].rx_page[j].write_offset_addr = 873 adapter->ring_vir_addr + offset; 874 offset += sizeof(u32); 875 } 876 } 877 878 if (unlikely(offset > adapter->ring_size)) { 879 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n", 880 offset, adapter->ring_size); 881 err = -1; 882 goto failed; 883 } 884 885 return 0; 886 failed: 887 if (adapter->ring_vir_addr != NULL) { 888 pci_free_consistent(pdev, adapter->ring_size, 889 adapter->ring_vir_addr, adapter->ring_dma); 890 adapter->ring_vir_addr = NULL; 891 } 892 return err; 893 } 894 895 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter) 896 { 897 898 struct atl1e_hw *hw = &adapter->hw; 899 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 900 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 901 struct atl1e_rx_page_desc *rx_page_desc = NULL; 902 int i, j; 903 904 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI, 905 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32)); 906 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO, 907 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK)); 908 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count)); 909 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO, 910 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK)); 911 912 rx_page_desc = rx_ring->rx_page_desc; 913 /* RXF Page Physical address / Page Length */ 914 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) { 915 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i], 916 (u32)((adapter->ring_dma & 917 AT_DMA_HI_ADDR_MASK) >> 32)); 918 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 919 u32 page_phy_addr; 920 u32 offset_phy_addr; 921 922 page_phy_addr = rx_page_desc[i].rx_page[j].dma; 923 offset_phy_addr = 924 rx_page_desc[i].rx_page[j].write_offset_dma; 925 926 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j], 927 page_phy_addr & AT_DMA_LO_ADDR_MASK); 928 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j], 929 offset_phy_addr & AT_DMA_LO_ADDR_MASK); 930 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1); 931 } 932 } 933 /* Page Length */ 934 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size); 935 /* Load all of base address above */ 936 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 937 } 938 939 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter) 940 { 941 struct atl1e_hw *hw = &adapter->hw; 942 u32 dev_ctrl_data = 0; 943 u32 max_pay_load = 0; 944 u32 jumbo_thresh = 0; 945 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ 946 947 /* configure TXQ param */ 948 if (hw->nic_type != athr_l2e_revB) { 949 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; 950 if (hw->max_frame_size <= 1500) { 951 jumbo_thresh = hw->max_frame_size + extra_size; 952 } else if (hw->max_frame_size < 6*1024) { 953 jumbo_thresh = 954 (hw->max_frame_size + extra_size) * 2 / 3; 955 } else { 956 jumbo_thresh = (hw->max_frame_size + extra_size) / 2; 957 } 958 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3); 959 } 960 961 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL); 962 963 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) & 964 DEVICE_CTRL_MAX_PAYLOAD_MASK; 965 966 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); 967 968 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) & 969 DEVICE_CTRL_MAX_RREQ_SZ_MASK; 970 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 971 972 if (hw->nic_type != athr_l2e_revB) 973 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2, 974 atl1e_pay_load_size[hw->dmar_block]); 975 /* enable TXQ */ 976 AT_WRITE_REGW(hw, REG_TXQ_CTRL, 977 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK) 978 << TXQ_CTRL_NUM_TPD_BURST_SHIFT) 979 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN); 980 } 981 982 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter) 983 { 984 struct atl1e_hw *hw = &adapter->hw; 985 u32 rxf_len = 0; 986 u32 rxf_low = 0; 987 u32 rxf_high = 0; 988 u32 rxf_thresh_data = 0; 989 u32 rxq_ctrl_data = 0; 990 991 if (hw->nic_type != athr_l2e_revB) { 992 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM, 993 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) << 994 RXQ_JMBOSZ_TH_SHIFT | 995 (1 & RXQ_JMBO_LKAH_MASK) << 996 RXQ_JMBO_LKAH_SHIFT)); 997 998 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN); 999 rxf_high = rxf_len * 4 / 5; 1000 rxf_low = rxf_len / 5; 1001 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK) 1002 << RXQ_RXF_PAUSE_TH_HI_SHIFT) | 1003 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK) 1004 << RXQ_RXF_PAUSE_TH_LO_SHIFT); 1005 1006 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data); 1007 } 1008 1009 /* RRS */ 1010 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); 1011 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); 1012 1013 if (hw->rrs_type & atl1e_rrs_ipv4) 1014 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4; 1015 1016 if (hw->rrs_type & atl1e_rrs_ipv4_tcp) 1017 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP; 1018 1019 if (hw->rrs_type & atl1e_rrs_ipv6) 1020 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6; 1021 1022 if (hw->rrs_type & atl1e_rrs_ipv6_tcp) 1023 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP; 1024 1025 if (hw->rrs_type != atl1e_rrs_disable) 1026 rxq_ctrl_data |= 1027 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT); 1028 1029 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 | 1030 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN; 1031 1032 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1033 } 1034 1035 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter) 1036 { 1037 struct atl1e_hw *hw = &adapter->hw; 1038 u32 dma_ctrl_data = 0; 1039 1040 dma_ctrl_data = DMA_CTRL_RXCMB_EN; 1041 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) 1042 << DMA_CTRL_DMAR_BURST_LEN_SHIFT; 1043 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) 1044 << DMA_CTRL_DMAW_BURST_LEN_SHIFT; 1045 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER; 1046 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) 1047 << DMA_CTRL_DMAR_DLY_CNT_SHIFT; 1048 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) 1049 << DMA_CTRL_DMAW_DLY_CNT_SHIFT; 1050 1051 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1052 } 1053 1054 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter) 1055 { 1056 u32 value; 1057 struct atl1e_hw *hw = &adapter->hw; 1058 struct net_device *netdev = adapter->netdev; 1059 1060 /* Config MAC CTRL Register */ 1061 value = MAC_CTRL_TX_EN | 1062 MAC_CTRL_RX_EN ; 1063 1064 if (FULL_DUPLEX == adapter->link_duplex) 1065 value |= MAC_CTRL_DUPLX; 1066 1067 value |= ((u32)((SPEED_1000 == adapter->link_speed) ? 1068 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) << 1069 MAC_CTRL_SPEED_SHIFT); 1070 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1071 1072 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1073 value |= (((u32)adapter->hw.preamble_len & 1074 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); 1075 1076 __atl1e_vlan_mode(netdev->features, &value); 1077 1078 value |= MAC_CTRL_BC_EN; 1079 if (netdev->flags & IFF_PROMISC) 1080 value |= MAC_CTRL_PROMIS_EN; 1081 if (netdev->flags & IFF_ALLMULTI) 1082 value |= MAC_CTRL_MC_ALL_EN; 1083 if (netdev->features & NETIF_F_RXALL) 1084 value |= MAC_CTRL_DBG; 1085 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 1086 } 1087 1088 /** 1089 * atl1e_configure - Configure Transmit&Receive Unit after Reset 1090 * @adapter: board private structure 1091 * 1092 * Configure the Tx /Rx unit of the MAC after a reset. 1093 */ 1094 static int atl1e_configure(struct atl1e_adapter *adapter) 1095 { 1096 struct atl1e_hw *hw = &adapter->hw; 1097 1098 u32 intr_status_data = 0; 1099 1100 /* clear interrupt status */ 1101 AT_WRITE_REG(hw, REG_ISR, ~0); 1102 1103 /* 1. set MAC Address */ 1104 atl1e_hw_set_mac_addr(hw); 1105 1106 /* 2. Init the Multicast HASH table done by set_muti */ 1107 1108 /* 3. Clear any WOL status */ 1109 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1110 1111 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr 1112 * TPD Ring/SMB/RXF0 Page CMBs, they use the same 1113 * High 32bits memory */ 1114 atl1e_configure_des_ring(adapter); 1115 1116 /* 5. set Interrupt Moderator Timer */ 1117 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt); 1118 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt); 1119 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE | 1120 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN); 1121 1122 /* 6. rx/tx threshold to trig interrupt */ 1123 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh); 1124 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh); 1125 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down); 1126 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down); 1127 1128 /* 7. set Interrupt Clear Timer */ 1129 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict); 1130 1131 /* 8. set MTU */ 1132 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1133 VLAN_HLEN + ETH_FCS_LEN); 1134 1135 /* 9. config TXQ early tx threshold */ 1136 atl1e_configure_tx(adapter); 1137 1138 /* 10. config RXQ */ 1139 atl1e_configure_rx(adapter); 1140 1141 /* 11. config DMA Engine */ 1142 atl1e_configure_dma(adapter); 1143 1144 /* 12. smb timer to trig interrupt */ 1145 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer); 1146 1147 intr_status_data = AT_READ_REG(hw, REG_ISR); 1148 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) { 1149 netdev_err(adapter->netdev, 1150 "atl1e_configure failed, PCIE phy link down\n"); 1151 return -1; 1152 } 1153 1154 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff); 1155 return 0; 1156 } 1157 1158 /** 1159 * atl1e_get_stats - Get System Network Statistics 1160 * @netdev: network interface device structure 1161 * 1162 * Returns the address of the device statistics structure. 1163 * The statistics are actually updated from the timer callback. 1164 */ 1165 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev) 1166 { 1167 struct atl1e_adapter *adapter = netdev_priv(netdev); 1168 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats; 1169 struct net_device_stats *net_stats = &netdev->stats; 1170 1171 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1172 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1173 net_stats->multicast = hw_stats->rx_mcast; 1174 net_stats->collisions = hw_stats->tx_1_col + 1175 hw_stats->tx_2_col + 1176 hw_stats->tx_late_col + 1177 hw_stats->tx_abort_col; 1178 1179 net_stats->rx_errors = hw_stats->rx_frag + 1180 hw_stats->rx_fcs_err + 1181 hw_stats->rx_len_err + 1182 hw_stats->rx_sz_ov + 1183 hw_stats->rx_rrd_ov + 1184 hw_stats->rx_align_err + 1185 hw_stats->rx_rxf_ov; 1186 1187 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1188 net_stats->rx_length_errors = hw_stats->rx_len_err; 1189 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1190 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1191 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1192 1193 net_stats->tx_errors = hw_stats->tx_late_col + 1194 hw_stats->tx_abort_col + 1195 hw_stats->tx_underrun + 1196 hw_stats->tx_trunc; 1197 1198 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1199 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1200 net_stats->tx_window_errors = hw_stats->tx_late_col; 1201 1202 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1203 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1204 1205 return net_stats; 1206 } 1207 1208 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter) 1209 { 1210 u16 hw_reg_addr = 0; 1211 unsigned long *stats_item = NULL; 1212 1213 /* update rx status */ 1214 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1215 stats_item = &adapter->hw_stats.rx_ok; 1216 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1217 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1218 stats_item++; 1219 hw_reg_addr += 4; 1220 } 1221 /* update tx status */ 1222 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1223 stats_item = &adapter->hw_stats.tx_ok; 1224 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1225 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1226 stats_item++; 1227 hw_reg_addr += 4; 1228 } 1229 } 1230 1231 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter) 1232 { 1233 u16 phy_data; 1234 1235 spin_lock(&adapter->mdio_lock); 1236 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data); 1237 spin_unlock(&adapter->mdio_lock); 1238 } 1239 1240 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter) 1241 { 1242 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1243 struct atl1e_tx_buffer *tx_buffer = NULL; 1244 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX); 1245 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1246 1247 while (next_to_clean != hw_next_to_clean) { 1248 tx_buffer = &tx_ring->tx_buffer[next_to_clean]; 1249 if (tx_buffer->dma) { 1250 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 1251 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1252 tx_buffer->length, PCI_DMA_TODEVICE); 1253 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 1254 pci_unmap_page(adapter->pdev, tx_buffer->dma, 1255 tx_buffer->length, PCI_DMA_TODEVICE); 1256 tx_buffer->dma = 0; 1257 } 1258 1259 if (tx_buffer->skb) { 1260 dev_kfree_skb_irq(tx_buffer->skb); 1261 tx_buffer->skb = NULL; 1262 } 1263 1264 if (++next_to_clean == tx_ring->count) 1265 next_to_clean = 0; 1266 } 1267 1268 atomic_set(&tx_ring->next_to_clean, next_to_clean); 1269 1270 if (netif_queue_stopped(adapter->netdev) && 1271 netif_carrier_ok(adapter->netdev)) { 1272 netif_wake_queue(adapter->netdev); 1273 } 1274 1275 return true; 1276 } 1277 1278 /** 1279 * atl1e_intr - Interrupt Handler 1280 * @irq: interrupt number 1281 * @data: pointer to a network interface device structure 1282 */ 1283 static irqreturn_t atl1e_intr(int irq, void *data) 1284 { 1285 struct net_device *netdev = data; 1286 struct atl1e_adapter *adapter = netdev_priv(netdev); 1287 struct atl1e_hw *hw = &adapter->hw; 1288 int max_ints = AT_MAX_INT_WORK; 1289 int handled = IRQ_NONE; 1290 u32 status; 1291 1292 do { 1293 status = AT_READ_REG(hw, REG_ISR); 1294 if ((status & IMR_NORMAL_MASK) == 0 || 1295 (status & ISR_DIS_INT) != 0) { 1296 if (max_ints != AT_MAX_INT_WORK) 1297 handled = IRQ_HANDLED; 1298 break; 1299 } 1300 /* link event */ 1301 if (status & ISR_GPHY) 1302 atl1e_clear_phy_int(adapter); 1303 /* Ack ISR */ 1304 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1305 1306 handled = IRQ_HANDLED; 1307 /* check if PCIE PHY Link down */ 1308 if (status & ISR_PHY_LINKDOWN) { 1309 netdev_err(adapter->netdev, 1310 "pcie phy linkdown %x\n", status); 1311 if (netif_running(adapter->netdev)) { 1312 /* reset MAC */ 1313 atl1e_irq_reset(adapter); 1314 schedule_work(&adapter->reset_task); 1315 break; 1316 } 1317 } 1318 1319 /* check if DMA read/write error */ 1320 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { 1321 netdev_err(adapter->netdev, 1322 "PCIE DMA RW error (status = 0x%x)\n", 1323 status); 1324 atl1e_irq_reset(adapter); 1325 schedule_work(&adapter->reset_task); 1326 break; 1327 } 1328 1329 if (status & ISR_SMB) 1330 atl1e_update_hw_stats(adapter); 1331 1332 /* link event */ 1333 if (status & (ISR_GPHY | ISR_MANUAL)) { 1334 netdev->stats.tx_carrier_errors++; 1335 atl1e_link_chg_event(adapter); 1336 break; 1337 } 1338 1339 /* transmit event */ 1340 if (status & ISR_TX_EVENT) 1341 atl1e_clean_tx_irq(adapter); 1342 1343 if (status & ISR_RX_EVENT) { 1344 /* 1345 * disable rx interrupts, without 1346 * the synchronize_irq bit 1347 */ 1348 AT_WRITE_REG(hw, REG_IMR, 1349 IMR_NORMAL_MASK & ~ISR_RX_EVENT); 1350 AT_WRITE_FLUSH(hw); 1351 if (likely(napi_schedule_prep( 1352 &adapter->napi))) 1353 __napi_schedule(&adapter->napi); 1354 } 1355 } while (--max_ints > 0); 1356 /* re-enable Interrupt*/ 1357 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1358 1359 return handled; 1360 } 1361 1362 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter, 1363 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs) 1364 { 1365 u8 *packet = (u8 *)(prrs + 1); 1366 struct iphdr *iph; 1367 u16 head_len = ETH_HLEN; 1368 u16 pkt_flags; 1369 u16 err_flags; 1370 1371 skb_checksum_none_assert(skb); 1372 pkt_flags = prrs->pkt_flag; 1373 err_flags = prrs->err_flag; 1374 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) && 1375 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) { 1376 if (pkt_flags & RRS_IS_IPV4) { 1377 if (pkt_flags & RRS_IS_802_3) 1378 head_len += 8; 1379 iph = (struct iphdr *) (packet + head_len); 1380 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF)) 1381 goto hw_xsum; 1382 } 1383 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) { 1384 skb->ip_summed = CHECKSUM_UNNECESSARY; 1385 return; 1386 } 1387 } 1388 1389 hw_xsum : 1390 return; 1391 } 1392 1393 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter, 1394 u8 que) 1395 { 1396 struct atl1e_rx_page_desc *rx_page_desc = 1397 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc; 1398 u8 rx_using = rx_page_desc[que].rx_using; 1399 1400 return &(rx_page_desc[que].rx_page[rx_using]); 1401 } 1402 1403 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que, 1404 int *work_done, int work_to_do) 1405 { 1406 struct net_device *netdev = adapter->netdev; 1407 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 1408 struct atl1e_rx_page_desc *rx_page_desc = 1409 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc; 1410 struct sk_buff *skb = NULL; 1411 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que); 1412 u32 packet_size, write_offset; 1413 struct atl1e_recv_ret_status *prrs; 1414 1415 write_offset = *(rx_page->write_offset_addr); 1416 if (likely(rx_page->read_offset < write_offset)) { 1417 do { 1418 if (*work_done >= work_to_do) 1419 break; 1420 (*work_done)++; 1421 /* get new packet's rrs */ 1422 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr + 1423 rx_page->read_offset); 1424 /* check sequence number */ 1425 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) { 1426 netdev_err(netdev, 1427 "rx sequence number error (rx=%d) (expect=%d)\n", 1428 prrs->seq_num, 1429 rx_page_desc[que].rx_nxseq); 1430 rx_page_desc[que].rx_nxseq++; 1431 /* just for debug use */ 1432 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0, 1433 (((u32)prrs->seq_num) << 16) | 1434 rx_page_desc[que].rx_nxseq); 1435 goto fatal_err; 1436 } 1437 rx_page_desc[que].rx_nxseq++; 1438 1439 /* error packet */ 1440 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) && 1441 !(netdev->features & NETIF_F_RXALL)) { 1442 if (prrs->err_flag & (RRS_ERR_BAD_CRC | 1443 RRS_ERR_DRIBBLE | RRS_ERR_CODE | 1444 RRS_ERR_TRUNC)) { 1445 /* hardware error, discard this packet*/ 1446 netdev_err(netdev, 1447 "rx packet desc error %x\n", 1448 *((u32 *)prrs + 1)); 1449 goto skip_pkt; 1450 } 1451 } 1452 1453 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1454 RRS_PKT_SIZE_MASK); 1455 if (likely(!(netdev->features & NETIF_F_RXFCS))) 1456 packet_size -= 4; /* CRC */ 1457 1458 skb = netdev_alloc_skb_ip_align(netdev, packet_size); 1459 if (skb == NULL) 1460 goto skip_pkt; 1461 1462 memcpy(skb->data, (u8 *)(prrs + 1), packet_size); 1463 skb_put(skb, packet_size); 1464 skb->protocol = eth_type_trans(skb, netdev); 1465 atl1e_rx_checksum(adapter, skb, prrs); 1466 1467 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) { 1468 u16 vlan_tag = (prrs->vtag >> 4) | 1469 ((prrs->vtag & 7) << 13) | 1470 ((prrs->vtag & 8) << 9); 1471 netdev_dbg(netdev, 1472 "RXD VLAN TAG<RRD>=0x%04x\n", 1473 prrs->vtag); 1474 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1475 } 1476 napi_gro_receive(&adapter->napi, skb); 1477 1478 skip_pkt: 1479 /* skip current packet whether it's ok or not. */ 1480 rx_page->read_offset += 1481 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1482 RRS_PKT_SIZE_MASK) + 1483 sizeof(struct atl1e_recv_ret_status) + 31) & 1484 0xFFFFFFE0); 1485 1486 if (rx_page->read_offset >= rx_ring->page_size) { 1487 /* mark this page clean */ 1488 u16 reg_addr; 1489 u8 rx_using; 1490 1491 rx_page->read_offset = 1492 *(rx_page->write_offset_addr) = 0; 1493 rx_using = rx_page_desc[que].rx_using; 1494 reg_addr = 1495 atl1e_rx_page_vld_regs[que][rx_using]; 1496 AT_WRITE_REGB(&adapter->hw, reg_addr, 1); 1497 rx_page_desc[que].rx_using ^= 1; 1498 rx_page = atl1e_get_rx_page(adapter, que); 1499 } 1500 write_offset = *(rx_page->write_offset_addr); 1501 } while (rx_page->read_offset < write_offset); 1502 } 1503 1504 return; 1505 1506 fatal_err: 1507 if (!test_bit(__AT_DOWN, &adapter->flags)) 1508 schedule_work(&adapter->reset_task); 1509 } 1510 1511 /** 1512 * atl1e_clean - NAPI Rx polling callback 1513 */ 1514 static int atl1e_clean(struct napi_struct *napi, int budget) 1515 { 1516 struct atl1e_adapter *adapter = 1517 container_of(napi, struct atl1e_adapter, napi); 1518 u32 imr_data; 1519 int work_done = 0; 1520 1521 /* Keep link state information with original netdev */ 1522 if (!netif_carrier_ok(adapter->netdev)) 1523 goto quit_polling; 1524 1525 atl1e_clean_rx_irq(adapter, 0, &work_done, budget); 1526 1527 /* If no Tx and not enough Rx work done, exit the polling mode */ 1528 if (work_done < budget) { 1529 quit_polling: 1530 napi_complete_done(napi, work_done); 1531 imr_data = AT_READ_REG(&adapter->hw, REG_IMR); 1532 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT); 1533 /* test debug */ 1534 if (test_bit(__AT_DOWN, &adapter->flags)) { 1535 atomic_dec(&adapter->irq_sem); 1536 netdev_err(adapter->netdev, 1537 "atl1e_clean is called when AT_DOWN\n"); 1538 } 1539 /* reenable RX intr */ 1540 /*atl1e_irq_enable(adapter); */ 1541 1542 } 1543 return work_done; 1544 } 1545 1546 #ifdef CONFIG_NET_POLL_CONTROLLER 1547 1548 /* 1549 * Polling 'interrupt' - used by things like netconsole to send skbs 1550 * without having to re-enable interrupts. It's not called while 1551 * the interrupt routine is executing. 1552 */ 1553 static void atl1e_netpoll(struct net_device *netdev) 1554 { 1555 struct atl1e_adapter *adapter = netdev_priv(netdev); 1556 1557 disable_irq(adapter->pdev->irq); 1558 atl1e_intr(adapter->pdev->irq, netdev); 1559 enable_irq(adapter->pdev->irq); 1560 } 1561 #endif 1562 1563 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter) 1564 { 1565 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1566 u16 next_to_use = 0; 1567 u16 next_to_clean = 0; 1568 1569 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1570 next_to_use = tx_ring->next_to_use; 1571 1572 return (u16)(next_to_clean > next_to_use) ? 1573 (next_to_clean - next_to_use - 1) : 1574 (tx_ring->count + next_to_clean - next_to_use - 1); 1575 } 1576 1577 /* 1578 * get next usable tpd 1579 * Note: should call atl1e_tdp_avail to make sure 1580 * there is enough tpd to use 1581 */ 1582 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter) 1583 { 1584 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1585 u16 next_to_use = 0; 1586 1587 next_to_use = tx_ring->next_to_use; 1588 if (++tx_ring->next_to_use == tx_ring->count) 1589 tx_ring->next_to_use = 0; 1590 1591 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc)); 1592 return &tx_ring->desc[next_to_use]; 1593 } 1594 1595 static struct atl1e_tx_buffer * 1596 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd) 1597 { 1598 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1599 1600 return &tx_ring->tx_buffer[tpd - tx_ring->desc]; 1601 } 1602 1603 /* Calculate the transmit packet descript needed*/ 1604 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb) 1605 { 1606 int i = 0; 1607 u16 tpd_req = 1; 1608 u16 fg_size = 0; 1609 u16 proto_hdr_len = 0; 1610 1611 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1612 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]); 1613 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT); 1614 } 1615 1616 if (skb_is_gso(skb)) { 1617 if (skb->protocol == htons(ETH_P_IP) || 1618 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) { 1619 proto_hdr_len = skb_transport_offset(skb) + 1620 tcp_hdrlen(skb); 1621 if (proto_hdr_len < skb_headlen(skb)) { 1622 tpd_req += ((skb_headlen(skb) - proto_hdr_len + 1623 MAX_TX_BUF_LEN - 1) >> 1624 MAX_TX_BUF_SHIFT); 1625 } 1626 } 1627 1628 } 1629 return tpd_req; 1630 } 1631 1632 static int atl1e_tso_csum(struct atl1e_adapter *adapter, 1633 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1634 { 1635 unsigned short offload_type; 1636 u8 hdr_len; 1637 u32 real_len; 1638 1639 if (skb_is_gso(skb)) { 1640 int err; 1641 1642 err = skb_cow_head(skb, 0); 1643 if (err < 0) 1644 return err; 1645 1646 offload_type = skb_shinfo(skb)->gso_type; 1647 1648 if (offload_type & SKB_GSO_TCPV4) { 1649 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1650 + ntohs(ip_hdr(skb)->tot_len)); 1651 1652 if (real_len < skb->len) 1653 pskb_trim(skb, real_len); 1654 1655 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1656 if (unlikely(skb->len == hdr_len)) { 1657 /* only xsum need */ 1658 netdev_warn(adapter->netdev, 1659 "IPV4 tso with zero data??\n"); 1660 goto check_sum; 1661 } else { 1662 ip_hdr(skb)->check = 0; 1663 ip_hdr(skb)->tot_len = 0; 1664 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1665 ip_hdr(skb)->saddr, 1666 ip_hdr(skb)->daddr, 1667 0, IPPROTO_TCP, 0); 1668 tpd->word3 |= (ip_hdr(skb)->ihl & 1669 TDP_V4_IPHL_MASK) << 1670 TPD_V4_IPHL_SHIFT; 1671 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) & 1672 TPD_TCPHDRLEN_MASK) << 1673 TPD_TCPHDRLEN_SHIFT; 1674 tpd->word3 |= ((skb_shinfo(skb)->gso_size) & 1675 TPD_MSS_MASK) << TPD_MSS_SHIFT; 1676 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT; 1677 } 1678 return 0; 1679 } 1680 } 1681 1682 check_sum: 1683 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1684 u8 css, cso; 1685 1686 cso = skb_checksum_start_offset(skb); 1687 if (unlikely(cso & 0x1)) { 1688 netdev_err(adapter->netdev, 1689 "payload offset should not ant event number\n"); 1690 return -1; 1691 } else { 1692 css = cso + skb->csum_offset; 1693 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) << 1694 TPD_PLOADOFFSET_SHIFT; 1695 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) << 1696 TPD_CCSUMOFFSET_SHIFT; 1697 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT; 1698 } 1699 } 1700 1701 return 0; 1702 } 1703 1704 static int atl1e_tx_map(struct atl1e_adapter *adapter, 1705 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1706 { 1707 struct atl1e_tpd_desc *use_tpd = NULL; 1708 struct atl1e_tx_buffer *tx_buffer = NULL; 1709 u16 buf_len = skb_headlen(skb); 1710 u16 map_len = 0; 1711 u16 mapped_len = 0; 1712 u16 hdr_len = 0; 1713 u16 nr_frags; 1714 u16 f; 1715 int segment; 1716 int ring_start = adapter->tx_ring.next_to_use; 1717 int ring_end; 1718 1719 nr_frags = skb_shinfo(skb)->nr_frags; 1720 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK; 1721 if (segment) { 1722 /* TSO */ 1723 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1724 use_tpd = tpd; 1725 1726 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1727 tx_buffer->length = map_len; 1728 tx_buffer->dma = pci_map_single(adapter->pdev, 1729 skb->data, hdr_len, PCI_DMA_TODEVICE); 1730 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) 1731 return -ENOSPC; 1732 1733 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1734 mapped_len += map_len; 1735 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1736 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1737 ((cpu_to_le32(tx_buffer->length) & 1738 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1739 } 1740 1741 while (mapped_len < buf_len) { 1742 /* mapped_len == 0, means we should use the first tpd, 1743 which is given by caller */ 1744 if (mapped_len == 0) { 1745 use_tpd = tpd; 1746 } else { 1747 use_tpd = atl1e_get_tpd(adapter); 1748 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1749 } 1750 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1751 tx_buffer->skb = NULL; 1752 1753 tx_buffer->length = map_len = 1754 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ? 1755 MAX_TX_BUF_LEN : (buf_len - mapped_len); 1756 tx_buffer->dma = 1757 pci_map_single(adapter->pdev, skb->data + mapped_len, 1758 map_len, PCI_DMA_TODEVICE); 1759 1760 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1761 /* We need to unwind the mappings we've done */ 1762 ring_end = adapter->tx_ring.next_to_use; 1763 adapter->tx_ring.next_to_use = ring_start; 1764 while (adapter->tx_ring.next_to_use != ring_end) { 1765 tpd = atl1e_get_tpd(adapter); 1766 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1767 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1768 tx_buffer->length, PCI_DMA_TODEVICE); 1769 } 1770 /* Reset the tx rings next pointer */ 1771 adapter->tx_ring.next_to_use = ring_start; 1772 return -ENOSPC; 1773 } 1774 1775 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1776 mapped_len += map_len; 1777 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1778 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1779 ((cpu_to_le32(tx_buffer->length) & 1780 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1781 } 1782 1783 for (f = 0; f < nr_frags; f++) { 1784 const struct skb_frag_struct *frag; 1785 u16 i; 1786 u16 seg_num; 1787 1788 frag = &skb_shinfo(skb)->frags[f]; 1789 buf_len = skb_frag_size(frag); 1790 1791 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN; 1792 for (i = 0; i < seg_num; i++) { 1793 use_tpd = atl1e_get_tpd(adapter); 1794 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1795 1796 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1797 BUG_ON(tx_buffer->skb); 1798 1799 tx_buffer->skb = NULL; 1800 tx_buffer->length = 1801 (buf_len > MAX_TX_BUF_LEN) ? 1802 MAX_TX_BUF_LEN : buf_len; 1803 buf_len -= tx_buffer->length; 1804 1805 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev, 1806 frag, 1807 (i * MAX_TX_BUF_LEN), 1808 tx_buffer->length, 1809 DMA_TO_DEVICE); 1810 1811 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1812 /* We need to unwind the mappings we've done */ 1813 ring_end = adapter->tx_ring.next_to_use; 1814 adapter->tx_ring.next_to_use = ring_start; 1815 while (adapter->tx_ring.next_to_use != ring_end) { 1816 tpd = atl1e_get_tpd(adapter); 1817 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1818 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma, 1819 tx_buffer->length, DMA_TO_DEVICE); 1820 } 1821 1822 /* Reset the ring next to use pointer */ 1823 adapter->tx_ring.next_to_use = ring_start; 1824 return -ENOSPC; 1825 } 1826 1827 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE); 1828 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1829 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1830 ((cpu_to_le32(tx_buffer->length) & 1831 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1832 } 1833 } 1834 1835 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK) 1836 /* note this one is a tcp header */ 1837 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT; 1838 /* The last tpd */ 1839 1840 use_tpd->word3 |= 1 << TPD_EOP_SHIFT; 1841 /* The last buffer info contain the skb address, 1842 so it will be free after unmap */ 1843 tx_buffer->skb = skb; 1844 return 0; 1845 } 1846 1847 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count, 1848 struct atl1e_tpd_desc *tpd) 1849 { 1850 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1851 /* Force memory writes to complete before letting h/w 1852 * know there are new descriptors to fetch. (Only 1853 * applicable for weak-ordered memory model archs, 1854 * such as IA-64). */ 1855 wmb(); 1856 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use); 1857 } 1858 1859 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb, 1860 struct net_device *netdev) 1861 { 1862 struct atl1e_adapter *adapter = netdev_priv(netdev); 1863 u16 tpd_req = 1; 1864 struct atl1e_tpd_desc *tpd; 1865 1866 if (test_bit(__AT_DOWN, &adapter->flags)) { 1867 dev_kfree_skb_any(skb); 1868 return NETDEV_TX_OK; 1869 } 1870 1871 if (unlikely(skb->len <= 0)) { 1872 dev_kfree_skb_any(skb); 1873 return NETDEV_TX_OK; 1874 } 1875 tpd_req = atl1e_cal_tdp_req(skb); 1876 1877 if (atl1e_tpd_avail(adapter) < tpd_req) { 1878 /* no enough descriptor, just stop queue */ 1879 netif_stop_queue(netdev); 1880 return NETDEV_TX_BUSY; 1881 } 1882 1883 tpd = atl1e_get_tpd(adapter); 1884 1885 if (skb_vlan_tag_present(skb)) { 1886 u16 vlan_tag = skb_vlan_tag_get(skb); 1887 u16 atl1e_vlan_tag; 1888 1889 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT; 1890 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag); 1891 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) << 1892 TPD_VLAN_SHIFT; 1893 } 1894 1895 if (skb->protocol == htons(ETH_P_8021Q)) 1896 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT; 1897 1898 if (skb_network_offset(skb) != ETH_HLEN) 1899 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */ 1900 1901 /* do TSO and check sum */ 1902 if (atl1e_tso_csum(adapter, skb, tpd) != 0) { 1903 dev_kfree_skb_any(skb); 1904 return NETDEV_TX_OK; 1905 } 1906 1907 if (atl1e_tx_map(adapter, skb, tpd)) { 1908 dev_kfree_skb_any(skb); 1909 goto out; 1910 } 1911 1912 atl1e_tx_queue(adapter, tpd_req, tpd); 1913 out: 1914 return NETDEV_TX_OK; 1915 } 1916 1917 static void atl1e_free_irq(struct atl1e_adapter *adapter) 1918 { 1919 struct net_device *netdev = adapter->netdev; 1920 1921 free_irq(adapter->pdev->irq, netdev); 1922 } 1923 1924 static int atl1e_request_irq(struct atl1e_adapter *adapter) 1925 { 1926 struct pci_dev *pdev = adapter->pdev; 1927 struct net_device *netdev = adapter->netdev; 1928 int err = 0; 1929 1930 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name, 1931 netdev); 1932 if (err) { 1933 netdev_dbg(adapter->netdev, 1934 "Unable to allocate interrupt Error: %d\n", err); 1935 return err; 1936 } 1937 netdev_dbg(netdev, "atl1e_request_irq OK\n"); 1938 return err; 1939 } 1940 1941 int atl1e_up(struct atl1e_adapter *adapter) 1942 { 1943 struct net_device *netdev = adapter->netdev; 1944 int err = 0; 1945 u32 val; 1946 1947 /* hardware has been reset, we need to reload some things */ 1948 err = atl1e_init_hw(&adapter->hw); 1949 if (err) { 1950 err = -EIO; 1951 return err; 1952 } 1953 atl1e_init_ring_ptrs(adapter); 1954 atl1e_set_multi(netdev); 1955 atl1e_restore_vlan(adapter); 1956 1957 if (atl1e_configure(adapter)) { 1958 err = -EIO; 1959 goto err_up; 1960 } 1961 1962 clear_bit(__AT_DOWN, &adapter->flags); 1963 napi_enable(&adapter->napi); 1964 atl1e_irq_enable(adapter); 1965 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL); 1966 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, 1967 val | MASTER_CTRL_MANUAL_INT); 1968 1969 err_up: 1970 return err; 1971 } 1972 1973 void atl1e_down(struct atl1e_adapter *adapter) 1974 { 1975 struct net_device *netdev = adapter->netdev; 1976 1977 /* signal that we're down so the interrupt handler does not 1978 * reschedule our watchdog timer */ 1979 set_bit(__AT_DOWN, &adapter->flags); 1980 1981 netif_stop_queue(netdev); 1982 1983 /* reset MAC to disable all RX/TX */ 1984 atl1e_reset_hw(&adapter->hw); 1985 msleep(1); 1986 1987 napi_disable(&adapter->napi); 1988 atl1e_del_timer(adapter); 1989 atl1e_irq_disable(adapter); 1990 1991 netif_carrier_off(netdev); 1992 adapter->link_speed = SPEED_0; 1993 adapter->link_duplex = -1; 1994 atl1e_clean_tx_ring(adapter); 1995 atl1e_clean_rx_ring(adapter); 1996 } 1997 1998 /** 1999 * atl1e_open - Called when a network interface is made active 2000 * @netdev: network interface device structure 2001 * 2002 * Returns 0 on success, negative value on failure 2003 * 2004 * The open entry point is called when a network interface is made 2005 * active by the system (IFF_UP). At this point all resources needed 2006 * for transmit and receive operations are allocated, the interrupt 2007 * handler is registered with the OS, the watchdog timer is started, 2008 * and the stack is notified that the interface is ready. 2009 */ 2010 static int atl1e_open(struct net_device *netdev) 2011 { 2012 struct atl1e_adapter *adapter = netdev_priv(netdev); 2013 int err; 2014 2015 /* disallow open during test */ 2016 if (test_bit(__AT_TESTING, &adapter->flags)) 2017 return -EBUSY; 2018 2019 /* allocate rx/tx dma buffer & descriptors */ 2020 atl1e_init_ring_resources(adapter); 2021 err = atl1e_setup_ring_resources(adapter); 2022 if (unlikely(err)) 2023 return err; 2024 2025 err = atl1e_request_irq(adapter); 2026 if (unlikely(err)) 2027 goto err_req_irq; 2028 2029 err = atl1e_up(adapter); 2030 if (unlikely(err)) 2031 goto err_up; 2032 2033 return 0; 2034 2035 err_up: 2036 atl1e_free_irq(adapter); 2037 err_req_irq: 2038 atl1e_free_ring_resources(adapter); 2039 atl1e_reset_hw(&adapter->hw); 2040 2041 return err; 2042 } 2043 2044 /** 2045 * atl1e_close - Disables a network interface 2046 * @netdev: network interface device structure 2047 * 2048 * Returns 0, this is not allowed to fail 2049 * 2050 * The close entry point is called when an interface is de-activated 2051 * by the OS. The hardware is still under the drivers control, but 2052 * needs to be disabled. A global MAC reset is issued to stop the 2053 * hardware, and all transmit and receive resources are freed. 2054 */ 2055 static int atl1e_close(struct net_device *netdev) 2056 { 2057 struct atl1e_adapter *adapter = netdev_priv(netdev); 2058 2059 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2060 atl1e_down(adapter); 2061 atl1e_free_irq(adapter); 2062 atl1e_free_ring_resources(adapter); 2063 2064 return 0; 2065 } 2066 2067 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state) 2068 { 2069 struct net_device *netdev = pci_get_drvdata(pdev); 2070 struct atl1e_adapter *adapter = netdev_priv(netdev); 2071 struct atl1e_hw *hw = &adapter->hw; 2072 u32 ctrl = 0; 2073 u32 mac_ctrl_data = 0; 2074 u32 wol_ctrl_data = 0; 2075 u16 mii_advertise_data = 0; 2076 u16 mii_bmsr_data = 0; 2077 u16 mii_intr_status_data = 0; 2078 u32 wufc = adapter->wol; 2079 u32 i; 2080 #ifdef CONFIG_PM 2081 int retval = 0; 2082 #endif 2083 2084 if (netif_running(netdev)) { 2085 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2086 atl1e_down(adapter); 2087 } 2088 netif_device_detach(netdev); 2089 2090 #ifdef CONFIG_PM 2091 retval = pci_save_state(pdev); 2092 if (retval) 2093 return retval; 2094 #endif 2095 2096 if (wufc) { 2097 /* get link status */ 2098 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2099 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2100 2101 mii_advertise_data = ADVERTISE_10HALF; 2102 2103 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) || 2104 (atl1e_write_phy_reg(hw, 2105 MII_ADVERTISE, mii_advertise_data) != 0) || 2106 (atl1e_phy_commit(hw)) != 0) { 2107 netdev_dbg(adapter->netdev, "set phy register failed\n"); 2108 goto wol_dis; 2109 } 2110 2111 hw->phy_configured = false; /* re-init PHY when resume */ 2112 2113 /* turn on magic packet wol */ 2114 if (wufc & AT_WUFC_MAG) 2115 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2116 2117 if (wufc & AT_WUFC_LNKC) { 2118 /* if orignal link status is link, just wait for retrive link */ 2119 if (mii_bmsr_data & BMSR_LSTATUS) { 2120 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { 2121 msleep(100); 2122 atl1e_read_phy_reg(hw, MII_BMSR, 2123 &mii_bmsr_data); 2124 if (mii_bmsr_data & BMSR_LSTATUS) 2125 break; 2126 } 2127 2128 if ((mii_bmsr_data & BMSR_LSTATUS) == 0) 2129 netdev_dbg(adapter->netdev, 2130 "Link may change when suspend\n"); 2131 } 2132 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2133 /* only link up can wake up */ 2134 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) { 2135 netdev_dbg(adapter->netdev, 2136 "read write phy register failed\n"); 2137 goto wol_dis; 2138 } 2139 } 2140 /* clear phy interrupt */ 2141 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data); 2142 /* Config MAC Ctrl register */ 2143 mac_ctrl_data = MAC_CTRL_RX_EN; 2144 /* set to 10/100M halt duplex */ 2145 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT; 2146 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2147 MAC_CTRL_PRMLEN_MASK) << 2148 MAC_CTRL_PRMLEN_SHIFT); 2149 2150 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data); 2151 2152 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2153 if (wufc & AT_WUFC_MAG) 2154 mac_ctrl_data |= MAC_CTRL_BC_EN; 2155 2156 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n", 2157 mac_ctrl_data); 2158 2159 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2160 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2161 /* pcie patch */ 2162 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2163 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2164 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2165 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); 2166 goto suspend_exit; 2167 } 2168 wol_dis: 2169 2170 /* WOL disabled */ 2171 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2172 2173 /* pcie patch */ 2174 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2175 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2176 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2177 2178 atl1e_force_ps(hw); 2179 hw->phy_configured = false; /* re-init PHY when resume */ 2180 2181 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); 2182 2183 suspend_exit: 2184 2185 if (netif_running(netdev)) 2186 atl1e_free_irq(adapter); 2187 2188 pci_disable_device(pdev); 2189 2190 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 2191 2192 return 0; 2193 } 2194 2195 #ifdef CONFIG_PM 2196 static int atl1e_resume(struct pci_dev *pdev) 2197 { 2198 struct net_device *netdev = pci_get_drvdata(pdev); 2199 struct atl1e_adapter *adapter = netdev_priv(netdev); 2200 u32 err; 2201 2202 pci_set_power_state(pdev, PCI_D0); 2203 pci_restore_state(pdev); 2204 2205 err = pci_enable_device(pdev); 2206 if (err) { 2207 netdev_err(adapter->netdev, 2208 "Cannot enable PCI device from suspend\n"); 2209 return err; 2210 } 2211 2212 pci_set_master(pdev); 2213 2214 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */ 2215 2216 pci_enable_wake(pdev, PCI_D3hot, 0); 2217 pci_enable_wake(pdev, PCI_D3cold, 0); 2218 2219 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2220 2221 if (netif_running(netdev)) { 2222 err = atl1e_request_irq(adapter); 2223 if (err) 2224 return err; 2225 } 2226 2227 atl1e_reset_hw(&adapter->hw); 2228 2229 if (netif_running(netdev)) 2230 atl1e_up(adapter); 2231 2232 netif_device_attach(netdev); 2233 2234 return 0; 2235 } 2236 #endif 2237 2238 static void atl1e_shutdown(struct pci_dev *pdev) 2239 { 2240 atl1e_suspend(pdev, PMSG_SUSPEND); 2241 } 2242 2243 static const struct net_device_ops atl1e_netdev_ops = { 2244 .ndo_open = atl1e_open, 2245 .ndo_stop = atl1e_close, 2246 .ndo_start_xmit = atl1e_xmit_frame, 2247 .ndo_get_stats = atl1e_get_stats, 2248 .ndo_set_rx_mode = atl1e_set_multi, 2249 .ndo_validate_addr = eth_validate_addr, 2250 .ndo_set_mac_address = atl1e_set_mac_addr, 2251 .ndo_fix_features = atl1e_fix_features, 2252 .ndo_set_features = atl1e_set_features, 2253 .ndo_change_mtu = atl1e_change_mtu, 2254 .ndo_do_ioctl = atl1e_ioctl, 2255 .ndo_tx_timeout = atl1e_tx_timeout, 2256 #ifdef CONFIG_NET_POLL_CONTROLLER 2257 .ndo_poll_controller = atl1e_netpoll, 2258 #endif 2259 2260 }; 2261 2262 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2263 { 2264 SET_NETDEV_DEV(netdev, &pdev->dev); 2265 pci_set_drvdata(pdev, netdev); 2266 2267 netdev->netdev_ops = &atl1e_netdev_ops; 2268 2269 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2270 /* MTU range: 42 - 8170 */ 2271 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2272 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 2273 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 2274 atl1e_set_ethtool_ops(netdev); 2275 2276 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO | 2277 NETIF_F_HW_VLAN_CTAG_RX; 2278 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX; 2279 /* not enabled by default */ 2280 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS; 2281 return 0; 2282 } 2283 2284 /** 2285 * atl1e_probe - Device Initialization Routine 2286 * @pdev: PCI device information struct 2287 * @ent: entry in atl1e_pci_tbl 2288 * 2289 * Returns 0 on success, negative on failure 2290 * 2291 * atl1e_probe initializes an adapter identified by a pci_dev structure. 2292 * The OS initialization, configuring of the adapter private structure, 2293 * and a hardware reset occur. 2294 */ 2295 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2296 { 2297 struct net_device *netdev; 2298 struct atl1e_adapter *adapter = NULL; 2299 static int cards_found; 2300 2301 int err = 0; 2302 2303 err = pci_enable_device(pdev); 2304 if (err) { 2305 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2306 return err; 2307 } 2308 2309 /* 2310 * The atl1e chip can DMA to 64-bit addresses, but it uses a single 2311 * shared register for the high 32 bits, so only a single, aligned, 2312 * 4 GB physical address range can be used at a time. 2313 * 2314 * Supporting 64-bit DMA on this hardware is more trouble than it's 2315 * worth. It is far easier to limit to 32-bit DMA than update 2316 * various kernel subsystems to support the mechanics required by a 2317 * fixed-high-32-bit system. 2318 */ 2319 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2320 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2321 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2322 goto err_dma; 2323 } 2324 2325 err = pci_request_regions(pdev, atl1e_driver_name); 2326 if (err) { 2327 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2328 goto err_pci_reg; 2329 } 2330 2331 pci_set_master(pdev); 2332 2333 netdev = alloc_etherdev(sizeof(struct atl1e_adapter)); 2334 if (netdev == NULL) { 2335 err = -ENOMEM; 2336 goto err_alloc_etherdev; 2337 } 2338 2339 err = atl1e_init_netdev(netdev, pdev); 2340 if (err) { 2341 netdev_err(netdev, "init netdevice failed\n"); 2342 goto err_init_netdev; 2343 } 2344 adapter = netdev_priv(netdev); 2345 adapter->bd_number = cards_found; 2346 adapter->netdev = netdev; 2347 adapter->pdev = pdev; 2348 adapter->hw.adapter = adapter; 2349 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0); 2350 if (!adapter->hw.hw_addr) { 2351 err = -EIO; 2352 netdev_err(netdev, "cannot map device registers\n"); 2353 goto err_ioremap; 2354 } 2355 2356 /* init mii data */ 2357 adapter->mii.dev = netdev; 2358 adapter->mii.mdio_read = atl1e_mdio_read; 2359 adapter->mii.mdio_write = atl1e_mdio_write; 2360 adapter->mii.phy_id_mask = 0x1f; 2361 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2362 2363 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64); 2364 2365 timer_setup(&adapter->phy_config_timer, atl1e_phy_config, 0); 2366 2367 /* get user settings */ 2368 atl1e_check_options(adapter); 2369 /* 2370 * Mark all PCI regions associated with PCI device 2371 * pdev as being reserved by owner atl1e_driver_name 2372 * Enables bus-mastering on the device and calls 2373 * pcibios_set_master to do the needed arch specific settings 2374 */ 2375 atl1e_setup_pcicmd(pdev); 2376 /* setup the private structure */ 2377 err = atl1e_sw_init(adapter); 2378 if (err) { 2379 netdev_err(netdev, "net device private data init failed\n"); 2380 goto err_sw_init; 2381 } 2382 2383 /* Init GPHY as early as possible due to power saving issue */ 2384 atl1e_phy_init(&adapter->hw); 2385 /* reset the controller to 2386 * put the device in a known good starting state */ 2387 err = atl1e_reset_hw(&adapter->hw); 2388 if (err) { 2389 err = -EIO; 2390 goto err_reset; 2391 } 2392 2393 if (atl1e_read_mac_addr(&adapter->hw) != 0) { 2394 err = -EIO; 2395 netdev_err(netdev, "get mac address failed\n"); 2396 goto err_eeprom; 2397 } 2398 2399 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2400 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr); 2401 2402 INIT_WORK(&adapter->reset_task, atl1e_reset_task); 2403 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task); 2404 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE); 2405 err = register_netdev(netdev); 2406 if (err) { 2407 netdev_err(netdev, "register netdevice failed\n"); 2408 goto err_register; 2409 } 2410 2411 /* assume we have no link for now */ 2412 netif_stop_queue(netdev); 2413 netif_carrier_off(netdev); 2414 2415 cards_found++; 2416 2417 return 0; 2418 2419 err_reset: 2420 err_register: 2421 err_sw_init: 2422 err_eeprom: 2423 pci_iounmap(pdev, adapter->hw.hw_addr); 2424 err_init_netdev: 2425 err_ioremap: 2426 free_netdev(netdev); 2427 err_alloc_etherdev: 2428 pci_release_regions(pdev); 2429 err_pci_reg: 2430 err_dma: 2431 pci_disable_device(pdev); 2432 return err; 2433 } 2434 2435 /** 2436 * atl1e_remove - Device Removal Routine 2437 * @pdev: PCI device information struct 2438 * 2439 * atl1e_remove is called by the PCI subsystem to alert the driver 2440 * that it should release a PCI device. The could be caused by a 2441 * Hot-Plug event, or because the driver is going to be removed from 2442 * memory. 2443 */ 2444 static void atl1e_remove(struct pci_dev *pdev) 2445 { 2446 struct net_device *netdev = pci_get_drvdata(pdev); 2447 struct atl1e_adapter *adapter = netdev_priv(netdev); 2448 2449 /* 2450 * flush_scheduled work may reschedule our watchdog task, so 2451 * explicitly disable watchdog tasks from being rescheduled 2452 */ 2453 set_bit(__AT_DOWN, &adapter->flags); 2454 2455 atl1e_del_timer(adapter); 2456 atl1e_cancel_work(adapter); 2457 2458 unregister_netdev(netdev); 2459 atl1e_free_ring_resources(adapter); 2460 atl1e_force_ps(&adapter->hw); 2461 pci_iounmap(pdev, adapter->hw.hw_addr); 2462 pci_release_regions(pdev); 2463 free_netdev(netdev); 2464 pci_disable_device(pdev); 2465 } 2466 2467 /** 2468 * atl1e_io_error_detected - called when PCI error is detected 2469 * @pdev: Pointer to PCI device 2470 * @state: The current pci connection state 2471 * 2472 * This function is called after a PCI bus error affecting 2473 * this device has been detected. 2474 */ 2475 static pci_ers_result_t 2476 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2477 { 2478 struct net_device *netdev = pci_get_drvdata(pdev); 2479 struct atl1e_adapter *adapter = netdev_priv(netdev); 2480 2481 netif_device_detach(netdev); 2482 2483 if (state == pci_channel_io_perm_failure) 2484 return PCI_ERS_RESULT_DISCONNECT; 2485 2486 if (netif_running(netdev)) 2487 atl1e_down(adapter); 2488 2489 pci_disable_device(pdev); 2490 2491 /* Request a slot slot reset. */ 2492 return PCI_ERS_RESULT_NEED_RESET; 2493 } 2494 2495 /** 2496 * atl1e_io_slot_reset - called after the pci bus has been reset. 2497 * @pdev: Pointer to PCI device 2498 * 2499 * Restart the card from scratch, as if from a cold-boot. Implementation 2500 * resembles the first-half of the e1000_resume routine. 2501 */ 2502 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev) 2503 { 2504 struct net_device *netdev = pci_get_drvdata(pdev); 2505 struct atl1e_adapter *adapter = netdev_priv(netdev); 2506 2507 if (pci_enable_device(pdev)) { 2508 netdev_err(adapter->netdev, 2509 "Cannot re-enable PCI device after reset\n"); 2510 return PCI_ERS_RESULT_DISCONNECT; 2511 } 2512 pci_set_master(pdev); 2513 2514 pci_enable_wake(pdev, PCI_D3hot, 0); 2515 pci_enable_wake(pdev, PCI_D3cold, 0); 2516 2517 atl1e_reset_hw(&adapter->hw); 2518 2519 return PCI_ERS_RESULT_RECOVERED; 2520 } 2521 2522 /** 2523 * atl1e_io_resume - called when traffic can start flowing again. 2524 * @pdev: Pointer to PCI device 2525 * 2526 * This callback is called when the error recovery driver tells us that 2527 * its OK to resume normal operation. Implementation resembles the 2528 * second-half of the atl1e_resume routine. 2529 */ 2530 static void atl1e_io_resume(struct pci_dev *pdev) 2531 { 2532 struct net_device *netdev = pci_get_drvdata(pdev); 2533 struct atl1e_adapter *adapter = netdev_priv(netdev); 2534 2535 if (netif_running(netdev)) { 2536 if (atl1e_up(adapter)) { 2537 netdev_err(adapter->netdev, 2538 "can't bring device back up after reset\n"); 2539 return; 2540 } 2541 } 2542 2543 netif_device_attach(netdev); 2544 } 2545 2546 static const struct pci_error_handlers atl1e_err_handler = { 2547 .error_detected = atl1e_io_error_detected, 2548 .slot_reset = atl1e_io_slot_reset, 2549 .resume = atl1e_io_resume, 2550 }; 2551 2552 static struct pci_driver atl1e_driver = { 2553 .name = atl1e_driver_name, 2554 .id_table = atl1e_pci_tbl, 2555 .probe = atl1e_probe, 2556 .remove = atl1e_remove, 2557 /* Power Management Hooks */ 2558 #ifdef CONFIG_PM 2559 .suspend = atl1e_suspend, 2560 .resume = atl1e_resume, 2561 #endif 2562 .shutdown = atl1e_shutdown, 2563 .err_handler = &atl1e_err_handler 2564 }; 2565 2566 module_pci_driver(atl1e_driver); 2567