1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright(c) 2007 Atheros Corporation. All rights reserved. 4 * 5 * Derived from Intel e1000 driver 6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 7 */ 8 9 #include "atl1e.h" 10 11 char atl1e_driver_name[] = "ATL1E"; 12 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026 13 /* 14 * atl1e_pci_tbl - PCI Device ID Table 15 * 16 * Wildcard entries (PCI_ANY_ID) should come last 17 * Last entry must be all 0s 18 * 19 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 20 * Class, Class Mask, private data (not used) } 21 */ 22 static const struct pci_device_id atl1e_pci_tbl[] = { 23 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)}, 24 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)}, 25 /* required last entry */ 26 { 0 } 27 }; 28 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl); 29 30 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>"); 31 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); 32 MODULE_LICENSE("GPL"); 33 34 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter); 35 36 static const u16 37 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 38 { 39 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD}, 40 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD}, 41 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD}, 42 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD} 43 }; 44 45 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] = 46 { 47 REG_RXF0_BASE_ADDR_HI, 48 REG_RXF1_BASE_ADDR_HI, 49 REG_RXF2_BASE_ADDR_HI, 50 REG_RXF3_BASE_ADDR_HI 51 }; 52 53 static const u16 54 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 55 { 56 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO}, 57 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO}, 58 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO}, 59 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO} 60 }; 61 62 static const u16 63 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 64 { 65 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO}, 66 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO}, 67 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO}, 68 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO} 69 }; 70 71 static const u16 atl1e_pay_load_size[] = { 72 128, 256, 512, 1024, 2048, 4096, 73 }; 74 75 /** 76 * atl1e_irq_enable - Enable default interrupt generation settings 77 * @adapter: board private structure 78 */ 79 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter) 80 { 81 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 82 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 83 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK); 84 AT_WRITE_FLUSH(&adapter->hw); 85 } 86 } 87 88 /** 89 * atl1e_irq_disable - Mask off interrupt generation on the NIC 90 * @adapter: board private structure 91 */ 92 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter) 93 { 94 atomic_inc(&adapter->irq_sem); 95 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 96 AT_WRITE_FLUSH(&adapter->hw); 97 synchronize_irq(adapter->pdev->irq); 98 } 99 100 /** 101 * atl1e_irq_reset - reset interrupt confiure on the NIC 102 * @adapter: board private structure 103 */ 104 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter) 105 { 106 atomic_set(&adapter->irq_sem, 0); 107 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 108 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 109 AT_WRITE_FLUSH(&adapter->hw); 110 } 111 112 /** 113 * atl1e_phy_config - Timer Call-back 114 * @data: pointer to netdev cast into an unsigned long 115 */ 116 static void atl1e_phy_config(struct timer_list *t) 117 { 118 struct atl1e_adapter *adapter = from_timer(adapter, t, 119 phy_config_timer); 120 struct atl1e_hw *hw = &adapter->hw; 121 unsigned long flags; 122 123 spin_lock_irqsave(&adapter->mdio_lock, flags); 124 atl1e_restart_autoneg(hw); 125 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 126 } 127 128 void atl1e_reinit_locked(struct atl1e_adapter *adapter) 129 { 130 131 WARN_ON(in_interrupt()); 132 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 133 msleep(1); 134 atl1e_down(adapter); 135 atl1e_up(adapter); 136 clear_bit(__AT_RESETTING, &adapter->flags); 137 } 138 139 static void atl1e_reset_task(struct work_struct *work) 140 { 141 struct atl1e_adapter *adapter; 142 adapter = container_of(work, struct atl1e_adapter, reset_task); 143 144 atl1e_reinit_locked(adapter); 145 } 146 147 static int atl1e_check_link(struct atl1e_adapter *adapter) 148 { 149 struct atl1e_hw *hw = &adapter->hw; 150 struct net_device *netdev = adapter->netdev; 151 int err = 0; 152 u16 speed, duplex, phy_data; 153 154 /* MII_BMSR must read twice */ 155 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 156 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 157 if ((phy_data & BMSR_LSTATUS) == 0) { 158 /* link down */ 159 if (netif_carrier_ok(netdev)) { /* old link state: Up */ 160 u32 value; 161 /* disable rx */ 162 value = AT_READ_REG(hw, REG_MAC_CTRL); 163 value &= ~MAC_CTRL_RX_EN; 164 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 165 adapter->link_speed = SPEED_0; 166 netif_carrier_off(netdev); 167 netif_stop_queue(netdev); 168 } 169 } else { 170 /* Link Up */ 171 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex); 172 if (unlikely(err)) 173 return err; 174 175 /* link result is our setting */ 176 if (adapter->link_speed != speed || 177 adapter->link_duplex != duplex) { 178 adapter->link_speed = speed; 179 adapter->link_duplex = duplex; 180 atl1e_setup_mac_ctrl(adapter); 181 netdev_info(netdev, 182 "NIC Link is Up <%d Mbps %s Duplex>\n", 183 adapter->link_speed, 184 adapter->link_duplex == FULL_DUPLEX ? 185 "Full" : "Half"); 186 } 187 188 if (!netif_carrier_ok(netdev)) { 189 /* Link down -> Up */ 190 netif_carrier_on(netdev); 191 netif_wake_queue(netdev); 192 } 193 } 194 return 0; 195 } 196 197 /** 198 * atl1e_link_chg_task - deal with link change event Out of interrupt context 199 * @netdev: network interface device structure 200 */ 201 static void atl1e_link_chg_task(struct work_struct *work) 202 { 203 struct atl1e_adapter *adapter; 204 unsigned long flags; 205 206 adapter = container_of(work, struct atl1e_adapter, link_chg_task); 207 spin_lock_irqsave(&adapter->mdio_lock, flags); 208 atl1e_check_link(adapter); 209 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 210 } 211 212 static void atl1e_link_chg_event(struct atl1e_adapter *adapter) 213 { 214 struct net_device *netdev = adapter->netdev; 215 u16 phy_data = 0; 216 u16 link_up = 0; 217 218 spin_lock(&adapter->mdio_lock); 219 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 220 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 221 spin_unlock(&adapter->mdio_lock); 222 link_up = phy_data & BMSR_LSTATUS; 223 /* notify upper layer link down ASAP */ 224 if (!link_up) { 225 if (netif_carrier_ok(netdev)) { 226 /* old link state: Up */ 227 netdev_info(netdev, "NIC Link is Down\n"); 228 adapter->link_speed = SPEED_0; 229 netif_stop_queue(netdev); 230 } 231 } 232 schedule_work(&adapter->link_chg_task); 233 } 234 235 static void atl1e_del_timer(struct atl1e_adapter *adapter) 236 { 237 del_timer_sync(&adapter->phy_config_timer); 238 } 239 240 static void atl1e_cancel_work(struct atl1e_adapter *adapter) 241 { 242 cancel_work_sync(&adapter->reset_task); 243 cancel_work_sync(&adapter->link_chg_task); 244 } 245 246 /** 247 * atl1e_tx_timeout - Respond to a Tx Hang 248 * @netdev: network interface device structure 249 */ 250 static void atl1e_tx_timeout(struct net_device *netdev, unsigned int txqueue) 251 { 252 struct atl1e_adapter *adapter = netdev_priv(netdev); 253 254 /* Do the reset outside of interrupt context */ 255 schedule_work(&adapter->reset_task); 256 } 257 258 /** 259 * atl1e_set_multi - Multicast and Promiscuous mode set 260 * @netdev: network interface device structure 261 * 262 * The set_multi entry point is called whenever the multicast address 263 * list or the network interface flags are updated. This routine is 264 * responsible for configuring the hardware for proper multicast, 265 * promiscuous mode, and all-multi behavior. 266 */ 267 static void atl1e_set_multi(struct net_device *netdev) 268 { 269 struct atl1e_adapter *adapter = netdev_priv(netdev); 270 struct atl1e_hw *hw = &adapter->hw; 271 struct netdev_hw_addr *ha; 272 u32 mac_ctrl_data = 0; 273 u32 hash_value; 274 275 /* Check for Promiscuous and All Multicast modes */ 276 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL); 277 278 if (netdev->flags & IFF_PROMISC) { 279 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 280 } else if (netdev->flags & IFF_ALLMULTI) { 281 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 282 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 283 } else { 284 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 285 } 286 287 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 288 289 /* clear the old settings from the multicast hash table */ 290 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 291 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 292 293 /* comoute mc addresses' hash value ,and put it into hash table */ 294 netdev_for_each_mc_addr(ha, netdev) { 295 hash_value = atl1e_hash_mc_addr(hw, ha->addr); 296 atl1e_hash_set(hw, hash_value); 297 } 298 } 299 300 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data) 301 { 302 303 if (features & NETIF_F_RXALL) { 304 /* enable RX of ALL frames */ 305 *mac_ctrl_data |= MAC_CTRL_DBG; 306 } else { 307 /* disable RX of ALL frames */ 308 *mac_ctrl_data &= ~MAC_CTRL_DBG; 309 } 310 } 311 312 static void atl1e_rx_mode(struct net_device *netdev, 313 netdev_features_t features) 314 { 315 struct atl1e_adapter *adapter = netdev_priv(netdev); 316 u32 mac_ctrl_data = 0; 317 318 netdev_dbg(adapter->netdev, "%s\n", __func__); 319 320 atl1e_irq_disable(adapter); 321 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 322 __atl1e_rx_mode(features, &mac_ctrl_data); 323 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 324 atl1e_irq_enable(adapter); 325 } 326 327 328 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 329 { 330 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 331 /* enable VLAN tag insert/strip */ 332 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 333 } else { 334 /* disable VLAN tag insert/strip */ 335 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 336 } 337 } 338 339 static void atl1e_vlan_mode(struct net_device *netdev, 340 netdev_features_t features) 341 { 342 struct atl1e_adapter *adapter = netdev_priv(netdev); 343 u32 mac_ctrl_data = 0; 344 345 netdev_dbg(adapter->netdev, "%s\n", __func__); 346 347 atl1e_irq_disable(adapter); 348 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 349 __atl1e_vlan_mode(features, &mac_ctrl_data); 350 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 351 atl1e_irq_enable(adapter); 352 } 353 354 static void atl1e_restore_vlan(struct atl1e_adapter *adapter) 355 { 356 netdev_dbg(adapter->netdev, "%s\n", __func__); 357 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features); 358 } 359 360 /** 361 * atl1e_set_mac - Change the Ethernet Address of the NIC 362 * @netdev: network interface device structure 363 * @p: pointer to an address structure 364 * 365 * Returns 0 on success, negative on failure 366 */ 367 static int atl1e_set_mac_addr(struct net_device *netdev, void *p) 368 { 369 struct atl1e_adapter *adapter = netdev_priv(netdev); 370 struct sockaddr *addr = p; 371 372 if (!is_valid_ether_addr(addr->sa_data)) 373 return -EADDRNOTAVAIL; 374 375 if (netif_running(netdev)) 376 return -EBUSY; 377 378 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 379 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 380 381 atl1e_hw_set_mac_addr(&adapter->hw); 382 383 return 0; 384 } 385 386 static netdev_features_t atl1e_fix_features(struct net_device *netdev, 387 netdev_features_t features) 388 { 389 /* 390 * Since there is no support for separate rx/tx vlan accel 391 * enable/disable make sure tx flag is always in same state as rx. 392 */ 393 if (features & NETIF_F_HW_VLAN_CTAG_RX) 394 features |= NETIF_F_HW_VLAN_CTAG_TX; 395 else 396 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 397 398 return features; 399 } 400 401 static int atl1e_set_features(struct net_device *netdev, 402 netdev_features_t features) 403 { 404 netdev_features_t changed = netdev->features ^ features; 405 406 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 407 atl1e_vlan_mode(netdev, features); 408 409 if (changed & NETIF_F_RXALL) 410 atl1e_rx_mode(netdev, features); 411 412 413 return 0; 414 } 415 416 /** 417 * atl1e_change_mtu - Change the Maximum Transfer Unit 418 * @netdev: network interface device structure 419 * @new_mtu: new value for maximum frame size 420 * 421 * Returns 0 on success, negative on failure 422 */ 423 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu) 424 { 425 struct atl1e_adapter *adapter = netdev_priv(netdev); 426 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 427 428 /* set MTU */ 429 if (netif_running(netdev)) { 430 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 431 msleep(1); 432 netdev->mtu = new_mtu; 433 adapter->hw.max_frame_size = new_mtu; 434 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3; 435 atl1e_down(adapter); 436 atl1e_up(adapter); 437 clear_bit(__AT_RESETTING, &adapter->flags); 438 } 439 return 0; 440 } 441 442 /* 443 * caller should hold mdio_lock 444 */ 445 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 446 { 447 struct atl1e_adapter *adapter = netdev_priv(netdev); 448 u16 result; 449 450 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); 451 return result; 452 } 453 454 static void atl1e_mdio_write(struct net_device *netdev, int phy_id, 455 int reg_num, int val) 456 { 457 struct atl1e_adapter *adapter = netdev_priv(netdev); 458 459 if (atl1e_write_phy_reg(&adapter->hw, 460 reg_num & MDIO_REG_ADDR_MASK, val)) 461 netdev_err(netdev, "write phy register failed\n"); 462 } 463 464 static int atl1e_mii_ioctl(struct net_device *netdev, 465 struct ifreq *ifr, int cmd) 466 { 467 struct atl1e_adapter *adapter = netdev_priv(netdev); 468 struct mii_ioctl_data *data = if_mii(ifr); 469 unsigned long flags; 470 int retval = 0; 471 472 if (!netif_running(netdev)) 473 return -EINVAL; 474 475 spin_lock_irqsave(&adapter->mdio_lock, flags); 476 switch (cmd) { 477 case SIOCGMIIPHY: 478 data->phy_id = 0; 479 break; 480 481 case SIOCGMIIREG: 482 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 483 &data->val_out)) { 484 retval = -EIO; 485 goto out; 486 } 487 break; 488 489 case SIOCSMIIREG: 490 if (data->reg_num & ~(0x1F)) { 491 retval = -EFAULT; 492 goto out; 493 } 494 495 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n", 496 data->reg_num, data->val_in); 497 if (atl1e_write_phy_reg(&adapter->hw, 498 data->reg_num, data->val_in)) { 499 retval = -EIO; 500 goto out; 501 } 502 break; 503 504 default: 505 retval = -EOPNOTSUPP; 506 break; 507 } 508 out: 509 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 510 return retval; 511 512 } 513 514 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 515 { 516 switch (cmd) { 517 case SIOCGMIIPHY: 518 case SIOCGMIIREG: 519 case SIOCSMIIREG: 520 return atl1e_mii_ioctl(netdev, ifr, cmd); 521 default: 522 return -EOPNOTSUPP; 523 } 524 } 525 526 static void atl1e_setup_pcicmd(struct pci_dev *pdev) 527 { 528 u16 cmd; 529 530 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 531 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO); 532 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); 533 pci_write_config_word(pdev, PCI_COMMAND, cmd); 534 535 /* 536 * some motherboards BIOS(PXE/EFI) driver may set PME 537 * while they transfer control to OS (Windows/Linux) 538 * so we should clear this bit before NIC work normally 539 */ 540 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0); 541 msleep(1); 542 } 543 544 /** 545 * atl1e_alloc_queues - Allocate memory for all rings 546 * @adapter: board private structure to initialize 547 * 548 */ 549 static int atl1e_alloc_queues(struct atl1e_adapter *adapter) 550 { 551 return 0; 552 } 553 554 /** 555 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter) 556 * @adapter: board private structure to initialize 557 * 558 * atl1e_sw_init initializes the Adapter private data structure. 559 * Fields are initialized based on PCI device information and 560 * OS network device settings (MTU size). 561 */ 562 static int atl1e_sw_init(struct atl1e_adapter *adapter) 563 { 564 struct atl1e_hw *hw = &adapter->hw; 565 struct pci_dev *pdev = adapter->pdev; 566 u32 phy_status_data = 0; 567 568 adapter->wol = 0; 569 adapter->link_speed = SPEED_0; /* hardware init */ 570 adapter->link_duplex = FULL_DUPLEX; 571 adapter->num_rx_queues = 1; 572 573 /* PCI config space info */ 574 hw->vendor_id = pdev->vendor; 575 hw->device_id = pdev->device; 576 hw->subsystem_vendor_id = pdev->subsystem_vendor; 577 hw->subsystem_id = pdev->subsystem_device; 578 hw->revision_id = pdev->revision; 579 580 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 581 582 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 583 /* nic type */ 584 if (hw->revision_id >= 0xF0) { 585 hw->nic_type = athr_l2e_revB; 586 } else { 587 if (phy_status_data & PHY_STATUS_100M) 588 hw->nic_type = athr_l1e; 589 else 590 hw->nic_type = athr_l2e_revA; 591 } 592 593 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 594 595 if (phy_status_data & PHY_STATUS_EMI_CA) 596 hw->emi_ca = true; 597 else 598 hw->emi_ca = false; 599 600 hw->phy_configured = false; 601 hw->preamble_len = 7; 602 hw->max_frame_size = adapter->netdev->mtu; 603 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN + 604 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3; 605 606 hw->rrs_type = atl1e_rrs_disable; 607 hw->indirect_tab = 0; 608 hw->base_cpu = 0; 609 610 /* need confirm */ 611 612 hw->ict = 50000; /* 100ms */ 613 hw->smb_timer = 200000; /* 200ms */ 614 hw->tpd_burst = 5; 615 hw->rrd_thresh = 1; 616 hw->tpd_thresh = adapter->tx_ring.count / 2; 617 hw->rx_count_down = 4; /* 2us resolution */ 618 hw->tx_count_down = hw->imt * 4 / 3; 619 hw->dmar_block = atl1e_dma_req_1024; 620 hw->dmaw_block = atl1e_dma_req_1024; 621 hw->dmar_dly_cnt = 15; 622 hw->dmaw_dly_cnt = 4; 623 624 if (atl1e_alloc_queues(adapter)) { 625 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n"); 626 return -ENOMEM; 627 } 628 629 atomic_set(&adapter->irq_sem, 1); 630 spin_lock_init(&adapter->mdio_lock); 631 632 set_bit(__AT_DOWN, &adapter->flags); 633 634 return 0; 635 } 636 637 /** 638 * atl1e_clean_tx_ring - Free Tx-skb 639 * @adapter: board private structure 640 */ 641 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter) 642 { 643 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 644 struct atl1e_tx_buffer *tx_buffer = NULL; 645 struct pci_dev *pdev = adapter->pdev; 646 u16 index, ring_count; 647 648 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL) 649 return; 650 651 ring_count = tx_ring->count; 652 /* first unmmap dma */ 653 for (index = 0; index < ring_count; index++) { 654 tx_buffer = &tx_ring->tx_buffer[index]; 655 if (tx_buffer->dma) { 656 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 657 pci_unmap_single(pdev, tx_buffer->dma, 658 tx_buffer->length, PCI_DMA_TODEVICE); 659 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 660 pci_unmap_page(pdev, tx_buffer->dma, 661 tx_buffer->length, PCI_DMA_TODEVICE); 662 tx_buffer->dma = 0; 663 } 664 } 665 /* second free skb */ 666 for (index = 0; index < ring_count; index++) { 667 tx_buffer = &tx_ring->tx_buffer[index]; 668 if (tx_buffer->skb) { 669 dev_kfree_skb_any(tx_buffer->skb); 670 tx_buffer->skb = NULL; 671 } 672 } 673 /* Zero out Tx-buffers */ 674 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) * 675 ring_count); 676 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) * 677 ring_count); 678 } 679 680 /** 681 * atl1e_clean_rx_ring - Free rx-reservation skbs 682 * @adapter: board private structure 683 */ 684 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter) 685 { 686 struct atl1e_rx_ring *rx_ring = 687 &adapter->rx_ring; 688 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc; 689 u16 i, j; 690 691 692 if (adapter->ring_vir_addr == NULL) 693 return; 694 /* Zero out the descriptor ring */ 695 for (i = 0; i < adapter->num_rx_queues; i++) { 696 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 697 if (rx_page_desc[i].rx_page[j].addr != NULL) { 698 memset(rx_page_desc[i].rx_page[j].addr, 0, 699 rx_ring->real_page_size); 700 } 701 } 702 } 703 } 704 705 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size) 706 { 707 *ring_size = ((u32)(adapter->tx_ring.count * 708 sizeof(struct atl1e_tpd_desc) + 7 709 /* tx ring, qword align */ 710 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE * 711 adapter->num_rx_queues + 31 712 /* rx ring, 32 bytes align */ 713 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) * 714 sizeof(u32) + 3)); 715 /* tx, rx cmd, dword align */ 716 } 717 718 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter) 719 { 720 struct atl1e_rx_ring *rx_ring = NULL; 721 722 rx_ring = &adapter->rx_ring; 723 724 rx_ring->real_page_size = adapter->rx_ring.page_size 725 + adapter->hw.max_frame_size 726 + ETH_HLEN + VLAN_HLEN 727 + ETH_FCS_LEN; 728 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32); 729 atl1e_cal_ring_size(adapter, &adapter->ring_size); 730 731 adapter->ring_vir_addr = NULL; 732 adapter->rx_ring.desc = NULL; 733 rwlock_init(&adapter->tx_ring.tx_lock); 734 } 735 736 /* 737 * Read / Write Ptr Initialize: 738 */ 739 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter) 740 { 741 struct atl1e_tx_ring *tx_ring = NULL; 742 struct atl1e_rx_ring *rx_ring = NULL; 743 struct atl1e_rx_page_desc *rx_page_desc = NULL; 744 int i, j; 745 746 tx_ring = &adapter->tx_ring; 747 rx_ring = &adapter->rx_ring; 748 rx_page_desc = rx_ring->rx_page_desc; 749 750 tx_ring->next_to_use = 0; 751 atomic_set(&tx_ring->next_to_clean, 0); 752 753 for (i = 0; i < adapter->num_rx_queues; i++) { 754 rx_page_desc[i].rx_using = 0; 755 rx_page_desc[i].rx_nxseq = 0; 756 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 757 *rx_page_desc[i].rx_page[j].write_offset_addr = 0; 758 rx_page_desc[i].rx_page[j].read_offset = 0; 759 } 760 } 761 } 762 763 /** 764 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources 765 * @adapter: board private structure 766 * 767 * Free all transmit software resources 768 */ 769 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter) 770 { 771 struct pci_dev *pdev = adapter->pdev; 772 773 atl1e_clean_tx_ring(adapter); 774 atl1e_clean_rx_ring(adapter); 775 776 if (adapter->ring_vir_addr) { 777 pci_free_consistent(pdev, adapter->ring_size, 778 adapter->ring_vir_addr, adapter->ring_dma); 779 adapter->ring_vir_addr = NULL; 780 } 781 782 if (adapter->tx_ring.tx_buffer) { 783 kfree(adapter->tx_ring.tx_buffer); 784 adapter->tx_ring.tx_buffer = NULL; 785 } 786 } 787 788 /** 789 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources 790 * @adapter: board private structure 791 * 792 * Return 0 on success, negative on failure 793 */ 794 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter) 795 { 796 struct pci_dev *pdev = adapter->pdev; 797 struct atl1e_tx_ring *tx_ring; 798 struct atl1e_rx_ring *rx_ring; 799 struct atl1e_rx_page_desc *rx_page_desc; 800 int size, i, j; 801 u32 offset = 0; 802 int err = 0; 803 804 if (adapter->ring_vir_addr != NULL) 805 return 0; /* alloced already */ 806 807 tx_ring = &adapter->tx_ring; 808 rx_ring = &adapter->rx_ring; 809 810 /* real ring DMA buffer */ 811 812 size = adapter->ring_size; 813 adapter->ring_vir_addr = pci_zalloc_consistent(pdev, adapter->ring_size, 814 &adapter->ring_dma); 815 if (adapter->ring_vir_addr == NULL) { 816 netdev_err(adapter->netdev, 817 "pci_alloc_consistent failed, size = D%d\n", size); 818 return -ENOMEM; 819 } 820 821 rx_page_desc = rx_ring->rx_page_desc; 822 823 /* Init TPD Ring */ 824 tx_ring->dma = roundup(adapter->ring_dma, 8); 825 offset = tx_ring->dma - adapter->ring_dma; 826 tx_ring->desc = adapter->ring_vir_addr + offset; 827 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count); 828 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL); 829 if (tx_ring->tx_buffer == NULL) { 830 err = -ENOMEM; 831 goto failed; 832 } 833 834 /* Init RXF-Pages */ 835 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count); 836 offset = roundup(offset, 32); 837 838 for (i = 0; i < adapter->num_rx_queues; i++) { 839 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 840 rx_page_desc[i].rx_page[j].dma = 841 adapter->ring_dma + offset; 842 rx_page_desc[i].rx_page[j].addr = 843 adapter->ring_vir_addr + offset; 844 offset += rx_ring->real_page_size; 845 } 846 } 847 848 /* Init CMB dma address */ 849 tx_ring->cmb_dma = adapter->ring_dma + offset; 850 tx_ring->cmb = adapter->ring_vir_addr + offset; 851 offset += sizeof(u32); 852 853 for (i = 0; i < adapter->num_rx_queues; i++) { 854 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 855 rx_page_desc[i].rx_page[j].write_offset_dma = 856 adapter->ring_dma + offset; 857 rx_page_desc[i].rx_page[j].write_offset_addr = 858 adapter->ring_vir_addr + offset; 859 offset += sizeof(u32); 860 } 861 } 862 863 if (unlikely(offset > adapter->ring_size)) { 864 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n", 865 offset, adapter->ring_size); 866 err = -1; 867 goto failed; 868 } 869 870 return 0; 871 failed: 872 if (adapter->ring_vir_addr != NULL) { 873 pci_free_consistent(pdev, adapter->ring_size, 874 adapter->ring_vir_addr, adapter->ring_dma); 875 adapter->ring_vir_addr = NULL; 876 } 877 return err; 878 } 879 880 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter) 881 { 882 883 struct atl1e_hw *hw = &adapter->hw; 884 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 885 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 886 struct atl1e_rx_page_desc *rx_page_desc = NULL; 887 int i, j; 888 889 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI, 890 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32)); 891 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO, 892 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK)); 893 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count)); 894 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO, 895 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK)); 896 897 rx_page_desc = rx_ring->rx_page_desc; 898 /* RXF Page Physical address / Page Length */ 899 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) { 900 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i], 901 (u32)((adapter->ring_dma & 902 AT_DMA_HI_ADDR_MASK) >> 32)); 903 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 904 u32 page_phy_addr; 905 u32 offset_phy_addr; 906 907 page_phy_addr = rx_page_desc[i].rx_page[j].dma; 908 offset_phy_addr = 909 rx_page_desc[i].rx_page[j].write_offset_dma; 910 911 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j], 912 page_phy_addr & AT_DMA_LO_ADDR_MASK); 913 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j], 914 offset_phy_addr & AT_DMA_LO_ADDR_MASK); 915 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1); 916 } 917 } 918 /* Page Length */ 919 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size); 920 /* Load all of base address above */ 921 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 922 } 923 924 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter) 925 { 926 struct atl1e_hw *hw = &adapter->hw; 927 u32 dev_ctrl_data = 0; 928 u32 max_pay_load = 0; 929 u32 jumbo_thresh = 0; 930 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ 931 932 /* configure TXQ param */ 933 if (hw->nic_type != athr_l2e_revB) { 934 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; 935 if (hw->max_frame_size <= 1500) { 936 jumbo_thresh = hw->max_frame_size + extra_size; 937 } else if (hw->max_frame_size < 6*1024) { 938 jumbo_thresh = 939 (hw->max_frame_size + extra_size) * 2 / 3; 940 } else { 941 jumbo_thresh = (hw->max_frame_size + extra_size) / 2; 942 } 943 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3); 944 } 945 946 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL); 947 948 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) & 949 DEVICE_CTRL_MAX_PAYLOAD_MASK; 950 951 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); 952 953 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) & 954 DEVICE_CTRL_MAX_RREQ_SZ_MASK; 955 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 956 957 if (hw->nic_type != athr_l2e_revB) 958 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2, 959 atl1e_pay_load_size[hw->dmar_block]); 960 /* enable TXQ */ 961 AT_WRITE_REGW(hw, REG_TXQ_CTRL, 962 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK) 963 << TXQ_CTRL_NUM_TPD_BURST_SHIFT) 964 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN); 965 } 966 967 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter) 968 { 969 struct atl1e_hw *hw = &adapter->hw; 970 u32 rxf_len = 0; 971 u32 rxf_low = 0; 972 u32 rxf_high = 0; 973 u32 rxf_thresh_data = 0; 974 u32 rxq_ctrl_data = 0; 975 976 if (hw->nic_type != athr_l2e_revB) { 977 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM, 978 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) << 979 RXQ_JMBOSZ_TH_SHIFT | 980 (1 & RXQ_JMBO_LKAH_MASK) << 981 RXQ_JMBO_LKAH_SHIFT)); 982 983 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN); 984 rxf_high = rxf_len * 4 / 5; 985 rxf_low = rxf_len / 5; 986 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK) 987 << RXQ_RXF_PAUSE_TH_HI_SHIFT) | 988 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK) 989 << RXQ_RXF_PAUSE_TH_LO_SHIFT); 990 991 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data); 992 } 993 994 /* RRS */ 995 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); 996 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); 997 998 if (hw->rrs_type & atl1e_rrs_ipv4) 999 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4; 1000 1001 if (hw->rrs_type & atl1e_rrs_ipv4_tcp) 1002 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP; 1003 1004 if (hw->rrs_type & atl1e_rrs_ipv6) 1005 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6; 1006 1007 if (hw->rrs_type & atl1e_rrs_ipv6_tcp) 1008 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP; 1009 1010 if (hw->rrs_type != atl1e_rrs_disable) 1011 rxq_ctrl_data |= 1012 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT); 1013 1014 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 | 1015 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN; 1016 1017 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1018 } 1019 1020 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter) 1021 { 1022 struct atl1e_hw *hw = &adapter->hw; 1023 u32 dma_ctrl_data = 0; 1024 1025 dma_ctrl_data = DMA_CTRL_RXCMB_EN; 1026 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) 1027 << DMA_CTRL_DMAR_BURST_LEN_SHIFT; 1028 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) 1029 << DMA_CTRL_DMAW_BURST_LEN_SHIFT; 1030 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER; 1031 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) 1032 << DMA_CTRL_DMAR_DLY_CNT_SHIFT; 1033 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) 1034 << DMA_CTRL_DMAW_DLY_CNT_SHIFT; 1035 1036 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1037 } 1038 1039 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter) 1040 { 1041 u32 value; 1042 struct atl1e_hw *hw = &adapter->hw; 1043 struct net_device *netdev = adapter->netdev; 1044 1045 /* Config MAC CTRL Register */ 1046 value = MAC_CTRL_TX_EN | 1047 MAC_CTRL_RX_EN ; 1048 1049 if (FULL_DUPLEX == adapter->link_duplex) 1050 value |= MAC_CTRL_DUPLX; 1051 1052 value |= ((u32)((SPEED_1000 == adapter->link_speed) ? 1053 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) << 1054 MAC_CTRL_SPEED_SHIFT); 1055 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1056 1057 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1058 value |= (((u32)adapter->hw.preamble_len & 1059 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); 1060 1061 __atl1e_vlan_mode(netdev->features, &value); 1062 1063 value |= MAC_CTRL_BC_EN; 1064 if (netdev->flags & IFF_PROMISC) 1065 value |= MAC_CTRL_PROMIS_EN; 1066 if (netdev->flags & IFF_ALLMULTI) 1067 value |= MAC_CTRL_MC_ALL_EN; 1068 if (netdev->features & NETIF_F_RXALL) 1069 value |= MAC_CTRL_DBG; 1070 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 1071 } 1072 1073 /** 1074 * atl1e_configure - Configure Transmit&Receive Unit after Reset 1075 * @adapter: board private structure 1076 * 1077 * Configure the Tx /Rx unit of the MAC after a reset. 1078 */ 1079 static int atl1e_configure(struct atl1e_adapter *adapter) 1080 { 1081 struct atl1e_hw *hw = &adapter->hw; 1082 1083 u32 intr_status_data = 0; 1084 1085 /* clear interrupt status */ 1086 AT_WRITE_REG(hw, REG_ISR, ~0); 1087 1088 /* 1. set MAC Address */ 1089 atl1e_hw_set_mac_addr(hw); 1090 1091 /* 2. Init the Multicast HASH table done by set_muti */ 1092 1093 /* 3. Clear any WOL status */ 1094 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1095 1096 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr 1097 * TPD Ring/SMB/RXF0 Page CMBs, they use the same 1098 * High 32bits memory */ 1099 atl1e_configure_des_ring(adapter); 1100 1101 /* 5. set Interrupt Moderator Timer */ 1102 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt); 1103 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt); 1104 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE | 1105 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN); 1106 1107 /* 6. rx/tx threshold to trig interrupt */ 1108 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh); 1109 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh); 1110 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down); 1111 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down); 1112 1113 /* 7. set Interrupt Clear Timer */ 1114 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict); 1115 1116 /* 8. set MTU */ 1117 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1118 VLAN_HLEN + ETH_FCS_LEN); 1119 1120 /* 9. config TXQ early tx threshold */ 1121 atl1e_configure_tx(adapter); 1122 1123 /* 10. config RXQ */ 1124 atl1e_configure_rx(adapter); 1125 1126 /* 11. config DMA Engine */ 1127 atl1e_configure_dma(adapter); 1128 1129 /* 12. smb timer to trig interrupt */ 1130 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer); 1131 1132 intr_status_data = AT_READ_REG(hw, REG_ISR); 1133 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) { 1134 netdev_err(adapter->netdev, 1135 "atl1e_configure failed, PCIE phy link down\n"); 1136 return -1; 1137 } 1138 1139 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff); 1140 return 0; 1141 } 1142 1143 /** 1144 * atl1e_get_stats - Get System Network Statistics 1145 * @netdev: network interface device structure 1146 * 1147 * Returns the address of the device statistics structure. 1148 * The statistics are actually updated from the timer callback. 1149 */ 1150 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev) 1151 { 1152 struct atl1e_adapter *adapter = netdev_priv(netdev); 1153 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats; 1154 struct net_device_stats *net_stats = &netdev->stats; 1155 1156 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1157 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1158 net_stats->multicast = hw_stats->rx_mcast; 1159 net_stats->collisions = hw_stats->tx_1_col + 1160 hw_stats->tx_2_col + 1161 hw_stats->tx_late_col + 1162 hw_stats->tx_abort_col; 1163 1164 net_stats->rx_errors = hw_stats->rx_frag + 1165 hw_stats->rx_fcs_err + 1166 hw_stats->rx_len_err + 1167 hw_stats->rx_sz_ov + 1168 hw_stats->rx_rrd_ov + 1169 hw_stats->rx_align_err + 1170 hw_stats->rx_rxf_ov; 1171 1172 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1173 net_stats->rx_length_errors = hw_stats->rx_len_err; 1174 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1175 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1176 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1177 1178 net_stats->tx_errors = hw_stats->tx_late_col + 1179 hw_stats->tx_abort_col + 1180 hw_stats->tx_underrun + 1181 hw_stats->tx_trunc; 1182 1183 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1184 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1185 net_stats->tx_window_errors = hw_stats->tx_late_col; 1186 1187 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1188 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1189 1190 return net_stats; 1191 } 1192 1193 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter) 1194 { 1195 u16 hw_reg_addr = 0; 1196 unsigned long *stats_item = NULL; 1197 1198 /* update rx status */ 1199 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1200 stats_item = &adapter->hw_stats.rx_ok; 1201 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1202 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1203 stats_item++; 1204 hw_reg_addr += 4; 1205 } 1206 /* update tx status */ 1207 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1208 stats_item = &adapter->hw_stats.tx_ok; 1209 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1210 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1211 stats_item++; 1212 hw_reg_addr += 4; 1213 } 1214 } 1215 1216 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter) 1217 { 1218 u16 phy_data; 1219 1220 spin_lock(&adapter->mdio_lock); 1221 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data); 1222 spin_unlock(&adapter->mdio_lock); 1223 } 1224 1225 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter) 1226 { 1227 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1228 struct atl1e_tx_buffer *tx_buffer = NULL; 1229 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX); 1230 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1231 1232 while (next_to_clean != hw_next_to_clean) { 1233 tx_buffer = &tx_ring->tx_buffer[next_to_clean]; 1234 if (tx_buffer->dma) { 1235 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 1236 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1237 tx_buffer->length, PCI_DMA_TODEVICE); 1238 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 1239 pci_unmap_page(adapter->pdev, tx_buffer->dma, 1240 tx_buffer->length, PCI_DMA_TODEVICE); 1241 tx_buffer->dma = 0; 1242 } 1243 1244 if (tx_buffer->skb) { 1245 dev_consume_skb_irq(tx_buffer->skb); 1246 tx_buffer->skb = NULL; 1247 } 1248 1249 if (++next_to_clean == tx_ring->count) 1250 next_to_clean = 0; 1251 } 1252 1253 atomic_set(&tx_ring->next_to_clean, next_to_clean); 1254 1255 if (netif_queue_stopped(adapter->netdev) && 1256 netif_carrier_ok(adapter->netdev)) { 1257 netif_wake_queue(adapter->netdev); 1258 } 1259 1260 return true; 1261 } 1262 1263 /** 1264 * atl1e_intr - Interrupt Handler 1265 * @irq: interrupt number 1266 * @data: pointer to a network interface device structure 1267 */ 1268 static irqreturn_t atl1e_intr(int irq, void *data) 1269 { 1270 struct net_device *netdev = data; 1271 struct atl1e_adapter *adapter = netdev_priv(netdev); 1272 struct atl1e_hw *hw = &adapter->hw; 1273 int max_ints = AT_MAX_INT_WORK; 1274 int handled = IRQ_NONE; 1275 u32 status; 1276 1277 do { 1278 status = AT_READ_REG(hw, REG_ISR); 1279 if ((status & IMR_NORMAL_MASK) == 0 || 1280 (status & ISR_DIS_INT) != 0) { 1281 if (max_ints != AT_MAX_INT_WORK) 1282 handled = IRQ_HANDLED; 1283 break; 1284 } 1285 /* link event */ 1286 if (status & ISR_GPHY) 1287 atl1e_clear_phy_int(adapter); 1288 /* Ack ISR */ 1289 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1290 1291 handled = IRQ_HANDLED; 1292 /* check if PCIE PHY Link down */ 1293 if (status & ISR_PHY_LINKDOWN) { 1294 netdev_err(adapter->netdev, 1295 "pcie phy linkdown %x\n", status); 1296 if (netif_running(adapter->netdev)) { 1297 /* reset MAC */ 1298 atl1e_irq_reset(adapter); 1299 schedule_work(&adapter->reset_task); 1300 break; 1301 } 1302 } 1303 1304 /* check if DMA read/write error */ 1305 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { 1306 netdev_err(adapter->netdev, 1307 "PCIE DMA RW error (status = 0x%x)\n", 1308 status); 1309 atl1e_irq_reset(adapter); 1310 schedule_work(&adapter->reset_task); 1311 break; 1312 } 1313 1314 if (status & ISR_SMB) 1315 atl1e_update_hw_stats(adapter); 1316 1317 /* link event */ 1318 if (status & (ISR_GPHY | ISR_MANUAL)) { 1319 netdev->stats.tx_carrier_errors++; 1320 atl1e_link_chg_event(adapter); 1321 break; 1322 } 1323 1324 /* transmit event */ 1325 if (status & ISR_TX_EVENT) 1326 atl1e_clean_tx_irq(adapter); 1327 1328 if (status & ISR_RX_EVENT) { 1329 /* 1330 * disable rx interrupts, without 1331 * the synchronize_irq bit 1332 */ 1333 AT_WRITE_REG(hw, REG_IMR, 1334 IMR_NORMAL_MASK & ~ISR_RX_EVENT); 1335 AT_WRITE_FLUSH(hw); 1336 if (likely(napi_schedule_prep( 1337 &adapter->napi))) 1338 __napi_schedule(&adapter->napi); 1339 } 1340 } while (--max_ints > 0); 1341 /* re-enable Interrupt*/ 1342 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1343 1344 return handled; 1345 } 1346 1347 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter, 1348 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs) 1349 { 1350 u8 *packet = (u8 *)(prrs + 1); 1351 struct iphdr *iph; 1352 u16 head_len = ETH_HLEN; 1353 u16 pkt_flags; 1354 u16 err_flags; 1355 1356 skb_checksum_none_assert(skb); 1357 pkt_flags = prrs->pkt_flag; 1358 err_flags = prrs->err_flag; 1359 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) && 1360 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) { 1361 if (pkt_flags & RRS_IS_IPV4) { 1362 if (pkt_flags & RRS_IS_802_3) 1363 head_len += 8; 1364 iph = (struct iphdr *) (packet + head_len); 1365 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF)) 1366 goto hw_xsum; 1367 } 1368 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) { 1369 skb->ip_summed = CHECKSUM_UNNECESSARY; 1370 return; 1371 } 1372 } 1373 1374 hw_xsum : 1375 return; 1376 } 1377 1378 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter, 1379 u8 que) 1380 { 1381 struct atl1e_rx_page_desc *rx_page_desc = 1382 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc; 1383 u8 rx_using = rx_page_desc[que].rx_using; 1384 1385 return &(rx_page_desc[que].rx_page[rx_using]); 1386 } 1387 1388 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que, 1389 int *work_done, int work_to_do) 1390 { 1391 struct net_device *netdev = adapter->netdev; 1392 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 1393 struct atl1e_rx_page_desc *rx_page_desc = 1394 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc; 1395 struct sk_buff *skb = NULL; 1396 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que); 1397 u32 packet_size, write_offset; 1398 struct atl1e_recv_ret_status *prrs; 1399 1400 write_offset = *(rx_page->write_offset_addr); 1401 if (likely(rx_page->read_offset < write_offset)) { 1402 do { 1403 if (*work_done >= work_to_do) 1404 break; 1405 (*work_done)++; 1406 /* get new packet's rrs */ 1407 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr + 1408 rx_page->read_offset); 1409 /* check sequence number */ 1410 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) { 1411 netdev_err(netdev, 1412 "rx sequence number error (rx=%d) (expect=%d)\n", 1413 prrs->seq_num, 1414 rx_page_desc[que].rx_nxseq); 1415 rx_page_desc[que].rx_nxseq++; 1416 /* just for debug use */ 1417 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0, 1418 (((u32)prrs->seq_num) << 16) | 1419 rx_page_desc[que].rx_nxseq); 1420 goto fatal_err; 1421 } 1422 rx_page_desc[que].rx_nxseq++; 1423 1424 /* error packet */ 1425 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) && 1426 !(netdev->features & NETIF_F_RXALL)) { 1427 if (prrs->err_flag & (RRS_ERR_BAD_CRC | 1428 RRS_ERR_DRIBBLE | RRS_ERR_CODE | 1429 RRS_ERR_TRUNC)) { 1430 /* hardware error, discard this packet*/ 1431 netdev_err(netdev, 1432 "rx packet desc error %x\n", 1433 *((u32 *)prrs + 1)); 1434 goto skip_pkt; 1435 } 1436 } 1437 1438 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1439 RRS_PKT_SIZE_MASK); 1440 if (likely(!(netdev->features & NETIF_F_RXFCS))) 1441 packet_size -= 4; /* CRC */ 1442 1443 skb = netdev_alloc_skb_ip_align(netdev, packet_size); 1444 if (skb == NULL) 1445 goto skip_pkt; 1446 1447 memcpy(skb->data, (u8 *)(prrs + 1), packet_size); 1448 skb_put(skb, packet_size); 1449 skb->protocol = eth_type_trans(skb, netdev); 1450 atl1e_rx_checksum(adapter, skb, prrs); 1451 1452 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) { 1453 u16 vlan_tag = (prrs->vtag >> 4) | 1454 ((prrs->vtag & 7) << 13) | 1455 ((prrs->vtag & 8) << 9); 1456 netdev_dbg(netdev, 1457 "RXD VLAN TAG<RRD>=0x%04x\n", 1458 prrs->vtag); 1459 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1460 } 1461 napi_gro_receive(&adapter->napi, skb); 1462 1463 skip_pkt: 1464 /* skip current packet whether it's ok or not. */ 1465 rx_page->read_offset += 1466 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1467 RRS_PKT_SIZE_MASK) + 1468 sizeof(struct atl1e_recv_ret_status) + 31) & 1469 0xFFFFFFE0); 1470 1471 if (rx_page->read_offset >= rx_ring->page_size) { 1472 /* mark this page clean */ 1473 u16 reg_addr; 1474 u8 rx_using; 1475 1476 rx_page->read_offset = 1477 *(rx_page->write_offset_addr) = 0; 1478 rx_using = rx_page_desc[que].rx_using; 1479 reg_addr = 1480 atl1e_rx_page_vld_regs[que][rx_using]; 1481 AT_WRITE_REGB(&adapter->hw, reg_addr, 1); 1482 rx_page_desc[que].rx_using ^= 1; 1483 rx_page = atl1e_get_rx_page(adapter, que); 1484 } 1485 write_offset = *(rx_page->write_offset_addr); 1486 } while (rx_page->read_offset < write_offset); 1487 } 1488 1489 return; 1490 1491 fatal_err: 1492 if (!test_bit(__AT_DOWN, &adapter->flags)) 1493 schedule_work(&adapter->reset_task); 1494 } 1495 1496 /** 1497 * atl1e_clean - NAPI Rx polling callback 1498 */ 1499 static int atl1e_clean(struct napi_struct *napi, int budget) 1500 { 1501 struct atl1e_adapter *adapter = 1502 container_of(napi, struct atl1e_adapter, napi); 1503 u32 imr_data; 1504 int work_done = 0; 1505 1506 /* Keep link state information with original netdev */ 1507 if (!netif_carrier_ok(adapter->netdev)) 1508 goto quit_polling; 1509 1510 atl1e_clean_rx_irq(adapter, 0, &work_done, budget); 1511 1512 /* If no Tx and not enough Rx work done, exit the polling mode */ 1513 if (work_done < budget) { 1514 quit_polling: 1515 napi_complete_done(napi, work_done); 1516 imr_data = AT_READ_REG(&adapter->hw, REG_IMR); 1517 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT); 1518 /* test debug */ 1519 if (test_bit(__AT_DOWN, &adapter->flags)) { 1520 atomic_dec(&adapter->irq_sem); 1521 netdev_err(adapter->netdev, 1522 "atl1e_clean is called when AT_DOWN\n"); 1523 } 1524 /* reenable RX intr */ 1525 /*atl1e_irq_enable(adapter); */ 1526 1527 } 1528 return work_done; 1529 } 1530 1531 #ifdef CONFIG_NET_POLL_CONTROLLER 1532 1533 /* 1534 * Polling 'interrupt' - used by things like netconsole to send skbs 1535 * without having to re-enable interrupts. It's not called while 1536 * the interrupt routine is executing. 1537 */ 1538 static void atl1e_netpoll(struct net_device *netdev) 1539 { 1540 struct atl1e_adapter *adapter = netdev_priv(netdev); 1541 1542 disable_irq(adapter->pdev->irq); 1543 atl1e_intr(adapter->pdev->irq, netdev); 1544 enable_irq(adapter->pdev->irq); 1545 } 1546 #endif 1547 1548 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter) 1549 { 1550 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1551 u16 next_to_use = 0; 1552 u16 next_to_clean = 0; 1553 1554 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1555 next_to_use = tx_ring->next_to_use; 1556 1557 return (u16)(next_to_clean > next_to_use) ? 1558 (next_to_clean - next_to_use - 1) : 1559 (tx_ring->count + next_to_clean - next_to_use - 1); 1560 } 1561 1562 /* 1563 * get next usable tpd 1564 * Note: should call atl1e_tdp_avail to make sure 1565 * there is enough tpd to use 1566 */ 1567 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter) 1568 { 1569 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1570 u16 next_to_use = 0; 1571 1572 next_to_use = tx_ring->next_to_use; 1573 if (++tx_ring->next_to_use == tx_ring->count) 1574 tx_ring->next_to_use = 0; 1575 1576 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc)); 1577 return &tx_ring->desc[next_to_use]; 1578 } 1579 1580 static struct atl1e_tx_buffer * 1581 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd) 1582 { 1583 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1584 1585 return &tx_ring->tx_buffer[tpd - tx_ring->desc]; 1586 } 1587 1588 /* Calculate the transmit packet descript needed*/ 1589 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb) 1590 { 1591 int i = 0; 1592 u16 tpd_req = 1; 1593 u16 fg_size = 0; 1594 u16 proto_hdr_len = 0; 1595 1596 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1597 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]); 1598 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT); 1599 } 1600 1601 if (skb_is_gso(skb)) { 1602 if (skb->protocol == htons(ETH_P_IP) || 1603 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) { 1604 proto_hdr_len = skb_transport_offset(skb) + 1605 tcp_hdrlen(skb); 1606 if (proto_hdr_len < skb_headlen(skb)) { 1607 tpd_req += ((skb_headlen(skb) - proto_hdr_len + 1608 MAX_TX_BUF_LEN - 1) >> 1609 MAX_TX_BUF_SHIFT); 1610 } 1611 } 1612 1613 } 1614 return tpd_req; 1615 } 1616 1617 static int atl1e_tso_csum(struct atl1e_adapter *adapter, 1618 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1619 { 1620 unsigned short offload_type; 1621 u8 hdr_len; 1622 u32 real_len; 1623 1624 if (skb_is_gso(skb)) { 1625 int err; 1626 1627 err = skb_cow_head(skb, 0); 1628 if (err < 0) 1629 return err; 1630 1631 offload_type = skb_shinfo(skb)->gso_type; 1632 1633 if (offload_type & SKB_GSO_TCPV4) { 1634 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1635 + ntohs(ip_hdr(skb)->tot_len)); 1636 1637 if (real_len < skb->len) 1638 pskb_trim(skb, real_len); 1639 1640 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1641 if (unlikely(skb->len == hdr_len)) { 1642 /* only xsum need */ 1643 netdev_warn(adapter->netdev, 1644 "IPV4 tso with zero data??\n"); 1645 goto check_sum; 1646 } else { 1647 ip_hdr(skb)->check = 0; 1648 ip_hdr(skb)->tot_len = 0; 1649 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1650 ip_hdr(skb)->saddr, 1651 ip_hdr(skb)->daddr, 1652 0, IPPROTO_TCP, 0); 1653 tpd->word3 |= (ip_hdr(skb)->ihl & 1654 TDP_V4_IPHL_MASK) << 1655 TPD_V4_IPHL_SHIFT; 1656 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) & 1657 TPD_TCPHDRLEN_MASK) << 1658 TPD_TCPHDRLEN_SHIFT; 1659 tpd->word3 |= ((skb_shinfo(skb)->gso_size) & 1660 TPD_MSS_MASK) << TPD_MSS_SHIFT; 1661 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT; 1662 } 1663 return 0; 1664 } 1665 } 1666 1667 check_sum: 1668 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1669 u8 css, cso; 1670 1671 cso = skb_checksum_start_offset(skb); 1672 if (unlikely(cso & 0x1)) { 1673 netdev_err(adapter->netdev, 1674 "payload offset should not ant event number\n"); 1675 return -1; 1676 } else { 1677 css = cso + skb->csum_offset; 1678 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) << 1679 TPD_PLOADOFFSET_SHIFT; 1680 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) << 1681 TPD_CCSUMOFFSET_SHIFT; 1682 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT; 1683 } 1684 } 1685 1686 return 0; 1687 } 1688 1689 static int atl1e_tx_map(struct atl1e_adapter *adapter, 1690 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1691 { 1692 struct atl1e_tpd_desc *use_tpd = NULL; 1693 struct atl1e_tx_buffer *tx_buffer = NULL; 1694 u16 buf_len = skb_headlen(skb); 1695 u16 map_len = 0; 1696 u16 mapped_len = 0; 1697 u16 hdr_len = 0; 1698 u16 nr_frags; 1699 u16 f; 1700 int segment; 1701 int ring_start = adapter->tx_ring.next_to_use; 1702 int ring_end; 1703 1704 nr_frags = skb_shinfo(skb)->nr_frags; 1705 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK; 1706 if (segment) { 1707 /* TSO */ 1708 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1709 use_tpd = tpd; 1710 1711 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1712 tx_buffer->length = map_len; 1713 tx_buffer->dma = pci_map_single(adapter->pdev, 1714 skb->data, hdr_len, PCI_DMA_TODEVICE); 1715 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) 1716 return -ENOSPC; 1717 1718 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1719 mapped_len += map_len; 1720 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1721 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1722 ((cpu_to_le32(tx_buffer->length) & 1723 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1724 } 1725 1726 while (mapped_len < buf_len) { 1727 /* mapped_len == 0, means we should use the first tpd, 1728 which is given by caller */ 1729 if (mapped_len == 0) { 1730 use_tpd = tpd; 1731 } else { 1732 use_tpd = atl1e_get_tpd(adapter); 1733 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1734 } 1735 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1736 tx_buffer->skb = NULL; 1737 1738 tx_buffer->length = map_len = 1739 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ? 1740 MAX_TX_BUF_LEN : (buf_len - mapped_len); 1741 tx_buffer->dma = 1742 pci_map_single(adapter->pdev, skb->data + mapped_len, 1743 map_len, PCI_DMA_TODEVICE); 1744 1745 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1746 /* We need to unwind the mappings we've done */ 1747 ring_end = adapter->tx_ring.next_to_use; 1748 adapter->tx_ring.next_to_use = ring_start; 1749 while (adapter->tx_ring.next_to_use != ring_end) { 1750 tpd = atl1e_get_tpd(adapter); 1751 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1752 pci_unmap_single(adapter->pdev, tx_buffer->dma, 1753 tx_buffer->length, PCI_DMA_TODEVICE); 1754 } 1755 /* Reset the tx rings next pointer */ 1756 adapter->tx_ring.next_to_use = ring_start; 1757 return -ENOSPC; 1758 } 1759 1760 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1761 mapped_len += map_len; 1762 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1763 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1764 ((cpu_to_le32(tx_buffer->length) & 1765 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1766 } 1767 1768 for (f = 0; f < nr_frags; f++) { 1769 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; 1770 u16 i; 1771 u16 seg_num; 1772 1773 buf_len = skb_frag_size(frag); 1774 1775 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN; 1776 for (i = 0; i < seg_num; i++) { 1777 use_tpd = atl1e_get_tpd(adapter); 1778 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1779 1780 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1781 BUG_ON(tx_buffer->skb); 1782 1783 tx_buffer->skb = NULL; 1784 tx_buffer->length = 1785 (buf_len > MAX_TX_BUF_LEN) ? 1786 MAX_TX_BUF_LEN : buf_len; 1787 buf_len -= tx_buffer->length; 1788 1789 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev, 1790 frag, 1791 (i * MAX_TX_BUF_LEN), 1792 tx_buffer->length, 1793 DMA_TO_DEVICE); 1794 1795 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1796 /* We need to unwind the mappings we've done */ 1797 ring_end = adapter->tx_ring.next_to_use; 1798 adapter->tx_ring.next_to_use = ring_start; 1799 while (adapter->tx_ring.next_to_use != ring_end) { 1800 tpd = atl1e_get_tpd(adapter); 1801 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1802 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma, 1803 tx_buffer->length, DMA_TO_DEVICE); 1804 } 1805 1806 /* Reset the ring next to use pointer */ 1807 adapter->tx_ring.next_to_use = ring_start; 1808 return -ENOSPC; 1809 } 1810 1811 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE); 1812 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1813 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1814 ((cpu_to_le32(tx_buffer->length) & 1815 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1816 } 1817 } 1818 1819 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK) 1820 /* note this one is a tcp header */ 1821 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT; 1822 /* The last tpd */ 1823 1824 use_tpd->word3 |= 1 << TPD_EOP_SHIFT; 1825 /* The last buffer info contain the skb address, 1826 so it will be free after unmap */ 1827 tx_buffer->skb = skb; 1828 return 0; 1829 } 1830 1831 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count, 1832 struct atl1e_tpd_desc *tpd) 1833 { 1834 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1835 /* Force memory writes to complete before letting h/w 1836 * know there are new descriptors to fetch. (Only 1837 * applicable for weak-ordered memory model archs, 1838 * such as IA-64). */ 1839 wmb(); 1840 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use); 1841 } 1842 1843 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb, 1844 struct net_device *netdev) 1845 { 1846 struct atl1e_adapter *adapter = netdev_priv(netdev); 1847 u16 tpd_req = 1; 1848 struct atl1e_tpd_desc *tpd; 1849 1850 if (test_bit(__AT_DOWN, &adapter->flags)) { 1851 dev_kfree_skb_any(skb); 1852 return NETDEV_TX_OK; 1853 } 1854 1855 if (unlikely(skb->len <= 0)) { 1856 dev_kfree_skb_any(skb); 1857 return NETDEV_TX_OK; 1858 } 1859 tpd_req = atl1e_cal_tdp_req(skb); 1860 1861 if (atl1e_tpd_avail(adapter) < tpd_req) { 1862 /* no enough descriptor, just stop queue */ 1863 netif_stop_queue(netdev); 1864 return NETDEV_TX_BUSY; 1865 } 1866 1867 tpd = atl1e_get_tpd(adapter); 1868 1869 if (skb_vlan_tag_present(skb)) { 1870 u16 vlan_tag = skb_vlan_tag_get(skb); 1871 u16 atl1e_vlan_tag; 1872 1873 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT; 1874 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag); 1875 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) << 1876 TPD_VLAN_SHIFT; 1877 } 1878 1879 if (skb->protocol == htons(ETH_P_8021Q)) 1880 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT; 1881 1882 if (skb_network_offset(skb) != ETH_HLEN) 1883 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */ 1884 1885 /* do TSO and check sum */ 1886 if (atl1e_tso_csum(adapter, skb, tpd) != 0) { 1887 dev_kfree_skb_any(skb); 1888 return NETDEV_TX_OK; 1889 } 1890 1891 if (atl1e_tx_map(adapter, skb, tpd)) { 1892 dev_kfree_skb_any(skb); 1893 goto out; 1894 } 1895 1896 atl1e_tx_queue(adapter, tpd_req, tpd); 1897 out: 1898 return NETDEV_TX_OK; 1899 } 1900 1901 static void atl1e_free_irq(struct atl1e_adapter *adapter) 1902 { 1903 struct net_device *netdev = adapter->netdev; 1904 1905 free_irq(adapter->pdev->irq, netdev); 1906 } 1907 1908 static int atl1e_request_irq(struct atl1e_adapter *adapter) 1909 { 1910 struct pci_dev *pdev = adapter->pdev; 1911 struct net_device *netdev = adapter->netdev; 1912 int err = 0; 1913 1914 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name, 1915 netdev); 1916 if (err) { 1917 netdev_dbg(adapter->netdev, 1918 "Unable to allocate interrupt Error: %d\n", err); 1919 return err; 1920 } 1921 netdev_dbg(netdev, "atl1e_request_irq OK\n"); 1922 return err; 1923 } 1924 1925 int atl1e_up(struct atl1e_adapter *adapter) 1926 { 1927 struct net_device *netdev = adapter->netdev; 1928 int err = 0; 1929 u32 val; 1930 1931 /* hardware has been reset, we need to reload some things */ 1932 err = atl1e_init_hw(&adapter->hw); 1933 if (err) { 1934 err = -EIO; 1935 return err; 1936 } 1937 atl1e_init_ring_ptrs(adapter); 1938 atl1e_set_multi(netdev); 1939 atl1e_restore_vlan(adapter); 1940 1941 if (atl1e_configure(adapter)) { 1942 err = -EIO; 1943 goto err_up; 1944 } 1945 1946 clear_bit(__AT_DOWN, &adapter->flags); 1947 napi_enable(&adapter->napi); 1948 atl1e_irq_enable(adapter); 1949 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL); 1950 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, 1951 val | MASTER_CTRL_MANUAL_INT); 1952 1953 err_up: 1954 return err; 1955 } 1956 1957 void atl1e_down(struct atl1e_adapter *adapter) 1958 { 1959 struct net_device *netdev = adapter->netdev; 1960 1961 /* signal that we're down so the interrupt handler does not 1962 * reschedule our watchdog timer */ 1963 set_bit(__AT_DOWN, &adapter->flags); 1964 1965 netif_stop_queue(netdev); 1966 1967 /* reset MAC to disable all RX/TX */ 1968 atl1e_reset_hw(&adapter->hw); 1969 msleep(1); 1970 1971 napi_disable(&adapter->napi); 1972 atl1e_del_timer(adapter); 1973 atl1e_irq_disable(adapter); 1974 1975 netif_carrier_off(netdev); 1976 adapter->link_speed = SPEED_0; 1977 adapter->link_duplex = -1; 1978 atl1e_clean_tx_ring(adapter); 1979 atl1e_clean_rx_ring(adapter); 1980 } 1981 1982 /** 1983 * atl1e_open - Called when a network interface is made active 1984 * @netdev: network interface device structure 1985 * 1986 * Returns 0 on success, negative value on failure 1987 * 1988 * The open entry point is called when a network interface is made 1989 * active by the system (IFF_UP). At this point all resources needed 1990 * for transmit and receive operations are allocated, the interrupt 1991 * handler is registered with the OS, the watchdog timer is started, 1992 * and the stack is notified that the interface is ready. 1993 */ 1994 static int atl1e_open(struct net_device *netdev) 1995 { 1996 struct atl1e_adapter *adapter = netdev_priv(netdev); 1997 int err; 1998 1999 /* disallow open during test */ 2000 if (test_bit(__AT_TESTING, &adapter->flags)) 2001 return -EBUSY; 2002 2003 /* allocate rx/tx dma buffer & descriptors */ 2004 atl1e_init_ring_resources(adapter); 2005 err = atl1e_setup_ring_resources(adapter); 2006 if (unlikely(err)) 2007 return err; 2008 2009 err = atl1e_request_irq(adapter); 2010 if (unlikely(err)) 2011 goto err_req_irq; 2012 2013 err = atl1e_up(adapter); 2014 if (unlikely(err)) 2015 goto err_up; 2016 2017 return 0; 2018 2019 err_up: 2020 atl1e_free_irq(adapter); 2021 err_req_irq: 2022 atl1e_free_ring_resources(adapter); 2023 atl1e_reset_hw(&adapter->hw); 2024 2025 return err; 2026 } 2027 2028 /** 2029 * atl1e_close - Disables a network interface 2030 * @netdev: network interface device structure 2031 * 2032 * Returns 0, this is not allowed to fail 2033 * 2034 * The close entry point is called when an interface is de-activated 2035 * by the OS. The hardware is still under the drivers control, but 2036 * needs to be disabled. A global MAC reset is issued to stop the 2037 * hardware, and all transmit and receive resources are freed. 2038 */ 2039 static int atl1e_close(struct net_device *netdev) 2040 { 2041 struct atl1e_adapter *adapter = netdev_priv(netdev); 2042 2043 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2044 atl1e_down(adapter); 2045 atl1e_free_irq(adapter); 2046 atl1e_free_ring_resources(adapter); 2047 2048 return 0; 2049 } 2050 2051 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state) 2052 { 2053 struct net_device *netdev = pci_get_drvdata(pdev); 2054 struct atl1e_adapter *adapter = netdev_priv(netdev); 2055 struct atl1e_hw *hw = &adapter->hw; 2056 u32 ctrl = 0; 2057 u32 mac_ctrl_data = 0; 2058 u32 wol_ctrl_data = 0; 2059 u16 mii_advertise_data = 0; 2060 u16 mii_bmsr_data = 0; 2061 u16 mii_intr_status_data = 0; 2062 u32 wufc = adapter->wol; 2063 u32 i; 2064 #ifdef CONFIG_PM 2065 int retval = 0; 2066 #endif 2067 2068 if (netif_running(netdev)) { 2069 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2070 atl1e_down(adapter); 2071 } 2072 netif_device_detach(netdev); 2073 2074 #ifdef CONFIG_PM 2075 retval = pci_save_state(pdev); 2076 if (retval) 2077 return retval; 2078 #endif 2079 2080 if (wufc) { 2081 /* get link status */ 2082 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2083 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2084 2085 mii_advertise_data = ADVERTISE_10HALF; 2086 2087 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) || 2088 (atl1e_write_phy_reg(hw, 2089 MII_ADVERTISE, mii_advertise_data) != 0) || 2090 (atl1e_phy_commit(hw)) != 0) { 2091 netdev_dbg(adapter->netdev, "set phy register failed\n"); 2092 goto wol_dis; 2093 } 2094 2095 hw->phy_configured = false; /* re-init PHY when resume */ 2096 2097 /* turn on magic packet wol */ 2098 if (wufc & AT_WUFC_MAG) 2099 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2100 2101 if (wufc & AT_WUFC_LNKC) { 2102 /* if orignal link status is link, just wait for retrive link */ 2103 if (mii_bmsr_data & BMSR_LSTATUS) { 2104 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { 2105 msleep(100); 2106 atl1e_read_phy_reg(hw, MII_BMSR, 2107 &mii_bmsr_data); 2108 if (mii_bmsr_data & BMSR_LSTATUS) 2109 break; 2110 } 2111 2112 if ((mii_bmsr_data & BMSR_LSTATUS) == 0) 2113 netdev_dbg(adapter->netdev, 2114 "Link may change when suspend\n"); 2115 } 2116 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2117 /* only link up can wake up */ 2118 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) { 2119 netdev_dbg(adapter->netdev, 2120 "read write phy register failed\n"); 2121 goto wol_dis; 2122 } 2123 } 2124 /* clear phy interrupt */ 2125 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data); 2126 /* Config MAC Ctrl register */ 2127 mac_ctrl_data = MAC_CTRL_RX_EN; 2128 /* set to 10/100M halt duplex */ 2129 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT; 2130 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2131 MAC_CTRL_PRMLEN_MASK) << 2132 MAC_CTRL_PRMLEN_SHIFT); 2133 2134 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data); 2135 2136 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2137 if (wufc & AT_WUFC_MAG) 2138 mac_ctrl_data |= MAC_CTRL_BC_EN; 2139 2140 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n", 2141 mac_ctrl_data); 2142 2143 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2144 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2145 /* pcie patch */ 2146 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2147 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2148 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2149 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); 2150 goto suspend_exit; 2151 } 2152 wol_dis: 2153 2154 /* WOL disabled */ 2155 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2156 2157 /* pcie patch */ 2158 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2159 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2160 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2161 2162 atl1e_force_ps(hw); 2163 hw->phy_configured = false; /* re-init PHY when resume */ 2164 2165 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); 2166 2167 suspend_exit: 2168 2169 if (netif_running(netdev)) 2170 atl1e_free_irq(adapter); 2171 2172 pci_disable_device(pdev); 2173 2174 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 2175 2176 return 0; 2177 } 2178 2179 #ifdef CONFIG_PM 2180 static int atl1e_resume(struct pci_dev *pdev) 2181 { 2182 struct net_device *netdev = pci_get_drvdata(pdev); 2183 struct atl1e_adapter *adapter = netdev_priv(netdev); 2184 u32 err; 2185 2186 pci_set_power_state(pdev, PCI_D0); 2187 pci_restore_state(pdev); 2188 2189 err = pci_enable_device(pdev); 2190 if (err) { 2191 netdev_err(adapter->netdev, 2192 "Cannot enable PCI device from suspend\n"); 2193 return err; 2194 } 2195 2196 pci_set_master(pdev); 2197 2198 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */ 2199 2200 pci_enable_wake(pdev, PCI_D3hot, 0); 2201 pci_enable_wake(pdev, PCI_D3cold, 0); 2202 2203 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2204 2205 if (netif_running(netdev)) { 2206 err = atl1e_request_irq(adapter); 2207 if (err) 2208 return err; 2209 } 2210 2211 atl1e_reset_hw(&adapter->hw); 2212 2213 if (netif_running(netdev)) 2214 atl1e_up(adapter); 2215 2216 netif_device_attach(netdev); 2217 2218 return 0; 2219 } 2220 #endif 2221 2222 static void atl1e_shutdown(struct pci_dev *pdev) 2223 { 2224 atl1e_suspend(pdev, PMSG_SUSPEND); 2225 } 2226 2227 static const struct net_device_ops atl1e_netdev_ops = { 2228 .ndo_open = atl1e_open, 2229 .ndo_stop = atl1e_close, 2230 .ndo_start_xmit = atl1e_xmit_frame, 2231 .ndo_get_stats = atl1e_get_stats, 2232 .ndo_set_rx_mode = atl1e_set_multi, 2233 .ndo_validate_addr = eth_validate_addr, 2234 .ndo_set_mac_address = atl1e_set_mac_addr, 2235 .ndo_fix_features = atl1e_fix_features, 2236 .ndo_set_features = atl1e_set_features, 2237 .ndo_change_mtu = atl1e_change_mtu, 2238 .ndo_do_ioctl = atl1e_ioctl, 2239 .ndo_tx_timeout = atl1e_tx_timeout, 2240 #ifdef CONFIG_NET_POLL_CONTROLLER 2241 .ndo_poll_controller = atl1e_netpoll, 2242 #endif 2243 2244 }; 2245 2246 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2247 { 2248 SET_NETDEV_DEV(netdev, &pdev->dev); 2249 pci_set_drvdata(pdev, netdev); 2250 2251 netdev->netdev_ops = &atl1e_netdev_ops; 2252 2253 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2254 /* MTU range: 42 - 8170 */ 2255 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2256 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 2257 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 2258 atl1e_set_ethtool_ops(netdev); 2259 2260 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO | 2261 NETIF_F_HW_VLAN_CTAG_RX; 2262 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX; 2263 /* not enabled by default */ 2264 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS; 2265 return 0; 2266 } 2267 2268 /** 2269 * atl1e_probe - Device Initialization Routine 2270 * @pdev: PCI device information struct 2271 * @ent: entry in atl1e_pci_tbl 2272 * 2273 * Returns 0 on success, negative on failure 2274 * 2275 * atl1e_probe initializes an adapter identified by a pci_dev structure. 2276 * The OS initialization, configuring of the adapter private structure, 2277 * and a hardware reset occur. 2278 */ 2279 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2280 { 2281 struct net_device *netdev; 2282 struct atl1e_adapter *adapter = NULL; 2283 static int cards_found; 2284 2285 int err = 0; 2286 2287 err = pci_enable_device(pdev); 2288 if (err) { 2289 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2290 return err; 2291 } 2292 2293 /* 2294 * The atl1e chip can DMA to 64-bit addresses, but it uses a single 2295 * shared register for the high 32 bits, so only a single, aligned, 2296 * 4 GB physical address range can be used at a time. 2297 * 2298 * Supporting 64-bit DMA on this hardware is more trouble than it's 2299 * worth. It is far easier to limit to 32-bit DMA than update 2300 * various kernel subsystems to support the mechanics required by a 2301 * fixed-high-32-bit system. 2302 */ 2303 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2304 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2305 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2306 goto err_dma; 2307 } 2308 2309 err = pci_request_regions(pdev, atl1e_driver_name); 2310 if (err) { 2311 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2312 goto err_pci_reg; 2313 } 2314 2315 pci_set_master(pdev); 2316 2317 netdev = alloc_etherdev(sizeof(struct atl1e_adapter)); 2318 if (netdev == NULL) { 2319 err = -ENOMEM; 2320 goto err_alloc_etherdev; 2321 } 2322 2323 err = atl1e_init_netdev(netdev, pdev); 2324 if (err) { 2325 netdev_err(netdev, "init netdevice failed\n"); 2326 goto err_init_netdev; 2327 } 2328 adapter = netdev_priv(netdev); 2329 adapter->bd_number = cards_found; 2330 adapter->netdev = netdev; 2331 adapter->pdev = pdev; 2332 adapter->hw.adapter = adapter; 2333 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0); 2334 if (!adapter->hw.hw_addr) { 2335 err = -EIO; 2336 netdev_err(netdev, "cannot map device registers\n"); 2337 goto err_ioremap; 2338 } 2339 2340 /* init mii data */ 2341 adapter->mii.dev = netdev; 2342 adapter->mii.mdio_read = atl1e_mdio_read; 2343 adapter->mii.mdio_write = atl1e_mdio_write; 2344 adapter->mii.phy_id_mask = 0x1f; 2345 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2346 2347 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64); 2348 2349 timer_setup(&adapter->phy_config_timer, atl1e_phy_config, 0); 2350 2351 /* get user settings */ 2352 atl1e_check_options(adapter); 2353 /* 2354 * Mark all PCI regions associated with PCI device 2355 * pdev as being reserved by owner atl1e_driver_name 2356 * Enables bus-mastering on the device and calls 2357 * pcibios_set_master to do the needed arch specific settings 2358 */ 2359 atl1e_setup_pcicmd(pdev); 2360 /* setup the private structure */ 2361 err = atl1e_sw_init(adapter); 2362 if (err) { 2363 netdev_err(netdev, "net device private data init failed\n"); 2364 goto err_sw_init; 2365 } 2366 2367 /* Init GPHY as early as possible due to power saving issue */ 2368 atl1e_phy_init(&adapter->hw); 2369 /* reset the controller to 2370 * put the device in a known good starting state */ 2371 err = atl1e_reset_hw(&adapter->hw); 2372 if (err) { 2373 err = -EIO; 2374 goto err_reset; 2375 } 2376 2377 if (atl1e_read_mac_addr(&adapter->hw) != 0) { 2378 err = -EIO; 2379 netdev_err(netdev, "get mac address failed\n"); 2380 goto err_eeprom; 2381 } 2382 2383 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2384 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr); 2385 2386 INIT_WORK(&adapter->reset_task, atl1e_reset_task); 2387 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task); 2388 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE); 2389 err = register_netdev(netdev); 2390 if (err) { 2391 netdev_err(netdev, "register netdevice failed\n"); 2392 goto err_register; 2393 } 2394 2395 /* assume we have no link for now */ 2396 netif_stop_queue(netdev); 2397 netif_carrier_off(netdev); 2398 2399 cards_found++; 2400 2401 return 0; 2402 2403 err_reset: 2404 err_register: 2405 err_sw_init: 2406 err_eeprom: 2407 pci_iounmap(pdev, adapter->hw.hw_addr); 2408 err_init_netdev: 2409 err_ioremap: 2410 free_netdev(netdev); 2411 err_alloc_etherdev: 2412 pci_release_regions(pdev); 2413 err_pci_reg: 2414 err_dma: 2415 pci_disable_device(pdev); 2416 return err; 2417 } 2418 2419 /** 2420 * atl1e_remove - Device Removal Routine 2421 * @pdev: PCI device information struct 2422 * 2423 * atl1e_remove is called by the PCI subsystem to alert the driver 2424 * that it should release a PCI device. The could be caused by a 2425 * Hot-Plug event, or because the driver is going to be removed from 2426 * memory. 2427 */ 2428 static void atl1e_remove(struct pci_dev *pdev) 2429 { 2430 struct net_device *netdev = pci_get_drvdata(pdev); 2431 struct atl1e_adapter *adapter = netdev_priv(netdev); 2432 2433 /* 2434 * flush_scheduled work may reschedule our watchdog task, so 2435 * explicitly disable watchdog tasks from being rescheduled 2436 */ 2437 set_bit(__AT_DOWN, &adapter->flags); 2438 2439 atl1e_del_timer(adapter); 2440 atl1e_cancel_work(adapter); 2441 2442 unregister_netdev(netdev); 2443 atl1e_free_ring_resources(adapter); 2444 atl1e_force_ps(&adapter->hw); 2445 pci_iounmap(pdev, adapter->hw.hw_addr); 2446 pci_release_regions(pdev); 2447 free_netdev(netdev); 2448 pci_disable_device(pdev); 2449 } 2450 2451 /** 2452 * atl1e_io_error_detected - called when PCI error is detected 2453 * @pdev: Pointer to PCI device 2454 * @state: The current pci connection state 2455 * 2456 * This function is called after a PCI bus error affecting 2457 * this device has been detected. 2458 */ 2459 static pci_ers_result_t 2460 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2461 { 2462 struct net_device *netdev = pci_get_drvdata(pdev); 2463 struct atl1e_adapter *adapter = netdev_priv(netdev); 2464 2465 netif_device_detach(netdev); 2466 2467 if (state == pci_channel_io_perm_failure) 2468 return PCI_ERS_RESULT_DISCONNECT; 2469 2470 if (netif_running(netdev)) 2471 atl1e_down(adapter); 2472 2473 pci_disable_device(pdev); 2474 2475 /* Request a slot slot reset. */ 2476 return PCI_ERS_RESULT_NEED_RESET; 2477 } 2478 2479 /** 2480 * atl1e_io_slot_reset - called after the pci bus has been reset. 2481 * @pdev: Pointer to PCI device 2482 * 2483 * Restart the card from scratch, as if from a cold-boot. Implementation 2484 * resembles the first-half of the e1000_resume routine. 2485 */ 2486 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev) 2487 { 2488 struct net_device *netdev = pci_get_drvdata(pdev); 2489 struct atl1e_adapter *adapter = netdev_priv(netdev); 2490 2491 if (pci_enable_device(pdev)) { 2492 netdev_err(adapter->netdev, 2493 "Cannot re-enable PCI device after reset\n"); 2494 return PCI_ERS_RESULT_DISCONNECT; 2495 } 2496 pci_set_master(pdev); 2497 2498 pci_enable_wake(pdev, PCI_D3hot, 0); 2499 pci_enable_wake(pdev, PCI_D3cold, 0); 2500 2501 atl1e_reset_hw(&adapter->hw); 2502 2503 return PCI_ERS_RESULT_RECOVERED; 2504 } 2505 2506 /** 2507 * atl1e_io_resume - called when traffic can start flowing again. 2508 * @pdev: Pointer to PCI device 2509 * 2510 * This callback is called when the error recovery driver tells us that 2511 * its OK to resume normal operation. Implementation resembles the 2512 * second-half of the atl1e_resume routine. 2513 */ 2514 static void atl1e_io_resume(struct pci_dev *pdev) 2515 { 2516 struct net_device *netdev = pci_get_drvdata(pdev); 2517 struct atl1e_adapter *adapter = netdev_priv(netdev); 2518 2519 if (netif_running(netdev)) { 2520 if (atl1e_up(adapter)) { 2521 netdev_err(adapter->netdev, 2522 "can't bring device back up after reset\n"); 2523 return; 2524 } 2525 } 2526 2527 netif_device_attach(netdev); 2528 } 2529 2530 static const struct pci_error_handlers atl1e_err_handler = { 2531 .error_detected = atl1e_io_error_detected, 2532 .slot_reset = atl1e_io_slot_reset, 2533 .resume = atl1e_io_resume, 2534 }; 2535 2536 static struct pci_driver atl1e_driver = { 2537 .name = atl1e_driver_name, 2538 .id_table = atl1e_pci_tbl, 2539 .probe = atl1e_probe, 2540 .remove = atl1e_remove, 2541 /* Power Management Hooks */ 2542 #ifdef CONFIG_PM 2543 .suspend = atl1e_suspend, 2544 .resume = atl1e_resume, 2545 #endif 2546 .shutdown = atl1e_shutdown, 2547 .err_handler = &atl1e_err_handler 2548 }; 2549 2550 module_pci_driver(atl1e_driver); 2551