1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright(c) 2007 Atheros Corporation. All rights reserved. 4 * 5 * Derived from Intel e1000 driver 6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 7 */ 8 9 #include "atl1e.h" 10 11 char atl1e_driver_name[] = "ATL1E"; 12 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026 13 /* 14 * atl1e_pci_tbl - PCI Device ID Table 15 * 16 * Wildcard entries (PCI_ANY_ID) should come last 17 * Last entry must be all 0s 18 * 19 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 20 * Class, Class Mask, private data (not used) } 21 */ 22 static const struct pci_device_id atl1e_pci_tbl[] = { 23 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)}, 24 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)}, 25 /* required last entry */ 26 { 0 } 27 }; 28 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl); 29 30 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>"); 31 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); 32 MODULE_LICENSE("GPL"); 33 34 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter); 35 36 static const u16 37 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 38 { 39 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD}, 40 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD}, 41 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD}, 42 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD} 43 }; 44 45 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] = 46 { 47 REG_RXF0_BASE_ADDR_HI, 48 REG_RXF1_BASE_ADDR_HI, 49 REG_RXF2_BASE_ADDR_HI, 50 REG_RXF3_BASE_ADDR_HI 51 }; 52 53 static const u16 54 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 55 { 56 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO}, 57 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO}, 58 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO}, 59 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO} 60 }; 61 62 static const u16 63 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 64 { 65 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO}, 66 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO}, 67 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO}, 68 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO} 69 }; 70 71 static const u16 atl1e_pay_load_size[] = { 72 128, 256, 512, 1024, 2048, 4096, 73 }; 74 75 /** 76 * atl1e_irq_enable - Enable default interrupt generation settings 77 * @adapter: board private structure 78 */ 79 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter) 80 { 81 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 82 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 83 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK); 84 AT_WRITE_FLUSH(&adapter->hw); 85 } 86 } 87 88 /** 89 * atl1e_irq_disable - Mask off interrupt generation on the NIC 90 * @adapter: board private structure 91 */ 92 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter) 93 { 94 atomic_inc(&adapter->irq_sem); 95 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 96 AT_WRITE_FLUSH(&adapter->hw); 97 synchronize_irq(adapter->pdev->irq); 98 } 99 100 /** 101 * atl1e_irq_reset - reset interrupt confiure on the NIC 102 * @adapter: board private structure 103 */ 104 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter) 105 { 106 atomic_set(&adapter->irq_sem, 0); 107 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 108 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 109 AT_WRITE_FLUSH(&adapter->hw); 110 } 111 112 /** 113 * atl1e_phy_config - Timer Call-back 114 * @data: pointer to netdev cast into an unsigned long 115 */ 116 static void atl1e_phy_config(struct timer_list *t) 117 { 118 struct atl1e_adapter *adapter = from_timer(adapter, t, 119 phy_config_timer); 120 struct atl1e_hw *hw = &adapter->hw; 121 unsigned long flags; 122 123 spin_lock_irqsave(&adapter->mdio_lock, flags); 124 atl1e_restart_autoneg(hw); 125 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 126 } 127 128 void atl1e_reinit_locked(struct atl1e_adapter *adapter) 129 { 130 131 WARN_ON(in_interrupt()); 132 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 133 msleep(1); 134 atl1e_down(adapter); 135 atl1e_up(adapter); 136 clear_bit(__AT_RESETTING, &adapter->flags); 137 } 138 139 static void atl1e_reset_task(struct work_struct *work) 140 { 141 struct atl1e_adapter *adapter; 142 adapter = container_of(work, struct atl1e_adapter, reset_task); 143 144 atl1e_reinit_locked(adapter); 145 } 146 147 static int atl1e_check_link(struct atl1e_adapter *adapter) 148 { 149 struct atl1e_hw *hw = &adapter->hw; 150 struct net_device *netdev = adapter->netdev; 151 int err = 0; 152 u16 speed, duplex, phy_data; 153 154 /* MII_BMSR must read twice */ 155 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 156 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data); 157 if ((phy_data & BMSR_LSTATUS) == 0) { 158 /* link down */ 159 if (netif_carrier_ok(netdev)) { /* old link state: Up */ 160 u32 value; 161 /* disable rx */ 162 value = AT_READ_REG(hw, REG_MAC_CTRL); 163 value &= ~MAC_CTRL_RX_EN; 164 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 165 adapter->link_speed = SPEED_0; 166 netif_carrier_off(netdev); 167 netif_stop_queue(netdev); 168 } 169 } else { 170 /* Link Up */ 171 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex); 172 if (unlikely(err)) 173 return err; 174 175 /* link result is our setting */ 176 if (adapter->link_speed != speed || 177 adapter->link_duplex != duplex) { 178 adapter->link_speed = speed; 179 adapter->link_duplex = duplex; 180 atl1e_setup_mac_ctrl(adapter); 181 netdev_info(netdev, 182 "NIC Link is Up <%d Mbps %s Duplex>\n", 183 adapter->link_speed, 184 adapter->link_duplex == FULL_DUPLEX ? 185 "Full" : "Half"); 186 } 187 188 if (!netif_carrier_ok(netdev)) { 189 /* Link down -> Up */ 190 netif_carrier_on(netdev); 191 netif_wake_queue(netdev); 192 } 193 } 194 return 0; 195 } 196 197 /** 198 * atl1e_link_chg_task - deal with link change event Out of interrupt context 199 * @netdev: network interface device structure 200 */ 201 static void atl1e_link_chg_task(struct work_struct *work) 202 { 203 struct atl1e_adapter *adapter; 204 unsigned long flags; 205 206 adapter = container_of(work, struct atl1e_adapter, link_chg_task); 207 spin_lock_irqsave(&adapter->mdio_lock, flags); 208 atl1e_check_link(adapter); 209 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 210 } 211 212 static void atl1e_link_chg_event(struct atl1e_adapter *adapter) 213 { 214 struct net_device *netdev = adapter->netdev; 215 u16 phy_data = 0; 216 u16 link_up = 0; 217 218 spin_lock(&adapter->mdio_lock); 219 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 220 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 221 spin_unlock(&adapter->mdio_lock); 222 link_up = phy_data & BMSR_LSTATUS; 223 /* notify upper layer link down ASAP */ 224 if (!link_up) { 225 if (netif_carrier_ok(netdev)) { 226 /* old link state: Up */ 227 netdev_info(netdev, "NIC Link is Down\n"); 228 adapter->link_speed = SPEED_0; 229 netif_stop_queue(netdev); 230 } 231 } 232 schedule_work(&adapter->link_chg_task); 233 } 234 235 static void atl1e_del_timer(struct atl1e_adapter *adapter) 236 { 237 del_timer_sync(&adapter->phy_config_timer); 238 } 239 240 static void atl1e_cancel_work(struct atl1e_adapter *adapter) 241 { 242 cancel_work_sync(&adapter->reset_task); 243 cancel_work_sync(&adapter->link_chg_task); 244 } 245 246 /** 247 * atl1e_tx_timeout - Respond to a Tx Hang 248 * @netdev: network interface device structure 249 */ 250 static void atl1e_tx_timeout(struct net_device *netdev, unsigned int txqueue) 251 { 252 struct atl1e_adapter *adapter = netdev_priv(netdev); 253 254 /* Do the reset outside of interrupt context */ 255 schedule_work(&adapter->reset_task); 256 } 257 258 /** 259 * atl1e_set_multi - Multicast and Promiscuous mode set 260 * @netdev: network interface device structure 261 * 262 * The set_multi entry point is called whenever the multicast address 263 * list or the network interface flags are updated. This routine is 264 * responsible for configuring the hardware for proper multicast, 265 * promiscuous mode, and all-multi behavior. 266 */ 267 static void atl1e_set_multi(struct net_device *netdev) 268 { 269 struct atl1e_adapter *adapter = netdev_priv(netdev); 270 struct atl1e_hw *hw = &adapter->hw; 271 struct netdev_hw_addr *ha; 272 u32 mac_ctrl_data = 0; 273 u32 hash_value; 274 275 /* Check for Promiscuous and All Multicast modes */ 276 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL); 277 278 if (netdev->flags & IFF_PROMISC) { 279 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 280 } else if (netdev->flags & IFF_ALLMULTI) { 281 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 282 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 283 } else { 284 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 285 } 286 287 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 288 289 /* clear the old settings from the multicast hash table */ 290 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 291 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 292 293 /* comoute mc addresses' hash value ,and put it into hash table */ 294 netdev_for_each_mc_addr(ha, netdev) { 295 hash_value = atl1e_hash_mc_addr(hw, ha->addr); 296 atl1e_hash_set(hw, hash_value); 297 } 298 } 299 300 static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data) 301 { 302 303 if (features & NETIF_F_RXALL) { 304 /* enable RX of ALL frames */ 305 *mac_ctrl_data |= MAC_CTRL_DBG; 306 } else { 307 /* disable RX of ALL frames */ 308 *mac_ctrl_data &= ~MAC_CTRL_DBG; 309 } 310 } 311 312 static void atl1e_rx_mode(struct net_device *netdev, 313 netdev_features_t features) 314 { 315 struct atl1e_adapter *adapter = netdev_priv(netdev); 316 u32 mac_ctrl_data = 0; 317 318 netdev_dbg(adapter->netdev, "%s\n", __func__); 319 320 atl1e_irq_disable(adapter); 321 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 322 __atl1e_rx_mode(features, &mac_ctrl_data); 323 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 324 atl1e_irq_enable(adapter); 325 } 326 327 328 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 329 { 330 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 331 /* enable VLAN tag insert/strip */ 332 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 333 } else { 334 /* disable VLAN tag insert/strip */ 335 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 336 } 337 } 338 339 static void atl1e_vlan_mode(struct net_device *netdev, 340 netdev_features_t features) 341 { 342 struct atl1e_adapter *adapter = netdev_priv(netdev); 343 u32 mac_ctrl_data = 0; 344 345 netdev_dbg(adapter->netdev, "%s\n", __func__); 346 347 atl1e_irq_disable(adapter); 348 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL); 349 __atl1e_vlan_mode(features, &mac_ctrl_data); 350 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 351 atl1e_irq_enable(adapter); 352 } 353 354 static void atl1e_restore_vlan(struct atl1e_adapter *adapter) 355 { 356 netdev_dbg(adapter->netdev, "%s\n", __func__); 357 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features); 358 } 359 360 /** 361 * atl1e_set_mac - Change the Ethernet Address of the NIC 362 * @netdev: network interface device structure 363 * @p: pointer to an address structure 364 * 365 * Returns 0 on success, negative on failure 366 */ 367 static int atl1e_set_mac_addr(struct net_device *netdev, void *p) 368 { 369 struct atl1e_adapter *adapter = netdev_priv(netdev); 370 struct sockaddr *addr = p; 371 372 if (!is_valid_ether_addr(addr->sa_data)) 373 return -EADDRNOTAVAIL; 374 375 if (netif_running(netdev)) 376 return -EBUSY; 377 378 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 379 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 380 381 atl1e_hw_set_mac_addr(&adapter->hw); 382 383 return 0; 384 } 385 386 static netdev_features_t atl1e_fix_features(struct net_device *netdev, 387 netdev_features_t features) 388 { 389 /* 390 * Since there is no support for separate rx/tx vlan accel 391 * enable/disable make sure tx flag is always in same state as rx. 392 */ 393 if (features & NETIF_F_HW_VLAN_CTAG_RX) 394 features |= NETIF_F_HW_VLAN_CTAG_TX; 395 else 396 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 397 398 return features; 399 } 400 401 static int atl1e_set_features(struct net_device *netdev, 402 netdev_features_t features) 403 { 404 netdev_features_t changed = netdev->features ^ features; 405 406 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 407 atl1e_vlan_mode(netdev, features); 408 409 if (changed & NETIF_F_RXALL) 410 atl1e_rx_mode(netdev, features); 411 412 413 return 0; 414 } 415 416 /** 417 * atl1e_change_mtu - Change the Maximum Transfer Unit 418 * @netdev: network interface device structure 419 * @new_mtu: new value for maximum frame size 420 * 421 * Returns 0 on success, negative on failure 422 */ 423 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu) 424 { 425 struct atl1e_adapter *adapter = netdev_priv(netdev); 426 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 427 428 /* set MTU */ 429 if (netif_running(netdev)) { 430 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 431 msleep(1); 432 netdev->mtu = new_mtu; 433 adapter->hw.max_frame_size = new_mtu; 434 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3; 435 atl1e_down(adapter); 436 atl1e_up(adapter); 437 clear_bit(__AT_RESETTING, &adapter->flags); 438 } 439 return 0; 440 } 441 442 /* 443 * caller should hold mdio_lock 444 */ 445 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 446 { 447 struct atl1e_adapter *adapter = netdev_priv(netdev); 448 u16 result; 449 450 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); 451 return result; 452 } 453 454 static void atl1e_mdio_write(struct net_device *netdev, int phy_id, 455 int reg_num, int val) 456 { 457 struct atl1e_adapter *adapter = netdev_priv(netdev); 458 459 if (atl1e_write_phy_reg(&adapter->hw, 460 reg_num & MDIO_REG_ADDR_MASK, val)) 461 netdev_err(netdev, "write phy register failed\n"); 462 } 463 464 static int atl1e_mii_ioctl(struct net_device *netdev, 465 struct ifreq *ifr, int cmd) 466 { 467 struct atl1e_adapter *adapter = netdev_priv(netdev); 468 struct mii_ioctl_data *data = if_mii(ifr); 469 unsigned long flags; 470 int retval = 0; 471 472 if (!netif_running(netdev)) 473 return -EINVAL; 474 475 spin_lock_irqsave(&adapter->mdio_lock, flags); 476 switch (cmd) { 477 case SIOCGMIIPHY: 478 data->phy_id = 0; 479 break; 480 481 case SIOCGMIIREG: 482 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 483 &data->val_out)) { 484 retval = -EIO; 485 goto out; 486 } 487 break; 488 489 case SIOCSMIIREG: 490 if (data->reg_num & ~(0x1F)) { 491 retval = -EFAULT; 492 goto out; 493 } 494 495 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n", 496 data->reg_num, data->val_in); 497 if (atl1e_write_phy_reg(&adapter->hw, 498 data->reg_num, data->val_in)) { 499 retval = -EIO; 500 goto out; 501 } 502 break; 503 504 default: 505 retval = -EOPNOTSUPP; 506 break; 507 } 508 out: 509 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 510 return retval; 511 512 } 513 514 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 515 { 516 switch (cmd) { 517 case SIOCGMIIPHY: 518 case SIOCGMIIREG: 519 case SIOCSMIIREG: 520 return atl1e_mii_ioctl(netdev, ifr, cmd); 521 default: 522 return -EOPNOTSUPP; 523 } 524 } 525 526 static void atl1e_setup_pcicmd(struct pci_dev *pdev) 527 { 528 u16 cmd; 529 530 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 531 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO); 532 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); 533 pci_write_config_word(pdev, PCI_COMMAND, cmd); 534 535 /* 536 * some motherboards BIOS(PXE/EFI) driver may set PME 537 * while they transfer control to OS (Windows/Linux) 538 * so we should clear this bit before NIC work normally 539 */ 540 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0); 541 msleep(1); 542 } 543 544 /** 545 * atl1e_alloc_queues - Allocate memory for all rings 546 * @adapter: board private structure to initialize 547 * 548 */ 549 static int atl1e_alloc_queues(struct atl1e_adapter *adapter) 550 { 551 return 0; 552 } 553 554 /** 555 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter) 556 * @adapter: board private structure to initialize 557 * 558 * atl1e_sw_init initializes the Adapter private data structure. 559 * Fields are initialized based on PCI device information and 560 * OS network device settings (MTU size). 561 */ 562 static int atl1e_sw_init(struct atl1e_adapter *adapter) 563 { 564 struct atl1e_hw *hw = &adapter->hw; 565 struct pci_dev *pdev = adapter->pdev; 566 u32 phy_status_data = 0; 567 568 adapter->wol = 0; 569 adapter->link_speed = SPEED_0; /* hardware init */ 570 adapter->link_duplex = FULL_DUPLEX; 571 adapter->num_rx_queues = 1; 572 573 /* PCI config space info */ 574 hw->vendor_id = pdev->vendor; 575 hw->device_id = pdev->device; 576 hw->subsystem_vendor_id = pdev->subsystem_vendor; 577 hw->subsystem_id = pdev->subsystem_device; 578 hw->revision_id = pdev->revision; 579 580 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 581 582 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 583 /* nic type */ 584 if (hw->revision_id >= 0xF0) { 585 hw->nic_type = athr_l2e_revB; 586 } else { 587 if (phy_status_data & PHY_STATUS_100M) 588 hw->nic_type = athr_l1e; 589 else 590 hw->nic_type = athr_l2e_revA; 591 } 592 593 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS); 594 595 if (phy_status_data & PHY_STATUS_EMI_CA) 596 hw->emi_ca = true; 597 else 598 hw->emi_ca = false; 599 600 hw->phy_configured = false; 601 hw->preamble_len = 7; 602 hw->max_frame_size = adapter->netdev->mtu; 603 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN + 604 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3; 605 606 hw->rrs_type = atl1e_rrs_disable; 607 hw->indirect_tab = 0; 608 hw->base_cpu = 0; 609 610 /* need confirm */ 611 612 hw->ict = 50000; /* 100ms */ 613 hw->smb_timer = 200000; /* 200ms */ 614 hw->tpd_burst = 5; 615 hw->rrd_thresh = 1; 616 hw->tpd_thresh = adapter->tx_ring.count / 2; 617 hw->rx_count_down = 4; /* 2us resolution */ 618 hw->tx_count_down = hw->imt * 4 / 3; 619 hw->dmar_block = atl1e_dma_req_1024; 620 hw->dmaw_block = atl1e_dma_req_1024; 621 hw->dmar_dly_cnt = 15; 622 hw->dmaw_dly_cnt = 4; 623 624 if (atl1e_alloc_queues(adapter)) { 625 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n"); 626 return -ENOMEM; 627 } 628 629 atomic_set(&adapter->irq_sem, 1); 630 spin_lock_init(&adapter->mdio_lock); 631 632 set_bit(__AT_DOWN, &adapter->flags); 633 634 return 0; 635 } 636 637 /** 638 * atl1e_clean_tx_ring - Free Tx-skb 639 * @adapter: board private structure 640 */ 641 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter) 642 { 643 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 644 struct atl1e_tx_buffer *tx_buffer = NULL; 645 struct pci_dev *pdev = adapter->pdev; 646 u16 index, ring_count; 647 648 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL) 649 return; 650 651 ring_count = tx_ring->count; 652 /* first unmmap dma */ 653 for (index = 0; index < ring_count; index++) { 654 tx_buffer = &tx_ring->tx_buffer[index]; 655 if (tx_buffer->dma) { 656 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 657 dma_unmap_single(&pdev->dev, tx_buffer->dma, 658 tx_buffer->length, 659 DMA_TO_DEVICE); 660 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 661 dma_unmap_page(&pdev->dev, tx_buffer->dma, 662 tx_buffer->length, 663 DMA_TO_DEVICE); 664 tx_buffer->dma = 0; 665 } 666 } 667 /* second free skb */ 668 for (index = 0; index < ring_count; index++) { 669 tx_buffer = &tx_ring->tx_buffer[index]; 670 if (tx_buffer->skb) { 671 dev_kfree_skb_any(tx_buffer->skb); 672 tx_buffer->skb = NULL; 673 } 674 } 675 /* Zero out Tx-buffers */ 676 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) * 677 ring_count); 678 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) * 679 ring_count); 680 } 681 682 /** 683 * atl1e_clean_rx_ring - Free rx-reservation skbs 684 * @adapter: board private structure 685 */ 686 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter) 687 { 688 struct atl1e_rx_ring *rx_ring = 689 &adapter->rx_ring; 690 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc; 691 u16 i, j; 692 693 694 if (adapter->ring_vir_addr == NULL) 695 return; 696 /* Zero out the descriptor ring */ 697 for (i = 0; i < adapter->num_rx_queues; i++) { 698 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 699 if (rx_page_desc[i].rx_page[j].addr != NULL) { 700 memset(rx_page_desc[i].rx_page[j].addr, 0, 701 rx_ring->real_page_size); 702 } 703 } 704 } 705 } 706 707 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size) 708 { 709 *ring_size = ((u32)(adapter->tx_ring.count * 710 sizeof(struct atl1e_tpd_desc) + 7 711 /* tx ring, qword align */ 712 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE * 713 adapter->num_rx_queues + 31 714 /* rx ring, 32 bytes align */ 715 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) * 716 sizeof(u32) + 3)); 717 /* tx, rx cmd, dword align */ 718 } 719 720 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter) 721 { 722 struct atl1e_rx_ring *rx_ring = NULL; 723 724 rx_ring = &adapter->rx_ring; 725 726 rx_ring->real_page_size = adapter->rx_ring.page_size 727 + adapter->hw.max_frame_size 728 + ETH_HLEN + VLAN_HLEN 729 + ETH_FCS_LEN; 730 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32); 731 atl1e_cal_ring_size(adapter, &adapter->ring_size); 732 733 adapter->ring_vir_addr = NULL; 734 adapter->rx_ring.desc = NULL; 735 rwlock_init(&adapter->tx_ring.tx_lock); 736 } 737 738 /* 739 * Read / Write Ptr Initialize: 740 */ 741 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter) 742 { 743 struct atl1e_tx_ring *tx_ring = NULL; 744 struct atl1e_rx_ring *rx_ring = NULL; 745 struct atl1e_rx_page_desc *rx_page_desc = NULL; 746 int i, j; 747 748 tx_ring = &adapter->tx_ring; 749 rx_ring = &adapter->rx_ring; 750 rx_page_desc = rx_ring->rx_page_desc; 751 752 tx_ring->next_to_use = 0; 753 atomic_set(&tx_ring->next_to_clean, 0); 754 755 for (i = 0; i < adapter->num_rx_queues; i++) { 756 rx_page_desc[i].rx_using = 0; 757 rx_page_desc[i].rx_nxseq = 0; 758 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 759 *rx_page_desc[i].rx_page[j].write_offset_addr = 0; 760 rx_page_desc[i].rx_page[j].read_offset = 0; 761 } 762 } 763 } 764 765 /** 766 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources 767 * @adapter: board private structure 768 * 769 * Free all transmit software resources 770 */ 771 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter) 772 { 773 struct pci_dev *pdev = adapter->pdev; 774 775 atl1e_clean_tx_ring(adapter); 776 atl1e_clean_rx_ring(adapter); 777 778 if (adapter->ring_vir_addr) { 779 dma_free_coherent(&pdev->dev, adapter->ring_size, 780 adapter->ring_vir_addr, adapter->ring_dma); 781 adapter->ring_vir_addr = NULL; 782 } 783 784 if (adapter->tx_ring.tx_buffer) { 785 kfree(adapter->tx_ring.tx_buffer); 786 adapter->tx_ring.tx_buffer = NULL; 787 } 788 } 789 790 /** 791 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources 792 * @adapter: board private structure 793 * 794 * Return 0 on success, negative on failure 795 */ 796 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter) 797 { 798 struct pci_dev *pdev = adapter->pdev; 799 struct atl1e_tx_ring *tx_ring; 800 struct atl1e_rx_ring *rx_ring; 801 struct atl1e_rx_page_desc *rx_page_desc; 802 int size, i, j; 803 u32 offset = 0; 804 int err = 0; 805 806 if (adapter->ring_vir_addr != NULL) 807 return 0; /* alloced already */ 808 809 tx_ring = &adapter->tx_ring; 810 rx_ring = &adapter->rx_ring; 811 812 /* real ring DMA buffer */ 813 814 size = adapter->ring_size; 815 adapter->ring_vir_addr = dma_alloc_coherent(&pdev->dev, 816 adapter->ring_size, 817 &adapter->ring_dma, GFP_KERNEL); 818 if (adapter->ring_vir_addr == NULL) { 819 netdev_err(adapter->netdev, 820 "dma_alloc_coherent failed, size = D%d\n", size); 821 return -ENOMEM; 822 } 823 824 rx_page_desc = rx_ring->rx_page_desc; 825 826 /* Init TPD Ring */ 827 tx_ring->dma = roundup(adapter->ring_dma, 8); 828 offset = tx_ring->dma - adapter->ring_dma; 829 tx_ring->desc = adapter->ring_vir_addr + offset; 830 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count); 831 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL); 832 if (tx_ring->tx_buffer == NULL) { 833 err = -ENOMEM; 834 goto failed; 835 } 836 837 /* Init RXF-Pages */ 838 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count); 839 offset = roundup(offset, 32); 840 841 for (i = 0; i < adapter->num_rx_queues; i++) { 842 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 843 rx_page_desc[i].rx_page[j].dma = 844 adapter->ring_dma + offset; 845 rx_page_desc[i].rx_page[j].addr = 846 adapter->ring_vir_addr + offset; 847 offset += rx_ring->real_page_size; 848 } 849 } 850 851 /* Init CMB dma address */ 852 tx_ring->cmb_dma = adapter->ring_dma + offset; 853 tx_ring->cmb = adapter->ring_vir_addr + offset; 854 offset += sizeof(u32); 855 856 for (i = 0; i < adapter->num_rx_queues; i++) { 857 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 858 rx_page_desc[i].rx_page[j].write_offset_dma = 859 adapter->ring_dma + offset; 860 rx_page_desc[i].rx_page[j].write_offset_addr = 861 adapter->ring_vir_addr + offset; 862 offset += sizeof(u32); 863 } 864 } 865 866 if (unlikely(offset > adapter->ring_size)) { 867 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n", 868 offset, adapter->ring_size); 869 err = -1; 870 goto failed; 871 } 872 873 return 0; 874 failed: 875 if (adapter->ring_vir_addr != NULL) { 876 dma_free_coherent(&pdev->dev, adapter->ring_size, 877 adapter->ring_vir_addr, adapter->ring_dma); 878 adapter->ring_vir_addr = NULL; 879 } 880 return err; 881 } 882 883 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter) 884 { 885 886 struct atl1e_hw *hw = &adapter->hw; 887 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 888 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 889 struct atl1e_rx_page_desc *rx_page_desc = NULL; 890 int i, j; 891 892 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI, 893 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32)); 894 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO, 895 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK)); 896 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count)); 897 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO, 898 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK)); 899 900 rx_page_desc = rx_ring->rx_page_desc; 901 /* RXF Page Physical address / Page Length */ 902 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) { 903 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i], 904 (u32)((adapter->ring_dma & 905 AT_DMA_HI_ADDR_MASK) >> 32)); 906 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) { 907 u32 page_phy_addr; 908 u32 offset_phy_addr; 909 910 page_phy_addr = rx_page_desc[i].rx_page[j].dma; 911 offset_phy_addr = 912 rx_page_desc[i].rx_page[j].write_offset_dma; 913 914 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j], 915 page_phy_addr & AT_DMA_LO_ADDR_MASK); 916 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j], 917 offset_phy_addr & AT_DMA_LO_ADDR_MASK); 918 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1); 919 } 920 } 921 /* Page Length */ 922 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size); 923 /* Load all of base address above */ 924 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 925 } 926 927 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter) 928 { 929 struct atl1e_hw *hw = &adapter->hw; 930 u32 dev_ctrl_data = 0; 931 u32 max_pay_load = 0; 932 u32 jumbo_thresh = 0; 933 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ 934 935 /* configure TXQ param */ 936 if (hw->nic_type != athr_l2e_revB) { 937 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; 938 if (hw->max_frame_size <= 1500) { 939 jumbo_thresh = hw->max_frame_size + extra_size; 940 } else if (hw->max_frame_size < 6*1024) { 941 jumbo_thresh = 942 (hw->max_frame_size + extra_size) * 2 / 3; 943 } else { 944 jumbo_thresh = (hw->max_frame_size + extra_size) / 2; 945 } 946 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3); 947 } 948 949 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL); 950 951 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) & 952 DEVICE_CTRL_MAX_PAYLOAD_MASK; 953 954 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); 955 956 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) & 957 DEVICE_CTRL_MAX_RREQ_SZ_MASK; 958 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 959 960 if (hw->nic_type != athr_l2e_revB) 961 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2, 962 atl1e_pay_load_size[hw->dmar_block]); 963 /* enable TXQ */ 964 AT_WRITE_REGW(hw, REG_TXQ_CTRL, 965 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK) 966 << TXQ_CTRL_NUM_TPD_BURST_SHIFT) 967 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN); 968 } 969 970 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter) 971 { 972 struct atl1e_hw *hw = &adapter->hw; 973 u32 rxf_len = 0; 974 u32 rxf_low = 0; 975 u32 rxf_high = 0; 976 u32 rxf_thresh_data = 0; 977 u32 rxq_ctrl_data = 0; 978 979 if (hw->nic_type != athr_l2e_revB) { 980 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM, 981 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) << 982 RXQ_JMBOSZ_TH_SHIFT | 983 (1 & RXQ_JMBO_LKAH_MASK) << 984 RXQ_JMBO_LKAH_SHIFT)); 985 986 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN); 987 rxf_high = rxf_len * 4 / 5; 988 rxf_low = rxf_len / 5; 989 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK) 990 << RXQ_RXF_PAUSE_TH_HI_SHIFT) | 991 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK) 992 << RXQ_RXF_PAUSE_TH_LO_SHIFT); 993 994 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data); 995 } 996 997 /* RRS */ 998 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); 999 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); 1000 1001 if (hw->rrs_type & atl1e_rrs_ipv4) 1002 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4; 1003 1004 if (hw->rrs_type & atl1e_rrs_ipv4_tcp) 1005 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP; 1006 1007 if (hw->rrs_type & atl1e_rrs_ipv6) 1008 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6; 1009 1010 if (hw->rrs_type & atl1e_rrs_ipv6_tcp) 1011 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP; 1012 1013 if (hw->rrs_type != atl1e_rrs_disable) 1014 rxq_ctrl_data |= 1015 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT); 1016 1017 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 | 1018 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN; 1019 1020 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1021 } 1022 1023 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter) 1024 { 1025 struct atl1e_hw *hw = &adapter->hw; 1026 u32 dma_ctrl_data = 0; 1027 1028 dma_ctrl_data = DMA_CTRL_RXCMB_EN; 1029 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) 1030 << DMA_CTRL_DMAR_BURST_LEN_SHIFT; 1031 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) 1032 << DMA_CTRL_DMAW_BURST_LEN_SHIFT; 1033 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER; 1034 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) 1035 << DMA_CTRL_DMAR_DLY_CNT_SHIFT; 1036 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) 1037 << DMA_CTRL_DMAW_DLY_CNT_SHIFT; 1038 1039 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1040 } 1041 1042 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter) 1043 { 1044 u32 value; 1045 struct atl1e_hw *hw = &adapter->hw; 1046 struct net_device *netdev = adapter->netdev; 1047 1048 /* Config MAC CTRL Register */ 1049 value = MAC_CTRL_TX_EN | 1050 MAC_CTRL_RX_EN ; 1051 1052 if (FULL_DUPLEX == adapter->link_duplex) 1053 value |= MAC_CTRL_DUPLX; 1054 1055 value |= ((u32)((SPEED_1000 == adapter->link_speed) ? 1056 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) << 1057 MAC_CTRL_SPEED_SHIFT); 1058 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1059 1060 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1061 value |= (((u32)adapter->hw.preamble_len & 1062 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT); 1063 1064 __atl1e_vlan_mode(netdev->features, &value); 1065 1066 value |= MAC_CTRL_BC_EN; 1067 if (netdev->flags & IFF_PROMISC) 1068 value |= MAC_CTRL_PROMIS_EN; 1069 if (netdev->flags & IFF_ALLMULTI) 1070 value |= MAC_CTRL_MC_ALL_EN; 1071 if (netdev->features & NETIF_F_RXALL) 1072 value |= MAC_CTRL_DBG; 1073 AT_WRITE_REG(hw, REG_MAC_CTRL, value); 1074 } 1075 1076 /** 1077 * atl1e_configure - Configure Transmit&Receive Unit after Reset 1078 * @adapter: board private structure 1079 * 1080 * Configure the Tx /Rx unit of the MAC after a reset. 1081 */ 1082 static int atl1e_configure(struct atl1e_adapter *adapter) 1083 { 1084 struct atl1e_hw *hw = &adapter->hw; 1085 1086 u32 intr_status_data = 0; 1087 1088 /* clear interrupt status */ 1089 AT_WRITE_REG(hw, REG_ISR, ~0); 1090 1091 /* 1. set MAC Address */ 1092 atl1e_hw_set_mac_addr(hw); 1093 1094 /* 2. Init the Multicast HASH table done by set_muti */ 1095 1096 /* 3. Clear any WOL status */ 1097 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1098 1099 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr 1100 * TPD Ring/SMB/RXF0 Page CMBs, they use the same 1101 * High 32bits memory */ 1102 atl1e_configure_des_ring(adapter); 1103 1104 /* 5. set Interrupt Moderator Timer */ 1105 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt); 1106 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt); 1107 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE | 1108 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN); 1109 1110 /* 6. rx/tx threshold to trig interrupt */ 1111 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh); 1112 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh); 1113 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down); 1114 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down); 1115 1116 /* 7. set Interrupt Clear Timer */ 1117 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict); 1118 1119 /* 8. set MTU */ 1120 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1121 VLAN_HLEN + ETH_FCS_LEN); 1122 1123 /* 9. config TXQ early tx threshold */ 1124 atl1e_configure_tx(adapter); 1125 1126 /* 10. config RXQ */ 1127 atl1e_configure_rx(adapter); 1128 1129 /* 11. config DMA Engine */ 1130 atl1e_configure_dma(adapter); 1131 1132 /* 12. smb timer to trig interrupt */ 1133 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer); 1134 1135 intr_status_data = AT_READ_REG(hw, REG_ISR); 1136 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) { 1137 netdev_err(adapter->netdev, 1138 "atl1e_configure failed, PCIE phy link down\n"); 1139 return -1; 1140 } 1141 1142 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff); 1143 return 0; 1144 } 1145 1146 /** 1147 * atl1e_get_stats - Get System Network Statistics 1148 * @netdev: network interface device structure 1149 * 1150 * Returns the address of the device statistics structure. 1151 * The statistics are actually updated from the timer callback. 1152 */ 1153 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev) 1154 { 1155 struct atl1e_adapter *adapter = netdev_priv(netdev); 1156 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats; 1157 struct net_device_stats *net_stats = &netdev->stats; 1158 1159 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1160 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1161 net_stats->multicast = hw_stats->rx_mcast; 1162 net_stats->collisions = hw_stats->tx_1_col + 1163 hw_stats->tx_2_col + 1164 hw_stats->tx_late_col + 1165 hw_stats->tx_abort_col; 1166 1167 net_stats->rx_errors = hw_stats->rx_frag + 1168 hw_stats->rx_fcs_err + 1169 hw_stats->rx_len_err + 1170 hw_stats->rx_sz_ov + 1171 hw_stats->rx_rrd_ov + 1172 hw_stats->rx_align_err + 1173 hw_stats->rx_rxf_ov; 1174 1175 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1176 net_stats->rx_length_errors = hw_stats->rx_len_err; 1177 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1178 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1179 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1180 1181 net_stats->tx_errors = hw_stats->tx_late_col + 1182 hw_stats->tx_abort_col + 1183 hw_stats->tx_underrun + 1184 hw_stats->tx_trunc; 1185 1186 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1187 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1188 net_stats->tx_window_errors = hw_stats->tx_late_col; 1189 1190 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1191 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1192 1193 return net_stats; 1194 } 1195 1196 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter) 1197 { 1198 u16 hw_reg_addr = 0; 1199 unsigned long *stats_item = NULL; 1200 1201 /* update rx status */ 1202 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1203 stats_item = &adapter->hw_stats.rx_ok; 1204 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1205 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1206 stats_item++; 1207 hw_reg_addr += 4; 1208 } 1209 /* update tx status */ 1210 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1211 stats_item = &adapter->hw_stats.tx_ok; 1212 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1213 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr); 1214 stats_item++; 1215 hw_reg_addr += 4; 1216 } 1217 } 1218 1219 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter) 1220 { 1221 u16 phy_data; 1222 1223 spin_lock(&adapter->mdio_lock); 1224 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data); 1225 spin_unlock(&adapter->mdio_lock); 1226 } 1227 1228 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter) 1229 { 1230 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1231 struct atl1e_tx_buffer *tx_buffer = NULL; 1232 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX); 1233 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1234 1235 while (next_to_clean != hw_next_to_clean) { 1236 tx_buffer = &tx_ring->tx_buffer[next_to_clean]; 1237 if (tx_buffer->dma) { 1238 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) 1239 dma_unmap_single(&adapter->pdev->dev, 1240 tx_buffer->dma, 1241 tx_buffer->length, 1242 DMA_TO_DEVICE); 1243 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) 1244 dma_unmap_page(&adapter->pdev->dev, 1245 tx_buffer->dma, 1246 tx_buffer->length, 1247 DMA_TO_DEVICE); 1248 tx_buffer->dma = 0; 1249 } 1250 1251 if (tx_buffer->skb) { 1252 dev_consume_skb_irq(tx_buffer->skb); 1253 tx_buffer->skb = NULL; 1254 } 1255 1256 if (++next_to_clean == tx_ring->count) 1257 next_to_clean = 0; 1258 } 1259 1260 atomic_set(&tx_ring->next_to_clean, next_to_clean); 1261 1262 if (netif_queue_stopped(adapter->netdev) && 1263 netif_carrier_ok(adapter->netdev)) { 1264 netif_wake_queue(adapter->netdev); 1265 } 1266 1267 return true; 1268 } 1269 1270 /** 1271 * atl1e_intr - Interrupt Handler 1272 * @irq: interrupt number 1273 * @data: pointer to a network interface device structure 1274 */ 1275 static irqreturn_t atl1e_intr(int irq, void *data) 1276 { 1277 struct net_device *netdev = data; 1278 struct atl1e_adapter *adapter = netdev_priv(netdev); 1279 struct atl1e_hw *hw = &adapter->hw; 1280 int max_ints = AT_MAX_INT_WORK; 1281 int handled = IRQ_NONE; 1282 u32 status; 1283 1284 do { 1285 status = AT_READ_REG(hw, REG_ISR); 1286 if ((status & IMR_NORMAL_MASK) == 0 || 1287 (status & ISR_DIS_INT) != 0) { 1288 if (max_ints != AT_MAX_INT_WORK) 1289 handled = IRQ_HANDLED; 1290 break; 1291 } 1292 /* link event */ 1293 if (status & ISR_GPHY) 1294 atl1e_clear_phy_int(adapter); 1295 /* Ack ISR */ 1296 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1297 1298 handled = IRQ_HANDLED; 1299 /* check if PCIE PHY Link down */ 1300 if (status & ISR_PHY_LINKDOWN) { 1301 netdev_err(adapter->netdev, 1302 "pcie phy linkdown %x\n", status); 1303 if (netif_running(adapter->netdev)) { 1304 /* reset MAC */ 1305 atl1e_irq_reset(adapter); 1306 schedule_work(&adapter->reset_task); 1307 break; 1308 } 1309 } 1310 1311 /* check if DMA read/write error */ 1312 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) { 1313 netdev_err(adapter->netdev, 1314 "PCIE DMA RW error (status = 0x%x)\n", 1315 status); 1316 atl1e_irq_reset(adapter); 1317 schedule_work(&adapter->reset_task); 1318 break; 1319 } 1320 1321 if (status & ISR_SMB) 1322 atl1e_update_hw_stats(adapter); 1323 1324 /* link event */ 1325 if (status & (ISR_GPHY | ISR_MANUAL)) { 1326 netdev->stats.tx_carrier_errors++; 1327 atl1e_link_chg_event(adapter); 1328 break; 1329 } 1330 1331 /* transmit event */ 1332 if (status & ISR_TX_EVENT) 1333 atl1e_clean_tx_irq(adapter); 1334 1335 if (status & ISR_RX_EVENT) { 1336 /* 1337 * disable rx interrupts, without 1338 * the synchronize_irq bit 1339 */ 1340 AT_WRITE_REG(hw, REG_IMR, 1341 IMR_NORMAL_MASK & ~ISR_RX_EVENT); 1342 AT_WRITE_FLUSH(hw); 1343 if (likely(napi_schedule_prep( 1344 &adapter->napi))) 1345 __napi_schedule(&adapter->napi); 1346 } 1347 } while (--max_ints > 0); 1348 /* re-enable Interrupt*/ 1349 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1350 1351 return handled; 1352 } 1353 1354 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter, 1355 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs) 1356 { 1357 u8 *packet = (u8 *)(prrs + 1); 1358 struct iphdr *iph; 1359 u16 head_len = ETH_HLEN; 1360 u16 pkt_flags; 1361 u16 err_flags; 1362 1363 skb_checksum_none_assert(skb); 1364 pkt_flags = prrs->pkt_flag; 1365 err_flags = prrs->err_flag; 1366 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) && 1367 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) { 1368 if (pkt_flags & RRS_IS_IPV4) { 1369 if (pkt_flags & RRS_IS_802_3) 1370 head_len += 8; 1371 iph = (struct iphdr *) (packet + head_len); 1372 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF)) 1373 goto hw_xsum; 1374 } 1375 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) { 1376 skb->ip_summed = CHECKSUM_UNNECESSARY; 1377 return; 1378 } 1379 } 1380 1381 hw_xsum : 1382 return; 1383 } 1384 1385 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter, 1386 u8 que) 1387 { 1388 struct atl1e_rx_page_desc *rx_page_desc = 1389 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc; 1390 u8 rx_using = rx_page_desc[que].rx_using; 1391 1392 return &(rx_page_desc[que].rx_page[rx_using]); 1393 } 1394 1395 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que, 1396 int *work_done, int work_to_do) 1397 { 1398 struct net_device *netdev = adapter->netdev; 1399 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring; 1400 struct atl1e_rx_page_desc *rx_page_desc = 1401 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc; 1402 struct sk_buff *skb = NULL; 1403 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que); 1404 u32 packet_size, write_offset; 1405 struct atl1e_recv_ret_status *prrs; 1406 1407 write_offset = *(rx_page->write_offset_addr); 1408 if (likely(rx_page->read_offset < write_offset)) { 1409 do { 1410 if (*work_done >= work_to_do) 1411 break; 1412 (*work_done)++; 1413 /* get new packet's rrs */ 1414 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr + 1415 rx_page->read_offset); 1416 /* check sequence number */ 1417 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) { 1418 netdev_err(netdev, 1419 "rx sequence number error (rx=%d) (expect=%d)\n", 1420 prrs->seq_num, 1421 rx_page_desc[que].rx_nxseq); 1422 rx_page_desc[que].rx_nxseq++; 1423 /* just for debug use */ 1424 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0, 1425 (((u32)prrs->seq_num) << 16) | 1426 rx_page_desc[que].rx_nxseq); 1427 goto fatal_err; 1428 } 1429 rx_page_desc[que].rx_nxseq++; 1430 1431 /* error packet */ 1432 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) && 1433 !(netdev->features & NETIF_F_RXALL)) { 1434 if (prrs->err_flag & (RRS_ERR_BAD_CRC | 1435 RRS_ERR_DRIBBLE | RRS_ERR_CODE | 1436 RRS_ERR_TRUNC)) { 1437 /* hardware error, discard this packet*/ 1438 netdev_err(netdev, 1439 "rx packet desc error %x\n", 1440 *((u32 *)prrs + 1)); 1441 goto skip_pkt; 1442 } 1443 } 1444 1445 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1446 RRS_PKT_SIZE_MASK); 1447 if (likely(!(netdev->features & NETIF_F_RXFCS))) 1448 packet_size -= 4; /* CRC */ 1449 1450 skb = netdev_alloc_skb_ip_align(netdev, packet_size); 1451 if (skb == NULL) 1452 goto skip_pkt; 1453 1454 memcpy(skb->data, (u8 *)(prrs + 1), packet_size); 1455 skb_put(skb, packet_size); 1456 skb->protocol = eth_type_trans(skb, netdev); 1457 atl1e_rx_checksum(adapter, skb, prrs); 1458 1459 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) { 1460 u16 vlan_tag = (prrs->vtag >> 4) | 1461 ((prrs->vtag & 7) << 13) | 1462 ((prrs->vtag & 8) << 9); 1463 netdev_dbg(netdev, 1464 "RXD VLAN TAG<RRD>=0x%04x\n", 1465 prrs->vtag); 1466 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag); 1467 } 1468 napi_gro_receive(&adapter->napi, skb); 1469 1470 skip_pkt: 1471 /* skip current packet whether it's ok or not. */ 1472 rx_page->read_offset += 1473 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) & 1474 RRS_PKT_SIZE_MASK) + 1475 sizeof(struct atl1e_recv_ret_status) + 31) & 1476 0xFFFFFFE0); 1477 1478 if (rx_page->read_offset >= rx_ring->page_size) { 1479 /* mark this page clean */ 1480 u16 reg_addr; 1481 u8 rx_using; 1482 1483 rx_page->read_offset = 1484 *(rx_page->write_offset_addr) = 0; 1485 rx_using = rx_page_desc[que].rx_using; 1486 reg_addr = 1487 atl1e_rx_page_vld_regs[que][rx_using]; 1488 AT_WRITE_REGB(&adapter->hw, reg_addr, 1); 1489 rx_page_desc[que].rx_using ^= 1; 1490 rx_page = atl1e_get_rx_page(adapter, que); 1491 } 1492 write_offset = *(rx_page->write_offset_addr); 1493 } while (rx_page->read_offset < write_offset); 1494 } 1495 1496 return; 1497 1498 fatal_err: 1499 if (!test_bit(__AT_DOWN, &adapter->flags)) 1500 schedule_work(&adapter->reset_task); 1501 } 1502 1503 /** 1504 * atl1e_clean - NAPI Rx polling callback 1505 */ 1506 static int atl1e_clean(struct napi_struct *napi, int budget) 1507 { 1508 struct atl1e_adapter *adapter = 1509 container_of(napi, struct atl1e_adapter, napi); 1510 u32 imr_data; 1511 int work_done = 0; 1512 1513 /* Keep link state information with original netdev */ 1514 if (!netif_carrier_ok(adapter->netdev)) 1515 goto quit_polling; 1516 1517 atl1e_clean_rx_irq(adapter, 0, &work_done, budget); 1518 1519 /* If no Tx and not enough Rx work done, exit the polling mode */ 1520 if (work_done < budget) { 1521 quit_polling: 1522 napi_complete_done(napi, work_done); 1523 imr_data = AT_READ_REG(&adapter->hw, REG_IMR); 1524 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT); 1525 /* test debug */ 1526 if (test_bit(__AT_DOWN, &adapter->flags)) { 1527 atomic_dec(&adapter->irq_sem); 1528 netdev_err(adapter->netdev, 1529 "atl1e_clean is called when AT_DOWN\n"); 1530 } 1531 /* reenable RX intr */ 1532 /*atl1e_irq_enable(adapter); */ 1533 1534 } 1535 return work_done; 1536 } 1537 1538 #ifdef CONFIG_NET_POLL_CONTROLLER 1539 1540 /* 1541 * Polling 'interrupt' - used by things like netconsole to send skbs 1542 * without having to re-enable interrupts. It's not called while 1543 * the interrupt routine is executing. 1544 */ 1545 static void atl1e_netpoll(struct net_device *netdev) 1546 { 1547 struct atl1e_adapter *adapter = netdev_priv(netdev); 1548 1549 disable_irq(adapter->pdev->irq); 1550 atl1e_intr(adapter->pdev->irq, netdev); 1551 enable_irq(adapter->pdev->irq); 1552 } 1553 #endif 1554 1555 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter) 1556 { 1557 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1558 u16 next_to_use = 0; 1559 u16 next_to_clean = 0; 1560 1561 next_to_clean = atomic_read(&tx_ring->next_to_clean); 1562 next_to_use = tx_ring->next_to_use; 1563 1564 return (u16)(next_to_clean > next_to_use) ? 1565 (next_to_clean - next_to_use - 1) : 1566 (tx_ring->count + next_to_clean - next_to_use - 1); 1567 } 1568 1569 /* 1570 * get next usable tpd 1571 * Note: should call atl1e_tdp_avail to make sure 1572 * there is enough tpd to use 1573 */ 1574 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter) 1575 { 1576 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1577 u16 next_to_use = 0; 1578 1579 next_to_use = tx_ring->next_to_use; 1580 if (++tx_ring->next_to_use == tx_ring->count) 1581 tx_ring->next_to_use = 0; 1582 1583 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc)); 1584 return &tx_ring->desc[next_to_use]; 1585 } 1586 1587 static struct atl1e_tx_buffer * 1588 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd) 1589 { 1590 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1591 1592 return &tx_ring->tx_buffer[tpd - tx_ring->desc]; 1593 } 1594 1595 /* Calculate the transmit packet descript needed*/ 1596 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb) 1597 { 1598 int i = 0; 1599 u16 tpd_req = 1; 1600 u16 fg_size = 0; 1601 u16 proto_hdr_len = 0; 1602 1603 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 1604 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]); 1605 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT); 1606 } 1607 1608 if (skb_is_gso(skb)) { 1609 if (skb->protocol == htons(ETH_P_IP) || 1610 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) { 1611 proto_hdr_len = skb_transport_offset(skb) + 1612 tcp_hdrlen(skb); 1613 if (proto_hdr_len < skb_headlen(skb)) { 1614 tpd_req += ((skb_headlen(skb) - proto_hdr_len + 1615 MAX_TX_BUF_LEN - 1) >> 1616 MAX_TX_BUF_SHIFT); 1617 } 1618 } 1619 1620 } 1621 return tpd_req; 1622 } 1623 1624 static int atl1e_tso_csum(struct atl1e_adapter *adapter, 1625 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1626 { 1627 unsigned short offload_type; 1628 u8 hdr_len; 1629 u32 real_len; 1630 1631 if (skb_is_gso(skb)) { 1632 int err; 1633 1634 err = skb_cow_head(skb, 0); 1635 if (err < 0) 1636 return err; 1637 1638 offload_type = skb_shinfo(skb)->gso_type; 1639 1640 if (offload_type & SKB_GSO_TCPV4) { 1641 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1642 + ntohs(ip_hdr(skb)->tot_len)); 1643 1644 if (real_len < skb->len) 1645 pskb_trim(skb, real_len); 1646 1647 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1648 if (unlikely(skb->len == hdr_len)) { 1649 /* only xsum need */ 1650 netdev_warn(adapter->netdev, 1651 "IPV4 tso with zero data??\n"); 1652 goto check_sum; 1653 } else { 1654 ip_hdr(skb)->check = 0; 1655 ip_hdr(skb)->tot_len = 0; 1656 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1657 ip_hdr(skb)->saddr, 1658 ip_hdr(skb)->daddr, 1659 0, IPPROTO_TCP, 0); 1660 tpd->word3 |= (ip_hdr(skb)->ihl & 1661 TDP_V4_IPHL_MASK) << 1662 TPD_V4_IPHL_SHIFT; 1663 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) & 1664 TPD_TCPHDRLEN_MASK) << 1665 TPD_TCPHDRLEN_SHIFT; 1666 tpd->word3 |= ((skb_shinfo(skb)->gso_size) & 1667 TPD_MSS_MASK) << TPD_MSS_SHIFT; 1668 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT; 1669 } 1670 return 0; 1671 } 1672 } 1673 1674 check_sum: 1675 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1676 u8 css, cso; 1677 1678 cso = skb_checksum_start_offset(skb); 1679 if (unlikely(cso & 0x1)) { 1680 netdev_err(adapter->netdev, 1681 "payload offset should not ant event number\n"); 1682 return -1; 1683 } else { 1684 css = cso + skb->csum_offset; 1685 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) << 1686 TPD_PLOADOFFSET_SHIFT; 1687 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) << 1688 TPD_CCSUMOFFSET_SHIFT; 1689 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT; 1690 } 1691 } 1692 1693 return 0; 1694 } 1695 1696 static int atl1e_tx_map(struct atl1e_adapter *adapter, 1697 struct sk_buff *skb, struct atl1e_tpd_desc *tpd) 1698 { 1699 struct atl1e_tpd_desc *use_tpd = NULL; 1700 struct atl1e_tx_buffer *tx_buffer = NULL; 1701 u16 buf_len = skb_headlen(skb); 1702 u16 map_len = 0; 1703 u16 mapped_len = 0; 1704 u16 hdr_len = 0; 1705 u16 nr_frags; 1706 u16 f; 1707 int segment; 1708 int ring_start = adapter->tx_ring.next_to_use; 1709 int ring_end; 1710 1711 nr_frags = skb_shinfo(skb)->nr_frags; 1712 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK; 1713 if (segment) { 1714 /* TSO */ 1715 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1716 use_tpd = tpd; 1717 1718 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1719 tx_buffer->length = map_len; 1720 tx_buffer->dma = dma_map_single(&adapter->pdev->dev, 1721 skb->data, hdr_len, 1722 DMA_TO_DEVICE); 1723 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) 1724 return -ENOSPC; 1725 1726 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1727 mapped_len += map_len; 1728 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1729 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1730 ((cpu_to_le32(tx_buffer->length) & 1731 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1732 } 1733 1734 while (mapped_len < buf_len) { 1735 /* mapped_len == 0, means we should use the first tpd, 1736 which is given by caller */ 1737 if (mapped_len == 0) { 1738 use_tpd = tpd; 1739 } else { 1740 use_tpd = atl1e_get_tpd(adapter); 1741 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1742 } 1743 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1744 tx_buffer->skb = NULL; 1745 1746 tx_buffer->length = map_len = 1747 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ? 1748 MAX_TX_BUF_LEN : (buf_len - mapped_len); 1749 tx_buffer->dma = 1750 dma_map_single(&adapter->pdev->dev, 1751 skb->data + mapped_len, map_len, 1752 DMA_TO_DEVICE); 1753 1754 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1755 /* We need to unwind the mappings we've done */ 1756 ring_end = adapter->tx_ring.next_to_use; 1757 adapter->tx_ring.next_to_use = ring_start; 1758 while (adapter->tx_ring.next_to_use != ring_end) { 1759 tpd = atl1e_get_tpd(adapter); 1760 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1761 dma_unmap_single(&adapter->pdev->dev, 1762 tx_buffer->dma, 1763 tx_buffer->length, 1764 DMA_TO_DEVICE); 1765 } 1766 /* Reset the tx rings next pointer */ 1767 adapter->tx_ring.next_to_use = ring_start; 1768 return -ENOSPC; 1769 } 1770 1771 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); 1772 mapped_len += map_len; 1773 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1774 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1775 ((cpu_to_le32(tx_buffer->length) & 1776 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1777 } 1778 1779 for (f = 0; f < nr_frags; f++) { 1780 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f]; 1781 u16 i; 1782 u16 seg_num; 1783 1784 buf_len = skb_frag_size(frag); 1785 1786 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN; 1787 for (i = 0; i < seg_num; i++) { 1788 use_tpd = atl1e_get_tpd(adapter); 1789 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc)); 1790 1791 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd); 1792 BUG_ON(tx_buffer->skb); 1793 1794 tx_buffer->skb = NULL; 1795 tx_buffer->length = 1796 (buf_len > MAX_TX_BUF_LEN) ? 1797 MAX_TX_BUF_LEN : buf_len; 1798 buf_len -= tx_buffer->length; 1799 1800 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev, 1801 frag, 1802 (i * MAX_TX_BUF_LEN), 1803 tx_buffer->length, 1804 DMA_TO_DEVICE); 1805 1806 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) { 1807 /* We need to unwind the mappings we've done */ 1808 ring_end = adapter->tx_ring.next_to_use; 1809 adapter->tx_ring.next_to_use = ring_start; 1810 while (adapter->tx_ring.next_to_use != ring_end) { 1811 tpd = atl1e_get_tpd(adapter); 1812 tx_buffer = atl1e_get_tx_buffer(adapter, tpd); 1813 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma, 1814 tx_buffer->length, DMA_TO_DEVICE); 1815 } 1816 1817 /* Reset the ring next to use pointer */ 1818 adapter->tx_ring.next_to_use = ring_start; 1819 return -ENOSPC; 1820 } 1821 1822 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE); 1823 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); 1824 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | 1825 ((cpu_to_le32(tx_buffer->length) & 1826 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT); 1827 } 1828 } 1829 1830 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK) 1831 /* note this one is a tcp header */ 1832 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT; 1833 /* The last tpd */ 1834 1835 use_tpd->word3 |= 1 << TPD_EOP_SHIFT; 1836 /* The last buffer info contain the skb address, 1837 so it will be free after unmap */ 1838 tx_buffer->skb = skb; 1839 return 0; 1840 } 1841 1842 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count, 1843 struct atl1e_tpd_desc *tpd) 1844 { 1845 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring; 1846 /* Force memory writes to complete before letting h/w 1847 * know there are new descriptors to fetch. (Only 1848 * applicable for weak-ordered memory model archs, 1849 * such as IA-64). */ 1850 wmb(); 1851 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use); 1852 } 1853 1854 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb, 1855 struct net_device *netdev) 1856 { 1857 struct atl1e_adapter *adapter = netdev_priv(netdev); 1858 u16 tpd_req = 1; 1859 struct atl1e_tpd_desc *tpd; 1860 1861 if (test_bit(__AT_DOWN, &adapter->flags)) { 1862 dev_kfree_skb_any(skb); 1863 return NETDEV_TX_OK; 1864 } 1865 1866 if (unlikely(skb->len <= 0)) { 1867 dev_kfree_skb_any(skb); 1868 return NETDEV_TX_OK; 1869 } 1870 tpd_req = atl1e_cal_tdp_req(skb); 1871 1872 if (atl1e_tpd_avail(adapter) < tpd_req) { 1873 /* no enough descriptor, just stop queue */ 1874 netif_stop_queue(netdev); 1875 return NETDEV_TX_BUSY; 1876 } 1877 1878 tpd = atl1e_get_tpd(adapter); 1879 1880 if (skb_vlan_tag_present(skb)) { 1881 u16 vlan_tag = skb_vlan_tag_get(skb); 1882 u16 atl1e_vlan_tag; 1883 1884 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT; 1885 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag); 1886 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) << 1887 TPD_VLAN_SHIFT; 1888 } 1889 1890 if (skb->protocol == htons(ETH_P_8021Q)) 1891 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT; 1892 1893 if (skb_network_offset(skb) != ETH_HLEN) 1894 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */ 1895 1896 /* do TSO and check sum */ 1897 if (atl1e_tso_csum(adapter, skb, tpd) != 0) { 1898 dev_kfree_skb_any(skb); 1899 return NETDEV_TX_OK; 1900 } 1901 1902 if (atl1e_tx_map(adapter, skb, tpd)) { 1903 dev_kfree_skb_any(skb); 1904 goto out; 1905 } 1906 1907 atl1e_tx_queue(adapter, tpd_req, tpd); 1908 out: 1909 return NETDEV_TX_OK; 1910 } 1911 1912 static void atl1e_free_irq(struct atl1e_adapter *adapter) 1913 { 1914 struct net_device *netdev = adapter->netdev; 1915 1916 free_irq(adapter->pdev->irq, netdev); 1917 } 1918 1919 static int atl1e_request_irq(struct atl1e_adapter *adapter) 1920 { 1921 struct pci_dev *pdev = adapter->pdev; 1922 struct net_device *netdev = adapter->netdev; 1923 int err = 0; 1924 1925 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name, 1926 netdev); 1927 if (err) { 1928 netdev_dbg(adapter->netdev, 1929 "Unable to allocate interrupt Error: %d\n", err); 1930 return err; 1931 } 1932 netdev_dbg(netdev, "atl1e_request_irq OK\n"); 1933 return err; 1934 } 1935 1936 int atl1e_up(struct atl1e_adapter *adapter) 1937 { 1938 struct net_device *netdev = adapter->netdev; 1939 int err = 0; 1940 u32 val; 1941 1942 /* hardware has been reset, we need to reload some things */ 1943 err = atl1e_init_hw(&adapter->hw); 1944 if (err) { 1945 err = -EIO; 1946 return err; 1947 } 1948 atl1e_init_ring_ptrs(adapter); 1949 atl1e_set_multi(netdev); 1950 atl1e_restore_vlan(adapter); 1951 1952 if (atl1e_configure(adapter)) { 1953 err = -EIO; 1954 goto err_up; 1955 } 1956 1957 clear_bit(__AT_DOWN, &adapter->flags); 1958 napi_enable(&adapter->napi); 1959 atl1e_irq_enable(adapter); 1960 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL); 1961 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, 1962 val | MASTER_CTRL_MANUAL_INT); 1963 1964 err_up: 1965 return err; 1966 } 1967 1968 void atl1e_down(struct atl1e_adapter *adapter) 1969 { 1970 struct net_device *netdev = adapter->netdev; 1971 1972 /* signal that we're down so the interrupt handler does not 1973 * reschedule our watchdog timer */ 1974 set_bit(__AT_DOWN, &adapter->flags); 1975 1976 netif_stop_queue(netdev); 1977 1978 /* reset MAC to disable all RX/TX */ 1979 atl1e_reset_hw(&adapter->hw); 1980 msleep(1); 1981 1982 napi_disable(&adapter->napi); 1983 atl1e_del_timer(adapter); 1984 atl1e_irq_disable(adapter); 1985 1986 netif_carrier_off(netdev); 1987 adapter->link_speed = SPEED_0; 1988 adapter->link_duplex = -1; 1989 atl1e_clean_tx_ring(adapter); 1990 atl1e_clean_rx_ring(adapter); 1991 } 1992 1993 /** 1994 * atl1e_open - Called when a network interface is made active 1995 * @netdev: network interface device structure 1996 * 1997 * Returns 0 on success, negative value on failure 1998 * 1999 * The open entry point is called when a network interface is made 2000 * active by the system (IFF_UP). At this point all resources needed 2001 * for transmit and receive operations are allocated, the interrupt 2002 * handler is registered with the OS, the watchdog timer is started, 2003 * and the stack is notified that the interface is ready. 2004 */ 2005 static int atl1e_open(struct net_device *netdev) 2006 { 2007 struct atl1e_adapter *adapter = netdev_priv(netdev); 2008 int err; 2009 2010 /* disallow open during test */ 2011 if (test_bit(__AT_TESTING, &adapter->flags)) 2012 return -EBUSY; 2013 2014 /* allocate rx/tx dma buffer & descriptors */ 2015 atl1e_init_ring_resources(adapter); 2016 err = atl1e_setup_ring_resources(adapter); 2017 if (unlikely(err)) 2018 return err; 2019 2020 err = atl1e_request_irq(adapter); 2021 if (unlikely(err)) 2022 goto err_req_irq; 2023 2024 err = atl1e_up(adapter); 2025 if (unlikely(err)) 2026 goto err_up; 2027 2028 return 0; 2029 2030 err_up: 2031 atl1e_free_irq(adapter); 2032 err_req_irq: 2033 atl1e_free_ring_resources(adapter); 2034 atl1e_reset_hw(&adapter->hw); 2035 2036 return err; 2037 } 2038 2039 /** 2040 * atl1e_close - Disables a network interface 2041 * @netdev: network interface device structure 2042 * 2043 * Returns 0, this is not allowed to fail 2044 * 2045 * The close entry point is called when an interface is de-activated 2046 * by the OS. The hardware is still under the drivers control, but 2047 * needs to be disabled. A global MAC reset is issued to stop the 2048 * hardware, and all transmit and receive resources are freed. 2049 */ 2050 static int atl1e_close(struct net_device *netdev) 2051 { 2052 struct atl1e_adapter *adapter = netdev_priv(netdev); 2053 2054 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2055 atl1e_down(adapter); 2056 atl1e_free_irq(adapter); 2057 atl1e_free_ring_resources(adapter); 2058 2059 return 0; 2060 } 2061 2062 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state) 2063 { 2064 struct net_device *netdev = pci_get_drvdata(pdev); 2065 struct atl1e_adapter *adapter = netdev_priv(netdev); 2066 struct atl1e_hw *hw = &adapter->hw; 2067 u32 ctrl = 0; 2068 u32 mac_ctrl_data = 0; 2069 u32 wol_ctrl_data = 0; 2070 u16 mii_advertise_data = 0; 2071 u16 mii_bmsr_data = 0; 2072 u16 mii_intr_status_data = 0; 2073 u32 wufc = adapter->wol; 2074 u32 i; 2075 #ifdef CONFIG_PM 2076 int retval = 0; 2077 #endif 2078 2079 if (netif_running(netdev)) { 2080 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2081 atl1e_down(adapter); 2082 } 2083 netif_device_detach(netdev); 2084 2085 #ifdef CONFIG_PM 2086 retval = pci_save_state(pdev); 2087 if (retval) 2088 return retval; 2089 #endif 2090 2091 if (wufc) { 2092 /* get link status */ 2093 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2094 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data); 2095 2096 mii_advertise_data = ADVERTISE_10HALF; 2097 2098 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) || 2099 (atl1e_write_phy_reg(hw, 2100 MII_ADVERTISE, mii_advertise_data) != 0) || 2101 (atl1e_phy_commit(hw)) != 0) { 2102 netdev_dbg(adapter->netdev, "set phy register failed\n"); 2103 goto wol_dis; 2104 } 2105 2106 hw->phy_configured = false; /* re-init PHY when resume */ 2107 2108 /* turn on magic packet wol */ 2109 if (wufc & AT_WUFC_MAG) 2110 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2111 2112 if (wufc & AT_WUFC_LNKC) { 2113 /* if orignal link status is link, just wait for retrive link */ 2114 if (mii_bmsr_data & BMSR_LSTATUS) { 2115 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { 2116 msleep(100); 2117 atl1e_read_phy_reg(hw, MII_BMSR, 2118 &mii_bmsr_data); 2119 if (mii_bmsr_data & BMSR_LSTATUS) 2120 break; 2121 } 2122 2123 if ((mii_bmsr_data & BMSR_LSTATUS) == 0) 2124 netdev_dbg(adapter->netdev, 2125 "Link may change when suspend\n"); 2126 } 2127 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2128 /* only link up can wake up */ 2129 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) { 2130 netdev_dbg(adapter->netdev, 2131 "read write phy register failed\n"); 2132 goto wol_dis; 2133 } 2134 } 2135 /* clear phy interrupt */ 2136 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data); 2137 /* Config MAC Ctrl register */ 2138 mac_ctrl_data = MAC_CTRL_RX_EN; 2139 /* set to 10/100M halt duplex */ 2140 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT; 2141 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2142 MAC_CTRL_PRMLEN_MASK) << 2143 MAC_CTRL_PRMLEN_SHIFT); 2144 2145 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data); 2146 2147 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2148 if (wufc & AT_WUFC_MAG) 2149 mac_ctrl_data |= MAC_CTRL_BC_EN; 2150 2151 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n", 2152 mac_ctrl_data); 2153 2154 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2155 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2156 /* pcie patch */ 2157 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2158 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2159 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2160 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); 2161 goto suspend_exit; 2162 } 2163 wol_dis: 2164 2165 /* WOL disabled */ 2166 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2167 2168 /* pcie patch */ 2169 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC); 2170 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; 2171 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); 2172 2173 atl1e_force_ps(hw); 2174 hw->phy_configured = false; /* re-init PHY when resume */ 2175 2176 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); 2177 2178 suspend_exit: 2179 2180 if (netif_running(netdev)) 2181 atl1e_free_irq(adapter); 2182 2183 pci_disable_device(pdev); 2184 2185 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 2186 2187 return 0; 2188 } 2189 2190 #ifdef CONFIG_PM 2191 static int atl1e_resume(struct pci_dev *pdev) 2192 { 2193 struct net_device *netdev = pci_get_drvdata(pdev); 2194 struct atl1e_adapter *adapter = netdev_priv(netdev); 2195 u32 err; 2196 2197 pci_set_power_state(pdev, PCI_D0); 2198 pci_restore_state(pdev); 2199 2200 err = pci_enable_device(pdev); 2201 if (err) { 2202 netdev_err(adapter->netdev, 2203 "Cannot enable PCI device from suspend\n"); 2204 return err; 2205 } 2206 2207 pci_set_master(pdev); 2208 2209 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */ 2210 2211 pci_enable_wake(pdev, PCI_D3hot, 0); 2212 pci_enable_wake(pdev, PCI_D3cold, 0); 2213 2214 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2215 2216 if (netif_running(netdev)) { 2217 err = atl1e_request_irq(adapter); 2218 if (err) 2219 return err; 2220 } 2221 2222 atl1e_reset_hw(&adapter->hw); 2223 2224 if (netif_running(netdev)) 2225 atl1e_up(adapter); 2226 2227 netif_device_attach(netdev); 2228 2229 return 0; 2230 } 2231 #endif 2232 2233 static void atl1e_shutdown(struct pci_dev *pdev) 2234 { 2235 atl1e_suspend(pdev, PMSG_SUSPEND); 2236 } 2237 2238 static const struct net_device_ops atl1e_netdev_ops = { 2239 .ndo_open = atl1e_open, 2240 .ndo_stop = atl1e_close, 2241 .ndo_start_xmit = atl1e_xmit_frame, 2242 .ndo_get_stats = atl1e_get_stats, 2243 .ndo_set_rx_mode = atl1e_set_multi, 2244 .ndo_validate_addr = eth_validate_addr, 2245 .ndo_set_mac_address = atl1e_set_mac_addr, 2246 .ndo_fix_features = atl1e_fix_features, 2247 .ndo_set_features = atl1e_set_features, 2248 .ndo_change_mtu = atl1e_change_mtu, 2249 .ndo_do_ioctl = atl1e_ioctl, 2250 .ndo_tx_timeout = atl1e_tx_timeout, 2251 #ifdef CONFIG_NET_POLL_CONTROLLER 2252 .ndo_poll_controller = atl1e_netpoll, 2253 #endif 2254 2255 }; 2256 2257 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2258 { 2259 SET_NETDEV_DEV(netdev, &pdev->dev); 2260 pci_set_drvdata(pdev, netdev); 2261 2262 netdev->netdev_ops = &atl1e_netdev_ops; 2263 2264 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2265 /* MTU range: 42 - 8170 */ 2266 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2267 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 2268 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 2269 atl1e_set_ethtool_ops(netdev); 2270 2271 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO | 2272 NETIF_F_HW_VLAN_CTAG_RX; 2273 netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_TX; 2274 /* not enabled by default */ 2275 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS; 2276 return 0; 2277 } 2278 2279 /** 2280 * atl1e_probe - Device Initialization Routine 2281 * @pdev: PCI device information struct 2282 * @ent: entry in atl1e_pci_tbl 2283 * 2284 * Returns 0 on success, negative on failure 2285 * 2286 * atl1e_probe initializes an adapter identified by a pci_dev structure. 2287 * The OS initialization, configuring of the adapter private structure, 2288 * and a hardware reset occur. 2289 */ 2290 static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2291 { 2292 struct net_device *netdev; 2293 struct atl1e_adapter *adapter = NULL; 2294 static int cards_found; 2295 2296 int err = 0; 2297 2298 err = pci_enable_device(pdev); 2299 if (err) { 2300 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2301 return err; 2302 } 2303 2304 /* 2305 * The atl1e chip can DMA to 64-bit addresses, but it uses a single 2306 * shared register for the high 32 bits, so only a single, aligned, 2307 * 4 GB physical address range can be used at a time. 2308 * 2309 * Supporting 64-bit DMA on this hardware is more trouble than it's 2310 * worth. It is far easier to limit to 32-bit DMA than update 2311 * various kernel subsystems to support the mechanics required by a 2312 * fixed-high-32-bit system. 2313 */ 2314 if ((dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) || 2315 (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0)) { 2316 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2317 goto err_dma; 2318 } 2319 2320 err = pci_request_regions(pdev, atl1e_driver_name); 2321 if (err) { 2322 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2323 goto err_pci_reg; 2324 } 2325 2326 pci_set_master(pdev); 2327 2328 netdev = alloc_etherdev(sizeof(struct atl1e_adapter)); 2329 if (netdev == NULL) { 2330 err = -ENOMEM; 2331 goto err_alloc_etherdev; 2332 } 2333 2334 err = atl1e_init_netdev(netdev, pdev); 2335 if (err) { 2336 netdev_err(netdev, "init netdevice failed\n"); 2337 goto err_init_netdev; 2338 } 2339 adapter = netdev_priv(netdev); 2340 adapter->bd_number = cards_found; 2341 adapter->netdev = netdev; 2342 adapter->pdev = pdev; 2343 adapter->hw.adapter = adapter; 2344 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0); 2345 if (!adapter->hw.hw_addr) { 2346 err = -EIO; 2347 netdev_err(netdev, "cannot map device registers\n"); 2348 goto err_ioremap; 2349 } 2350 2351 /* init mii data */ 2352 adapter->mii.dev = netdev; 2353 adapter->mii.mdio_read = atl1e_mdio_read; 2354 adapter->mii.mdio_write = atl1e_mdio_write; 2355 adapter->mii.phy_id_mask = 0x1f; 2356 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2357 2358 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64); 2359 2360 timer_setup(&adapter->phy_config_timer, atl1e_phy_config, 0); 2361 2362 /* get user settings */ 2363 atl1e_check_options(adapter); 2364 /* 2365 * Mark all PCI regions associated with PCI device 2366 * pdev as being reserved by owner atl1e_driver_name 2367 * Enables bus-mastering on the device and calls 2368 * pcibios_set_master to do the needed arch specific settings 2369 */ 2370 atl1e_setup_pcicmd(pdev); 2371 /* setup the private structure */ 2372 err = atl1e_sw_init(adapter); 2373 if (err) { 2374 netdev_err(netdev, "net device private data init failed\n"); 2375 goto err_sw_init; 2376 } 2377 2378 /* Init GPHY as early as possible due to power saving issue */ 2379 atl1e_phy_init(&adapter->hw); 2380 /* reset the controller to 2381 * put the device in a known good starting state */ 2382 err = atl1e_reset_hw(&adapter->hw); 2383 if (err) { 2384 err = -EIO; 2385 goto err_reset; 2386 } 2387 2388 if (atl1e_read_mac_addr(&adapter->hw) != 0) { 2389 err = -EIO; 2390 netdev_err(netdev, "get mac address failed\n"); 2391 goto err_eeprom; 2392 } 2393 2394 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2395 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr); 2396 2397 INIT_WORK(&adapter->reset_task, atl1e_reset_task); 2398 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task); 2399 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE); 2400 err = register_netdev(netdev); 2401 if (err) { 2402 netdev_err(netdev, "register netdevice failed\n"); 2403 goto err_register; 2404 } 2405 2406 /* assume we have no link for now */ 2407 netif_stop_queue(netdev); 2408 netif_carrier_off(netdev); 2409 2410 cards_found++; 2411 2412 return 0; 2413 2414 err_reset: 2415 err_register: 2416 err_sw_init: 2417 err_eeprom: 2418 pci_iounmap(pdev, adapter->hw.hw_addr); 2419 err_init_netdev: 2420 err_ioremap: 2421 free_netdev(netdev); 2422 err_alloc_etherdev: 2423 pci_release_regions(pdev); 2424 err_pci_reg: 2425 err_dma: 2426 pci_disable_device(pdev); 2427 return err; 2428 } 2429 2430 /** 2431 * atl1e_remove - Device Removal Routine 2432 * @pdev: PCI device information struct 2433 * 2434 * atl1e_remove is called by the PCI subsystem to alert the driver 2435 * that it should release a PCI device. The could be caused by a 2436 * Hot-Plug event, or because the driver is going to be removed from 2437 * memory. 2438 */ 2439 static void atl1e_remove(struct pci_dev *pdev) 2440 { 2441 struct net_device *netdev = pci_get_drvdata(pdev); 2442 struct atl1e_adapter *adapter = netdev_priv(netdev); 2443 2444 /* 2445 * flush_scheduled work may reschedule our watchdog task, so 2446 * explicitly disable watchdog tasks from being rescheduled 2447 */ 2448 set_bit(__AT_DOWN, &adapter->flags); 2449 2450 atl1e_del_timer(adapter); 2451 atl1e_cancel_work(adapter); 2452 2453 unregister_netdev(netdev); 2454 atl1e_free_ring_resources(adapter); 2455 atl1e_force_ps(&adapter->hw); 2456 pci_iounmap(pdev, adapter->hw.hw_addr); 2457 pci_release_regions(pdev); 2458 free_netdev(netdev); 2459 pci_disable_device(pdev); 2460 } 2461 2462 /** 2463 * atl1e_io_error_detected - called when PCI error is detected 2464 * @pdev: Pointer to PCI device 2465 * @state: The current pci connection state 2466 * 2467 * This function is called after a PCI bus error affecting 2468 * this device has been detected. 2469 */ 2470 static pci_ers_result_t 2471 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 2472 { 2473 struct net_device *netdev = pci_get_drvdata(pdev); 2474 struct atl1e_adapter *adapter = netdev_priv(netdev); 2475 2476 netif_device_detach(netdev); 2477 2478 if (state == pci_channel_io_perm_failure) 2479 return PCI_ERS_RESULT_DISCONNECT; 2480 2481 if (netif_running(netdev)) 2482 atl1e_down(adapter); 2483 2484 pci_disable_device(pdev); 2485 2486 /* Request a slot slot reset. */ 2487 return PCI_ERS_RESULT_NEED_RESET; 2488 } 2489 2490 /** 2491 * atl1e_io_slot_reset - called after the pci bus has been reset. 2492 * @pdev: Pointer to PCI device 2493 * 2494 * Restart the card from scratch, as if from a cold-boot. Implementation 2495 * resembles the first-half of the e1000_resume routine. 2496 */ 2497 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev) 2498 { 2499 struct net_device *netdev = pci_get_drvdata(pdev); 2500 struct atl1e_adapter *adapter = netdev_priv(netdev); 2501 2502 if (pci_enable_device(pdev)) { 2503 netdev_err(adapter->netdev, 2504 "Cannot re-enable PCI device after reset\n"); 2505 return PCI_ERS_RESULT_DISCONNECT; 2506 } 2507 pci_set_master(pdev); 2508 2509 pci_enable_wake(pdev, PCI_D3hot, 0); 2510 pci_enable_wake(pdev, PCI_D3cold, 0); 2511 2512 atl1e_reset_hw(&adapter->hw); 2513 2514 return PCI_ERS_RESULT_RECOVERED; 2515 } 2516 2517 /** 2518 * atl1e_io_resume - called when traffic can start flowing again. 2519 * @pdev: Pointer to PCI device 2520 * 2521 * This callback is called when the error recovery driver tells us that 2522 * its OK to resume normal operation. Implementation resembles the 2523 * second-half of the atl1e_resume routine. 2524 */ 2525 static void atl1e_io_resume(struct pci_dev *pdev) 2526 { 2527 struct net_device *netdev = pci_get_drvdata(pdev); 2528 struct atl1e_adapter *adapter = netdev_priv(netdev); 2529 2530 if (netif_running(netdev)) { 2531 if (atl1e_up(adapter)) { 2532 netdev_err(adapter->netdev, 2533 "can't bring device back up after reset\n"); 2534 return; 2535 } 2536 } 2537 2538 netif_device_attach(netdev); 2539 } 2540 2541 static const struct pci_error_handlers atl1e_err_handler = { 2542 .error_detected = atl1e_io_error_detected, 2543 .slot_reset = atl1e_io_slot_reset, 2544 .resume = atl1e_io_resume, 2545 }; 2546 2547 static struct pci_driver atl1e_driver = { 2548 .name = atl1e_driver_name, 2549 .id_table = atl1e_pci_tbl, 2550 .probe = atl1e_probe, 2551 .remove = atl1e_remove, 2552 /* Power Management Hooks */ 2553 #ifdef CONFIG_PM 2554 .suspend = atl1e_suspend, 2555 .resume = atl1e_resume, 2556 #endif 2557 .shutdown = atl1e_shutdown, 2558 .err_handler = &atl1e_err_handler 2559 }; 2560 2561 module_pci_driver(atl1e_driver); 2562