1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 28 /* 29 * atl1c_pci_tbl - PCI Device ID Table 30 * 31 * Wildcard entries (PCI_ANY_ID) should come last 32 * Last entry must be all 0s 33 * 34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 35 * Class, Class Mask, private data (not used) } 36 */ 37 static const struct pci_device_id atl1c_pci_tbl[] = { 38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 44 /* required last entry */ 45 { 0 } 46 }; 47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 48 49 MODULE_AUTHOR("Jie Yang"); 50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 51 MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver"); 52 MODULE_LICENSE("GPL"); 53 MODULE_VERSION(ATL1C_DRV_VERSION); 54 55 static int atl1c_stop_mac(struct atl1c_hw *hw); 56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 58 static void atl1c_start_mac(struct atl1c_adapter *adapter); 59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 60 int *work_done, int work_to_do); 61 static int atl1c_up(struct atl1c_adapter *adapter); 62 static void atl1c_down(struct atl1c_adapter *adapter); 63 static int atl1c_reset_mac(struct atl1c_hw *hw); 64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 65 static int atl1c_configure(struct atl1c_adapter *adapter); 66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter); 67 68 69 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 70 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 71 static void atl1c_pcie_patch(struct atl1c_hw *hw) 72 { 73 u32 mst_data, data; 74 75 /* pclk sel could switch to 25M */ 76 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 77 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 78 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 79 80 /* WoL/PCIE related settings */ 81 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 82 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 83 data |= PCIE_PHYMISC_FORCE_RCV_DET; 84 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 85 } else { /* new dev set bit5 of MASTER */ 86 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 87 AT_WRITE_REG(hw, REG_MASTER_CTRL, 88 mst_data | MASTER_CTRL_WAKEN_25M); 89 } 90 /* aspm/PCIE setting only for l2cb 1.0 */ 91 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 92 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 93 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 94 L2CB1_PCIE_PHYMISC2_CDR_BW); 95 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 96 L2CB1_PCIE_PHYMISC2_L0S_TH); 97 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 98 /* extend L1 sync timer */ 99 AT_READ_REG(hw, REG_LINK_CTRL, &data); 100 data |= LINK_CTRL_EXT_SYNC; 101 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 102 } 103 /* l2cb 1.x & l1d 1.x */ 104 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 105 AT_READ_REG(hw, REG_PM_CTRL, &data); 106 data |= PM_CTRL_L0S_BUFSRX_EN; 107 AT_WRITE_REG(hw, REG_PM_CTRL, data); 108 /* clear vendor msg */ 109 AT_READ_REG(hw, REG_DMA_DBG, &data); 110 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 111 } 112 } 113 114 /* FIXME: no need any more ? */ 115 /* 116 * atl1c_init_pcie - init PCIE module 117 */ 118 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 119 { 120 u32 data; 121 u32 pci_cmd; 122 struct pci_dev *pdev = hw->adapter->pdev; 123 int pos; 124 125 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 126 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 127 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 128 PCI_COMMAND_IO); 129 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 130 131 /* 132 * Clear any PowerSaveing Settings 133 */ 134 pci_enable_wake(pdev, PCI_D3hot, 0); 135 pci_enable_wake(pdev, PCI_D3cold, 0); 136 /* wol sts read-clear */ 137 AT_READ_REG(hw, REG_WOL_CTRL, &data); 138 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 139 140 /* 141 * Mask some pcie error bits 142 */ 143 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 144 if (pos) { 145 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 146 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 147 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 148 } 149 /* clear error status */ 150 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, 151 PCI_EXP_DEVSTA_NFED | 152 PCI_EXP_DEVSTA_FED | 153 PCI_EXP_DEVSTA_CED | 154 PCI_EXP_DEVSTA_URD); 155 156 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 157 data &= ~LTSSM_ID_EN_WRO; 158 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 159 160 atl1c_pcie_patch(hw); 161 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 162 atl1c_disable_l0s_l1(hw); 163 164 msleep(5); 165 } 166 167 /** 168 * atl1c_irq_enable - Enable default interrupt generation settings 169 * @adapter: board private structure 170 */ 171 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 172 { 173 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 174 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 175 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 176 AT_WRITE_FLUSH(&adapter->hw); 177 } 178 } 179 180 /** 181 * atl1c_irq_disable - Mask off interrupt generation on the NIC 182 * @adapter: board private structure 183 */ 184 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 185 { 186 atomic_inc(&adapter->irq_sem); 187 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 188 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 189 AT_WRITE_FLUSH(&adapter->hw); 190 synchronize_irq(adapter->pdev->irq); 191 } 192 193 /** 194 * atl1c_irq_reset - reset interrupt confiure on the NIC 195 * @adapter: board private structure 196 */ 197 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 198 { 199 atomic_set(&adapter->irq_sem, 1); 200 atl1c_irq_enable(adapter); 201 } 202 203 /* 204 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 205 * of the idle status register until the device is actually idle 206 */ 207 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 208 { 209 int timeout; 210 u32 data; 211 212 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 213 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 214 if ((data & modu_ctrl) == 0) 215 return 0; 216 msleep(1); 217 } 218 return data; 219 } 220 221 /** 222 * atl1c_phy_config - Timer Call-back 223 * @data: pointer to netdev cast into an unsigned long 224 */ 225 static void atl1c_phy_config(unsigned long data) 226 { 227 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 228 struct atl1c_hw *hw = &adapter->hw; 229 unsigned long flags; 230 231 spin_lock_irqsave(&adapter->mdio_lock, flags); 232 atl1c_restart_autoneg(hw); 233 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 234 } 235 236 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 237 { 238 WARN_ON(in_interrupt()); 239 atl1c_down(adapter); 240 atl1c_up(adapter); 241 clear_bit(__AT_RESETTING, &adapter->flags); 242 } 243 244 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 245 { 246 struct atl1c_hw *hw = &adapter->hw; 247 struct net_device *netdev = adapter->netdev; 248 struct pci_dev *pdev = adapter->pdev; 249 int err; 250 unsigned long flags; 251 u16 speed, duplex, phy_data; 252 253 spin_lock_irqsave(&adapter->mdio_lock, flags); 254 /* MII_BMSR must read twise */ 255 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 256 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 257 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 258 259 if ((phy_data & BMSR_LSTATUS) == 0) { 260 /* link down */ 261 netif_carrier_off(netdev); 262 hw->hibernate = true; 263 if (atl1c_reset_mac(hw) != 0) 264 if (netif_msg_hw(adapter)) 265 dev_warn(&pdev->dev, "reset mac failed\n"); 266 atl1c_set_aspm(hw, SPEED_0); 267 atl1c_post_phy_linkchg(hw, SPEED_0); 268 atl1c_reset_dma_ring(adapter); 269 atl1c_configure(adapter); 270 } else { 271 /* Link Up */ 272 hw->hibernate = false; 273 spin_lock_irqsave(&adapter->mdio_lock, flags); 274 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 275 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 276 if (unlikely(err)) 277 return; 278 /* link result is our setting */ 279 if (adapter->link_speed != speed || 280 adapter->link_duplex != duplex) { 281 adapter->link_speed = speed; 282 adapter->link_duplex = duplex; 283 atl1c_set_aspm(hw, speed); 284 atl1c_post_phy_linkchg(hw, speed); 285 atl1c_start_mac(adapter); 286 if (netif_msg_link(adapter)) 287 dev_info(&pdev->dev, 288 "%s: %s NIC Link is Up<%d Mbps %s>\n", 289 atl1c_driver_name, netdev->name, 290 adapter->link_speed, 291 adapter->link_duplex == FULL_DUPLEX ? 292 "Full Duplex" : "Half Duplex"); 293 } 294 if (!netif_carrier_ok(netdev)) 295 netif_carrier_on(netdev); 296 } 297 } 298 299 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 300 { 301 struct net_device *netdev = adapter->netdev; 302 struct pci_dev *pdev = adapter->pdev; 303 u16 phy_data; 304 u16 link_up; 305 306 spin_lock(&adapter->mdio_lock); 307 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 308 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 309 spin_unlock(&adapter->mdio_lock); 310 link_up = phy_data & BMSR_LSTATUS; 311 /* notify upper layer link down ASAP */ 312 if (!link_up) { 313 if (netif_carrier_ok(netdev)) { 314 /* old link state: Up */ 315 netif_carrier_off(netdev); 316 if (netif_msg_link(adapter)) 317 dev_info(&pdev->dev, 318 "%s: %s NIC Link is Down\n", 319 atl1c_driver_name, netdev->name); 320 adapter->link_speed = SPEED_0; 321 } 322 } 323 324 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 325 schedule_work(&adapter->common_task); 326 } 327 328 static void atl1c_common_task(struct work_struct *work) 329 { 330 struct atl1c_adapter *adapter; 331 struct net_device *netdev; 332 333 adapter = container_of(work, struct atl1c_adapter, common_task); 334 netdev = adapter->netdev; 335 336 if (test_bit(__AT_DOWN, &adapter->flags)) 337 return; 338 339 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 340 netif_device_detach(netdev); 341 atl1c_down(adapter); 342 atl1c_up(adapter); 343 netif_device_attach(netdev); 344 } 345 346 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 347 &adapter->work_event)) { 348 atl1c_irq_disable(adapter); 349 atl1c_check_link_status(adapter); 350 atl1c_irq_enable(adapter); 351 } 352 } 353 354 355 static void atl1c_del_timer(struct atl1c_adapter *adapter) 356 { 357 del_timer_sync(&adapter->phy_config_timer); 358 } 359 360 361 /** 362 * atl1c_tx_timeout - Respond to a Tx Hang 363 * @netdev: network interface device structure 364 */ 365 static void atl1c_tx_timeout(struct net_device *netdev) 366 { 367 struct atl1c_adapter *adapter = netdev_priv(netdev); 368 369 /* Do the reset outside of interrupt context */ 370 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 371 schedule_work(&adapter->common_task); 372 } 373 374 /** 375 * atl1c_set_multi - Multicast and Promiscuous mode set 376 * @netdev: network interface device structure 377 * 378 * The set_multi entry point is called whenever the multicast address 379 * list or the network interface flags are updated. This routine is 380 * responsible for configuring the hardware for proper multicast, 381 * promiscuous mode, and all-multi behavior. 382 */ 383 static void atl1c_set_multi(struct net_device *netdev) 384 { 385 struct atl1c_adapter *adapter = netdev_priv(netdev); 386 struct atl1c_hw *hw = &adapter->hw; 387 struct netdev_hw_addr *ha; 388 u32 mac_ctrl_data; 389 u32 hash_value; 390 391 /* Check for Promiscuous and All Multicast modes */ 392 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 393 394 if (netdev->flags & IFF_PROMISC) { 395 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 396 } else if (netdev->flags & IFF_ALLMULTI) { 397 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 398 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 399 } else { 400 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 401 } 402 403 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 404 405 /* clear the old settings from the multicast hash table */ 406 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 407 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 408 409 /* comoute mc addresses' hash value ,and put it into hash table */ 410 netdev_for_each_mc_addr(ha, netdev) { 411 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 412 atl1c_hash_set(hw, hash_value); 413 } 414 } 415 416 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 417 { 418 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 419 /* enable VLAN tag insert/strip */ 420 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 421 } else { 422 /* disable VLAN tag insert/strip */ 423 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 424 } 425 } 426 427 static void atl1c_vlan_mode(struct net_device *netdev, 428 netdev_features_t features) 429 { 430 struct atl1c_adapter *adapter = netdev_priv(netdev); 431 struct pci_dev *pdev = adapter->pdev; 432 u32 mac_ctrl_data = 0; 433 434 if (netif_msg_pktdata(adapter)) 435 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 436 437 atl1c_irq_disable(adapter); 438 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 439 __atl1c_vlan_mode(features, &mac_ctrl_data); 440 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 441 atl1c_irq_enable(adapter); 442 } 443 444 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 445 { 446 struct pci_dev *pdev = adapter->pdev; 447 448 if (netif_msg_pktdata(adapter)) 449 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 450 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 451 } 452 453 /** 454 * atl1c_set_mac - Change the Ethernet Address of the NIC 455 * @netdev: network interface device structure 456 * @p: pointer to an address structure 457 * 458 * Returns 0 on success, negative on failure 459 */ 460 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 461 { 462 struct atl1c_adapter *adapter = netdev_priv(netdev); 463 struct sockaddr *addr = p; 464 465 if (!is_valid_ether_addr(addr->sa_data)) 466 return -EADDRNOTAVAIL; 467 468 if (netif_running(netdev)) 469 return -EBUSY; 470 471 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 472 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 473 474 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 475 476 return 0; 477 } 478 479 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 480 struct net_device *dev) 481 { 482 unsigned int head_size; 483 int mtu = dev->mtu; 484 485 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 486 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 487 488 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) + 489 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 490 adapter->rx_frag_size = roundup_pow_of_two(head_size); 491 } 492 493 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 494 netdev_features_t features) 495 { 496 /* 497 * Since there is no support for separate rx/tx vlan accel 498 * enable/disable make sure tx flag is always in same state as rx. 499 */ 500 if (features & NETIF_F_HW_VLAN_CTAG_RX) 501 features |= NETIF_F_HW_VLAN_CTAG_TX; 502 else 503 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 504 505 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 506 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 507 508 return features; 509 } 510 511 static int atl1c_set_features(struct net_device *netdev, 512 netdev_features_t features) 513 { 514 netdev_features_t changed = netdev->features ^ features; 515 516 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 517 atl1c_vlan_mode(netdev, features); 518 519 return 0; 520 } 521 522 /** 523 * atl1c_change_mtu - Change the Maximum Transfer Unit 524 * @netdev: network interface device structure 525 * @new_mtu: new value for maximum frame size 526 * 527 * Returns 0 on success, negative on failure 528 */ 529 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 530 { 531 struct atl1c_adapter *adapter = netdev_priv(netdev); 532 struct atl1c_hw *hw = &adapter->hw; 533 int old_mtu = netdev->mtu; 534 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 535 536 /* Fast Ethernet controller doesn't support jumbo packet */ 537 if (((hw->nic_type == athr_l2c || 538 hw->nic_type == athr_l2c_b || 539 hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) || 540 max_frame < ETH_ZLEN + ETH_FCS_LEN || 541 max_frame > MAX_JUMBO_FRAME_SIZE) { 542 if (netif_msg_link(adapter)) 543 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 544 return -EINVAL; 545 } 546 /* set MTU */ 547 if (old_mtu != new_mtu && netif_running(netdev)) { 548 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 549 msleep(1); 550 netdev->mtu = new_mtu; 551 adapter->hw.max_frame_size = new_mtu; 552 atl1c_set_rxbufsize(adapter, netdev); 553 atl1c_down(adapter); 554 netdev_update_features(netdev); 555 atl1c_up(adapter); 556 clear_bit(__AT_RESETTING, &adapter->flags); 557 } 558 return 0; 559 } 560 561 /* 562 * caller should hold mdio_lock 563 */ 564 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 565 { 566 struct atl1c_adapter *adapter = netdev_priv(netdev); 567 u16 result; 568 569 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 570 return result; 571 } 572 573 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 574 int reg_num, int val) 575 { 576 struct atl1c_adapter *adapter = netdev_priv(netdev); 577 578 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 579 } 580 581 static int atl1c_mii_ioctl(struct net_device *netdev, 582 struct ifreq *ifr, int cmd) 583 { 584 struct atl1c_adapter *adapter = netdev_priv(netdev); 585 struct pci_dev *pdev = adapter->pdev; 586 struct mii_ioctl_data *data = if_mii(ifr); 587 unsigned long flags; 588 int retval = 0; 589 590 if (!netif_running(netdev)) 591 return -EINVAL; 592 593 spin_lock_irqsave(&adapter->mdio_lock, flags); 594 switch (cmd) { 595 case SIOCGMIIPHY: 596 data->phy_id = 0; 597 break; 598 599 case SIOCGMIIREG: 600 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 601 &data->val_out)) { 602 retval = -EIO; 603 goto out; 604 } 605 break; 606 607 case SIOCSMIIREG: 608 if (data->reg_num & ~(0x1F)) { 609 retval = -EFAULT; 610 goto out; 611 } 612 613 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 614 data->reg_num, data->val_in); 615 if (atl1c_write_phy_reg(&adapter->hw, 616 data->reg_num, data->val_in)) { 617 retval = -EIO; 618 goto out; 619 } 620 break; 621 622 default: 623 retval = -EOPNOTSUPP; 624 break; 625 } 626 out: 627 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 628 return retval; 629 } 630 631 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 632 { 633 switch (cmd) { 634 case SIOCGMIIPHY: 635 case SIOCGMIIREG: 636 case SIOCSMIIREG: 637 return atl1c_mii_ioctl(netdev, ifr, cmd); 638 default: 639 return -EOPNOTSUPP; 640 } 641 } 642 643 /** 644 * atl1c_alloc_queues - Allocate memory for all rings 645 * @adapter: board private structure to initialize 646 * 647 */ 648 static int atl1c_alloc_queues(struct atl1c_adapter *adapter) 649 { 650 return 0; 651 } 652 653 static void atl1c_set_mac_type(struct atl1c_hw *hw) 654 { 655 switch (hw->device_id) { 656 case PCI_DEVICE_ID_ATTANSIC_L2C: 657 hw->nic_type = athr_l2c; 658 break; 659 case PCI_DEVICE_ID_ATTANSIC_L1C: 660 hw->nic_type = athr_l1c; 661 break; 662 case PCI_DEVICE_ID_ATHEROS_L2C_B: 663 hw->nic_type = athr_l2c_b; 664 break; 665 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 666 hw->nic_type = athr_l2c_b2; 667 break; 668 case PCI_DEVICE_ID_ATHEROS_L1D: 669 hw->nic_type = athr_l1d; 670 break; 671 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 672 hw->nic_type = athr_l1d_2; 673 break; 674 default: 675 break; 676 } 677 } 678 679 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 680 { 681 u32 link_ctrl_data; 682 683 atl1c_set_mac_type(hw); 684 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 685 686 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 687 ATL1C_TXQ_MODE_ENHANCE; 688 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 689 ATL1C_ASPM_L1_SUPPORT; 690 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 691 692 if (hw->nic_type == athr_l1c || 693 hw->nic_type == athr_l1d || 694 hw->nic_type == athr_l1d_2) 695 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 696 return 0; 697 } 698 699 struct atl1c_platform_patch { 700 u16 pci_did; 701 u8 pci_revid; 702 u16 subsystem_vid; 703 u16 subsystem_did; 704 u32 patch_flag; 705 #define ATL1C_LINK_PATCH 0x1 706 }; 707 static const struct atl1c_platform_patch plats[] = { 708 {0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 709 {0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 710 {0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 711 {0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 712 {0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 713 {0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 714 {0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 715 {0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 716 {0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 717 {0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 718 {0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 719 {0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 720 {0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 721 {0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 722 {0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 723 {0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 724 {0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 725 {0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 726 {0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 727 {0}, 728 }; 729 730 static void atl1c_patch_assign(struct atl1c_hw *hw) 731 { 732 struct pci_dev *pdev = hw->adapter->pdev; 733 u32 misc_ctrl; 734 int i = 0; 735 736 hw->msi_lnkpatch = false; 737 738 while (plats[i].pci_did != 0) { 739 if (plats[i].pci_did == hw->device_id && 740 plats[i].pci_revid == hw->revision_id && 741 plats[i].subsystem_vid == hw->subsystem_vendor_id && 742 plats[i].subsystem_did == hw->subsystem_id) { 743 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 744 hw->msi_lnkpatch = true; 745 } 746 i++; 747 } 748 749 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 && 750 hw->revision_id == L2CB_V21) { 751 /* config access mode */ 752 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 753 REG_PCIE_DEV_MISC_CTRL); 754 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl); 755 misc_ctrl &= ~0x100; 756 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 757 REG_PCIE_DEV_MISC_CTRL); 758 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl); 759 } 760 } 761 /** 762 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 763 * @adapter: board private structure to initialize 764 * 765 * atl1c_sw_init initializes the Adapter private data structure. 766 * Fields are initialized based on PCI device information and 767 * OS network device settings (MTU size). 768 */ 769 static int atl1c_sw_init(struct atl1c_adapter *adapter) 770 { 771 struct atl1c_hw *hw = &adapter->hw; 772 struct pci_dev *pdev = adapter->pdev; 773 u32 revision; 774 775 776 adapter->wol = 0; 777 device_set_wakeup_enable(&pdev->dev, false); 778 adapter->link_speed = SPEED_0; 779 adapter->link_duplex = FULL_DUPLEX; 780 adapter->tpd_ring[0].count = 1024; 781 adapter->rfd_ring.count = 512; 782 783 hw->vendor_id = pdev->vendor; 784 hw->device_id = pdev->device; 785 hw->subsystem_vendor_id = pdev->subsystem_vendor; 786 hw->subsystem_id = pdev->subsystem_device; 787 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision); 788 hw->revision_id = revision & 0xFF; 789 /* before link up, we assume hibernate is true */ 790 hw->hibernate = true; 791 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 792 if (atl1c_setup_mac_funcs(hw) != 0) { 793 dev_err(&pdev->dev, "set mac function pointers failed\n"); 794 return -1; 795 } 796 atl1c_patch_assign(hw); 797 798 hw->intr_mask = IMR_NORMAL_MASK; 799 hw->phy_configured = false; 800 hw->preamble_len = 7; 801 hw->max_frame_size = adapter->netdev->mtu; 802 hw->autoneg_advertised = ADVERTISED_Autoneg; 803 hw->indirect_tab = 0xE4E4E4E4; 804 hw->base_cpu = 0; 805 806 hw->ict = 50000; /* 100ms */ 807 hw->smb_timer = 200000; /* 400ms */ 808 hw->rx_imt = 200; 809 hw->tx_imt = 1000; 810 811 hw->tpd_burst = 5; 812 hw->rfd_burst = 8; 813 hw->dma_order = atl1c_dma_ord_out; 814 hw->dmar_block = atl1c_dma_req_1024; 815 816 if (atl1c_alloc_queues(adapter)) { 817 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 818 return -ENOMEM; 819 } 820 /* TODO */ 821 atl1c_set_rxbufsize(adapter, adapter->netdev); 822 atomic_set(&adapter->irq_sem, 1); 823 spin_lock_init(&adapter->mdio_lock); 824 set_bit(__AT_DOWN, &adapter->flags); 825 826 return 0; 827 } 828 829 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 830 struct atl1c_buffer *buffer_info) 831 { 832 u16 pci_driection; 833 if (buffer_info->flags & ATL1C_BUFFER_FREE) 834 return; 835 if (buffer_info->dma) { 836 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 837 pci_driection = PCI_DMA_FROMDEVICE; 838 else 839 pci_driection = PCI_DMA_TODEVICE; 840 841 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 842 pci_unmap_single(pdev, buffer_info->dma, 843 buffer_info->length, pci_driection); 844 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 845 pci_unmap_page(pdev, buffer_info->dma, 846 buffer_info->length, pci_driection); 847 } 848 if (buffer_info->skb) 849 dev_consume_skb_any(buffer_info->skb); 850 buffer_info->dma = 0; 851 buffer_info->skb = NULL; 852 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 853 } 854 /** 855 * atl1c_clean_tx_ring - Free Tx-skb 856 * @adapter: board private structure 857 */ 858 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 859 enum atl1c_trans_queue type) 860 { 861 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 862 struct atl1c_buffer *buffer_info; 863 struct pci_dev *pdev = adapter->pdev; 864 u16 index, ring_count; 865 866 ring_count = tpd_ring->count; 867 for (index = 0; index < ring_count; index++) { 868 buffer_info = &tpd_ring->buffer_info[index]; 869 atl1c_clean_buffer(pdev, buffer_info); 870 } 871 872 netdev_reset_queue(adapter->netdev); 873 874 /* Zero out Tx-buffers */ 875 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 876 ring_count); 877 atomic_set(&tpd_ring->next_to_clean, 0); 878 tpd_ring->next_to_use = 0; 879 } 880 881 /** 882 * atl1c_clean_rx_ring - Free rx-reservation skbs 883 * @adapter: board private structure 884 */ 885 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 886 { 887 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 888 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 889 struct atl1c_buffer *buffer_info; 890 struct pci_dev *pdev = adapter->pdev; 891 int j; 892 893 for (j = 0; j < rfd_ring->count; j++) { 894 buffer_info = &rfd_ring->buffer_info[j]; 895 atl1c_clean_buffer(pdev, buffer_info); 896 } 897 /* zero out the descriptor ring */ 898 memset(rfd_ring->desc, 0, rfd_ring->size); 899 rfd_ring->next_to_clean = 0; 900 rfd_ring->next_to_use = 0; 901 rrd_ring->next_to_use = 0; 902 rrd_ring->next_to_clean = 0; 903 } 904 905 /* 906 * Read / Write Ptr Initialize: 907 */ 908 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 909 { 910 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 911 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 912 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 913 struct atl1c_buffer *buffer_info; 914 int i, j; 915 916 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 917 tpd_ring[i].next_to_use = 0; 918 atomic_set(&tpd_ring[i].next_to_clean, 0); 919 buffer_info = tpd_ring[i].buffer_info; 920 for (j = 0; j < tpd_ring->count; j++) 921 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 922 ATL1C_BUFFER_FREE); 923 } 924 rfd_ring->next_to_use = 0; 925 rfd_ring->next_to_clean = 0; 926 rrd_ring->next_to_use = 0; 927 rrd_ring->next_to_clean = 0; 928 for (j = 0; j < rfd_ring->count; j++) { 929 buffer_info = &rfd_ring->buffer_info[j]; 930 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 931 } 932 } 933 934 /** 935 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 936 * @adapter: board private structure 937 * 938 * Free all transmit software resources 939 */ 940 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 941 { 942 struct pci_dev *pdev = adapter->pdev; 943 944 pci_free_consistent(pdev, adapter->ring_header.size, 945 adapter->ring_header.desc, 946 adapter->ring_header.dma); 947 adapter->ring_header.desc = NULL; 948 949 /* Note: just free tdp_ring.buffer_info, 950 * it contain rfd_ring.buffer_info, do not double free */ 951 if (adapter->tpd_ring[0].buffer_info) { 952 kfree(adapter->tpd_ring[0].buffer_info); 953 adapter->tpd_ring[0].buffer_info = NULL; 954 } 955 if (adapter->rx_page) { 956 put_page(adapter->rx_page); 957 adapter->rx_page = NULL; 958 } 959 } 960 961 /** 962 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 963 * @adapter: board private structure 964 * 965 * Return 0 on success, negative on failure 966 */ 967 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 968 { 969 struct pci_dev *pdev = adapter->pdev; 970 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 971 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 972 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 973 struct atl1c_ring_header *ring_header = &adapter->ring_header; 974 int size; 975 int i; 976 int count = 0; 977 int rx_desc_count = 0; 978 u32 offset = 0; 979 980 rrd_ring->count = rfd_ring->count; 981 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 982 tpd_ring[i].count = tpd_ring[0].count; 983 984 /* 2 tpd queue, one high priority queue, 985 * another normal priority queue */ 986 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 987 rfd_ring->count); 988 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 989 if (unlikely(!tpd_ring->buffer_info)) 990 goto err_nomem; 991 992 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 993 tpd_ring[i].buffer_info = 994 (tpd_ring->buffer_info + count); 995 count += tpd_ring[i].count; 996 } 997 998 rfd_ring->buffer_info = 999 (tpd_ring->buffer_info + count); 1000 count += rfd_ring->count; 1001 rx_desc_count += rfd_ring->count; 1002 1003 /* 1004 * real ring DMA buffer 1005 * each ring/block may need up to 8 bytes for alignment, hence the 1006 * additional bytes tacked onto the end. 1007 */ 1008 ring_header->size = size = 1009 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 1010 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 1011 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 1012 8 * 4; 1013 1014 ring_header->desc = dma_zalloc_coherent(&pdev->dev, ring_header->size, 1015 &ring_header->dma, GFP_KERNEL); 1016 if (unlikely(!ring_header->desc)) { 1017 dev_err(&pdev->dev, "could not get memory for DMA buffer\n"); 1018 goto err_nomem; 1019 } 1020 /* init TPD ring */ 1021 1022 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1023 offset = tpd_ring[0].dma - ring_header->dma; 1024 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1025 tpd_ring[i].dma = ring_header->dma + offset; 1026 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1027 tpd_ring[i].size = 1028 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1029 offset += roundup(tpd_ring[i].size, 8); 1030 } 1031 /* init RFD ring */ 1032 rfd_ring->dma = ring_header->dma + offset; 1033 rfd_ring->desc = (u8 *) ring_header->desc + offset; 1034 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 1035 offset += roundup(rfd_ring->size, 8); 1036 1037 /* init RRD ring */ 1038 rrd_ring->dma = ring_header->dma + offset; 1039 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1040 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1041 rrd_ring->count; 1042 offset += roundup(rrd_ring->size, 8); 1043 1044 return 0; 1045 1046 err_nomem: 1047 kfree(tpd_ring->buffer_info); 1048 return -ENOMEM; 1049 } 1050 1051 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1052 { 1053 struct atl1c_hw *hw = &adapter->hw; 1054 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1055 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1056 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1057 adapter->tpd_ring; 1058 1059 /* TPD */ 1060 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1061 (u32)((tpd_ring[atl1c_trans_normal].dma & 1062 AT_DMA_HI_ADDR_MASK) >> 32)); 1063 /* just enable normal priority TX queue */ 1064 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1065 (u32)(tpd_ring[atl1c_trans_normal].dma & 1066 AT_DMA_LO_ADDR_MASK)); 1067 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1068 (u32)(tpd_ring[atl1c_trans_high].dma & 1069 AT_DMA_LO_ADDR_MASK)); 1070 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1071 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1072 1073 1074 /* RFD */ 1075 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1076 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1077 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1078 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1079 1080 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1081 rfd_ring->count & RFD_RING_SIZE_MASK); 1082 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1083 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1084 1085 /* RRD */ 1086 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1087 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1088 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1089 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1090 1091 if (hw->nic_type == athr_l2c_b) { 1092 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1093 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1094 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1095 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1096 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1097 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1098 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1099 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1100 } 1101 /* Load all of base address above */ 1102 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1103 } 1104 1105 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1106 { 1107 struct atl1c_hw *hw = &adapter->hw; 1108 int max_pay_load; 1109 u16 tx_offload_thresh; 1110 u32 txq_ctrl_data; 1111 1112 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1113 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1114 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1115 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1116 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1117 /* 1118 * if BIOS had changed the dam-read-max-length to an invalid value, 1119 * restore it to default value 1120 */ 1121 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1122 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1123 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1124 } 1125 txq_ctrl_data = 1126 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1127 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1128 1129 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1130 } 1131 1132 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1133 { 1134 struct atl1c_hw *hw = &adapter->hw; 1135 u32 rxq_ctrl_data; 1136 1137 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1138 RXQ_RFD_BURST_NUM_SHIFT; 1139 1140 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1141 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1142 1143 /* aspm for gigabit */ 1144 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1145 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1146 ASPM_THRUPUT_LIMIT_100M); 1147 1148 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1149 } 1150 1151 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1152 { 1153 struct atl1c_hw *hw = &adapter->hw; 1154 u32 dma_ctrl_data; 1155 1156 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1157 DMA_CTRL_RREQ_PRI_DATA | 1158 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1159 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1160 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1161 1162 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1163 } 1164 1165 /* 1166 * Stop the mac, transmit and receive units 1167 * hw - Struct containing variables accessed by shared code 1168 * return : 0 or idle status (if error) 1169 */ 1170 static int atl1c_stop_mac(struct atl1c_hw *hw) 1171 { 1172 u32 data; 1173 1174 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1175 data &= ~RXQ_CTRL_EN; 1176 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1177 1178 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1179 data &= ~TXQ_CTRL_EN; 1180 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1181 1182 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1183 1184 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1185 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1186 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1187 1188 return (int)atl1c_wait_until_idle(hw, 1189 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1190 } 1191 1192 static void atl1c_start_mac(struct atl1c_adapter *adapter) 1193 { 1194 struct atl1c_hw *hw = &adapter->hw; 1195 u32 mac, txq, rxq; 1196 1197 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false; 1198 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1199 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1200 1201 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1202 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1203 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1204 1205 txq |= TXQ_CTRL_EN; 1206 rxq |= RXQ_CTRL_EN; 1207 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1208 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1209 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1210 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1211 MAC_CTRL_HASH_ALG_CRC32; 1212 if (hw->mac_duplex) 1213 mac |= MAC_CTRL_DUPLX; 1214 else 1215 mac &= ~MAC_CTRL_DUPLX; 1216 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1217 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1218 1219 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1220 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1221 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1222 } 1223 1224 /* 1225 * Reset the transmit and receive units; mask and clear all interrupts. 1226 * hw - Struct containing variables accessed by shared code 1227 * return : 0 or idle status (if error) 1228 */ 1229 static int atl1c_reset_mac(struct atl1c_hw *hw) 1230 { 1231 struct atl1c_adapter *adapter = hw->adapter; 1232 struct pci_dev *pdev = adapter->pdev; 1233 u32 ctrl_data = 0; 1234 1235 atl1c_stop_mac(hw); 1236 /* 1237 * Issue Soft Reset to the MAC. This will reset the chip's 1238 * transmit, receive, DMA. It will not effect 1239 * the current PCI configuration. The global reset bit is self- 1240 * clearing, and should clear within a microsecond. 1241 */ 1242 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1243 ctrl_data |= MASTER_CTRL_OOB_DIS; 1244 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1245 1246 AT_WRITE_FLUSH(hw); 1247 msleep(10); 1248 /* Wait at least 10ms for All module to be Idle */ 1249 1250 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1251 dev_err(&pdev->dev, 1252 "MAC state machine can't be idle since" 1253 " disabled for 10ms second\n"); 1254 return -1; 1255 } 1256 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1257 1258 /* driver control speed/duplex */ 1259 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1260 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1261 1262 /* clk switch setting */ 1263 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1264 switch (hw->nic_type) { 1265 case athr_l2c_b: 1266 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1267 SERDES_MAC_CLK_SLOWDOWN); 1268 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1269 break; 1270 case athr_l2c_b2: 1271 case athr_l1d_2: 1272 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1273 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1274 break; 1275 default: 1276 break; 1277 } 1278 1279 return 0; 1280 } 1281 1282 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1283 { 1284 u16 ctrl_flags = hw->ctrl_flags; 1285 1286 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1287 atl1c_set_aspm(hw, SPEED_0); 1288 hw->ctrl_flags = ctrl_flags; 1289 } 1290 1291 /* 1292 * Set ASPM state. 1293 * Enable/disable L0s/L1 depend on link state. 1294 */ 1295 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1296 { 1297 u32 pm_ctrl_data; 1298 u32 link_l1_timer; 1299 1300 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1301 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1302 PM_CTRL_ASPM_L0S_EN | 1303 PM_CTRL_MAC_ASPM_CHK); 1304 /* L1 timer */ 1305 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1306 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1307 link_l1_timer = 1308 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1309 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1310 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1311 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1312 } else { 1313 link_l1_timer = hw->nic_type == athr_l2c_b ? 1314 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1315 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1316 link_l1_timer = 1; 1317 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1318 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1319 } 1320 1321 /* L0S/L1 enable */ 1322 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1323 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1324 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1325 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1326 1327 /* l2cb & l1d & l2cb2 & l1d2 */ 1328 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1329 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1330 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1331 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1332 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1333 PM_CTRL_SERDES_PD_EX_L1 | 1334 PM_CTRL_CLK_SWH_L1; 1335 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1336 PM_CTRL_SERDES_PLL_L1_EN | 1337 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1338 PM_CTRL_SA_DLY_EN | 1339 PM_CTRL_HOTRST); 1340 /* disable l0s if link down or l2cb */ 1341 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1342 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1343 } else { /* l1c */ 1344 pm_ctrl_data = 1345 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1346 if (link_speed != SPEED_0) { 1347 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1348 PM_CTRL_SERDES_PLL_L1_EN | 1349 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1350 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1351 PM_CTRL_CLK_SWH_L1 | 1352 PM_CTRL_ASPM_L0S_EN | 1353 PM_CTRL_ASPM_L1_EN); 1354 } else { /* link down */ 1355 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1356 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1357 PM_CTRL_SERDES_PLL_L1_EN | 1358 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1359 PM_CTRL_ASPM_L0S_EN); 1360 } 1361 } 1362 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1363 1364 return; 1365 } 1366 1367 /** 1368 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1369 * @adapter: board private structure 1370 * 1371 * Configure the Tx /Rx unit of the MAC after a reset. 1372 */ 1373 static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1374 { 1375 struct atl1c_hw *hw = &adapter->hw; 1376 u32 master_ctrl_data = 0; 1377 u32 intr_modrt_data; 1378 u32 data; 1379 1380 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1381 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1382 MASTER_CTRL_RX_ITIMER_EN | 1383 MASTER_CTRL_INT_RDCLR); 1384 /* clear interrupt status */ 1385 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1386 /* Clear any WOL status */ 1387 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1388 /* set Interrupt Clear Timer 1389 * HW will enable self to assert interrupt event to system after 1390 * waiting x-time for software to notify it accept interrupt. 1391 */ 1392 1393 data = CLK_GATING_EN_ALL; 1394 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1395 if (hw->nic_type == athr_l2c_b) 1396 data &= ~CLK_GATING_RXMAC_EN; 1397 } else 1398 data = 0; 1399 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1400 1401 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1402 hw->ict & INT_RETRIG_TIMER_MASK); 1403 1404 atl1c_configure_des_ring(adapter); 1405 1406 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1407 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1408 IRQ_MODRT_TX_TIMER_SHIFT; 1409 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1410 IRQ_MODRT_RX_TIMER_SHIFT; 1411 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1412 master_ctrl_data |= 1413 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1414 } 1415 1416 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1417 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1418 1419 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1420 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1421 1422 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1423 hw->smb_timer & SMB_STAT_TIMER_MASK); 1424 1425 /* set MTU */ 1426 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1427 VLAN_HLEN + ETH_FCS_LEN); 1428 1429 atl1c_configure_tx(adapter); 1430 atl1c_configure_rx(adapter); 1431 atl1c_configure_dma(adapter); 1432 1433 return 0; 1434 } 1435 1436 static int atl1c_configure(struct atl1c_adapter *adapter) 1437 { 1438 struct net_device *netdev = adapter->netdev; 1439 int num; 1440 1441 atl1c_init_ring_ptrs(adapter); 1442 atl1c_set_multi(netdev); 1443 atl1c_restore_vlan(adapter); 1444 1445 num = atl1c_alloc_rx_buffer(adapter); 1446 if (unlikely(num == 0)) 1447 return -ENOMEM; 1448 1449 if (atl1c_configure_mac(adapter)) 1450 return -EIO; 1451 1452 return 0; 1453 } 1454 1455 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1456 { 1457 u16 hw_reg_addr = 0; 1458 unsigned long *stats_item = NULL; 1459 u32 data; 1460 1461 /* update rx status */ 1462 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1463 stats_item = &adapter->hw_stats.rx_ok; 1464 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1465 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1466 *stats_item += data; 1467 stats_item++; 1468 hw_reg_addr += 4; 1469 } 1470 /* update tx status */ 1471 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1472 stats_item = &adapter->hw_stats.tx_ok; 1473 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1474 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1475 *stats_item += data; 1476 stats_item++; 1477 hw_reg_addr += 4; 1478 } 1479 } 1480 1481 /** 1482 * atl1c_get_stats - Get System Network Statistics 1483 * @netdev: network interface device structure 1484 * 1485 * Returns the address of the device statistics structure. 1486 * The statistics are actually updated from the timer callback. 1487 */ 1488 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1489 { 1490 struct atl1c_adapter *adapter = netdev_priv(netdev); 1491 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1492 struct net_device_stats *net_stats = &netdev->stats; 1493 1494 atl1c_update_hw_stats(adapter); 1495 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1496 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1497 net_stats->multicast = hw_stats->rx_mcast; 1498 net_stats->collisions = hw_stats->tx_1_col + 1499 hw_stats->tx_2_col + 1500 hw_stats->tx_late_col + 1501 hw_stats->tx_abort_col; 1502 1503 net_stats->rx_errors = hw_stats->rx_frag + 1504 hw_stats->rx_fcs_err + 1505 hw_stats->rx_len_err + 1506 hw_stats->rx_sz_ov + 1507 hw_stats->rx_rrd_ov + 1508 hw_stats->rx_align_err + 1509 hw_stats->rx_rxf_ov; 1510 1511 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1512 net_stats->rx_length_errors = hw_stats->rx_len_err; 1513 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1514 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1515 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1516 1517 net_stats->tx_errors = hw_stats->tx_late_col + 1518 hw_stats->tx_abort_col + 1519 hw_stats->tx_underrun + 1520 hw_stats->tx_trunc; 1521 1522 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1523 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1524 net_stats->tx_window_errors = hw_stats->tx_late_col; 1525 1526 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1527 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1528 1529 return net_stats; 1530 } 1531 1532 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1533 { 1534 u16 phy_data; 1535 1536 spin_lock(&adapter->mdio_lock); 1537 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1538 spin_unlock(&adapter->mdio_lock); 1539 } 1540 1541 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1542 enum atl1c_trans_queue type) 1543 { 1544 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1545 struct atl1c_buffer *buffer_info; 1546 struct pci_dev *pdev = adapter->pdev; 1547 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1548 u16 hw_next_to_clean; 1549 u16 reg; 1550 unsigned int total_bytes = 0, total_packets = 0; 1551 1552 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1553 1554 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1555 1556 while (next_to_clean != hw_next_to_clean) { 1557 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1558 if (buffer_info->skb) { 1559 total_bytes += buffer_info->skb->len; 1560 total_packets++; 1561 } 1562 atl1c_clean_buffer(pdev, buffer_info); 1563 if (++next_to_clean == tpd_ring->count) 1564 next_to_clean = 0; 1565 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1566 } 1567 1568 netdev_completed_queue(adapter->netdev, total_packets, total_bytes); 1569 1570 if (netif_queue_stopped(adapter->netdev) && 1571 netif_carrier_ok(adapter->netdev)) { 1572 netif_wake_queue(adapter->netdev); 1573 } 1574 1575 return true; 1576 } 1577 1578 /** 1579 * atl1c_intr - Interrupt Handler 1580 * @irq: interrupt number 1581 * @data: pointer to a network interface device structure 1582 */ 1583 static irqreturn_t atl1c_intr(int irq, void *data) 1584 { 1585 struct net_device *netdev = data; 1586 struct atl1c_adapter *adapter = netdev_priv(netdev); 1587 struct pci_dev *pdev = adapter->pdev; 1588 struct atl1c_hw *hw = &adapter->hw; 1589 int max_ints = AT_MAX_INT_WORK; 1590 int handled = IRQ_NONE; 1591 u32 status; 1592 u32 reg_data; 1593 1594 do { 1595 AT_READ_REG(hw, REG_ISR, ®_data); 1596 status = reg_data & hw->intr_mask; 1597 1598 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1599 if (max_ints != AT_MAX_INT_WORK) 1600 handled = IRQ_HANDLED; 1601 break; 1602 } 1603 /* link event */ 1604 if (status & ISR_GPHY) 1605 atl1c_clear_phy_int(adapter); 1606 /* Ack ISR */ 1607 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1608 if (status & ISR_RX_PKT) { 1609 if (likely(napi_schedule_prep(&adapter->napi))) { 1610 hw->intr_mask &= ~ISR_RX_PKT; 1611 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1612 __napi_schedule(&adapter->napi); 1613 } 1614 } 1615 if (status & ISR_TX_PKT) 1616 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1617 1618 handled = IRQ_HANDLED; 1619 /* check if PCIE PHY Link down */ 1620 if (status & ISR_ERROR) { 1621 if (netif_msg_hw(adapter)) 1622 dev_err(&pdev->dev, 1623 "atl1c hardware error (status = 0x%x)\n", 1624 status & ISR_ERROR); 1625 /* reset MAC */ 1626 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1627 schedule_work(&adapter->common_task); 1628 return IRQ_HANDLED; 1629 } 1630 1631 if (status & ISR_OVER) 1632 if (netif_msg_intr(adapter)) 1633 dev_warn(&pdev->dev, 1634 "TX/RX overflow (status = 0x%x)\n", 1635 status & ISR_OVER); 1636 1637 /* link event */ 1638 if (status & (ISR_GPHY | ISR_MANUAL)) { 1639 netdev->stats.tx_carrier_errors++; 1640 atl1c_link_chg_event(adapter); 1641 break; 1642 } 1643 1644 } while (--max_ints > 0); 1645 /* re-enable Interrupt*/ 1646 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1647 return handled; 1648 } 1649 1650 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1651 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1652 { 1653 /* 1654 * The pid field in RRS in not correct sometimes, so we 1655 * cannot figure out if the packet is fragmented or not, 1656 * so we tell the KERNEL CHECKSUM_NONE 1657 */ 1658 skb_checksum_none_assert(skb); 1659 } 1660 1661 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter) 1662 { 1663 struct sk_buff *skb; 1664 struct page *page; 1665 1666 if (adapter->rx_frag_size > PAGE_SIZE) 1667 return netdev_alloc_skb(adapter->netdev, 1668 adapter->rx_buffer_len); 1669 1670 page = adapter->rx_page; 1671 if (!page) { 1672 adapter->rx_page = page = alloc_page(GFP_ATOMIC); 1673 if (unlikely(!page)) 1674 return NULL; 1675 adapter->rx_page_offset = 0; 1676 } 1677 1678 skb = build_skb(page_address(page) + adapter->rx_page_offset, 1679 adapter->rx_frag_size); 1680 if (likely(skb)) { 1681 adapter->rx_page_offset += adapter->rx_frag_size; 1682 if (adapter->rx_page_offset >= PAGE_SIZE) 1683 adapter->rx_page = NULL; 1684 else 1685 get_page(page); 1686 } 1687 return skb; 1688 } 1689 1690 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1691 { 1692 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1693 struct pci_dev *pdev = adapter->pdev; 1694 struct atl1c_buffer *buffer_info, *next_info; 1695 struct sk_buff *skb; 1696 void *vir_addr = NULL; 1697 u16 num_alloc = 0; 1698 u16 rfd_next_to_use, next_next; 1699 struct atl1c_rx_free_desc *rfd_desc; 1700 dma_addr_t mapping; 1701 1702 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1703 if (++next_next == rfd_ring->count) 1704 next_next = 0; 1705 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1706 next_info = &rfd_ring->buffer_info[next_next]; 1707 1708 while (next_info->flags & ATL1C_BUFFER_FREE) { 1709 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1710 1711 skb = atl1c_alloc_skb(adapter); 1712 if (unlikely(!skb)) { 1713 if (netif_msg_rx_err(adapter)) 1714 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1715 break; 1716 } 1717 1718 /* 1719 * Make buffer alignment 2 beyond a 16 byte boundary 1720 * this will result in a 16 byte aligned IP header after 1721 * the 14 byte MAC header is removed 1722 */ 1723 vir_addr = skb->data; 1724 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1725 buffer_info->skb = skb; 1726 buffer_info->length = adapter->rx_buffer_len; 1727 mapping = pci_map_single(pdev, vir_addr, 1728 buffer_info->length, 1729 PCI_DMA_FROMDEVICE); 1730 if (unlikely(pci_dma_mapping_error(pdev, mapping))) { 1731 dev_kfree_skb(skb); 1732 buffer_info->skb = NULL; 1733 buffer_info->length = 0; 1734 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 1735 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed"); 1736 break; 1737 } 1738 buffer_info->dma = mapping; 1739 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1740 ATL1C_PCIMAP_FROMDEVICE); 1741 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1742 rfd_next_to_use = next_next; 1743 if (++next_next == rfd_ring->count) 1744 next_next = 0; 1745 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1746 next_info = &rfd_ring->buffer_info[next_next]; 1747 num_alloc++; 1748 } 1749 1750 if (num_alloc) { 1751 /* TODO: update mailbox here */ 1752 wmb(); 1753 rfd_ring->next_to_use = rfd_next_to_use; 1754 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1755 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1756 } 1757 1758 return num_alloc; 1759 } 1760 1761 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1762 struct atl1c_recv_ret_status *rrs, u16 num) 1763 { 1764 u16 i; 1765 /* the relationship between rrd and rfd is one map one */ 1766 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1767 rrd_ring->next_to_clean)) { 1768 rrs->word3 &= ~RRS_RXD_UPDATED; 1769 if (++rrd_ring->next_to_clean == rrd_ring->count) 1770 rrd_ring->next_to_clean = 0; 1771 } 1772 } 1773 1774 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1775 struct atl1c_recv_ret_status *rrs, u16 num) 1776 { 1777 u16 i; 1778 u16 rfd_index; 1779 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1780 1781 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1782 RRS_RX_RFD_INDEX_MASK; 1783 for (i = 0; i < num; i++) { 1784 buffer_info[rfd_index].skb = NULL; 1785 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1786 ATL1C_BUFFER_FREE); 1787 if (++rfd_index == rfd_ring->count) 1788 rfd_index = 0; 1789 } 1790 rfd_ring->next_to_clean = rfd_index; 1791 } 1792 1793 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1794 int *work_done, int work_to_do) 1795 { 1796 u16 rfd_num, rfd_index; 1797 u16 count = 0; 1798 u16 length; 1799 struct pci_dev *pdev = adapter->pdev; 1800 struct net_device *netdev = adapter->netdev; 1801 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1802 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1803 struct sk_buff *skb; 1804 struct atl1c_recv_ret_status *rrs; 1805 struct atl1c_buffer *buffer_info; 1806 1807 while (1) { 1808 if (*work_done >= work_to_do) 1809 break; 1810 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1811 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1812 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1813 RRS_RX_RFD_CNT_MASK; 1814 if (unlikely(rfd_num != 1)) 1815 /* TODO support mul rfd*/ 1816 if (netif_msg_rx_err(adapter)) 1817 dev_warn(&pdev->dev, 1818 "Multi rfd not support yet!\n"); 1819 goto rrs_checked; 1820 } else { 1821 break; 1822 } 1823 rrs_checked: 1824 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1825 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1826 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1827 if (netif_msg_rx_err(adapter)) 1828 dev_warn(&pdev->dev, 1829 "wrong packet! rrs word3 is %x\n", 1830 rrs->word3); 1831 continue; 1832 } 1833 1834 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1835 RRS_PKT_SIZE_MASK); 1836 /* Good Receive */ 1837 if (likely(rfd_num == 1)) { 1838 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1839 RRS_RX_RFD_INDEX_MASK; 1840 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1841 pci_unmap_single(pdev, buffer_info->dma, 1842 buffer_info->length, PCI_DMA_FROMDEVICE); 1843 skb = buffer_info->skb; 1844 } else { 1845 /* TODO */ 1846 if (netif_msg_rx_err(adapter)) 1847 dev_warn(&pdev->dev, 1848 "Multi rfd not support yet!\n"); 1849 break; 1850 } 1851 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1852 skb_put(skb, length - ETH_FCS_LEN); 1853 skb->protocol = eth_type_trans(skb, netdev); 1854 atl1c_rx_checksum(adapter, skb, rrs); 1855 if (rrs->word3 & RRS_VLAN_INS) { 1856 u16 vlan; 1857 1858 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1859 vlan = le16_to_cpu(vlan); 1860 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); 1861 } 1862 netif_receive_skb(skb); 1863 1864 (*work_done)++; 1865 count++; 1866 } 1867 if (count) 1868 atl1c_alloc_rx_buffer(adapter); 1869 } 1870 1871 /** 1872 * atl1c_clean - NAPI Rx polling callback 1873 */ 1874 static int atl1c_clean(struct napi_struct *napi, int budget) 1875 { 1876 struct atl1c_adapter *adapter = 1877 container_of(napi, struct atl1c_adapter, napi); 1878 int work_done = 0; 1879 1880 /* Keep link state information with original netdev */ 1881 if (!netif_carrier_ok(adapter->netdev)) 1882 goto quit_polling; 1883 /* just enable one RXQ */ 1884 atl1c_clean_rx_irq(adapter, &work_done, budget); 1885 1886 if (work_done < budget) { 1887 quit_polling: 1888 napi_complete(napi); 1889 adapter->hw.intr_mask |= ISR_RX_PKT; 1890 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1891 } 1892 return work_done; 1893 } 1894 1895 #ifdef CONFIG_NET_POLL_CONTROLLER 1896 1897 /* 1898 * Polling 'interrupt' - used by things like netconsole to send skbs 1899 * without having to re-enable interrupts. It's not called while 1900 * the interrupt routine is executing. 1901 */ 1902 static void atl1c_netpoll(struct net_device *netdev) 1903 { 1904 struct atl1c_adapter *adapter = netdev_priv(netdev); 1905 1906 disable_irq(adapter->pdev->irq); 1907 atl1c_intr(adapter->pdev->irq, netdev); 1908 enable_irq(adapter->pdev->irq); 1909 } 1910 #endif 1911 1912 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1913 { 1914 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1915 u16 next_to_use = 0; 1916 u16 next_to_clean = 0; 1917 1918 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1919 next_to_use = tpd_ring->next_to_use; 1920 1921 return (u16)(next_to_clean > next_to_use) ? 1922 (next_to_clean - next_to_use - 1) : 1923 (tpd_ring->count + next_to_clean - next_to_use - 1); 1924 } 1925 1926 /* 1927 * get next usable tpd 1928 * Note: should call atl1c_tdp_avail to make sure 1929 * there is enough tpd to use 1930 */ 1931 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1932 enum atl1c_trans_queue type) 1933 { 1934 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1935 struct atl1c_tpd_desc *tpd_desc; 1936 u16 next_to_use = 0; 1937 1938 next_to_use = tpd_ring->next_to_use; 1939 if (++tpd_ring->next_to_use == tpd_ring->count) 1940 tpd_ring->next_to_use = 0; 1941 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1942 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1943 return tpd_desc; 1944 } 1945 1946 static struct atl1c_buffer * 1947 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1948 { 1949 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1950 1951 return &tpd_ring->buffer_info[tpd - 1952 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1953 } 1954 1955 /* Calculate the transmit packet descript needed*/ 1956 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1957 { 1958 u16 tpd_req; 1959 u16 proto_hdr_len = 0; 1960 1961 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1962 1963 if (skb_is_gso(skb)) { 1964 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1965 if (proto_hdr_len < skb_headlen(skb)) 1966 tpd_req++; 1967 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1968 tpd_req++; 1969 } 1970 return tpd_req; 1971 } 1972 1973 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1974 struct sk_buff *skb, 1975 struct atl1c_tpd_desc **tpd, 1976 enum atl1c_trans_queue type) 1977 { 1978 struct pci_dev *pdev = adapter->pdev; 1979 unsigned short offload_type; 1980 u8 hdr_len; 1981 u32 real_len; 1982 1983 if (skb_is_gso(skb)) { 1984 int err; 1985 1986 err = skb_cow_head(skb, 0); 1987 if (err < 0) 1988 return err; 1989 1990 offload_type = skb_shinfo(skb)->gso_type; 1991 1992 if (offload_type & SKB_GSO_TCPV4) { 1993 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1994 + ntohs(ip_hdr(skb)->tot_len)); 1995 1996 if (real_len < skb->len) 1997 pskb_trim(skb, real_len); 1998 1999 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2000 if (unlikely(skb->len == hdr_len)) { 2001 /* only xsum need */ 2002 if (netif_msg_tx_queued(adapter)) 2003 dev_warn(&pdev->dev, 2004 "IPV4 tso with zero data??\n"); 2005 goto check_sum; 2006 } else { 2007 ip_hdr(skb)->check = 0; 2008 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2009 ip_hdr(skb)->saddr, 2010 ip_hdr(skb)->daddr, 2011 0, IPPROTO_TCP, 0); 2012 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2013 } 2014 } 2015 2016 if (offload_type & SKB_GSO_TCPV6) { 2017 struct atl1c_tpd_ext_desc *etpd = 2018 *(struct atl1c_tpd_ext_desc **)(tpd); 2019 2020 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2021 *tpd = atl1c_get_tpd(adapter, type); 2022 ipv6_hdr(skb)->payload_len = 0; 2023 /* check payload == 0 byte ? */ 2024 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2025 if (unlikely(skb->len == hdr_len)) { 2026 /* only xsum need */ 2027 if (netif_msg_tx_queued(adapter)) 2028 dev_warn(&pdev->dev, 2029 "IPV6 tso with zero data??\n"); 2030 goto check_sum; 2031 } else 2032 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2033 &ipv6_hdr(skb)->saddr, 2034 &ipv6_hdr(skb)->daddr, 2035 0, IPPROTO_TCP, 0); 2036 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2037 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2038 etpd->pkt_len = cpu_to_le32(skb->len); 2039 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2040 } 2041 2042 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2043 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2044 TPD_TCPHDR_OFFSET_SHIFT; 2045 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2046 TPD_MSS_SHIFT; 2047 return 0; 2048 } 2049 2050 check_sum: 2051 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2052 u8 css, cso; 2053 cso = skb_checksum_start_offset(skb); 2054 2055 if (unlikely(cso & 0x1)) { 2056 if (netif_msg_tx_err(adapter)) 2057 dev_err(&adapter->pdev->dev, 2058 "payload offset should not an event number\n"); 2059 return -1; 2060 } else { 2061 css = cso + skb->csum_offset; 2062 2063 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2064 TPD_PLOADOFFSET_SHIFT; 2065 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2066 TPD_CCSUM_OFFSET_SHIFT; 2067 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2068 } 2069 } 2070 return 0; 2071 } 2072 2073 static void atl1c_tx_rollback(struct atl1c_adapter *adpt, 2074 struct atl1c_tpd_desc *first_tpd, 2075 enum atl1c_trans_queue type) 2076 { 2077 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type]; 2078 struct atl1c_buffer *buffer_info; 2079 struct atl1c_tpd_desc *tpd; 2080 u16 first_index, index; 2081 2082 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc; 2083 index = first_index; 2084 while (index != tpd_ring->next_to_use) { 2085 tpd = ATL1C_TPD_DESC(tpd_ring, index); 2086 buffer_info = &tpd_ring->buffer_info[index]; 2087 atl1c_clean_buffer(adpt->pdev, buffer_info); 2088 memset(tpd, 0, sizeof(struct atl1c_tpd_desc)); 2089 if (++index == tpd_ring->count) 2090 index = 0; 2091 } 2092 tpd_ring->next_to_use = first_index; 2093 } 2094 2095 static int atl1c_tx_map(struct atl1c_adapter *adapter, 2096 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2097 enum atl1c_trans_queue type) 2098 { 2099 struct atl1c_tpd_desc *use_tpd = NULL; 2100 struct atl1c_buffer *buffer_info = NULL; 2101 u16 buf_len = skb_headlen(skb); 2102 u16 map_len = 0; 2103 u16 mapped_len = 0; 2104 u16 hdr_len = 0; 2105 u16 nr_frags; 2106 u16 f; 2107 int tso; 2108 2109 nr_frags = skb_shinfo(skb)->nr_frags; 2110 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2111 if (tso) { 2112 /* TSO */ 2113 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2114 use_tpd = tpd; 2115 2116 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2117 buffer_info->length = map_len; 2118 buffer_info->dma = pci_map_single(adapter->pdev, 2119 skb->data, hdr_len, PCI_DMA_TODEVICE); 2120 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2121 buffer_info->dma))) 2122 goto err_dma; 2123 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2124 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2125 ATL1C_PCIMAP_TODEVICE); 2126 mapped_len += map_len; 2127 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2128 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2129 } 2130 2131 if (mapped_len < buf_len) { 2132 /* mapped_len == 0, means we should use the first tpd, 2133 which is given by caller */ 2134 if (mapped_len == 0) 2135 use_tpd = tpd; 2136 else { 2137 use_tpd = atl1c_get_tpd(adapter, type); 2138 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2139 } 2140 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2141 buffer_info->length = buf_len - mapped_len; 2142 buffer_info->dma = 2143 pci_map_single(adapter->pdev, skb->data + mapped_len, 2144 buffer_info->length, PCI_DMA_TODEVICE); 2145 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2146 buffer_info->dma))) 2147 goto err_dma; 2148 2149 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2150 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2151 ATL1C_PCIMAP_TODEVICE); 2152 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2153 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2154 } 2155 2156 for (f = 0; f < nr_frags; f++) { 2157 struct skb_frag_struct *frag; 2158 2159 frag = &skb_shinfo(skb)->frags[f]; 2160 2161 use_tpd = atl1c_get_tpd(adapter, type); 2162 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2163 2164 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2165 buffer_info->length = skb_frag_size(frag); 2166 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2167 frag, 0, 2168 buffer_info->length, 2169 DMA_TO_DEVICE); 2170 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) 2171 goto err_dma; 2172 2173 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2174 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2175 ATL1C_PCIMAP_TODEVICE); 2176 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2177 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2178 } 2179 2180 /* The last tpd */ 2181 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2182 /* The last buffer info contain the skb address, 2183 so it will be free after unmap */ 2184 buffer_info->skb = skb; 2185 2186 return 0; 2187 2188 err_dma: 2189 buffer_info->dma = 0; 2190 buffer_info->length = 0; 2191 return -1; 2192 } 2193 2194 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2195 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2196 { 2197 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2198 u16 reg; 2199 2200 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2201 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2202 } 2203 2204 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2205 struct net_device *netdev) 2206 { 2207 struct atl1c_adapter *adapter = netdev_priv(netdev); 2208 u16 tpd_req = 1; 2209 struct atl1c_tpd_desc *tpd; 2210 enum atl1c_trans_queue type = atl1c_trans_normal; 2211 2212 if (test_bit(__AT_DOWN, &adapter->flags)) { 2213 dev_kfree_skb_any(skb); 2214 return NETDEV_TX_OK; 2215 } 2216 2217 tpd_req = atl1c_cal_tpd_req(skb); 2218 2219 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2220 /* no enough descriptor, just stop queue */ 2221 netif_stop_queue(netdev); 2222 return NETDEV_TX_BUSY; 2223 } 2224 2225 tpd = atl1c_get_tpd(adapter, type); 2226 2227 /* do TSO and check sum */ 2228 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2229 dev_kfree_skb_any(skb); 2230 return NETDEV_TX_OK; 2231 } 2232 2233 if (unlikely(skb_vlan_tag_present(skb))) { 2234 u16 vlan = skb_vlan_tag_get(skb); 2235 __le16 tag; 2236 2237 vlan = cpu_to_le16(vlan); 2238 AT_VLAN_TO_TAG(vlan, tag); 2239 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2240 tpd->vlan_tag = tag; 2241 } 2242 2243 if (skb_network_offset(skb) != ETH_HLEN) 2244 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2245 2246 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) { 2247 netif_info(adapter, tx_done, adapter->netdev, 2248 "tx-skb droppted due to dma error\n"); 2249 /* roll back tpd/buffer */ 2250 atl1c_tx_rollback(adapter, tpd, type); 2251 dev_kfree_skb_any(skb); 2252 } else { 2253 netdev_sent_queue(adapter->netdev, skb->len); 2254 atl1c_tx_queue(adapter, skb, tpd, type); 2255 } 2256 2257 return NETDEV_TX_OK; 2258 } 2259 2260 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2261 { 2262 struct net_device *netdev = adapter->netdev; 2263 2264 free_irq(adapter->pdev->irq, netdev); 2265 2266 if (adapter->have_msi) 2267 pci_disable_msi(adapter->pdev); 2268 } 2269 2270 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2271 { 2272 struct pci_dev *pdev = adapter->pdev; 2273 struct net_device *netdev = adapter->netdev; 2274 int flags = 0; 2275 int err = 0; 2276 2277 adapter->have_msi = true; 2278 err = pci_enable_msi(adapter->pdev); 2279 if (err) { 2280 if (netif_msg_ifup(adapter)) 2281 dev_err(&pdev->dev, 2282 "Unable to allocate MSI interrupt Error: %d\n", 2283 err); 2284 adapter->have_msi = false; 2285 } 2286 2287 if (!adapter->have_msi) 2288 flags |= IRQF_SHARED; 2289 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2290 netdev->name, netdev); 2291 if (err) { 2292 if (netif_msg_ifup(adapter)) 2293 dev_err(&pdev->dev, 2294 "Unable to allocate interrupt Error: %d\n", 2295 err); 2296 if (adapter->have_msi) 2297 pci_disable_msi(adapter->pdev); 2298 return err; 2299 } 2300 if (netif_msg_ifup(adapter)) 2301 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2302 return err; 2303 } 2304 2305 2306 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2307 { 2308 /* release tx-pending skbs and reset tx/rx ring index */ 2309 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2310 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2311 atl1c_clean_rx_ring(adapter); 2312 } 2313 2314 static int atl1c_up(struct atl1c_adapter *adapter) 2315 { 2316 struct net_device *netdev = adapter->netdev; 2317 int err; 2318 2319 netif_carrier_off(netdev); 2320 2321 err = atl1c_configure(adapter); 2322 if (unlikely(err)) 2323 goto err_up; 2324 2325 err = atl1c_request_irq(adapter); 2326 if (unlikely(err)) 2327 goto err_up; 2328 2329 atl1c_check_link_status(adapter); 2330 clear_bit(__AT_DOWN, &adapter->flags); 2331 napi_enable(&adapter->napi); 2332 atl1c_irq_enable(adapter); 2333 netif_start_queue(netdev); 2334 return err; 2335 2336 err_up: 2337 atl1c_clean_rx_ring(adapter); 2338 return err; 2339 } 2340 2341 static void atl1c_down(struct atl1c_adapter *adapter) 2342 { 2343 struct net_device *netdev = adapter->netdev; 2344 2345 atl1c_del_timer(adapter); 2346 adapter->work_event = 0; /* clear all event */ 2347 /* signal that we're down so the interrupt handler does not 2348 * reschedule our watchdog timer */ 2349 set_bit(__AT_DOWN, &adapter->flags); 2350 netif_carrier_off(netdev); 2351 napi_disable(&adapter->napi); 2352 atl1c_irq_disable(adapter); 2353 atl1c_free_irq(adapter); 2354 /* disable ASPM if device inactive */ 2355 atl1c_disable_l0s_l1(&adapter->hw); 2356 /* reset MAC to disable all RX/TX */ 2357 atl1c_reset_mac(&adapter->hw); 2358 msleep(1); 2359 2360 adapter->link_speed = SPEED_0; 2361 adapter->link_duplex = -1; 2362 atl1c_reset_dma_ring(adapter); 2363 } 2364 2365 /** 2366 * atl1c_open - Called when a network interface is made active 2367 * @netdev: network interface device structure 2368 * 2369 * Returns 0 on success, negative value on failure 2370 * 2371 * The open entry point is called when a network interface is made 2372 * active by the system (IFF_UP). At this point all resources needed 2373 * for transmit and receive operations are allocated, the interrupt 2374 * handler is registered with the OS, the watchdog timer is started, 2375 * and the stack is notified that the interface is ready. 2376 */ 2377 static int atl1c_open(struct net_device *netdev) 2378 { 2379 struct atl1c_adapter *adapter = netdev_priv(netdev); 2380 int err; 2381 2382 /* disallow open during test */ 2383 if (test_bit(__AT_TESTING, &adapter->flags)) 2384 return -EBUSY; 2385 2386 /* allocate rx/tx dma buffer & descriptors */ 2387 err = atl1c_setup_ring_resources(adapter); 2388 if (unlikely(err)) 2389 return err; 2390 2391 err = atl1c_up(adapter); 2392 if (unlikely(err)) 2393 goto err_up; 2394 2395 return 0; 2396 2397 err_up: 2398 atl1c_free_irq(adapter); 2399 atl1c_free_ring_resources(adapter); 2400 atl1c_reset_mac(&adapter->hw); 2401 return err; 2402 } 2403 2404 /** 2405 * atl1c_close - Disables a network interface 2406 * @netdev: network interface device structure 2407 * 2408 * Returns 0, this is not allowed to fail 2409 * 2410 * The close entry point is called when an interface is de-activated 2411 * by the OS. The hardware is still under the drivers control, but 2412 * needs to be disabled. A global MAC reset is issued to stop the 2413 * hardware, and all transmit and receive resources are freed. 2414 */ 2415 static int atl1c_close(struct net_device *netdev) 2416 { 2417 struct atl1c_adapter *adapter = netdev_priv(netdev); 2418 2419 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2420 set_bit(__AT_DOWN, &adapter->flags); 2421 cancel_work_sync(&adapter->common_task); 2422 atl1c_down(adapter); 2423 atl1c_free_ring_resources(adapter); 2424 return 0; 2425 } 2426 2427 static int atl1c_suspend(struct device *dev) 2428 { 2429 struct pci_dev *pdev = to_pci_dev(dev); 2430 struct net_device *netdev = pci_get_drvdata(pdev); 2431 struct atl1c_adapter *adapter = netdev_priv(netdev); 2432 struct atl1c_hw *hw = &adapter->hw; 2433 u32 wufc = adapter->wol; 2434 2435 atl1c_disable_l0s_l1(hw); 2436 if (netif_running(netdev)) { 2437 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2438 atl1c_down(adapter); 2439 } 2440 netif_device_detach(netdev); 2441 2442 if (wufc) 2443 if (atl1c_phy_to_ps_link(hw) != 0) 2444 dev_dbg(&pdev->dev, "phy power saving failed"); 2445 2446 atl1c_power_saving(hw, wufc); 2447 2448 return 0; 2449 } 2450 2451 #ifdef CONFIG_PM_SLEEP 2452 static int atl1c_resume(struct device *dev) 2453 { 2454 struct pci_dev *pdev = to_pci_dev(dev); 2455 struct net_device *netdev = pci_get_drvdata(pdev); 2456 struct atl1c_adapter *adapter = netdev_priv(netdev); 2457 2458 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2459 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2460 2461 atl1c_phy_reset(&adapter->hw); 2462 atl1c_reset_mac(&adapter->hw); 2463 atl1c_phy_init(&adapter->hw); 2464 2465 #if 0 2466 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2467 pm_data &= ~PM_CTRLSTAT_PME_EN; 2468 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2469 #endif 2470 2471 netif_device_attach(netdev); 2472 if (netif_running(netdev)) 2473 atl1c_up(adapter); 2474 2475 return 0; 2476 } 2477 #endif 2478 2479 static void atl1c_shutdown(struct pci_dev *pdev) 2480 { 2481 struct net_device *netdev = pci_get_drvdata(pdev); 2482 struct atl1c_adapter *adapter = netdev_priv(netdev); 2483 2484 atl1c_suspend(&pdev->dev); 2485 pci_wake_from_d3(pdev, adapter->wol); 2486 pci_set_power_state(pdev, PCI_D3hot); 2487 } 2488 2489 static const struct net_device_ops atl1c_netdev_ops = { 2490 .ndo_open = atl1c_open, 2491 .ndo_stop = atl1c_close, 2492 .ndo_validate_addr = eth_validate_addr, 2493 .ndo_start_xmit = atl1c_xmit_frame, 2494 .ndo_set_mac_address = atl1c_set_mac_addr, 2495 .ndo_set_rx_mode = atl1c_set_multi, 2496 .ndo_change_mtu = atl1c_change_mtu, 2497 .ndo_fix_features = atl1c_fix_features, 2498 .ndo_set_features = atl1c_set_features, 2499 .ndo_do_ioctl = atl1c_ioctl, 2500 .ndo_tx_timeout = atl1c_tx_timeout, 2501 .ndo_get_stats = atl1c_get_stats, 2502 #ifdef CONFIG_NET_POLL_CONTROLLER 2503 .ndo_poll_controller = atl1c_netpoll, 2504 #endif 2505 }; 2506 2507 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2508 { 2509 SET_NETDEV_DEV(netdev, &pdev->dev); 2510 pci_set_drvdata(pdev, netdev); 2511 2512 netdev->netdev_ops = &atl1c_netdev_ops; 2513 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2514 atl1c_set_ethtool_ops(netdev); 2515 2516 /* TODO: add when ready */ 2517 netdev->hw_features = NETIF_F_SG | 2518 NETIF_F_HW_CSUM | 2519 NETIF_F_HW_VLAN_CTAG_RX | 2520 NETIF_F_TSO | 2521 NETIF_F_TSO6; 2522 netdev->features = netdev->hw_features | 2523 NETIF_F_HW_VLAN_CTAG_TX; 2524 return 0; 2525 } 2526 2527 /** 2528 * atl1c_probe - Device Initialization Routine 2529 * @pdev: PCI device information struct 2530 * @ent: entry in atl1c_pci_tbl 2531 * 2532 * Returns 0 on success, negative on failure 2533 * 2534 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2535 * The OS initialization, configuring of the adapter private structure, 2536 * and a hardware reset occur. 2537 */ 2538 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2539 { 2540 struct net_device *netdev; 2541 struct atl1c_adapter *adapter; 2542 static int cards_found; 2543 2544 int err = 0; 2545 2546 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2547 err = pci_enable_device_mem(pdev); 2548 if (err) { 2549 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2550 return err; 2551 } 2552 2553 /* 2554 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2555 * shared register for the high 32 bits, so only a single, aligned, 2556 * 4 GB physical address range can be used at a time. 2557 * 2558 * Supporting 64-bit DMA on this hardware is more trouble than it's 2559 * worth. It is far easier to limit to 32-bit DMA than update 2560 * various kernel subsystems to support the mechanics required by a 2561 * fixed-high-32-bit system. 2562 */ 2563 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2564 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2565 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2566 goto err_dma; 2567 } 2568 2569 err = pci_request_regions(pdev, atl1c_driver_name); 2570 if (err) { 2571 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2572 goto err_pci_reg; 2573 } 2574 2575 pci_set_master(pdev); 2576 2577 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2578 if (netdev == NULL) { 2579 err = -ENOMEM; 2580 goto err_alloc_etherdev; 2581 } 2582 2583 err = atl1c_init_netdev(netdev, pdev); 2584 if (err) { 2585 dev_err(&pdev->dev, "init netdevice failed\n"); 2586 goto err_init_netdev; 2587 } 2588 adapter = netdev_priv(netdev); 2589 adapter->bd_number = cards_found; 2590 adapter->netdev = netdev; 2591 adapter->pdev = pdev; 2592 adapter->hw.adapter = adapter; 2593 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2594 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2595 if (!adapter->hw.hw_addr) { 2596 err = -EIO; 2597 dev_err(&pdev->dev, "cannot map device registers\n"); 2598 goto err_ioremap; 2599 } 2600 2601 /* init mii data */ 2602 adapter->mii.dev = netdev; 2603 adapter->mii.mdio_read = atl1c_mdio_read; 2604 adapter->mii.mdio_write = atl1c_mdio_write; 2605 adapter->mii.phy_id_mask = 0x1f; 2606 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2607 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2608 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2609 (unsigned long)adapter); 2610 /* setup the private structure */ 2611 err = atl1c_sw_init(adapter); 2612 if (err) { 2613 dev_err(&pdev->dev, "net device private data init failed\n"); 2614 goto err_sw_init; 2615 } 2616 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2617 2618 /* Init GPHY as early as possible due to power saving issue */ 2619 atl1c_phy_reset(&adapter->hw); 2620 2621 err = atl1c_reset_mac(&adapter->hw); 2622 if (err) { 2623 err = -EIO; 2624 goto err_reset; 2625 } 2626 2627 /* reset the controller to 2628 * put the device in a known good starting state */ 2629 err = atl1c_phy_init(&adapter->hw); 2630 if (err) { 2631 err = -EIO; 2632 goto err_reset; 2633 } 2634 if (atl1c_read_mac_addr(&adapter->hw)) { 2635 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2636 netdev->addr_assign_type = NET_ADDR_RANDOM; 2637 } 2638 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2639 if (netif_msg_probe(adapter)) 2640 dev_dbg(&pdev->dev, "mac address : %pM\n", 2641 adapter->hw.mac_addr); 2642 2643 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2644 INIT_WORK(&adapter->common_task, atl1c_common_task); 2645 adapter->work_event = 0; 2646 err = register_netdev(netdev); 2647 if (err) { 2648 dev_err(&pdev->dev, "register netdevice failed\n"); 2649 goto err_register; 2650 } 2651 2652 if (netif_msg_probe(adapter)) 2653 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2654 cards_found++; 2655 return 0; 2656 2657 err_reset: 2658 err_register: 2659 err_sw_init: 2660 iounmap(adapter->hw.hw_addr); 2661 err_init_netdev: 2662 err_ioremap: 2663 free_netdev(netdev); 2664 err_alloc_etherdev: 2665 pci_release_regions(pdev); 2666 err_pci_reg: 2667 err_dma: 2668 pci_disable_device(pdev); 2669 return err; 2670 } 2671 2672 /** 2673 * atl1c_remove - Device Removal Routine 2674 * @pdev: PCI device information struct 2675 * 2676 * atl1c_remove is called by the PCI subsystem to alert the driver 2677 * that it should release a PCI device. The could be caused by a 2678 * Hot-Plug event, or because the driver is going to be removed from 2679 * memory. 2680 */ 2681 static void atl1c_remove(struct pci_dev *pdev) 2682 { 2683 struct net_device *netdev = pci_get_drvdata(pdev); 2684 struct atl1c_adapter *adapter = netdev_priv(netdev); 2685 2686 unregister_netdev(netdev); 2687 /* restore permanent address */ 2688 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2689 atl1c_phy_disable(&adapter->hw); 2690 2691 iounmap(adapter->hw.hw_addr); 2692 2693 pci_release_regions(pdev); 2694 pci_disable_device(pdev); 2695 free_netdev(netdev); 2696 } 2697 2698 /** 2699 * atl1c_io_error_detected - called when PCI error is detected 2700 * @pdev: Pointer to PCI device 2701 * @state: The current pci connection state 2702 * 2703 * This function is called after a PCI bus error affecting 2704 * this device has been detected. 2705 */ 2706 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2707 pci_channel_state_t state) 2708 { 2709 struct net_device *netdev = pci_get_drvdata(pdev); 2710 struct atl1c_adapter *adapter = netdev_priv(netdev); 2711 2712 netif_device_detach(netdev); 2713 2714 if (state == pci_channel_io_perm_failure) 2715 return PCI_ERS_RESULT_DISCONNECT; 2716 2717 if (netif_running(netdev)) 2718 atl1c_down(adapter); 2719 2720 pci_disable_device(pdev); 2721 2722 /* Request a slot slot reset. */ 2723 return PCI_ERS_RESULT_NEED_RESET; 2724 } 2725 2726 /** 2727 * atl1c_io_slot_reset - called after the pci bus has been reset. 2728 * @pdev: Pointer to PCI device 2729 * 2730 * Restart the card from scratch, as if from a cold-boot. Implementation 2731 * resembles the first-half of the e1000_resume routine. 2732 */ 2733 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2734 { 2735 struct net_device *netdev = pci_get_drvdata(pdev); 2736 struct atl1c_adapter *adapter = netdev_priv(netdev); 2737 2738 if (pci_enable_device(pdev)) { 2739 if (netif_msg_hw(adapter)) 2740 dev_err(&pdev->dev, 2741 "Cannot re-enable PCI device after reset\n"); 2742 return PCI_ERS_RESULT_DISCONNECT; 2743 } 2744 pci_set_master(pdev); 2745 2746 pci_enable_wake(pdev, PCI_D3hot, 0); 2747 pci_enable_wake(pdev, PCI_D3cold, 0); 2748 2749 atl1c_reset_mac(&adapter->hw); 2750 2751 return PCI_ERS_RESULT_RECOVERED; 2752 } 2753 2754 /** 2755 * atl1c_io_resume - called when traffic can start flowing again. 2756 * @pdev: Pointer to PCI device 2757 * 2758 * This callback is called when the error recovery driver tells us that 2759 * its OK to resume normal operation. Implementation resembles the 2760 * second-half of the atl1c_resume routine. 2761 */ 2762 static void atl1c_io_resume(struct pci_dev *pdev) 2763 { 2764 struct net_device *netdev = pci_get_drvdata(pdev); 2765 struct atl1c_adapter *adapter = netdev_priv(netdev); 2766 2767 if (netif_running(netdev)) { 2768 if (atl1c_up(adapter)) { 2769 if (netif_msg_hw(adapter)) 2770 dev_err(&pdev->dev, 2771 "Cannot bring device back up after reset\n"); 2772 return; 2773 } 2774 } 2775 2776 netif_device_attach(netdev); 2777 } 2778 2779 static const struct pci_error_handlers atl1c_err_handler = { 2780 .error_detected = atl1c_io_error_detected, 2781 .slot_reset = atl1c_io_slot_reset, 2782 .resume = atl1c_io_resume, 2783 }; 2784 2785 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2786 2787 static struct pci_driver atl1c_driver = { 2788 .name = atl1c_driver_name, 2789 .id_table = atl1c_pci_tbl, 2790 .probe = atl1c_probe, 2791 .remove = atl1c_remove, 2792 .shutdown = atl1c_shutdown, 2793 .err_handler = &atl1c_err_handler, 2794 .driver.pm = &atl1c_pm_ops, 2795 }; 2796 2797 module_pci_driver(atl1c_driver); 2798