1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 28 /* 29 * atl1c_pci_tbl - PCI Device ID Table 30 * 31 * Wildcard entries (PCI_ANY_ID) should come last 32 * Last entry must be all 0s 33 * 34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 35 * Class, Class Mask, private data (not used) } 36 */ 37 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { 38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 44 /* required last entry */ 45 { 0 } 46 }; 47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 48 49 MODULE_AUTHOR("Jie Yang"); 50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 51 MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver"); 52 MODULE_LICENSE("GPL"); 53 MODULE_VERSION(ATL1C_DRV_VERSION); 54 55 static int atl1c_stop_mac(struct atl1c_hw *hw); 56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 58 static void atl1c_start_mac(struct atl1c_adapter *adapter); 59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 60 int *work_done, int work_to_do); 61 static int atl1c_up(struct atl1c_adapter *adapter); 62 static void atl1c_down(struct atl1c_adapter *adapter); 63 static int atl1c_reset_mac(struct atl1c_hw *hw); 64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 65 static int atl1c_configure(struct atl1c_adapter *adapter); 66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter); 67 68 static const u16 atl1c_pay_load_size[] = { 69 128, 256, 512, 1024, 2048, 4096, 70 }; 71 72 73 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 74 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 75 static void atl1c_pcie_patch(struct atl1c_hw *hw) 76 { 77 u32 mst_data, data; 78 79 /* pclk sel could switch to 25M */ 80 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 81 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 82 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 83 84 /* WoL/PCIE related settings */ 85 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 86 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 87 data |= PCIE_PHYMISC_FORCE_RCV_DET; 88 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 89 } else { /* new dev set bit5 of MASTER */ 90 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 91 AT_WRITE_REG(hw, REG_MASTER_CTRL, 92 mst_data | MASTER_CTRL_WAKEN_25M); 93 } 94 /* aspm/PCIE setting only for l2cb 1.0 */ 95 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 96 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 97 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 98 L2CB1_PCIE_PHYMISC2_CDR_BW); 99 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 100 L2CB1_PCIE_PHYMISC2_L0S_TH); 101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 102 /* extend L1 sync timer */ 103 AT_READ_REG(hw, REG_LINK_CTRL, &data); 104 data |= LINK_CTRL_EXT_SYNC; 105 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 106 } 107 /* l2cb 1.x & l1d 1.x */ 108 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 109 AT_READ_REG(hw, REG_PM_CTRL, &data); 110 data |= PM_CTRL_L0S_BUFSRX_EN; 111 AT_WRITE_REG(hw, REG_PM_CTRL, data); 112 /* clear vendor msg */ 113 AT_READ_REG(hw, REG_DMA_DBG, &data); 114 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 115 } 116 } 117 118 /* FIXME: no need any more ? */ 119 /* 120 * atl1c_init_pcie - init PCIE module 121 */ 122 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 123 { 124 u32 data; 125 u32 pci_cmd; 126 struct pci_dev *pdev = hw->adapter->pdev; 127 int pos; 128 129 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 130 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 131 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 132 PCI_COMMAND_IO); 133 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 134 135 /* 136 * Clear any PowerSaveing Settings 137 */ 138 pci_enable_wake(pdev, PCI_D3hot, 0); 139 pci_enable_wake(pdev, PCI_D3cold, 0); 140 /* wol sts read-clear */ 141 AT_READ_REG(hw, REG_WOL_CTRL, &data); 142 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 143 144 /* 145 * Mask some pcie error bits 146 */ 147 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 148 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 149 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 150 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 151 /* clear error status */ 152 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, 153 PCI_EXP_DEVSTA_NFED | 154 PCI_EXP_DEVSTA_FED | 155 PCI_EXP_DEVSTA_CED | 156 PCI_EXP_DEVSTA_URD); 157 158 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 159 data &= ~LTSSM_ID_EN_WRO; 160 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 161 162 atl1c_pcie_patch(hw); 163 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 164 atl1c_disable_l0s_l1(hw); 165 166 msleep(5); 167 } 168 169 /** 170 * atl1c_irq_enable - Enable default interrupt generation settings 171 * @adapter: board private structure 172 */ 173 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 174 { 175 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 176 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 177 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 178 AT_WRITE_FLUSH(&adapter->hw); 179 } 180 } 181 182 /** 183 * atl1c_irq_disable - Mask off interrupt generation on the NIC 184 * @adapter: board private structure 185 */ 186 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 187 { 188 atomic_inc(&adapter->irq_sem); 189 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 190 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 191 AT_WRITE_FLUSH(&adapter->hw); 192 synchronize_irq(adapter->pdev->irq); 193 } 194 195 /** 196 * atl1c_irq_reset - reset interrupt confiure on the NIC 197 * @adapter: board private structure 198 */ 199 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 200 { 201 atomic_set(&adapter->irq_sem, 1); 202 atl1c_irq_enable(adapter); 203 } 204 205 /* 206 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 207 * of the idle status register until the device is actually idle 208 */ 209 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 210 { 211 int timeout; 212 u32 data; 213 214 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 215 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 216 if ((data & modu_ctrl) == 0) 217 return 0; 218 msleep(1); 219 } 220 return data; 221 } 222 223 /** 224 * atl1c_phy_config - Timer Call-back 225 * @data: pointer to netdev cast into an unsigned long 226 */ 227 static void atl1c_phy_config(unsigned long data) 228 { 229 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 230 struct atl1c_hw *hw = &adapter->hw; 231 unsigned long flags; 232 233 spin_lock_irqsave(&adapter->mdio_lock, flags); 234 atl1c_restart_autoneg(hw); 235 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 236 } 237 238 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 239 { 240 WARN_ON(in_interrupt()); 241 atl1c_down(adapter); 242 atl1c_up(adapter); 243 clear_bit(__AT_RESETTING, &adapter->flags); 244 } 245 246 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 247 { 248 struct atl1c_hw *hw = &adapter->hw; 249 struct net_device *netdev = adapter->netdev; 250 struct pci_dev *pdev = adapter->pdev; 251 int err; 252 unsigned long flags; 253 u16 speed, duplex, phy_data; 254 255 spin_lock_irqsave(&adapter->mdio_lock, flags); 256 /* MII_BMSR must read twise */ 257 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 259 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 260 261 if ((phy_data & BMSR_LSTATUS) == 0) { 262 /* link down */ 263 netif_carrier_off(netdev); 264 hw->hibernate = true; 265 if (atl1c_reset_mac(hw) != 0) 266 if (netif_msg_hw(adapter)) 267 dev_warn(&pdev->dev, "reset mac failed\n"); 268 atl1c_set_aspm(hw, SPEED_0); 269 atl1c_post_phy_linkchg(hw, SPEED_0); 270 atl1c_reset_dma_ring(adapter); 271 atl1c_configure(adapter); 272 } else { 273 /* Link Up */ 274 hw->hibernate = false; 275 spin_lock_irqsave(&adapter->mdio_lock, flags); 276 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 277 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 278 if (unlikely(err)) 279 return; 280 /* link result is our setting */ 281 if (adapter->link_speed != speed || 282 adapter->link_duplex != duplex) { 283 adapter->link_speed = speed; 284 adapter->link_duplex = duplex; 285 atl1c_set_aspm(hw, speed); 286 atl1c_post_phy_linkchg(hw, speed); 287 atl1c_start_mac(adapter); 288 if (netif_msg_link(adapter)) 289 dev_info(&pdev->dev, 290 "%s: %s NIC Link is Up<%d Mbps %s>\n", 291 atl1c_driver_name, netdev->name, 292 adapter->link_speed, 293 adapter->link_duplex == FULL_DUPLEX ? 294 "Full Duplex" : "Half Duplex"); 295 } 296 if (!netif_carrier_ok(netdev)) 297 netif_carrier_on(netdev); 298 } 299 } 300 301 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 302 { 303 struct net_device *netdev = adapter->netdev; 304 struct pci_dev *pdev = adapter->pdev; 305 u16 phy_data; 306 u16 link_up; 307 308 spin_lock(&adapter->mdio_lock); 309 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 310 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 311 spin_unlock(&adapter->mdio_lock); 312 link_up = phy_data & BMSR_LSTATUS; 313 /* notify upper layer link down ASAP */ 314 if (!link_up) { 315 if (netif_carrier_ok(netdev)) { 316 /* old link state: Up */ 317 netif_carrier_off(netdev); 318 if (netif_msg_link(adapter)) 319 dev_info(&pdev->dev, 320 "%s: %s NIC Link is Down\n", 321 atl1c_driver_name, netdev->name); 322 adapter->link_speed = SPEED_0; 323 } 324 } 325 326 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 327 schedule_work(&adapter->common_task); 328 } 329 330 static void atl1c_common_task(struct work_struct *work) 331 { 332 struct atl1c_adapter *adapter; 333 struct net_device *netdev; 334 335 adapter = container_of(work, struct atl1c_adapter, common_task); 336 netdev = adapter->netdev; 337 338 if (test_bit(__AT_DOWN, &adapter->flags)) 339 return; 340 341 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 342 netif_device_detach(netdev); 343 atl1c_down(adapter); 344 atl1c_up(adapter); 345 netif_device_attach(netdev); 346 } 347 348 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 349 &adapter->work_event)) { 350 atl1c_irq_disable(adapter); 351 atl1c_check_link_status(adapter); 352 atl1c_irq_enable(adapter); 353 } 354 } 355 356 357 static void atl1c_del_timer(struct atl1c_adapter *adapter) 358 { 359 del_timer_sync(&adapter->phy_config_timer); 360 } 361 362 363 /** 364 * atl1c_tx_timeout - Respond to a Tx Hang 365 * @netdev: network interface device structure 366 */ 367 static void atl1c_tx_timeout(struct net_device *netdev) 368 { 369 struct atl1c_adapter *adapter = netdev_priv(netdev); 370 371 /* Do the reset outside of interrupt context */ 372 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 373 schedule_work(&adapter->common_task); 374 } 375 376 /** 377 * atl1c_set_multi - Multicast and Promiscuous mode set 378 * @netdev: network interface device structure 379 * 380 * The set_multi entry point is called whenever the multicast address 381 * list or the network interface flags are updated. This routine is 382 * responsible for configuring the hardware for proper multicast, 383 * promiscuous mode, and all-multi behavior. 384 */ 385 static void atl1c_set_multi(struct net_device *netdev) 386 { 387 struct atl1c_adapter *adapter = netdev_priv(netdev); 388 struct atl1c_hw *hw = &adapter->hw; 389 struct netdev_hw_addr *ha; 390 u32 mac_ctrl_data; 391 u32 hash_value; 392 393 /* Check for Promiscuous and All Multicast modes */ 394 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 395 396 if (netdev->flags & IFF_PROMISC) { 397 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 398 } else if (netdev->flags & IFF_ALLMULTI) { 399 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 400 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 401 } else { 402 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 403 } 404 405 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 406 407 /* clear the old settings from the multicast hash table */ 408 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 409 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 410 411 /* comoute mc addresses' hash value ,and put it into hash table */ 412 netdev_for_each_mc_addr(ha, netdev) { 413 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 414 atl1c_hash_set(hw, hash_value); 415 } 416 } 417 418 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 419 { 420 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 421 /* enable VLAN tag insert/strip */ 422 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 423 } else { 424 /* disable VLAN tag insert/strip */ 425 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 426 } 427 } 428 429 static void atl1c_vlan_mode(struct net_device *netdev, 430 netdev_features_t features) 431 { 432 struct atl1c_adapter *adapter = netdev_priv(netdev); 433 struct pci_dev *pdev = adapter->pdev; 434 u32 mac_ctrl_data = 0; 435 436 if (netif_msg_pktdata(adapter)) 437 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 438 439 atl1c_irq_disable(adapter); 440 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 441 __atl1c_vlan_mode(features, &mac_ctrl_data); 442 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 443 atl1c_irq_enable(adapter); 444 } 445 446 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 447 { 448 struct pci_dev *pdev = adapter->pdev; 449 450 if (netif_msg_pktdata(adapter)) 451 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 452 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 453 } 454 455 /** 456 * atl1c_set_mac - Change the Ethernet Address of the NIC 457 * @netdev: network interface device structure 458 * @p: pointer to an address structure 459 * 460 * Returns 0 on success, negative on failure 461 */ 462 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 463 { 464 struct atl1c_adapter *adapter = netdev_priv(netdev); 465 struct sockaddr *addr = p; 466 467 if (!is_valid_ether_addr(addr->sa_data)) 468 return -EADDRNOTAVAIL; 469 470 if (netif_running(netdev)) 471 return -EBUSY; 472 473 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 474 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 475 476 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 477 478 return 0; 479 } 480 481 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 482 struct net_device *dev) 483 { 484 unsigned int head_size; 485 int mtu = dev->mtu; 486 487 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 488 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 489 490 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) + 491 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 492 adapter->rx_frag_size = roundup_pow_of_two(head_size); 493 } 494 495 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 496 netdev_features_t features) 497 { 498 /* 499 * Since there is no support for separate rx/tx vlan accel 500 * enable/disable make sure tx flag is always in same state as rx. 501 */ 502 if (features & NETIF_F_HW_VLAN_CTAG_RX) 503 features |= NETIF_F_HW_VLAN_CTAG_TX; 504 else 505 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 506 507 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 508 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 509 510 return features; 511 } 512 513 static int atl1c_set_features(struct net_device *netdev, 514 netdev_features_t features) 515 { 516 netdev_features_t changed = netdev->features ^ features; 517 518 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 519 atl1c_vlan_mode(netdev, features); 520 521 return 0; 522 } 523 524 /** 525 * atl1c_change_mtu - Change the Maximum Transfer Unit 526 * @netdev: network interface device structure 527 * @new_mtu: new value for maximum frame size 528 * 529 * Returns 0 on success, negative on failure 530 */ 531 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 532 { 533 struct atl1c_adapter *adapter = netdev_priv(netdev); 534 struct atl1c_hw *hw = &adapter->hw; 535 int old_mtu = netdev->mtu; 536 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 537 538 /* Fast Ethernet controller doesn't support jumbo packet */ 539 if (((hw->nic_type == athr_l2c || 540 hw->nic_type == athr_l2c_b || 541 hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) || 542 max_frame < ETH_ZLEN + ETH_FCS_LEN || 543 max_frame > MAX_JUMBO_FRAME_SIZE) { 544 if (netif_msg_link(adapter)) 545 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 546 return -EINVAL; 547 } 548 /* set MTU */ 549 if (old_mtu != new_mtu && netif_running(netdev)) { 550 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 551 msleep(1); 552 netdev->mtu = new_mtu; 553 adapter->hw.max_frame_size = new_mtu; 554 atl1c_set_rxbufsize(adapter, netdev); 555 atl1c_down(adapter); 556 netdev_update_features(netdev); 557 atl1c_up(adapter); 558 clear_bit(__AT_RESETTING, &adapter->flags); 559 } 560 return 0; 561 } 562 563 /* 564 * caller should hold mdio_lock 565 */ 566 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 567 { 568 struct atl1c_adapter *adapter = netdev_priv(netdev); 569 u16 result; 570 571 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 572 return result; 573 } 574 575 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 576 int reg_num, int val) 577 { 578 struct atl1c_adapter *adapter = netdev_priv(netdev); 579 580 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 581 } 582 583 static int atl1c_mii_ioctl(struct net_device *netdev, 584 struct ifreq *ifr, int cmd) 585 { 586 struct atl1c_adapter *adapter = netdev_priv(netdev); 587 struct pci_dev *pdev = adapter->pdev; 588 struct mii_ioctl_data *data = if_mii(ifr); 589 unsigned long flags; 590 int retval = 0; 591 592 if (!netif_running(netdev)) 593 return -EINVAL; 594 595 spin_lock_irqsave(&adapter->mdio_lock, flags); 596 switch (cmd) { 597 case SIOCGMIIPHY: 598 data->phy_id = 0; 599 break; 600 601 case SIOCGMIIREG: 602 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 603 &data->val_out)) { 604 retval = -EIO; 605 goto out; 606 } 607 break; 608 609 case SIOCSMIIREG: 610 if (data->reg_num & ~(0x1F)) { 611 retval = -EFAULT; 612 goto out; 613 } 614 615 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 616 data->reg_num, data->val_in); 617 if (atl1c_write_phy_reg(&adapter->hw, 618 data->reg_num, data->val_in)) { 619 retval = -EIO; 620 goto out; 621 } 622 break; 623 624 default: 625 retval = -EOPNOTSUPP; 626 break; 627 } 628 out: 629 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 630 return retval; 631 } 632 633 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 634 { 635 switch (cmd) { 636 case SIOCGMIIPHY: 637 case SIOCGMIIREG: 638 case SIOCSMIIREG: 639 return atl1c_mii_ioctl(netdev, ifr, cmd); 640 default: 641 return -EOPNOTSUPP; 642 } 643 } 644 645 /** 646 * atl1c_alloc_queues - Allocate memory for all rings 647 * @adapter: board private structure to initialize 648 * 649 */ 650 static int atl1c_alloc_queues(struct atl1c_adapter *adapter) 651 { 652 return 0; 653 } 654 655 static void atl1c_set_mac_type(struct atl1c_hw *hw) 656 { 657 switch (hw->device_id) { 658 case PCI_DEVICE_ID_ATTANSIC_L2C: 659 hw->nic_type = athr_l2c; 660 break; 661 case PCI_DEVICE_ID_ATTANSIC_L1C: 662 hw->nic_type = athr_l1c; 663 break; 664 case PCI_DEVICE_ID_ATHEROS_L2C_B: 665 hw->nic_type = athr_l2c_b; 666 break; 667 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 668 hw->nic_type = athr_l2c_b2; 669 break; 670 case PCI_DEVICE_ID_ATHEROS_L1D: 671 hw->nic_type = athr_l1d; 672 break; 673 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 674 hw->nic_type = athr_l1d_2; 675 break; 676 default: 677 break; 678 } 679 } 680 681 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 682 { 683 u32 link_ctrl_data; 684 685 atl1c_set_mac_type(hw); 686 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 687 688 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 689 ATL1C_TXQ_MODE_ENHANCE; 690 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 691 ATL1C_ASPM_L1_SUPPORT; 692 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 693 694 if (hw->nic_type == athr_l1c || 695 hw->nic_type == athr_l1d || 696 hw->nic_type == athr_l1d_2) 697 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 698 return 0; 699 } 700 701 struct atl1c_platform_patch { 702 u16 pci_did; 703 u8 pci_revid; 704 u16 subsystem_vid; 705 u16 subsystem_did; 706 u32 patch_flag; 707 #define ATL1C_LINK_PATCH 0x1 708 }; 709 static const struct atl1c_platform_patch plats[] = { 710 {0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 711 {0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 712 {0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 713 {0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 714 {0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 715 {0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 716 {0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 717 {0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 718 {0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 719 {0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 720 {0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 721 {0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 722 {0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 723 {0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 724 {0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 725 {0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 726 {0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 727 {0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 728 {0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 729 {0}, 730 }; 731 732 static void atl1c_patch_assign(struct atl1c_hw *hw) 733 { 734 struct pci_dev *pdev = hw->adapter->pdev; 735 u32 misc_ctrl; 736 int i = 0; 737 738 hw->msi_lnkpatch = false; 739 740 while (plats[i].pci_did != 0) { 741 if (plats[i].pci_did == hw->device_id && 742 plats[i].pci_revid == hw->revision_id && 743 plats[i].subsystem_vid == hw->subsystem_vendor_id && 744 plats[i].subsystem_did == hw->subsystem_id) { 745 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 746 hw->msi_lnkpatch = true; 747 } 748 i++; 749 } 750 751 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 && 752 hw->revision_id == L2CB_V21) { 753 /* config acess mode */ 754 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 755 REG_PCIE_DEV_MISC_CTRL); 756 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl); 757 misc_ctrl &= ~0x100; 758 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 759 REG_PCIE_DEV_MISC_CTRL); 760 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl); 761 } 762 } 763 /** 764 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 765 * @adapter: board private structure to initialize 766 * 767 * atl1c_sw_init initializes the Adapter private data structure. 768 * Fields are initialized based on PCI device information and 769 * OS network device settings (MTU size). 770 */ 771 static int atl1c_sw_init(struct atl1c_adapter *adapter) 772 { 773 struct atl1c_hw *hw = &adapter->hw; 774 struct pci_dev *pdev = adapter->pdev; 775 u32 revision; 776 777 778 adapter->wol = 0; 779 device_set_wakeup_enable(&pdev->dev, false); 780 adapter->link_speed = SPEED_0; 781 adapter->link_duplex = FULL_DUPLEX; 782 adapter->tpd_ring[0].count = 1024; 783 adapter->rfd_ring.count = 512; 784 785 hw->vendor_id = pdev->vendor; 786 hw->device_id = pdev->device; 787 hw->subsystem_vendor_id = pdev->subsystem_vendor; 788 hw->subsystem_id = pdev->subsystem_device; 789 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision); 790 hw->revision_id = revision & 0xFF; 791 /* before link up, we assume hibernate is true */ 792 hw->hibernate = true; 793 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 794 if (atl1c_setup_mac_funcs(hw) != 0) { 795 dev_err(&pdev->dev, "set mac function pointers failed\n"); 796 return -1; 797 } 798 atl1c_patch_assign(hw); 799 800 hw->intr_mask = IMR_NORMAL_MASK; 801 hw->phy_configured = false; 802 hw->preamble_len = 7; 803 hw->max_frame_size = adapter->netdev->mtu; 804 hw->autoneg_advertised = ADVERTISED_Autoneg; 805 hw->indirect_tab = 0xE4E4E4E4; 806 hw->base_cpu = 0; 807 808 hw->ict = 50000; /* 100ms */ 809 hw->smb_timer = 200000; /* 400ms */ 810 hw->rx_imt = 200; 811 hw->tx_imt = 1000; 812 813 hw->tpd_burst = 5; 814 hw->rfd_burst = 8; 815 hw->dma_order = atl1c_dma_ord_out; 816 hw->dmar_block = atl1c_dma_req_1024; 817 818 if (atl1c_alloc_queues(adapter)) { 819 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 820 return -ENOMEM; 821 } 822 /* TODO */ 823 atl1c_set_rxbufsize(adapter, adapter->netdev); 824 atomic_set(&adapter->irq_sem, 1); 825 spin_lock_init(&adapter->mdio_lock); 826 spin_lock_init(&adapter->tx_lock); 827 set_bit(__AT_DOWN, &adapter->flags); 828 829 return 0; 830 } 831 832 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 833 struct atl1c_buffer *buffer_info, int in_irq) 834 { 835 u16 pci_driection; 836 if (buffer_info->flags & ATL1C_BUFFER_FREE) 837 return; 838 if (buffer_info->dma) { 839 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 840 pci_driection = PCI_DMA_FROMDEVICE; 841 else 842 pci_driection = PCI_DMA_TODEVICE; 843 844 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 845 pci_unmap_single(pdev, buffer_info->dma, 846 buffer_info->length, pci_driection); 847 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 848 pci_unmap_page(pdev, buffer_info->dma, 849 buffer_info->length, pci_driection); 850 } 851 if (buffer_info->skb) { 852 if (in_irq) 853 dev_kfree_skb_irq(buffer_info->skb); 854 else 855 dev_kfree_skb(buffer_info->skb); 856 } 857 buffer_info->dma = 0; 858 buffer_info->skb = NULL; 859 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 860 } 861 /** 862 * atl1c_clean_tx_ring - Free Tx-skb 863 * @adapter: board private structure 864 */ 865 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 866 enum atl1c_trans_queue type) 867 { 868 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 869 struct atl1c_buffer *buffer_info; 870 struct pci_dev *pdev = adapter->pdev; 871 u16 index, ring_count; 872 873 ring_count = tpd_ring->count; 874 for (index = 0; index < ring_count; index++) { 875 buffer_info = &tpd_ring->buffer_info[index]; 876 atl1c_clean_buffer(pdev, buffer_info, 0); 877 } 878 879 /* Zero out Tx-buffers */ 880 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 881 ring_count); 882 atomic_set(&tpd_ring->next_to_clean, 0); 883 tpd_ring->next_to_use = 0; 884 } 885 886 /** 887 * atl1c_clean_rx_ring - Free rx-reservation skbs 888 * @adapter: board private structure 889 */ 890 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 891 { 892 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 893 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 894 struct atl1c_buffer *buffer_info; 895 struct pci_dev *pdev = adapter->pdev; 896 int j; 897 898 for (j = 0; j < rfd_ring->count; j++) { 899 buffer_info = &rfd_ring->buffer_info[j]; 900 atl1c_clean_buffer(pdev, buffer_info, 0); 901 } 902 /* zero out the descriptor ring */ 903 memset(rfd_ring->desc, 0, rfd_ring->size); 904 rfd_ring->next_to_clean = 0; 905 rfd_ring->next_to_use = 0; 906 rrd_ring->next_to_use = 0; 907 rrd_ring->next_to_clean = 0; 908 } 909 910 /* 911 * Read / Write Ptr Initialize: 912 */ 913 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 914 { 915 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 916 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 917 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 918 struct atl1c_buffer *buffer_info; 919 int i, j; 920 921 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 922 tpd_ring[i].next_to_use = 0; 923 atomic_set(&tpd_ring[i].next_to_clean, 0); 924 buffer_info = tpd_ring[i].buffer_info; 925 for (j = 0; j < tpd_ring->count; j++) 926 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 927 ATL1C_BUFFER_FREE); 928 } 929 rfd_ring->next_to_use = 0; 930 rfd_ring->next_to_clean = 0; 931 rrd_ring->next_to_use = 0; 932 rrd_ring->next_to_clean = 0; 933 for (j = 0; j < rfd_ring->count; j++) { 934 buffer_info = &rfd_ring->buffer_info[j]; 935 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 936 } 937 } 938 939 /** 940 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 941 * @adapter: board private structure 942 * 943 * Free all transmit software resources 944 */ 945 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 946 { 947 struct pci_dev *pdev = adapter->pdev; 948 949 pci_free_consistent(pdev, adapter->ring_header.size, 950 adapter->ring_header.desc, 951 adapter->ring_header.dma); 952 adapter->ring_header.desc = NULL; 953 954 /* Note: just free tdp_ring.buffer_info, 955 * it contain rfd_ring.buffer_info, do not double free */ 956 if (adapter->tpd_ring[0].buffer_info) { 957 kfree(adapter->tpd_ring[0].buffer_info); 958 adapter->tpd_ring[0].buffer_info = NULL; 959 } 960 if (adapter->rx_page) { 961 put_page(adapter->rx_page); 962 adapter->rx_page = NULL; 963 } 964 } 965 966 /** 967 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 968 * @adapter: board private structure 969 * 970 * Return 0 on success, negative on failure 971 */ 972 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 973 { 974 struct pci_dev *pdev = adapter->pdev; 975 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 976 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 977 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 978 struct atl1c_ring_header *ring_header = &adapter->ring_header; 979 int size; 980 int i; 981 int count = 0; 982 int rx_desc_count = 0; 983 u32 offset = 0; 984 985 rrd_ring->count = rfd_ring->count; 986 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 987 tpd_ring[i].count = tpd_ring[0].count; 988 989 /* 2 tpd queue, one high priority queue, 990 * another normal priority queue */ 991 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 992 rfd_ring->count); 993 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 994 if (unlikely(!tpd_ring->buffer_info)) 995 goto err_nomem; 996 997 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 998 tpd_ring[i].buffer_info = 999 (tpd_ring->buffer_info + count); 1000 count += tpd_ring[i].count; 1001 } 1002 1003 rfd_ring->buffer_info = 1004 (tpd_ring->buffer_info + count); 1005 count += rfd_ring->count; 1006 rx_desc_count += rfd_ring->count; 1007 1008 /* 1009 * real ring DMA buffer 1010 * each ring/block may need up to 8 bytes for alignment, hence the 1011 * additional bytes tacked onto the end. 1012 */ 1013 ring_header->size = size = 1014 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 1015 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 1016 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 1017 8 * 4; 1018 1019 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, 1020 &ring_header->dma); 1021 if (unlikely(!ring_header->desc)) { 1022 dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); 1023 goto err_nomem; 1024 } 1025 memset(ring_header->desc, 0, ring_header->size); 1026 /* init TPD ring */ 1027 1028 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1029 offset = tpd_ring[0].dma - ring_header->dma; 1030 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1031 tpd_ring[i].dma = ring_header->dma + offset; 1032 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1033 tpd_ring[i].size = 1034 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1035 offset += roundup(tpd_ring[i].size, 8); 1036 } 1037 /* init RFD ring */ 1038 rfd_ring->dma = ring_header->dma + offset; 1039 rfd_ring->desc = (u8 *) ring_header->desc + offset; 1040 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 1041 offset += roundup(rfd_ring->size, 8); 1042 1043 /* init RRD ring */ 1044 rrd_ring->dma = ring_header->dma + offset; 1045 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1046 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1047 rrd_ring->count; 1048 offset += roundup(rrd_ring->size, 8); 1049 1050 return 0; 1051 1052 err_nomem: 1053 kfree(tpd_ring->buffer_info); 1054 return -ENOMEM; 1055 } 1056 1057 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1058 { 1059 struct atl1c_hw *hw = &adapter->hw; 1060 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1061 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1062 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1063 adapter->tpd_ring; 1064 1065 /* TPD */ 1066 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1067 (u32)((tpd_ring[atl1c_trans_normal].dma & 1068 AT_DMA_HI_ADDR_MASK) >> 32)); 1069 /* just enable normal priority TX queue */ 1070 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1071 (u32)(tpd_ring[atl1c_trans_normal].dma & 1072 AT_DMA_LO_ADDR_MASK)); 1073 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1074 (u32)(tpd_ring[atl1c_trans_high].dma & 1075 AT_DMA_LO_ADDR_MASK)); 1076 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1077 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1078 1079 1080 /* RFD */ 1081 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1082 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1083 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1084 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1085 1086 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1087 rfd_ring->count & RFD_RING_SIZE_MASK); 1088 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1089 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1090 1091 /* RRD */ 1092 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1093 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1094 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1095 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1096 1097 if (hw->nic_type == athr_l2c_b) { 1098 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1099 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1100 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1101 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1102 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1103 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1104 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1105 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1106 } 1107 /* Load all of base address above */ 1108 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1109 } 1110 1111 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1112 { 1113 struct atl1c_hw *hw = &adapter->hw; 1114 int max_pay_load; 1115 u16 tx_offload_thresh; 1116 u32 txq_ctrl_data; 1117 1118 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1119 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1120 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1121 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1122 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1123 /* 1124 * if BIOS had changed the dam-read-max-length to an invalid value, 1125 * restore it to default value 1126 */ 1127 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1128 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1129 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1130 } 1131 txq_ctrl_data = 1132 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1133 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1134 1135 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1136 } 1137 1138 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1139 { 1140 struct atl1c_hw *hw = &adapter->hw; 1141 u32 rxq_ctrl_data; 1142 1143 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1144 RXQ_RFD_BURST_NUM_SHIFT; 1145 1146 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1147 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1148 1149 /* aspm for gigabit */ 1150 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1151 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1152 ASPM_THRUPUT_LIMIT_100M); 1153 1154 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1155 } 1156 1157 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1158 { 1159 struct atl1c_hw *hw = &adapter->hw; 1160 u32 dma_ctrl_data; 1161 1162 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1163 DMA_CTRL_RREQ_PRI_DATA | 1164 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1165 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1166 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1167 1168 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1169 } 1170 1171 /* 1172 * Stop the mac, transmit and receive units 1173 * hw - Struct containing variables accessed by shared code 1174 * return : 0 or idle status (if error) 1175 */ 1176 static int atl1c_stop_mac(struct atl1c_hw *hw) 1177 { 1178 u32 data; 1179 1180 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1181 data &= ~RXQ_CTRL_EN; 1182 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1183 1184 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1185 data &= ~TXQ_CTRL_EN; 1186 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1187 1188 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1189 1190 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1191 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1192 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1193 1194 return (int)atl1c_wait_until_idle(hw, 1195 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1196 } 1197 1198 static void atl1c_start_mac(struct atl1c_adapter *adapter) 1199 { 1200 struct atl1c_hw *hw = &adapter->hw; 1201 u32 mac, txq, rxq; 1202 1203 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false; 1204 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1205 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1206 1207 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1208 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1209 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1210 1211 txq |= TXQ_CTRL_EN; 1212 rxq |= RXQ_CTRL_EN; 1213 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1214 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1215 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1216 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1217 MAC_CTRL_HASH_ALG_CRC32; 1218 if (hw->mac_duplex) 1219 mac |= MAC_CTRL_DUPLX; 1220 else 1221 mac &= ~MAC_CTRL_DUPLX; 1222 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1223 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1224 1225 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1226 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1227 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1228 } 1229 1230 /* 1231 * Reset the transmit and receive units; mask and clear all interrupts. 1232 * hw - Struct containing variables accessed by shared code 1233 * return : 0 or idle status (if error) 1234 */ 1235 static int atl1c_reset_mac(struct atl1c_hw *hw) 1236 { 1237 struct atl1c_adapter *adapter = hw->adapter; 1238 struct pci_dev *pdev = adapter->pdev; 1239 u32 ctrl_data = 0; 1240 1241 atl1c_stop_mac(hw); 1242 /* 1243 * Issue Soft Reset to the MAC. This will reset the chip's 1244 * transmit, receive, DMA. It will not effect 1245 * the current PCI configuration. The global reset bit is self- 1246 * clearing, and should clear within a microsecond. 1247 */ 1248 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1249 ctrl_data |= MASTER_CTRL_OOB_DIS; 1250 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1251 1252 AT_WRITE_FLUSH(hw); 1253 msleep(10); 1254 /* Wait at least 10ms for All module to be Idle */ 1255 1256 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1257 dev_err(&pdev->dev, 1258 "MAC state machine can't be idle since" 1259 " disabled for 10ms second\n"); 1260 return -1; 1261 } 1262 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1263 1264 /* driver control speed/duplex */ 1265 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1266 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1267 1268 /* clk switch setting */ 1269 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1270 switch (hw->nic_type) { 1271 case athr_l2c_b: 1272 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1273 SERDES_MAC_CLK_SLOWDOWN); 1274 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1275 break; 1276 case athr_l2c_b2: 1277 case athr_l1d_2: 1278 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1279 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1280 break; 1281 default: 1282 break; 1283 } 1284 1285 return 0; 1286 } 1287 1288 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1289 { 1290 u16 ctrl_flags = hw->ctrl_flags; 1291 1292 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1293 atl1c_set_aspm(hw, SPEED_0); 1294 hw->ctrl_flags = ctrl_flags; 1295 } 1296 1297 /* 1298 * Set ASPM state. 1299 * Enable/disable L0s/L1 depend on link state. 1300 */ 1301 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1302 { 1303 u32 pm_ctrl_data; 1304 u32 link_l1_timer; 1305 1306 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1307 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1308 PM_CTRL_ASPM_L0S_EN | 1309 PM_CTRL_MAC_ASPM_CHK); 1310 /* L1 timer */ 1311 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1312 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1313 link_l1_timer = 1314 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1315 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1316 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1317 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1318 } else { 1319 link_l1_timer = hw->nic_type == athr_l2c_b ? 1320 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1321 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1322 link_l1_timer = 1; 1323 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1324 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1325 } 1326 1327 /* L0S/L1 enable */ 1328 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1329 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1330 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1331 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1332 1333 /* l2cb & l1d & l2cb2 & l1d2 */ 1334 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1335 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1336 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1337 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1338 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1339 PM_CTRL_SERDES_PD_EX_L1 | 1340 PM_CTRL_CLK_SWH_L1; 1341 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1342 PM_CTRL_SERDES_PLL_L1_EN | 1343 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1344 PM_CTRL_SA_DLY_EN | 1345 PM_CTRL_HOTRST); 1346 /* disable l0s if link down or l2cb */ 1347 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1348 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1349 } else { /* l1c */ 1350 pm_ctrl_data = 1351 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1352 if (link_speed != SPEED_0) { 1353 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1354 PM_CTRL_SERDES_PLL_L1_EN | 1355 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1356 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1357 PM_CTRL_CLK_SWH_L1 | 1358 PM_CTRL_ASPM_L0S_EN | 1359 PM_CTRL_ASPM_L1_EN); 1360 } else { /* link down */ 1361 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1362 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1363 PM_CTRL_SERDES_PLL_L1_EN | 1364 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1365 PM_CTRL_ASPM_L0S_EN); 1366 } 1367 } 1368 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1369 1370 return; 1371 } 1372 1373 /** 1374 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1375 * @adapter: board private structure 1376 * 1377 * Configure the Tx /Rx unit of the MAC after a reset. 1378 */ 1379 static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1380 { 1381 struct atl1c_hw *hw = &adapter->hw; 1382 u32 master_ctrl_data = 0; 1383 u32 intr_modrt_data; 1384 u32 data; 1385 1386 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1387 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1388 MASTER_CTRL_RX_ITIMER_EN | 1389 MASTER_CTRL_INT_RDCLR); 1390 /* clear interrupt status */ 1391 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1392 /* Clear any WOL status */ 1393 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1394 /* set Interrupt Clear Timer 1395 * HW will enable self to assert interrupt event to system after 1396 * waiting x-time for software to notify it accept interrupt. 1397 */ 1398 1399 data = CLK_GATING_EN_ALL; 1400 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1401 if (hw->nic_type == athr_l2c_b) 1402 data &= ~CLK_GATING_RXMAC_EN; 1403 } else 1404 data = 0; 1405 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1406 1407 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1408 hw->ict & INT_RETRIG_TIMER_MASK); 1409 1410 atl1c_configure_des_ring(adapter); 1411 1412 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1413 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1414 IRQ_MODRT_TX_TIMER_SHIFT; 1415 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1416 IRQ_MODRT_RX_TIMER_SHIFT; 1417 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1418 master_ctrl_data |= 1419 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1420 } 1421 1422 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1423 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1424 1425 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1426 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1427 1428 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1429 hw->smb_timer & SMB_STAT_TIMER_MASK); 1430 1431 /* set MTU */ 1432 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1433 VLAN_HLEN + ETH_FCS_LEN); 1434 1435 atl1c_configure_tx(adapter); 1436 atl1c_configure_rx(adapter); 1437 atl1c_configure_dma(adapter); 1438 1439 return 0; 1440 } 1441 1442 static int atl1c_configure(struct atl1c_adapter *adapter) 1443 { 1444 struct net_device *netdev = adapter->netdev; 1445 int num; 1446 1447 atl1c_init_ring_ptrs(adapter); 1448 atl1c_set_multi(netdev); 1449 atl1c_restore_vlan(adapter); 1450 1451 num = atl1c_alloc_rx_buffer(adapter); 1452 if (unlikely(num == 0)) 1453 return -ENOMEM; 1454 1455 if (atl1c_configure_mac(adapter)) 1456 return -EIO; 1457 1458 return 0; 1459 } 1460 1461 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1462 { 1463 u16 hw_reg_addr = 0; 1464 unsigned long *stats_item = NULL; 1465 u32 data; 1466 1467 /* update rx status */ 1468 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1469 stats_item = &adapter->hw_stats.rx_ok; 1470 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1471 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1472 *stats_item += data; 1473 stats_item++; 1474 hw_reg_addr += 4; 1475 } 1476 /* update tx status */ 1477 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1478 stats_item = &adapter->hw_stats.tx_ok; 1479 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1480 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1481 *stats_item += data; 1482 stats_item++; 1483 hw_reg_addr += 4; 1484 } 1485 } 1486 1487 /** 1488 * atl1c_get_stats - Get System Network Statistics 1489 * @netdev: network interface device structure 1490 * 1491 * Returns the address of the device statistics structure. 1492 * The statistics are actually updated from the timer callback. 1493 */ 1494 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1495 { 1496 struct atl1c_adapter *adapter = netdev_priv(netdev); 1497 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1498 struct net_device_stats *net_stats = &netdev->stats; 1499 1500 atl1c_update_hw_stats(adapter); 1501 net_stats->rx_packets = hw_stats->rx_ok; 1502 net_stats->tx_packets = hw_stats->tx_ok; 1503 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1504 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1505 net_stats->multicast = hw_stats->rx_mcast; 1506 net_stats->collisions = hw_stats->tx_1_col + 1507 hw_stats->tx_2_col * 2 + 1508 hw_stats->tx_late_col + hw_stats->tx_abort_col; 1509 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err + 1510 hw_stats->rx_len_err + hw_stats->rx_sz_ov + 1511 hw_stats->rx_rrd_ov + hw_stats->rx_align_err; 1512 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1513 net_stats->rx_length_errors = hw_stats->rx_len_err; 1514 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1515 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1516 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1517 1518 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1519 1520 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col + 1521 hw_stats->tx_underrun + hw_stats->tx_trunc; 1522 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1523 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1524 net_stats->tx_window_errors = hw_stats->tx_late_col; 1525 1526 return net_stats; 1527 } 1528 1529 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1530 { 1531 u16 phy_data; 1532 1533 spin_lock(&adapter->mdio_lock); 1534 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1535 spin_unlock(&adapter->mdio_lock); 1536 } 1537 1538 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1539 enum atl1c_trans_queue type) 1540 { 1541 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1542 struct atl1c_buffer *buffer_info; 1543 struct pci_dev *pdev = adapter->pdev; 1544 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1545 u16 hw_next_to_clean; 1546 u16 reg; 1547 1548 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1549 1550 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1551 1552 while (next_to_clean != hw_next_to_clean) { 1553 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1554 atl1c_clean_buffer(pdev, buffer_info, 1); 1555 if (++next_to_clean == tpd_ring->count) 1556 next_to_clean = 0; 1557 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1558 } 1559 1560 if (netif_queue_stopped(adapter->netdev) && 1561 netif_carrier_ok(adapter->netdev)) { 1562 netif_wake_queue(adapter->netdev); 1563 } 1564 1565 return true; 1566 } 1567 1568 /** 1569 * atl1c_intr - Interrupt Handler 1570 * @irq: interrupt number 1571 * @data: pointer to a network interface device structure 1572 */ 1573 static irqreturn_t atl1c_intr(int irq, void *data) 1574 { 1575 struct net_device *netdev = data; 1576 struct atl1c_adapter *adapter = netdev_priv(netdev); 1577 struct pci_dev *pdev = adapter->pdev; 1578 struct atl1c_hw *hw = &adapter->hw; 1579 int max_ints = AT_MAX_INT_WORK; 1580 int handled = IRQ_NONE; 1581 u32 status; 1582 u32 reg_data; 1583 1584 do { 1585 AT_READ_REG(hw, REG_ISR, ®_data); 1586 status = reg_data & hw->intr_mask; 1587 1588 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1589 if (max_ints != AT_MAX_INT_WORK) 1590 handled = IRQ_HANDLED; 1591 break; 1592 } 1593 /* link event */ 1594 if (status & ISR_GPHY) 1595 atl1c_clear_phy_int(adapter); 1596 /* Ack ISR */ 1597 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1598 if (status & ISR_RX_PKT) { 1599 if (likely(napi_schedule_prep(&adapter->napi))) { 1600 hw->intr_mask &= ~ISR_RX_PKT; 1601 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1602 __napi_schedule(&adapter->napi); 1603 } 1604 } 1605 if (status & ISR_TX_PKT) 1606 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1607 1608 handled = IRQ_HANDLED; 1609 /* check if PCIE PHY Link down */ 1610 if (status & ISR_ERROR) { 1611 if (netif_msg_hw(adapter)) 1612 dev_err(&pdev->dev, 1613 "atl1c hardware error (status = 0x%x)\n", 1614 status & ISR_ERROR); 1615 /* reset MAC */ 1616 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1617 schedule_work(&adapter->common_task); 1618 return IRQ_HANDLED; 1619 } 1620 1621 if (status & ISR_OVER) 1622 if (netif_msg_intr(adapter)) 1623 dev_warn(&pdev->dev, 1624 "TX/RX overflow (status = 0x%x)\n", 1625 status & ISR_OVER); 1626 1627 /* link event */ 1628 if (status & (ISR_GPHY | ISR_MANUAL)) { 1629 netdev->stats.tx_carrier_errors++; 1630 atl1c_link_chg_event(adapter); 1631 break; 1632 } 1633 1634 } while (--max_ints > 0); 1635 /* re-enable Interrupt*/ 1636 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1637 return handled; 1638 } 1639 1640 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1641 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1642 { 1643 /* 1644 * The pid field in RRS in not correct sometimes, so we 1645 * cannot figure out if the packet is fragmented or not, 1646 * so we tell the KERNEL CHECKSUM_NONE 1647 */ 1648 skb_checksum_none_assert(skb); 1649 } 1650 1651 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter) 1652 { 1653 struct sk_buff *skb; 1654 struct page *page; 1655 1656 if (adapter->rx_frag_size > PAGE_SIZE) 1657 return netdev_alloc_skb(adapter->netdev, 1658 adapter->rx_buffer_len); 1659 1660 page = adapter->rx_page; 1661 if (!page) { 1662 adapter->rx_page = page = alloc_page(GFP_ATOMIC); 1663 if (unlikely(!page)) 1664 return NULL; 1665 adapter->rx_page_offset = 0; 1666 } 1667 1668 skb = build_skb(page_address(page) + adapter->rx_page_offset, 1669 adapter->rx_frag_size); 1670 if (likely(skb)) { 1671 adapter->rx_page_offset += adapter->rx_frag_size; 1672 if (adapter->rx_page_offset >= PAGE_SIZE) 1673 adapter->rx_page = NULL; 1674 else 1675 get_page(page); 1676 } 1677 return skb; 1678 } 1679 1680 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1681 { 1682 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1683 struct pci_dev *pdev = adapter->pdev; 1684 struct atl1c_buffer *buffer_info, *next_info; 1685 struct sk_buff *skb; 1686 void *vir_addr = NULL; 1687 u16 num_alloc = 0; 1688 u16 rfd_next_to_use, next_next; 1689 struct atl1c_rx_free_desc *rfd_desc; 1690 dma_addr_t mapping; 1691 1692 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1693 if (++next_next == rfd_ring->count) 1694 next_next = 0; 1695 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1696 next_info = &rfd_ring->buffer_info[next_next]; 1697 1698 while (next_info->flags & ATL1C_BUFFER_FREE) { 1699 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1700 1701 skb = atl1c_alloc_skb(adapter); 1702 if (unlikely(!skb)) { 1703 if (netif_msg_rx_err(adapter)) 1704 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1705 break; 1706 } 1707 1708 /* 1709 * Make buffer alignment 2 beyond a 16 byte boundary 1710 * this will result in a 16 byte aligned IP header after 1711 * the 14 byte MAC header is removed 1712 */ 1713 vir_addr = skb->data; 1714 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1715 buffer_info->skb = skb; 1716 buffer_info->length = adapter->rx_buffer_len; 1717 mapping = pci_map_single(pdev, vir_addr, 1718 buffer_info->length, 1719 PCI_DMA_FROMDEVICE); 1720 if (unlikely(pci_dma_mapping_error(pdev, mapping))) { 1721 dev_kfree_skb(skb); 1722 buffer_info->skb = NULL; 1723 buffer_info->length = 0; 1724 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 1725 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed"); 1726 break; 1727 } 1728 buffer_info->dma = mapping; 1729 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1730 ATL1C_PCIMAP_FROMDEVICE); 1731 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1732 rfd_next_to_use = next_next; 1733 if (++next_next == rfd_ring->count) 1734 next_next = 0; 1735 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1736 next_info = &rfd_ring->buffer_info[next_next]; 1737 num_alloc++; 1738 } 1739 1740 if (num_alloc) { 1741 /* TODO: update mailbox here */ 1742 wmb(); 1743 rfd_ring->next_to_use = rfd_next_to_use; 1744 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1745 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1746 } 1747 1748 return num_alloc; 1749 } 1750 1751 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1752 struct atl1c_recv_ret_status *rrs, u16 num) 1753 { 1754 u16 i; 1755 /* the relationship between rrd and rfd is one map one */ 1756 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1757 rrd_ring->next_to_clean)) { 1758 rrs->word3 &= ~RRS_RXD_UPDATED; 1759 if (++rrd_ring->next_to_clean == rrd_ring->count) 1760 rrd_ring->next_to_clean = 0; 1761 } 1762 } 1763 1764 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1765 struct atl1c_recv_ret_status *rrs, u16 num) 1766 { 1767 u16 i; 1768 u16 rfd_index; 1769 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1770 1771 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1772 RRS_RX_RFD_INDEX_MASK; 1773 for (i = 0; i < num; i++) { 1774 buffer_info[rfd_index].skb = NULL; 1775 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1776 ATL1C_BUFFER_FREE); 1777 if (++rfd_index == rfd_ring->count) 1778 rfd_index = 0; 1779 } 1780 rfd_ring->next_to_clean = rfd_index; 1781 } 1782 1783 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1784 int *work_done, int work_to_do) 1785 { 1786 u16 rfd_num, rfd_index; 1787 u16 count = 0; 1788 u16 length; 1789 struct pci_dev *pdev = adapter->pdev; 1790 struct net_device *netdev = adapter->netdev; 1791 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1792 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1793 struct sk_buff *skb; 1794 struct atl1c_recv_ret_status *rrs; 1795 struct atl1c_buffer *buffer_info; 1796 1797 while (1) { 1798 if (*work_done >= work_to_do) 1799 break; 1800 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1801 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1802 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1803 RRS_RX_RFD_CNT_MASK; 1804 if (unlikely(rfd_num != 1)) 1805 /* TODO support mul rfd*/ 1806 if (netif_msg_rx_err(adapter)) 1807 dev_warn(&pdev->dev, 1808 "Multi rfd not support yet!\n"); 1809 goto rrs_checked; 1810 } else { 1811 break; 1812 } 1813 rrs_checked: 1814 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1815 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1816 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1817 if (netif_msg_rx_err(adapter)) 1818 dev_warn(&pdev->dev, 1819 "wrong packet! rrs word3 is %x\n", 1820 rrs->word3); 1821 continue; 1822 } 1823 1824 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1825 RRS_PKT_SIZE_MASK); 1826 /* Good Receive */ 1827 if (likely(rfd_num == 1)) { 1828 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1829 RRS_RX_RFD_INDEX_MASK; 1830 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1831 pci_unmap_single(pdev, buffer_info->dma, 1832 buffer_info->length, PCI_DMA_FROMDEVICE); 1833 skb = buffer_info->skb; 1834 } else { 1835 /* TODO */ 1836 if (netif_msg_rx_err(adapter)) 1837 dev_warn(&pdev->dev, 1838 "Multi rfd not support yet!\n"); 1839 break; 1840 } 1841 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1842 skb_put(skb, length - ETH_FCS_LEN); 1843 skb->protocol = eth_type_trans(skb, netdev); 1844 atl1c_rx_checksum(adapter, skb, rrs); 1845 if (rrs->word3 & RRS_VLAN_INS) { 1846 u16 vlan; 1847 1848 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1849 vlan = le16_to_cpu(vlan); 1850 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); 1851 } 1852 netif_receive_skb(skb); 1853 1854 (*work_done)++; 1855 count++; 1856 } 1857 if (count) 1858 atl1c_alloc_rx_buffer(adapter); 1859 } 1860 1861 /** 1862 * atl1c_clean - NAPI Rx polling callback 1863 */ 1864 static int atl1c_clean(struct napi_struct *napi, int budget) 1865 { 1866 struct atl1c_adapter *adapter = 1867 container_of(napi, struct atl1c_adapter, napi); 1868 int work_done = 0; 1869 1870 /* Keep link state information with original netdev */ 1871 if (!netif_carrier_ok(adapter->netdev)) 1872 goto quit_polling; 1873 /* just enable one RXQ */ 1874 atl1c_clean_rx_irq(adapter, &work_done, budget); 1875 1876 if (work_done < budget) { 1877 quit_polling: 1878 napi_complete(napi); 1879 adapter->hw.intr_mask |= ISR_RX_PKT; 1880 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1881 } 1882 return work_done; 1883 } 1884 1885 #ifdef CONFIG_NET_POLL_CONTROLLER 1886 1887 /* 1888 * Polling 'interrupt' - used by things like netconsole to send skbs 1889 * without having to re-enable interrupts. It's not called while 1890 * the interrupt routine is executing. 1891 */ 1892 static void atl1c_netpoll(struct net_device *netdev) 1893 { 1894 struct atl1c_adapter *adapter = netdev_priv(netdev); 1895 1896 disable_irq(adapter->pdev->irq); 1897 atl1c_intr(adapter->pdev->irq, netdev); 1898 enable_irq(adapter->pdev->irq); 1899 } 1900 #endif 1901 1902 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1903 { 1904 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1905 u16 next_to_use = 0; 1906 u16 next_to_clean = 0; 1907 1908 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1909 next_to_use = tpd_ring->next_to_use; 1910 1911 return (u16)(next_to_clean > next_to_use) ? 1912 (next_to_clean - next_to_use - 1) : 1913 (tpd_ring->count + next_to_clean - next_to_use - 1); 1914 } 1915 1916 /* 1917 * get next usable tpd 1918 * Note: should call atl1c_tdp_avail to make sure 1919 * there is enough tpd to use 1920 */ 1921 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1922 enum atl1c_trans_queue type) 1923 { 1924 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1925 struct atl1c_tpd_desc *tpd_desc; 1926 u16 next_to_use = 0; 1927 1928 next_to_use = tpd_ring->next_to_use; 1929 if (++tpd_ring->next_to_use == tpd_ring->count) 1930 tpd_ring->next_to_use = 0; 1931 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1932 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1933 return tpd_desc; 1934 } 1935 1936 static struct atl1c_buffer * 1937 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1938 { 1939 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1940 1941 return &tpd_ring->buffer_info[tpd - 1942 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1943 } 1944 1945 /* Calculate the transmit packet descript needed*/ 1946 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1947 { 1948 u16 tpd_req; 1949 u16 proto_hdr_len = 0; 1950 1951 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1952 1953 if (skb_is_gso(skb)) { 1954 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1955 if (proto_hdr_len < skb_headlen(skb)) 1956 tpd_req++; 1957 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1958 tpd_req++; 1959 } 1960 return tpd_req; 1961 } 1962 1963 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1964 struct sk_buff *skb, 1965 struct atl1c_tpd_desc **tpd, 1966 enum atl1c_trans_queue type) 1967 { 1968 struct pci_dev *pdev = adapter->pdev; 1969 u8 hdr_len; 1970 u32 real_len; 1971 unsigned short offload_type; 1972 int err; 1973 1974 if (skb_is_gso(skb)) { 1975 if (skb_header_cloned(skb)) { 1976 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 1977 if (unlikely(err)) 1978 return -1; 1979 } 1980 offload_type = skb_shinfo(skb)->gso_type; 1981 1982 if (offload_type & SKB_GSO_TCPV4) { 1983 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1984 + ntohs(ip_hdr(skb)->tot_len)); 1985 1986 if (real_len < skb->len) 1987 pskb_trim(skb, real_len); 1988 1989 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1990 if (unlikely(skb->len == hdr_len)) { 1991 /* only xsum need */ 1992 if (netif_msg_tx_queued(adapter)) 1993 dev_warn(&pdev->dev, 1994 "IPV4 tso with zero data??\n"); 1995 goto check_sum; 1996 } else { 1997 ip_hdr(skb)->check = 0; 1998 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1999 ip_hdr(skb)->saddr, 2000 ip_hdr(skb)->daddr, 2001 0, IPPROTO_TCP, 0); 2002 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2003 } 2004 } 2005 2006 if (offload_type & SKB_GSO_TCPV6) { 2007 struct atl1c_tpd_ext_desc *etpd = 2008 *(struct atl1c_tpd_ext_desc **)(tpd); 2009 2010 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2011 *tpd = atl1c_get_tpd(adapter, type); 2012 ipv6_hdr(skb)->payload_len = 0; 2013 /* check payload == 0 byte ? */ 2014 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2015 if (unlikely(skb->len == hdr_len)) { 2016 /* only xsum need */ 2017 if (netif_msg_tx_queued(adapter)) 2018 dev_warn(&pdev->dev, 2019 "IPV6 tso with zero data??\n"); 2020 goto check_sum; 2021 } else 2022 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2023 &ipv6_hdr(skb)->saddr, 2024 &ipv6_hdr(skb)->daddr, 2025 0, IPPROTO_TCP, 0); 2026 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2027 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2028 etpd->pkt_len = cpu_to_le32(skb->len); 2029 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2030 } 2031 2032 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2033 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2034 TPD_TCPHDR_OFFSET_SHIFT; 2035 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2036 TPD_MSS_SHIFT; 2037 return 0; 2038 } 2039 2040 check_sum: 2041 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2042 u8 css, cso; 2043 cso = skb_checksum_start_offset(skb); 2044 2045 if (unlikely(cso & 0x1)) { 2046 if (netif_msg_tx_err(adapter)) 2047 dev_err(&adapter->pdev->dev, 2048 "payload offset should not an event number\n"); 2049 return -1; 2050 } else { 2051 css = cso + skb->csum_offset; 2052 2053 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2054 TPD_PLOADOFFSET_SHIFT; 2055 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2056 TPD_CCSUM_OFFSET_SHIFT; 2057 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2058 } 2059 } 2060 return 0; 2061 } 2062 2063 static void atl1c_tx_rollback(struct atl1c_adapter *adpt, 2064 struct atl1c_tpd_desc *first_tpd, 2065 enum atl1c_trans_queue type) 2066 { 2067 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type]; 2068 struct atl1c_buffer *buffer_info; 2069 struct atl1c_tpd_desc *tpd; 2070 u16 first_index, index; 2071 2072 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc; 2073 index = first_index; 2074 while (index != tpd_ring->next_to_use) { 2075 tpd = ATL1C_TPD_DESC(tpd_ring, index); 2076 buffer_info = &tpd_ring->buffer_info[index]; 2077 atl1c_clean_buffer(adpt->pdev, buffer_info, 0); 2078 memset(tpd, 0, sizeof(struct atl1c_tpd_desc)); 2079 if (++index == tpd_ring->count) 2080 index = 0; 2081 } 2082 tpd_ring->next_to_use = first_index; 2083 } 2084 2085 static int atl1c_tx_map(struct atl1c_adapter *adapter, 2086 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2087 enum atl1c_trans_queue type) 2088 { 2089 struct atl1c_tpd_desc *use_tpd = NULL; 2090 struct atl1c_buffer *buffer_info = NULL; 2091 u16 buf_len = skb_headlen(skb); 2092 u16 map_len = 0; 2093 u16 mapped_len = 0; 2094 u16 hdr_len = 0; 2095 u16 nr_frags; 2096 u16 f; 2097 int tso; 2098 2099 nr_frags = skb_shinfo(skb)->nr_frags; 2100 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2101 if (tso) { 2102 /* TSO */ 2103 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2104 use_tpd = tpd; 2105 2106 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2107 buffer_info->length = map_len; 2108 buffer_info->dma = pci_map_single(adapter->pdev, 2109 skb->data, hdr_len, PCI_DMA_TODEVICE); 2110 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2111 buffer_info->dma))) 2112 goto err_dma; 2113 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2114 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2115 ATL1C_PCIMAP_TODEVICE); 2116 mapped_len += map_len; 2117 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2118 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2119 } 2120 2121 if (mapped_len < buf_len) { 2122 /* mapped_len == 0, means we should use the first tpd, 2123 which is given by caller */ 2124 if (mapped_len == 0) 2125 use_tpd = tpd; 2126 else { 2127 use_tpd = atl1c_get_tpd(adapter, type); 2128 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2129 } 2130 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2131 buffer_info->length = buf_len - mapped_len; 2132 buffer_info->dma = 2133 pci_map_single(adapter->pdev, skb->data + mapped_len, 2134 buffer_info->length, PCI_DMA_TODEVICE); 2135 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2136 buffer_info->dma))) 2137 goto err_dma; 2138 2139 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2140 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2141 ATL1C_PCIMAP_TODEVICE); 2142 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2143 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2144 } 2145 2146 for (f = 0; f < nr_frags; f++) { 2147 struct skb_frag_struct *frag; 2148 2149 frag = &skb_shinfo(skb)->frags[f]; 2150 2151 use_tpd = atl1c_get_tpd(adapter, type); 2152 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2153 2154 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2155 buffer_info->length = skb_frag_size(frag); 2156 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2157 frag, 0, 2158 buffer_info->length, 2159 DMA_TO_DEVICE); 2160 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) 2161 goto err_dma; 2162 2163 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2164 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2165 ATL1C_PCIMAP_TODEVICE); 2166 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2167 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2168 } 2169 2170 /* The last tpd */ 2171 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2172 /* The last buffer info contain the skb address, 2173 so it will be free after unmap */ 2174 buffer_info->skb = skb; 2175 2176 return 0; 2177 2178 err_dma: 2179 buffer_info->dma = 0; 2180 buffer_info->length = 0; 2181 return -1; 2182 } 2183 2184 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2185 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2186 { 2187 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2188 u16 reg; 2189 2190 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2191 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2192 } 2193 2194 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2195 struct net_device *netdev) 2196 { 2197 struct atl1c_adapter *adapter = netdev_priv(netdev); 2198 unsigned long flags; 2199 u16 tpd_req = 1; 2200 struct atl1c_tpd_desc *tpd; 2201 enum atl1c_trans_queue type = atl1c_trans_normal; 2202 2203 if (test_bit(__AT_DOWN, &adapter->flags)) { 2204 dev_kfree_skb_any(skb); 2205 return NETDEV_TX_OK; 2206 } 2207 2208 tpd_req = atl1c_cal_tpd_req(skb); 2209 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { 2210 if (netif_msg_pktdata(adapter)) 2211 dev_info(&adapter->pdev->dev, "tx locked\n"); 2212 return NETDEV_TX_LOCKED; 2213 } 2214 2215 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2216 /* no enough descriptor, just stop queue */ 2217 netif_stop_queue(netdev); 2218 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2219 return NETDEV_TX_BUSY; 2220 } 2221 2222 tpd = atl1c_get_tpd(adapter, type); 2223 2224 /* do TSO and check sum */ 2225 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2226 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2227 dev_kfree_skb_any(skb); 2228 return NETDEV_TX_OK; 2229 } 2230 2231 if (unlikely(vlan_tx_tag_present(skb))) { 2232 u16 vlan = vlan_tx_tag_get(skb); 2233 __le16 tag; 2234 2235 vlan = cpu_to_le16(vlan); 2236 AT_VLAN_TO_TAG(vlan, tag); 2237 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2238 tpd->vlan_tag = tag; 2239 } 2240 2241 if (skb_network_offset(skb) != ETH_HLEN) 2242 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2243 2244 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) { 2245 netif_info(adapter, tx_done, adapter->netdev, 2246 "tx-skb droppted due to dma error\n"); 2247 /* roll back tpd/buffer */ 2248 atl1c_tx_rollback(adapter, tpd, type); 2249 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2250 dev_kfree_skb(skb); 2251 } else { 2252 atl1c_tx_queue(adapter, skb, tpd, type); 2253 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2254 } 2255 2256 return NETDEV_TX_OK; 2257 } 2258 2259 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2260 { 2261 struct net_device *netdev = adapter->netdev; 2262 2263 free_irq(adapter->pdev->irq, netdev); 2264 2265 if (adapter->have_msi) 2266 pci_disable_msi(adapter->pdev); 2267 } 2268 2269 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2270 { 2271 struct pci_dev *pdev = adapter->pdev; 2272 struct net_device *netdev = adapter->netdev; 2273 int flags = 0; 2274 int err = 0; 2275 2276 adapter->have_msi = true; 2277 err = pci_enable_msi(adapter->pdev); 2278 if (err) { 2279 if (netif_msg_ifup(adapter)) 2280 dev_err(&pdev->dev, 2281 "Unable to allocate MSI interrupt Error: %d\n", 2282 err); 2283 adapter->have_msi = false; 2284 } 2285 2286 if (!adapter->have_msi) 2287 flags |= IRQF_SHARED; 2288 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2289 netdev->name, netdev); 2290 if (err) { 2291 if (netif_msg_ifup(adapter)) 2292 dev_err(&pdev->dev, 2293 "Unable to allocate interrupt Error: %d\n", 2294 err); 2295 if (adapter->have_msi) 2296 pci_disable_msi(adapter->pdev); 2297 return err; 2298 } 2299 if (netif_msg_ifup(adapter)) 2300 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2301 return err; 2302 } 2303 2304 2305 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2306 { 2307 /* release tx-pending skbs and reset tx/rx ring index */ 2308 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2309 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2310 atl1c_clean_rx_ring(adapter); 2311 } 2312 2313 static int atl1c_up(struct atl1c_adapter *adapter) 2314 { 2315 struct net_device *netdev = adapter->netdev; 2316 int err; 2317 2318 netif_carrier_off(netdev); 2319 2320 err = atl1c_configure(adapter); 2321 if (unlikely(err)) 2322 goto err_up; 2323 2324 err = atl1c_request_irq(adapter); 2325 if (unlikely(err)) 2326 goto err_up; 2327 2328 atl1c_check_link_status(adapter); 2329 clear_bit(__AT_DOWN, &adapter->flags); 2330 napi_enable(&adapter->napi); 2331 atl1c_irq_enable(adapter); 2332 netif_start_queue(netdev); 2333 return err; 2334 2335 err_up: 2336 atl1c_clean_rx_ring(adapter); 2337 return err; 2338 } 2339 2340 static void atl1c_down(struct atl1c_adapter *adapter) 2341 { 2342 struct net_device *netdev = adapter->netdev; 2343 2344 atl1c_del_timer(adapter); 2345 adapter->work_event = 0; /* clear all event */ 2346 /* signal that we're down so the interrupt handler does not 2347 * reschedule our watchdog timer */ 2348 set_bit(__AT_DOWN, &adapter->flags); 2349 netif_carrier_off(netdev); 2350 napi_disable(&adapter->napi); 2351 atl1c_irq_disable(adapter); 2352 atl1c_free_irq(adapter); 2353 /* disable ASPM if device inactive */ 2354 atl1c_disable_l0s_l1(&adapter->hw); 2355 /* reset MAC to disable all RX/TX */ 2356 atl1c_reset_mac(&adapter->hw); 2357 msleep(1); 2358 2359 adapter->link_speed = SPEED_0; 2360 adapter->link_duplex = -1; 2361 atl1c_reset_dma_ring(adapter); 2362 } 2363 2364 /** 2365 * atl1c_open - Called when a network interface is made active 2366 * @netdev: network interface device structure 2367 * 2368 * Returns 0 on success, negative value on failure 2369 * 2370 * The open entry point is called when a network interface is made 2371 * active by the system (IFF_UP). At this point all resources needed 2372 * for transmit and receive operations are allocated, the interrupt 2373 * handler is registered with the OS, the watchdog timer is started, 2374 * and the stack is notified that the interface is ready. 2375 */ 2376 static int atl1c_open(struct net_device *netdev) 2377 { 2378 struct atl1c_adapter *adapter = netdev_priv(netdev); 2379 int err; 2380 2381 /* disallow open during test */ 2382 if (test_bit(__AT_TESTING, &adapter->flags)) 2383 return -EBUSY; 2384 2385 /* allocate rx/tx dma buffer & descriptors */ 2386 err = atl1c_setup_ring_resources(adapter); 2387 if (unlikely(err)) 2388 return err; 2389 2390 err = atl1c_up(adapter); 2391 if (unlikely(err)) 2392 goto err_up; 2393 2394 return 0; 2395 2396 err_up: 2397 atl1c_free_irq(adapter); 2398 atl1c_free_ring_resources(adapter); 2399 atl1c_reset_mac(&adapter->hw); 2400 return err; 2401 } 2402 2403 /** 2404 * atl1c_close - Disables a network interface 2405 * @netdev: network interface device structure 2406 * 2407 * Returns 0, this is not allowed to fail 2408 * 2409 * The close entry point is called when an interface is de-activated 2410 * by the OS. The hardware is still under the drivers control, but 2411 * needs to be disabled. A global MAC reset is issued to stop the 2412 * hardware, and all transmit and receive resources are freed. 2413 */ 2414 static int atl1c_close(struct net_device *netdev) 2415 { 2416 struct atl1c_adapter *adapter = netdev_priv(netdev); 2417 2418 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2419 set_bit(__AT_DOWN, &adapter->flags); 2420 cancel_work_sync(&adapter->common_task); 2421 atl1c_down(adapter); 2422 atl1c_free_ring_resources(adapter); 2423 return 0; 2424 } 2425 2426 static int atl1c_suspend(struct device *dev) 2427 { 2428 struct pci_dev *pdev = to_pci_dev(dev); 2429 struct net_device *netdev = pci_get_drvdata(pdev); 2430 struct atl1c_adapter *adapter = netdev_priv(netdev); 2431 struct atl1c_hw *hw = &adapter->hw; 2432 u32 wufc = adapter->wol; 2433 2434 atl1c_disable_l0s_l1(hw); 2435 if (netif_running(netdev)) { 2436 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2437 atl1c_down(adapter); 2438 } 2439 netif_device_detach(netdev); 2440 2441 if (wufc) 2442 if (atl1c_phy_to_ps_link(hw) != 0) 2443 dev_dbg(&pdev->dev, "phy power saving failed"); 2444 2445 atl1c_power_saving(hw, wufc); 2446 2447 return 0; 2448 } 2449 2450 #ifdef CONFIG_PM_SLEEP 2451 static int atl1c_resume(struct device *dev) 2452 { 2453 struct pci_dev *pdev = to_pci_dev(dev); 2454 struct net_device *netdev = pci_get_drvdata(pdev); 2455 struct atl1c_adapter *adapter = netdev_priv(netdev); 2456 2457 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2458 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2459 2460 atl1c_phy_reset(&adapter->hw); 2461 atl1c_reset_mac(&adapter->hw); 2462 atl1c_phy_init(&adapter->hw); 2463 2464 #if 0 2465 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2466 pm_data &= ~PM_CTRLSTAT_PME_EN; 2467 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2468 #endif 2469 2470 netif_device_attach(netdev); 2471 if (netif_running(netdev)) 2472 atl1c_up(adapter); 2473 2474 return 0; 2475 } 2476 #endif 2477 2478 static void atl1c_shutdown(struct pci_dev *pdev) 2479 { 2480 struct net_device *netdev = pci_get_drvdata(pdev); 2481 struct atl1c_adapter *adapter = netdev_priv(netdev); 2482 2483 atl1c_suspend(&pdev->dev); 2484 pci_wake_from_d3(pdev, adapter->wol); 2485 pci_set_power_state(pdev, PCI_D3hot); 2486 } 2487 2488 static const struct net_device_ops atl1c_netdev_ops = { 2489 .ndo_open = atl1c_open, 2490 .ndo_stop = atl1c_close, 2491 .ndo_validate_addr = eth_validate_addr, 2492 .ndo_start_xmit = atl1c_xmit_frame, 2493 .ndo_set_mac_address = atl1c_set_mac_addr, 2494 .ndo_set_rx_mode = atl1c_set_multi, 2495 .ndo_change_mtu = atl1c_change_mtu, 2496 .ndo_fix_features = atl1c_fix_features, 2497 .ndo_set_features = atl1c_set_features, 2498 .ndo_do_ioctl = atl1c_ioctl, 2499 .ndo_tx_timeout = atl1c_tx_timeout, 2500 .ndo_get_stats = atl1c_get_stats, 2501 #ifdef CONFIG_NET_POLL_CONTROLLER 2502 .ndo_poll_controller = atl1c_netpoll, 2503 #endif 2504 }; 2505 2506 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2507 { 2508 SET_NETDEV_DEV(netdev, &pdev->dev); 2509 pci_set_drvdata(pdev, netdev); 2510 2511 netdev->netdev_ops = &atl1c_netdev_ops; 2512 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2513 atl1c_set_ethtool_ops(netdev); 2514 2515 /* TODO: add when ready */ 2516 netdev->hw_features = NETIF_F_SG | 2517 NETIF_F_HW_CSUM | 2518 NETIF_F_HW_VLAN_CTAG_RX | 2519 NETIF_F_TSO | 2520 NETIF_F_TSO6; 2521 netdev->features = netdev->hw_features | 2522 NETIF_F_HW_VLAN_CTAG_TX; 2523 return 0; 2524 } 2525 2526 /** 2527 * atl1c_probe - Device Initialization Routine 2528 * @pdev: PCI device information struct 2529 * @ent: entry in atl1c_pci_tbl 2530 * 2531 * Returns 0 on success, negative on failure 2532 * 2533 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2534 * The OS initialization, configuring of the adapter private structure, 2535 * and a hardware reset occur. 2536 */ 2537 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2538 { 2539 struct net_device *netdev; 2540 struct atl1c_adapter *adapter; 2541 static int cards_found; 2542 2543 int err = 0; 2544 2545 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2546 err = pci_enable_device_mem(pdev); 2547 if (err) { 2548 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2549 return err; 2550 } 2551 2552 /* 2553 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2554 * shared register for the high 32 bits, so only a single, aligned, 2555 * 4 GB physical address range can be used at a time. 2556 * 2557 * Supporting 64-bit DMA on this hardware is more trouble than it's 2558 * worth. It is far easier to limit to 32-bit DMA than update 2559 * various kernel subsystems to support the mechanics required by a 2560 * fixed-high-32-bit system. 2561 */ 2562 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2563 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2564 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2565 goto err_dma; 2566 } 2567 2568 err = pci_request_regions(pdev, atl1c_driver_name); 2569 if (err) { 2570 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2571 goto err_pci_reg; 2572 } 2573 2574 pci_set_master(pdev); 2575 2576 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2577 if (netdev == NULL) { 2578 err = -ENOMEM; 2579 goto err_alloc_etherdev; 2580 } 2581 2582 err = atl1c_init_netdev(netdev, pdev); 2583 if (err) { 2584 dev_err(&pdev->dev, "init netdevice failed\n"); 2585 goto err_init_netdev; 2586 } 2587 adapter = netdev_priv(netdev); 2588 adapter->bd_number = cards_found; 2589 adapter->netdev = netdev; 2590 adapter->pdev = pdev; 2591 adapter->hw.adapter = adapter; 2592 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2593 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2594 if (!adapter->hw.hw_addr) { 2595 err = -EIO; 2596 dev_err(&pdev->dev, "cannot map device registers\n"); 2597 goto err_ioremap; 2598 } 2599 2600 /* init mii data */ 2601 adapter->mii.dev = netdev; 2602 adapter->mii.mdio_read = atl1c_mdio_read; 2603 adapter->mii.mdio_write = atl1c_mdio_write; 2604 adapter->mii.phy_id_mask = 0x1f; 2605 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2606 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2607 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2608 (unsigned long)adapter); 2609 /* setup the private structure */ 2610 err = atl1c_sw_init(adapter); 2611 if (err) { 2612 dev_err(&pdev->dev, "net device private data init failed\n"); 2613 goto err_sw_init; 2614 } 2615 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2616 2617 /* Init GPHY as early as possible due to power saving issue */ 2618 atl1c_phy_reset(&adapter->hw); 2619 2620 err = atl1c_reset_mac(&adapter->hw); 2621 if (err) { 2622 err = -EIO; 2623 goto err_reset; 2624 } 2625 2626 /* reset the controller to 2627 * put the device in a known good starting state */ 2628 err = atl1c_phy_init(&adapter->hw); 2629 if (err) { 2630 err = -EIO; 2631 goto err_reset; 2632 } 2633 if (atl1c_read_mac_addr(&adapter->hw)) { 2634 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2635 netdev->addr_assign_type = NET_ADDR_RANDOM; 2636 } 2637 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2638 if (netif_msg_probe(adapter)) 2639 dev_dbg(&pdev->dev, "mac address : %pM\n", 2640 adapter->hw.mac_addr); 2641 2642 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2643 INIT_WORK(&adapter->common_task, atl1c_common_task); 2644 adapter->work_event = 0; 2645 err = register_netdev(netdev); 2646 if (err) { 2647 dev_err(&pdev->dev, "register netdevice failed\n"); 2648 goto err_register; 2649 } 2650 2651 if (netif_msg_probe(adapter)) 2652 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2653 cards_found++; 2654 return 0; 2655 2656 err_reset: 2657 err_register: 2658 err_sw_init: 2659 iounmap(adapter->hw.hw_addr); 2660 err_init_netdev: 2661 err_ioremap: 2662 free_netdev(netdev); 2663 err_alloc_etherdev: 2664 pci_release_regions(pdev); 2665 err_pci_reg: 2666 err_dma: 2667 pci_disable_device(pdev); 2668 return err; 2669 } 2670 2671 /** 2672 * atl1c_remove - Device Removal Routine 2673 * @pdev: PCI device information struct 2674 * 2675 * atl1c_remove is called by the PCI subsystem to alert the driver 2676 * that it should release a PCI device. The could be caused by a 2677 * Hot-Plug event, or because the driver is going to be removed from 2678 * memory. 2679 */ 2680 static void atl1c_remove(struct pci_dev *pdev) 2681 { 2682 struct net_device *netdev = pci_get_drvdata(pdev); 2683 struct atl1c_adapter *adapter = netdev_priv(netdev); 2684 2685 unregister_netdev(netdev); 2686 /* restore permanent address */ 2687 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2688 atl1c_phy_disable(&adapter->hw); 2689 2690 iounmap(adapter->hw.hw_addr); 2691 2692 pci_release_regions(pdev); 2693 pci_disable_device(pdev); 2694 free_netdev(netdev); 2695 } 2696 2697 /** 2698 * atl1c_io_error_detected - called when PCI error is detected 2699 * @pdev: Pointer to PCI device 2700 * @state: The current pci connection state 2701 * 2702 * This function is called after a PCI bus error affecting 2703 * this device has been detected. 2704 */ 2705 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2706 pci_channel_state_t state) 2707 { 2708 struct net_device *netdev = pci_get_drvdata(pdev); 2709 struct atl1c_adapter *adapter = netdev_priv(netdev); 2710 2711 netif_device_detach(netdev); 2712 2713 if (state == pci_channel_io_perm_failure) 2714 return PCI_ERS_RESULT_DISCONNECT; 2715 2716 if (netif_running(netdev)) 2717 atl1c_down(adapter); 2718 2719 pci_disable_device(pdev); 2720 2721 /* Request a slot slot reset. */ 2722 return PCI_ERS_RESULT_NEED_RESET; 2723 } 2724 2725 /** 2726 * atl1c_io_slot_reset - called after the pci bus has been reset. 2727 * @pdev: Pointer to PCI device 2728 * 2729 * Restart the card from scratch, as if from a cold-boot. Implementation 2730 * resembles the first-half of the e1000_resume routine. 2731 */ 2732 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2733 { 2734 struct net_device *netdev = pci_get_drvdata(pdev); 2735 struct atl1c_adapter *adapter = netdev_priv(netdev); 2736 2737 if (pci_enable_device(pdev)) { 2738 if (netif_msg_hw(adapter)) 2739 dev_err(&pdev->dev, 2740 "Cannot re-enable PCI device after reset\n"); 2741 return PCI_ERS_RESULT_DISCONNECT; 2742 } 2743 pci_set_master(pdev); 2744 2745 pci_enable_wake(pdev, PCI_D3hot, 0); 2746 pci_enable_wake(pdev, PCI_D3cold, 0); 2747 2748 atl1c_reset_mac(&adapter->hw); 2749 2750 return PCI_ERS_RESULT_RECOVERED; 2751 } 2752 2753 /** 2754 * atl1c_io_resume - called when traffic can start flowing again. 2755 * @pdev: Pointer to PCI device 2756 * 2757 * This callback is called when the error recovery driver tells us that 2758 * its OK to resume normal operation. Implementation resembles the 2759 * second-half of the atl1c_resume routine. 2760 */ 2761 static void atl1c_io_resume(struct pci_dev *pdev) 2762 { 2763 struct net_device *netdev = pci_get_drvdata(pdev); 2764 struct atl1c_adapter *adapter = netdev_priv(netdev); 2765 2766 if (netif_running(netdev)) { 2767 if (atl1c_up(adapter)) { 2768 if (netif_msg_hw(adapter)) 2769 dev_err(&pdev->dev, 2770 "Cannot bring device back up after reset\n"); 2771 return; 2772 } 2773 } 2774 2775 netif_device_attach(netdev); 2776 } 2777 2778 static const struct pci_error_handlers atl1c_err_handler = { 2779 .error_detected = atl1c_io_error_detected, 2780 .slot_reset = atl1c_io_slot_reset, 2781 .resume = atl1c_io_resume, 2782 }; 2783 2784 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2785 2786 static struct pci_driver atl1c_driver = { 2787 .name = atl1c_driver_name, 2788 .id_table = atl1c_pci_tbl, 2789 .probe = atl1c_probe, 2790 .remove = atl1c_remove, 2791 .shutdown = atl1c_shutdown, 2792 .err_handler = &atl1c_err_handler, 2793 .driver.pm = &atl1c_pm_ops, 2794 }; 2795 2796 module_pci_driver(atl1c_driver); 2797