1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
4  *
5  * Derived from Intel e1000 driver
6  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
7  */
8 
9 #include "atl1c.h"
10 
11 char atl1c_driver_name[] = "atl1c";
12 
13 /*
14  * atl1c_pci_tbl - PCI Device ID Table
15  *
16  * Wildcard entries (PCI_ANY_ID) should come last
17  * Last entry must be all 0s
18  *
19  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
20  *   Class, Class Mask, private data (not used) }
21  */
22 static const struct pci_device_id atl1c_pci_tbl[] = {
23 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
24 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
25 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
26 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
27 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
28 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
29 	/* required last entry */
30 	{ 0 }
31 };
32 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
33 
34 MODULE_AUTHOR("Jie Yang");
35 MODULE_AUTHOR("Qualcomm Atheros Inc.");
36 MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver");
37 MODULE_LICENSE("GPL");
38 
39 struct atl1c_qregs {
40 	u16 tpd_addr_lo;
41 	u16 tpd_prod;
42 	u16 tpd_cons;
43 	u16 rfd_addr_lo;
44 	u16 rrd_addr_lo;
45 	u16 rfd_prod;
46 	u32 tx_isr;
47 	u32 rx_isr;
48 };
49 
50 static struct atl1c_qregs atl1c_qregs[AT_MAX_TRANSMIT_QUEUE] = {
51 	{
52 		REG_TPD_PRI0_ADDR_LO, REG_TPD_PRI0_PIDX, REG_TPD_PRI0_CIDX,
53 		REG_RFD0_HEAD_ADDR_LO, REG_RRD0_HEAD_ADDR_LO,
54 		REG_MB_RFD0_PROD_IDX, ISR_TX_PKT_0, ISR_RX_PKT_0
55 	},
56 	{
57 		REG_TPD_PRI1_ADDR_LO, REG_TPD_PRI1_PIDX, REG_TPD_PRI1_CIDX,
58 		REG_RFD1_HEAD_ADDR_LO, REG_RRD1_HEAD_ADDR_LO,
59 		REG_MB_RFD1_PROD_IDX, ISR_TX_PKT_1, ISR_RX_PKT_1
60 	},
61 	{
62 		REG_TPD_PRI2_ADDR_LO, REG_TPD_PRI2_PIDX, REG_TPD_PRI2_CIDX,
63 		REG_RFD2_HEAD_ADDR_LO, REG_RRD2_HEAD_ADDR_LO,
64 		REG_MB_RFD2_PROD_IDX, ISR_TX_PKT_2, ISR_RX_PKT_2
65 	},
66 	{
67 		REG_TPD_PRI3_ADDR_LO, REG_TPD_PRI3_PIDX, REG_TPD_PRI3_CIDX,
68 		REG_RFD3_HEAD_ADDR_LO, REG_RRD3_HEAD_ADDR_LO,
69 		REG_MB_RFD3_PROD_IDX, ISR_TX_PKT_3, ISR_RX_PKT_3
70 	},
71 };
72 
73 static int atl1c_stop_mac(struct atl1c_hw *hw);
74 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
75 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
76 static void atl1c_start_mac(struct atl1c_adapter *adapter);
77 static int atl1c_up(struct atl1c_adapter *adapter);
78 static void atl1c_down(struct atl1c_adapter *adapter);
79 static int atl1c_reset_mac(struct atl1c_hw *hw);
80 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
81 static int atl1c_configure(struct atl1c_adapter *adapter);
82 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue,
83 				 bool napi_mode);
84 
85 
86 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
87 	NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
88 static void atl1c_pcie_patch(struct atl1c_hw *hw)
89 {
90 	u32 mst_data, data;
91 
92 	/* pclk sel could switch to 25M */
93 	AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
94 	mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
95 	AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
96 
97 	/* WoL/PCIE related settings */
98 	if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
99 		AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
100 		data |= PCIE_PHYMISC_FORCE_RCV_DET;
101 		AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
102 	} else { /* new dev set bit5 of MASTER */
103 		if (!(mst_data & MASTER_CTRL_WAKEN_25M))
104 			AT_WRITE_REG(hw, REG_MASTER_CTRL,
105 				mst_data | MASTER_CTRL_WAKEN_25M);
106 	}
107 	/* aspm/PCIE setting only for l2cb 1.0 */
108 	if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
109 		AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
110 		data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
111 			L2CB1_PCIE_PHYMISC2_CDR_BW);
112 		data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
113 			L2CB1_PCIE_PHYMISC2_L0S_TH);
114 		AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
115 		/* extend L1 sync timer */
116 		AT_READ_REG(hw, REG_LINK_CTRL, &data);
117 		data |= LINK_CTRL_EXT_SYNC;
118 		AT_WRITE_REG(hw, REG_LINK_CTRL, data);
119 	}
120 	/* l2cb 1.x & l1d 1.x */
121 	if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
122 		AT_READ_REG(hw, REG_PM_CTRL, &data);
123 		data |= PM_CTRL_L0S_BUFSRX_EN;
124 		AT_WRITE_REG(hw, REG_PM_CTRL, data);
125 		/* clear vendor msg */
126 		AT_READ_REG(hw, REG_DMA_DBG, &data);
127 		AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
128 	}
129 }
130 
131 /* FIXME: no need any more ? */
132 /*
133  * atl1c_init_pcie - init PCIE module
134  */
135 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
136 {
137 	u32 data;
138 	u32 pci_cmd;
139 	struct pci_dev *pdev = hw->adapter->pdev;
140 	int pos;
141 
142 	AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
143 	pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
144 	pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
145 		PCI_COMMAND_IO);
146 	AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
147 
148 	/*
149 	 * Clear any PowerSaveing Settings
150 	 */
151 	pci_enable_wake(pdev, PCI_D3hot, 0);
152 	pci_enable_wake(pdev, PCI_D3cold, 0);
153 	/* wol sts read-clear */
154 	AT_READ_REG(hw, REG_WOL_CTRL, &data);
155 	AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
156 
157 	/*
158 	 * Mask some pcie error bits
159 	 */
160 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
161 	if (pos) {
162 		pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
163 		data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
164 		pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
165 	}
166 	/* clear error status */
167 	pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
168 			PCI_EXP_DEVSTA_NFED |
169 			PCI_EXP_DEVSTA_FED |
170 			PCI_EXP_DEVSTA_CED |
171 			PCI_EXP_DEVSTA_URD);
172 
173 	AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
174 	data &= ~LTSSM_ID_EN_WRO;
175 	AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
176 
177 	atl1c_pcie_patch(hw);
178 	if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
179 		atl1c_disable_l0s_l1(hw);
180 
181 	msleep(5);
182 }
183 
184 /**
185  * atl1c_irq_enable - Enable default interrupt generation settings
186  * @adapter: board private structure
187  */
188 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
189 {
190 	if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
191 		AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
192 		AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
193 		AT_WRITE_FLUSH(&adapter->hw);
194 	}
195 }
196 
197 /**
198  * atl1c_irq_disable - Mask off interrupt generation on the NIC
199  * @adapter: board private structure
200  */
201 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
202 {
203 	atomic_inc(&adapter->irq_sem);
204 	AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
205 	AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
206 	AT_WRITE_FLUSH(&adapter->hw);
207 	synchronize_irq(adapter->pdev->irq);
208 }
209 
210 /**
211  * atl1c_irq_reset - reset interrupt confiure on the NIC
212  * @adapter: board private structure
213  */
214 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
215 {
216 	atomic_set(&adapter->irq_sem, 1);
217 	atl1c_irq_enable(adapter);
218 }
219 
220 /*
221  * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
222  * of the idle status register until the device is actually idle
223  */
224 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
225 {
226 	int timeout;
227 	u32 data;
228 
229 	for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
230 		AT_READ_REG(hw, REG_IDLE_STATUS, &data);
231 		if ((data & modu_ctrl) == 0)
232 			return 0;
233 		msleep(1);
234 	}
235 	return data;
236 }
237 
238 /**
239  * atl1c_phy_config - Timer Call-back
240  * @t: timer list containing pointer to netdev cast into an unsigned long
241  */
242 static void atl1c_phy_config(struct timer_list *t)
243 {
244 	struct atl1c_adapter *adapter = from_timer(adapter, t,
245 						   phy_config_timer);
246 	struct atl1c_hw *hw = &adapter->hw;
247 	unsigned long flags;
248 
249 	spin_lock_irqsave(&adapter->mdio_lock, flags);
250 	atl1c_restart_autoneg(hw);
251 	spin_unlock_irqrestore(&adapter->mdio_lock, flags);
252 }
253 
254 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
255 {
256 	atl1c_down(adapter);
257 	atl1c_up(adapter);
258 	clear_bit(__AT_RESETTING, &adapter->flags);
259 }
260 
261 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
262 {
263 	struct atl1c_hw *hw = &adapter->hw;
264 	struct net_device *netdev = adapter->netdev;
265 	struct pci_dev    *pdev   = adapter->pdev;
266 	int err;
267 	unsigned long flags;
268 	u16 speed, duplex;
269 	bool link;
270 
271 	spin_lock_irqsave(&adapter->mdio_lock, flags);
272 	link = atl1c_get_link_status(hw);
273 	spin_unlock_irqrestore(&adapter->mdio_lock, flags);
274 
275 	if (!link) {
276 		/* link down */
277 		netif_carrier_off(netdev);
278 		hw->hibernate = true;
279 		if (atl1c_reset_mac(hw) != 0)
280 			if (netif_msg_hw(adapter))
281 				dev_warn(&pdev->dev, "reset mac failed\n");
282 		atl1c_set_aspm(hw, SPEED_0);
283 		atl1c_post_phy_linkchg(hw, SPEED_0);
284 		atl1c_reset_dma_ring(adapter);
285 		atl1c_configure(adapter);
286 	} else {
287 		/* Link Up */
288 		hw->hibernate = false;
289 		spin_lock_irqsave(&adapter->mdio_lock, flags);
290 		err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
291 		spin_unlock_irqrestore(&adapter->mdio_lock, flags);
292 		if (unlikely(err))
293 			return;
294 		/* link result is our setting */
295 		if (adapter->link_speed != speed ||
296 		    adapter->link_duplex != duplex) {
297 			adapter->link_speed  = speed;
298 			adapter->link_duplex = duplex;
299 			atl1c_set_aspm(hw, speed);
300 			atl1c_post_phy_linkchg(hw, speed);
301 			atl1c_start_mac(adapter);
302 			if (netif_msg_link(adapter))
303 				dev_info(&pdev->dev,
304 					"%s: %s NIC Link is Up<%d Mbps %s>\n",
305 					atl1c_driver_name, netdev->name,
306 					adapter->link_speed,
307 					adapter->link_duplex == FULL_DUPLEX ?
308 					"Full Duplex" : "Half Duplex");
309 		}
310 		if (!netif_carrier_ok(netdev))
311 			netif_carrier_on(netdev);
312 	}
313 }
314 
315 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
316 {
317 	struct net_device *netdev = adapter->netdev;
318 	struct pci_dev    *pdev   = adapter->pdev;
319 	bool link;
320 
321 	spin_lock(&adapter->mdio_lock);
322 	link = atl1c_get_link_status(&adapter->hw);
323 	spin_unlock(&adapter->mdio_lock);
324 	/* notify upper layer link down ASAP */
325 	if (!link) {
326 		if (netif_carrier_ok(netdev)) {
327 			/* old link state: Up */
328 			netif_carrier_off(netdev);
329 			if (netif_msg_link(adapter))
330 				dev_info(&pdev->dev,
331 					"%s: %s NIC Link is Down\n",
332 					atl1c_driver_name, netdev->name);
333 			adapter->link_speed = SPEED_0;
334 		}
335 	}
336 
337 	set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
338 	schedule_work(&adapter->common_task);
339 }
340 
341 static void atl1c_common_task(struct work_struct *work)
342 {
343 	struct atl1c_adapter *adapter;
344 	struct net_device *netdev;
345 
346 	adapter = container_of(work, struct atl1c_adapter, common_task);
347 	netdev = adapter->netdev;
348 
349 	if (test_bit(__AT_DOWN, &adapter->flags))
350 		return;
351 
352 	if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
353 		netif_device_detach(netdev);
354 		atl1c_down(adapter);
355 		atl1c_up(adapter);
356 		netif_device_attach(netdev);
357 	}
358 
359 	if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
360 		&adapter->work_event)) {
361 		atl1c_irq_disable(adapter);
362 		atl1c_check_link_status(adapter);
363 		atl1c_irq_enable(adapter);
364 	}
365 }
366 
367 
368 static void atl1c_del_timer(struct atl1c_adapter *adapter)
369 {
370 	del_timer_sync(&adapter->phy_config_timer);
371 }
372 
373 
374 /**
375  * atl1c_tx_timeout - Respond to a Tx Hang
376  * @netdev: network interface device structure
377  * @txqueue: index of hanging tx queue
378  */
379 static void atl1c_tx_timeout(struct net_device *netdev, unsigned int txqueue)
380 {
381 	struct atl1c_adapter *adapter = netdev_priv(netdev);
382 
383 	/* Do the reset outside of interrupt context */
384 	set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
385 	schedule_work(&adapter->common_task);
386 }
387 
388 /**
389  * atl1c_set_multi - Multicast and Promiscuous mode set
390  * @netdev: network interface device structure
391  *
392  * The set_multi entry point is called whenever the multicast address
393  * list or the network interface flags are updated.  This routine is
394  * responsible for configuring the hardware for proper multicast,
395  * promiscuous mode, and all-multi behavior.
396  */
397 static void atl1c_set_multi(struct net_device *netdev)
398 {
399 	struct atl1c_adapter *adapter = netdev_priv(netdev);
400 	struct atl1c_hw *hw = &adapter->hw;
401 	struct netdev_hw_addr *ha;
402 	u32 mac_ctrl_data;
403 	u32 hash_value;
404 
405 	/* Check for Promiscuous and All Multicast modes */
406 	AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
407 
408 	if (netdev->flags & IFF_PROMISC) {
409 		mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
410 	} else if (netdev->flags & IFF_ALLMULTI) {
411 		mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
412 		mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
413 	} else {
414 		mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
415 	}
416 
417 	AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
418 
419 	/* clear the old settings from the multicast hash table */
420 	AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
421 	AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
422 
423 	/* comoute mc addresses' hash value ,and put it into hash table */
424 	netdev_for_each_mc_addr(ha, netdev) {
425 		hash_value = atl1c_hash_mc_addr(hw, ha->addr);
426 		atl1c_hash_set(hw, hash_value);
427 	}
428 }
429 
430 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
431 {
432 	if (features & NETIF_F_HW_VLAN_CTAG_RX) {
433 		/* enable VLAN tag insert/strip */
434 		*mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
435 	} else {
436 		/* disable VLAN tag insert/strip */
437 		*mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
438 	}
439 }
440 
441 static void atl1c_vlan_mode(struct net_device *netdev,
442 	netdev_features_t features)
443 {
444 	struct atl1c_adapter *adapter = netdev_priv(netdev);
445 	struct pci_dev *pdev = adapter->pdev;
446 	u32 mac_ctrl_data = 0;
447 
448 	if (netif_msg_pktdata(adapter))
449 		dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
450 
451 	atl1c_irq_disable(adapter);
452 	AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
453 	__atl1c_vlan_mode(features, &mac_ctrl_data);
454 	AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
455 	atl1c_irq_enable(adapter);
456 }
457 
458 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
459 {
460 	struct pci_dev *pdev = adapter->pdev;
461 
462 	if (netif_msg_pktdata(adapter))
463 		dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
464 	atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
465 }
466 
467 /**
468  * atl1c_set_mac_addr - Change the Ethernet Address of the NIC
469  * @netdev: network interface device structure
470  * @p: pointer to an address structure
471  *
472  * Returns 0 on success, negative on failure
473  */
474 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
475 {
476 	struct atl1c_adapter *adapter = netdev_priv(netdev);
477 	struct sockaddr *addr = p;
478 
479 	if (!is_valid_ether_addr(addr->sa_data))
480 		return -EADDRNOTAVAIL;
481 
482 	if (netif_running(netdev))
483 		return -EBUSY;
484 
485 	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
486 	memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
487 
488 	atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
489 
490 	return 0;
491 }
492 
493 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
494 				struct net_device *dev)
495 {
496 	unsigned int head_size;
497 	int mtu = dev->mtu;
498 
499 	adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
500 		roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
501 
502 	head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD + NET_IP_ALIGN) +
503 		    SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
504 	adapter->rx_frag_size = roundup_pow_of_two(head_size);
505 }
506 
507 static netdev_features_t atl1c_fix_features(struct net_device *netdev,
508 	netdev_features_t features)
509 {
510 	struct atl1c_adapter *adapter = netdev_priv(netdev);
511 	struct atl1c_hw *hw = &adapter->hw;
512 
513 	/*
514 	 * Since there is no support for separate rx/tx vlan accel
515 	 * enable/disable make sure tx flag is always in same state as rx.
516 	 */
517 	if (features & NETIF_F_HW_VLAN_CTAG_RX)
518 		features |= NETIF_F_HW_VLAN_CTAG_TX;
519 	else
520 		features &= ~NETIF_F_HW_VLAN_CTAG_TX;
521 
522 	if (hw->nic_type != athr_mt) {
523 		if (netdev->mtu > MAX_TSO_FRAME_SIZE)
524 			features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
525 	}
526 
527 	return features;
528 }
529 
530 static int atl1c_set_features(struct net_device *netdev,
531 	netdev_features_t features)
532 {
533 	netdev_features_t changed = netdev->features ^ features;
534 
535 	if (changed & NETIF_F_HW_VLAN_CTAG_RX)
536 		atl1c_vlan_mode(netdev, features);
537 
538 	return 0;
539 }
540 
541 static void atl1c_set_max_mtu(struct net_device *netdev)
542 {
543 	struct atl1c_adapter *adapter = netdev_priv(netdev);
544 	struct atl1c_hw *hw = &adapter->hw;
545 
546 	switch (hw->nic_type) {
547 	/* These (GbE) devices support jumbo packets, max_mtu 6122 */
548 	case athr_l1c:
549 	case athr_l1d:
550 	case athr_l1d_2:
551 		netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
552 			(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
553 		break;
554 	case athr_mt:
555 		netdev->max_mtu = 9500;
556 		break;
557 		/* The 10/100 devices don't support jumbo packets, max_mtu 1500 */
558 	default:
559 		netdev->max_mtu = ETH_DATA_LEN;
560 		break;
561 	}
562 }
563 
564 /**
565  * atl1c_change_mtu - Change the Maximum Transfer Unit
566  * @netdev: network interface device structure
567  * @new_mtu: new value for maximum frame size
568  *
569  * Returns 0 on success, negative on failure
570  */
571 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
572 {
573 	struct atl1c_adapter *adapter = netdev_priv(netdev);
574 
575 	/* set MTU */
576 	if (netif_running(netdev)) {
577 		while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
578 			msleep(1);
579 		netdev->mtu = new_mtu;
580 		adapter->hw.max_frame_size = new_mtu;
581 		atl1c_set_rxbufsize(adapter, netdev);
582 		atl1c_down(adapter);
583 		netdev_update_features(netdev);
584 		atl1c_up(adapter);
585 		clear_bit(__AT_RESETTING, &adapter->flags);
586 	}
587 	return 0;
588 }
589 
590 /*
591  *  caller should hold mdio_lock
592  */
593 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
594 {
595 	struct atl1c_adapter *adapter = netdev_priv(netdev);
596 	u16 result;
597 
598 	atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
599 	return result;
600 }
601 
602 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
603 			     int reg_num, int val)
604 {
605 	struct atl1c_adapter *adapter = netdev_priv(netdev);
606 
607 	atl1c_write_phy_reg(&adapter->hw, reg_num, val);
608 }
609 
610 static int atl1c_mii_ioctl(struct net_device *netdev,
611 			   struct ifreq *ifr, int cmd)
612 {
613 	struct atl1c_adapter *adapter = netdev_priv(netdev);
614 	struct pci_dev *pdev = adapter->pdev;
615 	struct mii_ioctl_data *data = if_mii(ifr);
616 	unsigned long flags;
617 	int retval = 0;
618 
619 	if (!netif_running(netdev))
620 		return -EINVAL;
621 
622 	spin_lock_irqsave(&adapter->mdio_lock, flags);
623 	switch (cmd) {
624 	case SIOCGMIIPHY:
625 		data->phy_id = 0;
626 		break;
627 
628 	case SIOCGMIIREG:
629 		if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
630 				    &data->val_out)) {
631 			retval = -EIO;
632 			goto out;
633 		}
634 		break;
635 
636 	case SIOCSMIIREG:
637 		if (data->reg_num & ~(0x1F)) {
638 			retval = -EFAULT;
639 			goto out;
640 		}
641 
642 		dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
643 				data->reg_num, data->val_in);
644 		if (atl1c_write_phy_reg(&adapter->hw,
645 				     data->reg_num, data->val_in)) {
646 			retval = -EIO;
647 			goto out;
648 		}
649 		break;
650 
651 	default:
652 		retval = -EOPNOTSUPP;
653 		break;
654 	}
655 out:
656 	spin_unlock_irqrestore(&adapter->mdio_lock, flags);
657 	return retval;
658 }
659 
660 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
661 {
662 	switch (cmd) {
663 	case SIOCGMIIPHY:
664 	case SIOCGMIIREG:
665 	case SIOCSMIIREG:
666 		return atl1c_mii_ioctl(netdev, ifr, cmd);
667 	default:
668 		return -EOPNOTSUPP;
669 	}
670 }
671 
672 /**
673  * atl1c_alloc_queues - Allocate memory for all rings
674  * @adapter: board private structure to initialize
675  *
676  */
677 static int atl1c_alloc_queues(struct atl1c_adapter *adapter)
678 {
679 	return 0;
680 }
681 
682 static enum atl1c_nic_type atl1c_get_mac_type(struct pci_dev *pdev,
683 					      u8 __iomem *hw_addr)
684 {
685 	switch (pdev->device) {
686 	case PCI_DEVICE_ID_ATTANSIC_L2C:
687 		return athr_l2c;
688 	case PCI_DEVICE_ID_ATTANSIC_L1C:
689 		return athr_l1c;
690 	case PCI_DEVICE_ID_ATHEROS_L2C_B:
691 		return athr_l2c_b;
692 	case PCI_DEVICE_ID_ATHEROS_L2C_B2:
693 		return athr_l2c_b2;
694 	case PCI_DEVICE_ID_ATHEROS_L1D:
695 		return athr_l1d;
696 	case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
697 		if (readl(hw_addr + REG_MT_MAGIC) == MT_MAGIC)
698 			return athr_mt;
699 		return athr_l1d_2;
700 	default:
701 		return athr_l1c;
702 	}
703 }
704 
705 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
706 {
707 	u32 link_ctrl_data;
708 
709 	AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
710 
711 	hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE  |
712 			 ATL1C_TXQ_MODE_ENHANCE;
713 	hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
714 			  ATL1C_ASPM_L1_SUPPORT;
715 	hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
716 
717 	if (hw->nic_type == athr_l1c ||
718 	    hw->nic_type == athr_l1d ||
719 	    hw->nic_type == athr_l1d_2)
720 		hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
721 	return 0;
722 }
723 
724 struct atl1c_platform_patch {
725 	u16 pci_did;
726 	u8  pci_revid;
727 	u16 subsystem_vid;
728 	u16 subsystem_did;
729 	u32 patch_flag;
730 #define ATL1C_LINK_PATCH	0x1
731 };
732 static const struct atl1c_platform_patch plats[] = {
733 {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
734 {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
735 {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
736 {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
737 {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
738 {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
739 {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
740 {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
741 {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
742 {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
743 {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
744 {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
745 {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
746 {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
747 {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
748 {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
749 {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
750 {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
751 {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
752 {0},
753 };
754 
755 static void atl1c_patch_assign(struct atl1c_hw *hw)
756 {
757 	struct pci_dev	*pdev = hw->adapter->pdev;
758 	u32 misc_ctrl;
759 	int i = 0;
760 
761 	hw->msi_lnkpatch = false;
762 
763 	while (plats[i].pci_did != 0) {
764 		if (plats[i].pci_did == hw->device_id &&
765 		    plats[i].pci_revid == hw->revision_id &&
766 		    plats[i].subsystem_vid == hw->subsystem_vendor_id &&
767 		    plats[i].subsystem_did == hw->subsystem_id) {
768 			if (plats[i].patch_flag & ATL1C_LINK_PATCH)
769 				hw->msi_lnkpatch = true;
770 		}
771 		i++;
772 	}
773 
774 	if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
775 	    hw->revision_id == L2CB_V21) {
776 		/* config access mode */
777 		pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
778 				       REG_PCIE_DEV_MISC_CTRL);
779 		pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
780 		misc_ctrl &= ~0x100;
781 		pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
782 				       REG_PCIE_DEV_MISC_CTRL);
783 		pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
784 	}
785 }
786 /**
787  * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
788  * @adapter: board private structure to initialize
789  *
790  * atl1c_sw_init initializes the Adapter private data structure.
791  * Fields are initialized based on PCI device information and
792  * OS network device settings (MTU size).
793  */
794 static int atl1c_sw_init(struct atl1c_adapter *adapter)
795 {
796 	struct atl1c_hw *hw   = &adapter->hw;
797 	struct pci_dev	*pdev = adapter->pdev;
798 	u32 revision;
799 	int i;
800 
801 	adapter->wol = 0;
802 	device_set_wakeup_enable(&pdev->dev, false);
803 	adapter->link_speed = SPEED_0;
804 	adapter->link_duplex = FULL_DUPLEX;
805 	adapter->tpd_ring[0].count = 1024;
806 	adapter->rfd_ring[0].count = 512;
807 
808 	hw->vendor_id = pdev->vendor;
809 	hw->device_id = pdev->device;
810 	hw->subsystem_vendor_id = pdev->subsystem_vendor;
811 	hw->subsystem_id = pdev->subsystem_device;
812 	pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
813 	hw->revision_id = revision & 0xFF;
814 	/* before link up, we assume hibernate is true */
815 	hw->hibernate = true;
816 	hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
817 	if (atl1c_setup_mac_funcs(hw) != 0) {
818 		dev_err(&pdev->dev, "set mac function pointers failed\n");
819 		return -1;
820 	}
821 	atl1c_patch_assign(hw);
822 
823 	hw->intr_mask = IMR_NORMAL_MASK;
824 	for (i = 0; i < adapter->tx_queue_count; ++i)
825 		hw->intr_mask |= atl1c_qregs[i].tx_isr;
826 	for (i = 0; i < adapter->rx_queue_count; ++i)
827 		hw->intr_mask |= atl1c_qregs[i].rx_isr;
828 	hw->phy_configured = false;
829 	hw->preamble_len = 7;
830 	hw->max_frame_size = adapter->netdev->mtu;
831 	hw->autoneg_advertised = ADVERTISED_Autoneg;
832 	hw->indirect_tab = 0xE4E4E4E4;
833 	hw->base_cpu = 0;
834 
835 	hw->ict = 50000;		/* 100ms */
836 	hw->smb_timer = 200000;	  	/* 400ms */
837 	hw->rx_imt = 200;
838 	hw->tx_imt = 1000;
839 
840 	hw->tpd_burst = 5;
841 	hw->rfd_burst = 8;
842 	hw->dma_order = atl1c_dma_ord_out;
843 	hw->dmar_block = atl1c_dma_req_1024;
844 
845 	if (atl1c_alloc_queues(adapter)) {
846 		dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
847 		return -ENOMEM;
848 	}
849 	/* TODO */
850 	atl1c_set_rxbufsize(adapter, adapter->netdev);
851 	atomic_set(&adapter->irq_sem, 1);
852 	spin_lock_init(&adapter->mdio_lock);
853 	spin_lock_init(&adapter->hw.intr_mask_lock);
854 	set_bit(__AT_DOWN, &adapter->flags);
855 
856 	return 0;
857 }
858 
859 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
860 				struct atl1c_buffer *buffer_info)
861 {
862 	u16 pci_driection;
863 	if (buffer_info->flags & ATL1C_BUFFER_FREE)
864 		return;
865 	if (buffer_info->dma) {
866 		if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
867 			pci_driection = DMA_FROM_DEVICE;
868 		else
869 			pci_driection = DMA_TO_DEVICE;
870 
871 		if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
872 			dma_unmap_single(&pdev->dev, buffer_info->dma,
873 					 buffer_info->length, pci_driection);
874 		else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
875 			dma_unmap_page(&pdev->dev, buffer_info->dma,
876 				       buffer_info->length, pci_driection);
877 	}
878 	if (buffer_info->skb)
879 		dev_consume_skb_any(buffer_info->skb);
880 	buffer_info->dma = 0;
881 	buffer_info->skb = NULL;
882 	ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
883 }
884 /**
885  * atl1c_clean_tx_ring - Free Tx-skb
886  * @adapter: board private structure
887  * @queue: idx of transmit queue
888  */
889 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
890 				u32 queue)
891 {
892 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
893 	struct atl1c_buffer *buffer_info;
894 	struct pci_dev *pdev = adapter->pdev;
895 	u16 index, ring_count;
896 
897 	ring_count = tpd_ring->count;
898 	for (index = 0; index < ring_count; index++) {
899 		buffer_info = &tpd_ring->buffer_info[index];
900 		atl1c_clean_buffer(pdev, buffer_info);
901 	}
902 
903 	netdev_reset_queue(adapter->netdev);
904 
905 	/* Zero out Tx-buffers */
906 	memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
907 		ring_count);
908 	atomic_set(&tpd_ring->next_to_clean, 0);
909 	tpd_ring->next_to_use = 0;
910 }
911 
912 /**
913  * atl1c_clean_rx_ring - Free rx-reservation skbs
914  * @adapter: board private structure
915  * @queue: idx of transmit queue
916  */
917 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter, u32 queue)
918 {
919 	struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue];
920 	struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue];
921 	struct atl1c_buffer *buffer_info;
922 	struct pci_dev *pdev = adapter->pdev;
923 	int j;
924 
925 	for (j = 0; j < rfd_ring->count; j++) {
926 		buffer_info = &rfd_ring->buffer_info[j];
927 		atl1c_clean_buffer(pdev, buffer_info);
928 	}
929 	/* zero out the descriptor ring */
930 	memset(rfd_ring->desc, 0, rfd_ring->size);
931 	rfd_ring->next_to_clean = 0;
932 	rfd_ring->next_to_use = 0;
933 	rrd_ring->next_to_use = 0;
934 	rrd_ring->next_to_clean = 0;
935 }
936 
937 /*
938  * Read / Write Ptr Initialize:
939  */
940 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
941 {
942 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
943 	struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
944 	struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
945 	struct atl1c_buffer *buffer_info;
946 	int i, j;
947 
948 	for (i = 0; i < adapter->tx_queue_count; i++) {
949 		tpd_ring[i].next_to_use = 0;
950 		atomic_set(&tpd_ring[i].next_to_clean, 0);
951 		buffer_info = tpd_ring[i].buffer_info;
952 		for (j = 0; j < tpd_ring->count; j++)
953 			ATL1C_SET_BUFFER_STATE(&buffer_info[i],
954 					       ATL1C_BUFFER_FREE);
955 	}
956 	for (i = 0; i < adapter->rx_queue_count; i++) {
957 		rfd_ring[i].next_to_use = 0;
958 		rfd_ring[i].next_to_clean = 0;
959 		rrd_ring[i].next_to_use = 0;
960 		rrd_ring[i].next_to_clean = 0;
961 		for (j = 0; j < rfd_ring[i].count; j++) {
962 			buffer_info = &rfd_ring[i].buffer_info[j];
963 			ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
964 		}
965 	}
966 }
967 
968 /**
969  * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
970  * @adapter: board private structure
971  *
972  * Free all transmit software resources
973  */
974 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
975 {
976 	struct pci_dev *pdev = adapter->pdev;
977 	int i;
978 
979 	dma_free_coherent(&pdev->dev, adapter->ring_header.size,
980 			  adapter->ring_header.desc, adapter->ring_header.dma);
981 	adapter->ring_header.desc = NULL;
982 
983 	/* Note: just free tdp_ring.buffer_info,
984 	 * it contain rfd_ring.buffer_info, do not double free
985 	 */
986 	if (adapter->tpd_ring[0].buffer_info) {
987 		kfree(adapter->tpd_ring[0].buffer_info);
988 		adapter->tpd_ring[0].buffer_info = NULL;
989 	}
990 	for (i = 0; i < adapter->rx_queue_count; ++i) {
991 		if (adapter->rrd_ring[i].rx_page) {
992 			put_page(adapter->rrd_ring[i].rx_page);
993 			adapter->rrd_ring[i].rx_page = NULL;
994 		}
995 	}
996 }
997 
998 /**
999  * atl1c_setup_ring_resources - allocate Tx / RX descriptor resources
1000  * @adapter: board private structure
1001  *
1002  * Return 0 on success, negative on failure
1003  */
1004 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
1005 {
1006 	struct pci_dev *pdev = adapter->pdev;
1007 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1008 	struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
1009 	struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
1010 	struct atl1c_ring_header *ring_header = &adapter->ring_header;
1011 	int tqc = adapter->tx_queue_count;
1012 	int rqc = adapter->rx_queue_count;
1013 	int size;
1014 	int i;
1015 	int count = 0;
1016 	u32 offset = 0;
1017 
1018 	/* Even though only one tpd queue is actually used, the "high"
1019 	 * priority tpd queue also gets initialized
1020 	 */
1021 	if (tqc == 1)
1022 		tqc = 2;
1023 
1024 	for (i = 1; i < tqc; i++)
1025 		tpd_ring[i].count = tpd_ring[0].count;
1026 
1027 	size = sizeof(struct atl1c_buffer) * (tpd_ring->count * tqc +
1028 					      rfd_ring->count * rqc);
1029 	tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1030 	if (unlikely(!tpd_ring->buffer_info))
1031 		goto err_nomem;
1032 
1033 	for (i = 0; i < tqc; i++) {
1034 		tpd_ring[i].adapter = adapter;
1035 		tpd_ring[i].num = i;
1036 		tpd_ring[i].buffer_info = (tpd_ring->buffer_info + count);
1037 		count += tpd_ring[i].count;
1038 	}
1039 
1040 	for (i = 0; i < rqc; i++) {
1041 		rrd_ring[i].adapter = adapter;
1042 		rrd_ring[i].num = i;
1043 		rrd_ring[i].count = rfd_ring[0].count;
1044 		rfd_ring[i].count = rfd_ring[0].count;
1045 		rfd_ring[i].buffer_info = (tpd_ring->buffer_info + count);
1046 		count += rfd_ring->count;
1047 	}
1048 
1049 	/*
1050 	 * real ring DMA buffer
1051 	 * each ring/block may need up to 8 bytes for alignment, hence the
1052 	 * additional bytes tacked onto the end.
1053 	 */
1054 	ring_header->size = size =
1055 		sizeof(struct atl1c_tpd_desc) * tpd_ring->count * tqc +
1056 		sizeof(struct atl1c_rx_free_desc) * rfd_ring->count * rqc +
1057 		sizeof(struct atl1c_recv_ret_status) * rfd_ring->count * rqc +
1058 		8 * 4;
1059 
1060 	ring_header->desc = dma_alloc_coherent(&pdev->dev, ring_header->size,
1061 					       &ring_header->dma, GFP_KERNEL);
1062 	if (unlikely(!ring_header->desc)) {
1063 		dev_err(&pdev->dev, "could not get memory for DMA buffer\n");
1064 		goto err_nomem;
1065 	}
1066 	/* init TPD ring */
1067 
1068 	tpd_ring[0].dma = roundup(ring_header->dma, 8);
1069 	offset = tpd_ring[0].dma - ring_header->dma;
1070 	for (i = 0; i < tqc; i++) {
1071 		tpd_ring[i].dma = ring_header->dma + offset;
1072 		tpd_ring[i].desc = (u8 *)ring_header->desc + offset;
1073 		tpd_ring[i].size =
1074 			sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1075 		offset += roundup(tpd_ring[i].size, 8);
1076 	}
1077 	for (i = 0; i < rqc; i++) {
1078 		/* init RFD ring */
1079 		rfd_ring[i].dma = ring_header->dma + offset;
1080 		rfd_ring[i].desc = (u8 *)ring_header->desc + offset;
1081 		rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
1082 			rfd_ring[i].count;
1083 		offset += roundup(rfd_ring[i].size, 8);
1084 
1085 		/* init RRD ring */
1086 		rrd_ring[i].dma = ring_header->dma + offset;
1087 		rrd_ring[i].desc = (u8 *)ring_header->desc + offset;
1088 		rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
1089 			rrd_ring[i].count;
1090 		offset += roundup(rrd_ring[i].size, 8);
1091 	}
1092 
1093 	return 0;
1094 
1095 err_nomem:
1096 	kfree(tpd_ring->buffer_info);
1097 	return -ENOMEM;
1098 }
1099 
1100 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1101 {
1102 	struct atl1c_hw *hw = &adapter->hw;
1103 	struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
1104 	struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
1105 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1106 	int i;
1107 	int tx_queue_count = adapter->tx_queue_count;
1108 
1109 	if (tx_queue_count == 1)
1110 		tx_queue_count = 2;
1111 
1112 	/* TPD */
1113 	AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1114 		     (u32)((tpd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
1115 	/* just enable normal priority TX queue */
1116 	for (i = 0; i < tx_queue_count; i++) {
1117 		AT_WRITE_REG(hw, atl1c_qregs[i].tpd_addr_lo,
1118 			     (u32)(tpd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1119 	}
1120 	AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1121 			(u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1122 
1123 
1124 	/* RFD */
1125 	AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1126 		     (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1127 	for (i = 0; i < adapter->rx_queue_count; i++) {
1128 		AT_WRITE_REG(hw, atl1c_qregs[i].rfd_addr_lo,
1129 			     (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1130 	}
1131 
1132 	AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1133 			rfd_ring->count & RFD_RING_SIZE_MASK);
1134 	AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1135 			adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1136 
1137 	/* RRD */
1138 	for (i = 0; i < adapter->rx_queue_count; i++) {
1139 		AT_WRITE_REG(hw, atl1c_qregs[i].rrd_addr_lo,
1140 			     (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1141 	}
1142 	AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1143 			(rrd_ring->count & RRD_RING_SIZE_MASK));
1144 
1145 	if (hw->nic_type == athr_l2c_b) {
1146 		AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1147 		AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1148 		AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1149 		AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1150 		AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1151 		AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1152 		AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0);	/* TX watermark, to enter l1 state.*/
1153 		AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0);		/* RXD threshold.*/
1154 	}
1155 	/* Load all of base address above */
1156 	AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1157 }
1158 
1159 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1160 {
1161 	struct atl1c_hw *hw = &adapter->hw;
1162 	int max_pay_load;
1163 	u16 tx_offload_thresh;
1164 	u32 txq_ctrl_data;
1165 
1166 	tx_offload_thresh = MAX_TSO_FRAME_SIZE;
1167 	AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1168 		(tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1169 	max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
1170 	hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1171 	/*
1172 	 * if BIOS had changed the dam-read-max-length to an invalid value,
1173 	 * restore it to default value
1174 	 */
1175 	if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
1176 		pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
1177 		hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
1178 	}
1179 	txq_ctrl_data =
1180 		hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
1181 		L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
1182 
1183 	AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1184 }
1185 
1186 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1187 {
1188 	struct atl1c_hw *hw = &adapter->hw;
1189 	u32 rxq_ctrl_data;
1190 
1191 	rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1192 			RXQ_RFD_BURST_NUM_SHIFT;
1193 
1194 	if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1195 		rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1196 
1197 	/* aspm for gigabit */
1198 	if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
1199 		rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
1200 			ASPM_THRUPUT_LIMIT_100M);
1201 
1202 	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1203 }
1204 
1205 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1206 {
1207 	struct atl1c_hw *hw = &adapter->hw;
1208 	u32 dma_ctrl_data;
1209 
1210 	dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1211 		DMA_CTRL_RREQ_PRI_DATA |
1212 		FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1213 		FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1214 		FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
1215 
1216 	AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1217 }
1218 
1219 /*
1220  * Stop the mac, transmit and receive units
1221  * hw - Struct containing variables accessed by shared code
1222  * return : 0  or  idle status (if error)
1223  */
1224 static int atl1c_stop_mac(struct atl1c_hw *hw)
1225 {
1226 	u32 data;
1227 
1228 	AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1229 	data &= ~RXQ_CTRL_EN;
1230 	AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1231 
1232 	AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1233 	data &= ~TXQ_CTRL_EN;
1234 	AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1235 
1236 	atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
1237 
1238 	AT_READ_REG(hw, REG_MAC_CTRL, &data);
1239 	data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1240 	AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1241 
1242 	return (int)atl1c_wait_until_idle(hw,
1243 		IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
1244 }
1245 
1246 static void atl1c_start_mac(struct atl1c_adapter *adapter)
1247 {
1248 	struct atl1c_hw *hw = &adapter->hw;
1249 	u32 mac, txq, rxq;
1250 
1251 	hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX;
1252 	hw->mac_speed = adapter->link_speed == SPEED_1000 ?
1253 		atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
1254 
1255 	AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
1256 	AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
1257 	AT_READ_REG(hw, REG_MAC_CTRL, &mac);
1258 
1259 	txq |= TXQ_CTRL_EN;
1260 	rxq |= RXQ_CTRL_EN;
1261 	mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
1262 	       MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
1263 	       MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
1264 	       MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
1265 	       MAC_CTRL_HASH_ALG_CRC32;
1266 	if (hw->mac_duplex)
1267 		mac |= MAC_CTRL_DUPLX;
1268 	else
1269 		mac &= ~MAC_CTRL_DUPLX;
1270 	mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
1271 	mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
1272 
1273 	AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
1274 	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
1275 	AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
1276 }
1277 
1278 /*
1279  * Reset the transmit and receive units; mask and clear all interrupts.
1280  * hw - Struct containing variables accessed by shared code
1281  * return : 0  or  idle status (if error)
1282  */
1283 static int atl1c_reset_mac(struct atl1c_hw *hw)
1284 {
1285 	struct atl1c_adapter *adapter = hw->adapter;
1286 	struct pci_dev *pdev = adapter->pdev;
1287 	u32 ctrl_data = 0;
1288 
1289 	atl1c_stop_mac(hw);
1290 	/*
1291 	 * Issue Soft Reset to the MAC.  This will reset the chip's
1292 	 * transmit, receive, DMA.  It will not effect
1293 	 * the current PCI configuration.  The global reset bit is self-
1294 	 * clearing, and should clear within a microsecond.
1295 	 */
1296 	AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
1297 	ctrl_data |= MASTER_CTRL_OOB_DIS;
1298 	AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
1299 
1300 	AT_WRITE_FLUSH(hw);
1301 	msleep(10);
1302 	/* Wait at least 10ms for All module to be Idle */
1303 
1304 	if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
1305 		dev_err(&pdev->dev,
1306 			"MAC state machine can't be idle since"
1307 			" disabled for 10ms second\n");
1308 		return -1;
1309 	}
1310 	AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
1311 
1312 	/* driver control speed/duplex */
1313 	AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
1314 	AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
1315 
1316 	/* clk switch setting */
1317 	AT_READ_REG(hw, REG_SERDES, &ctrl_data);
1318 	switch (hw->nic_type) {
1319 	case athr_l2c_b:
1320 		ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
1321 				SERDES_MAC_CLK_SLOWDOWN);
1322 		AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1323 		break;
1324 	case athr_l2c_b2:
1325 	case athr_l1d_2:
1326 		ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
1327 		AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1328 		break;
1329 	default:
1330 		break;
1331 	}
1332 
1333 	return 0;
1334 }
1335 
1336 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1337 {
1338 	u16 ctrl_flags = hw->ctrl_flags;
1339 
1340 	hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
1341 	atl1c_set_aspm(hw, SPEED_0);
1342 	hw->ctrl_flags = ctrl_flags;
1343 }
1344 
1345 /*
1346  * Set ASPM state.
1347  * Enable/disable L0s/L1 depend on link state.
1348  */
1349 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
1350 {
1351 	u32 pm_ctrl_data;
1352 	u32 link_l1_timer;
1353 
1354 	AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1355 	pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
1356 			  PM_CTRL_ASPM_L0S_EN |
1357 			  PM_CTRL_MAC_ASPM_CHK);
1358 	/* L1 timer */
1359 	if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1360 		pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
1361 		link_l1_timer =
1362 			link_speed == SPEED_1000 || link_speed == SPEED_100 ?
1363 			L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
1364 		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1365 			L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
1366 	} else {
1367 		link_l1_timer = hw->nic_type == athr_l2c_b ?
1368 			L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
1369 		if (link_speed != SPEED_1000 && link_speed != SPEED_100)
1370 			link_l1_timer = 1;
1371 		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1372 			PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
1373 	}
1374 
1375 	/* L0S/L1 enable */
1376 	if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
1377 		pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
1378 	if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1379 		pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
1380 
1381 	/* l2cb & l1d & l2cb2 & l1d2 */
1382 	if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1383 	    hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1384 		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1385 			PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
1386 		pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
1387 				PM_CTRL_SERDES_PD_EX_L1 |
1388 				PM_CTRL_CLK_SWH_L1;
1389 		pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1390 				  PM_CTRL_SERDES_PLL_L1_EN |
1391 				  PM_CTRL_SERDES_BUFS_RX_L1_EN |
1392 				  PM_CTRL_SA_DLY_EN |
1393 				  PM_CTRL_HOTRST);
1394 		/* disable l0s if link down or l2cb */
1395 		if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
1396 			pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1397 	} else { /* l1c */
1398 		pm_ctrl_data =
1399 			FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
1400 		if (link_speed != SPEED_0) {
1401 			pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
1402 					PM_CTRL_SERDES_PLL_L1_EN |
1403 					PM_CTRL_SERDES_BUFS_RX_L1_EN;
1404 			pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
1405 					  PM_CTRL_CLK_SWH_L1 |
1406 					  PM_CTRL_ASPM_L0S_EN |
1407 					  PM_CTRL_ASPM_L1_EN);
1408 		} else { /* link down */
1409 			pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1410 			pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1411 					  PM_CTRL_SERDES_PLL_L1_EN |
1412 					  PM_CTRL_SERDES_BUFS_RX_L1_EN |
1413 					  PM_CTRL_ASPM_L0S_EN);
1414 		}
1415 	}
1416 	AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1417 
1418 	return;
1419 }
1420 
1421 /**
1422  * atl1c_configure_mac - Configure Transmit&Receive Unit after Reset
1423  * @adapter: board private structure
1424  *
1425  * Configure the Tx /Rx unit of the MAC after a reset.
1426  */
1427 static int atl1c_configure_mac(struct atl1c_adapter *adapter)
1428 {
1429 	struct atl1c_hw *hw = &adapter->hw;
1430 	u32 master_ctrl_data = 0;
1431 	u32 intr_modrt_data;
1432 	u32 data;
1433 
1434 	AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1435 	master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
1436 			      MASTER_CTRL_RX_ITIMER_EN |
1437 			      MASTER_CTRL_INT_RDCLR);
1438 	/* clear interrupt status */
1439 	AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1440 	/*  Clear any WOL status */
1441 	AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1442 	/* set Interrupt Clear Timer
1443 	 * HW will enable self to assert interrupt event to system after
1444 	 * waiting x-time for software to notify it accept interrupt.
1445 	 */
1446 
1447 	data = CLK_GATING_EN_ALL;
1448 	if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1449 		if (hw->nic_type == athr_l2c_b)
1450 			data &= ~CLK_GATING_RXMAC_EN;
1451 	} else
1452 		data = 0;
1453 	AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1454 
1455 	AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1456 		hw->ict & INT_RETRIG_TIMER_MASK);
1457 
1458 	atl1c_configure_des_ring(adapter);
1459 
1460 	if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1461 		intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1462 					IRQ_MODRT_TX_TIMER_SHIFT;
1463 		intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1464 					IRQ_MODRT_RX_TIMER_SHIFT;
1465 		AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1466 		master_ctrl_data |=
1467 			MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1468 	}
1469 
1470 	if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1471 		master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1472 
1473 	master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1474 	AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1475 
1476 	AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1477 		hw->smb_timer & SMB_STAT_TIMER_MASK);
1478 
1479 	/* set MTU */
1480 	AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1481 			VLAN_HLEN + ETH_FCS_LEN);
1482 
1483 	atl1c_configure_tx(adapter);
1484 	atl1c_configure_rx(adapter);
1485 	atl1c_configure_dma(adapter);
1486 
1487 	return 0;
1488 }
1489 
1490 static int atl1c_configure(struct atl1c_adapter *adapter)
1491 {
1492 	struct net_device *netdev = adapter->netdev;
1493 	int num;
1494 	int i;
1495 
1496 	if (adapter->hw.nic_type == athr_mt) {
1497 		u32 mode;
1498 
1499 		AT_READ_REG(&adapter->hw, REG_MT_MODE, &mode);
1500 		if (adapter->rx_queue_count == 4)
1501 			mode |= MT_MODE_4Q;
1502 		else
1503 			mode &= ~MT_MODE_4Q;
1504 		AT_WRITE_REG(&adapter->hw, REG_MT_MODE, mode);
1505 	}
1506 
1507 	atl1c_init_ring_ptrs(adapter);
1508 	atl1c_set_multi(netdev);
1509 	atl1c_restore_vlan(adapter);
1510 
1511 	for (i = 0; i < adapter->rx_queue_count; ++i) {
1512 		num = atl1c_alloc_rx_buffer(adapter, i, false);
1513 		if (unlikely(num == 0))
1514 			return -ENOMEM;
1515 	}
1516 
1517 	if (atl1c_configure_mac(adapter))
1518 		return -EIO;
1519 
1520 	return 0;
1521 }
1522 
1523 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1524 {
1525 	u16 hw_reg_addr = 0;
1526 	unsigned long *stats_item = NULL;
1527 	u32 data;
1528 
1529 	/* update rx status */
1530 	hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1531 	stats_item  = &adapter->hw_stats.rx_ok;
1532 	while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1533 		AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1534 		*stats_item += data;
1535 		stats_item++;
1536 		hw_reg_addr += 4;
1537 	}
1538 /* update tx status */
1539 	hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1540 	stats_item  = &adapter->hw_stats.tx_ok;
1541 	while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1542 		AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1543 		*stats_item += data;
1544 		stats_item++;
1545 		hw_reg_addr += 4;
1546 	}
1547 }
1548 
1549 /**
1550  * atl1c_get_stats - Get System Network Statistics
1551  * @netdev: network interface device structure
1552  *
1553  * Returns the address of the device statistics structure.
1554  * The statistics are actually updated from the timer callback.
1555  */
1556 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1557 {
1558 	struct atl1c_adapter *adapter = netdev_priv(netdev);
1559 	struct atl1c_hw_stats  *hw_stats = &adapter->hw_stats;
1560 	struct net_device_stats *net_stats = &netdev->stats;
1561 
1562 	atl1c_update_hw_stats(adapter);
1563 	net_stats->rx_bytes   = hw_stats->rx_byte_cnt;
1564 	net_stats->tx_bytes   = hw_stats->tx_byte_cnt;
1565 	net_stats->multicast  = hw_stats->rx_mcast;
1566 	net_stats->collisions = hw_stats->tx_1_col +
1567 				hw_stats->tx_2_col +
1568 				hw_stats->tx_late_col +
1569 				hw_stats->tx_abort_col;
1570 
1571 	net_stats->rx_errors  = hw_stats->rx_frag +
1572 				hw_stats->rx_fcs_err +
1573 				hw_stats->rx_len_err +
1574 				hw_stats->rx_sz_ov +
1575 				hw_stats->rx_rrd_ov +
1576 				hw_stats->rx_align_err +
1577 				hw_stats->rx_rxf_ov;
1578 
1579 	net_stats->rx_fifo_errors   = hw_stats->rx_rxf_ov;
1580 	net_stats->rx_length_errors = hw_stats->rx_len_err;
1581 	net_stats->rx_crc_errors    = hw_stats->rx_fcs_err;
1582 	net_stats->rx_frame_errors  = hw_stats->rx_align_err;
1583 	net_stats->rx_dropped       = hw_stats->rx_rrd_ov;
1584 
1585 	net_stats->tx_errors = hw_stats->tx_late_col +
1586 			       hw_stats->tx_abort_col +
1587 			       hw_stats->tx_underrun +
1588 			       hw_stats->tx_trunc;
1589 
1590 	net_stats->tx_fifo_errors    = hw_stats->tx_underrun;
1591 	net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1592 	net_stats->tx_window_errors  = hw_stats->tx_late_col;
1593 
1594 	net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1595 	net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1596 
1597 	return net_stats;
1598 }
1599 
1600 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1601 {
1602 	u16 phy_data;
1603 
1604 	spin_lock(&adapter->mdio_lock);
1605 	atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1606 	spin_unlock(&adapter->mdio_lock);
1607 }
1608 
1609 static int atl1c_clean_tx(struct napi_struct *napi, int budget)
1610 {
1611 	struct atl1c_tpd_ring *tpd_ring =
1612 		container_of(napi, struct atl1c_tpd_ring, napi);
1613 	struct atl1c_adapter *adapter = tpd_ring->adapter;
1614 	struct netdev_queue *txq =
1615 		netdev_get_tx_queue(napi->dev, tpd_ring->num);
1616 	struct atl1c_buffer *buffer_info;
1617 	struct pci_dev *pdev = adapter->pdev;
1618 	u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1619 	u16 hw_next_to_clean;
1620 	unsigned int total_bytes = 0, total_packets = 0;
1621 	unsigned long flags;
1622 
1623 	AT_READ_REGW(&adapter->hw, atl1c_qregs[tpd_ring->num].tpd_cons,
1624 		     &hw_next_to_clean);
1625 
1626 	while (next_to_clean != hw_next_to_clean) {
1627 		buffer_info = &tpd_ring->buffer_info[next_to_clean];
1628 		if (buffer_info->skb) {
1629 			total_bytes += buffer_info->skb->len;
1630 			total_packets++;
1631 		}
1632 		atl1c_clean_buffer(pdev, buffer_info);
1633 		if (++next_to_clean == tpd_ring->count)
1634 			next_to_clean = 0;
1635 		atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1636 	}
1637 
1638 	netdev_tx_completed_queue(txq, total_packets, total_bytes);
1639 
1640 	if (netif_tx_queue_stopped(txq) && netif_carrier_ok(adapter->netdev))
1641 		netif_tx_wake_queue(txq);
1642 
1643 	if (total_packets < budget) {
1644 		napi_complete_done(napi, total_packets);
1645 		spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
1646 		adapter->hw.intr_mask |= atl1c_qregs[tpd_ring->num].tx_isr;
1647 		AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1648 		spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
1649 		return total_packets;
1650 	}
1651 	return budget;
1652 }
1653 
1654 static void atl1c_intr_rx_tx(struct atl1c_adapter *adapter, u32 status)
1655 {
1656 	struct atl1c_hw *hw = &adapter->hw;
1657 	u32 intr_mask;
1658 	int i;
1659 
1660 	spin_lock(&hw->intr_mask_lock);
1661 	intr_mask = hw->intr_mask;
1662 	for (i = 0; i < adapter->rx_queue_count; ++i) {
1663 		if (!(status & atl1c_qregs[i].rx_isr))
1664 			continue;
1665 		if (napi_schedule_prep(&adapter->rrd_ring[i].napi)) {
1666 			intr_mask &= ~atl1c_qregs[i].rx_isr;
1667 			__napi_schedule(&adapter->rrd_ring[i].napi);
1668 		}
1669 	}
1670 	for (i = 0; i < adapter->tx_queue_count; ++i) {
1671 		if (!(status & atl1c_qregs[i].tx_isr))
1672 			continue;
1673 		if (napi_schedule_prep(&adapter->tpd_ring[i].napi)) {
1674 			intr_mask &= ~atl1c_qregs[i].tx_isr;
1675 			__napi_schedule(&adapter->tpd_ring[i].napi);
1676 		}
1677 	}
1678 
1679 	if (hw->intr_mask != intr_mask) {
1680 		hw->intr_mask = intr_mask;
1681 		AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1682 	}
1683 	spin_unlock(&hw->intr_mask_lock);
1684 }
1685 
1686 /**
1687  * atl1c_intr - Interrupt Handler
1688  * @irq: interrupt number
1689  * @data: pointer to a network interface device structure
1690  */
1691 static irqreturn_t atl1c_intr(int irq, void *data)
1692 {
1693 	struct net_device *netdev  = data;
1694 	struct atl1c_adapter *adapter = netdev_priv(netdev);
1695 	struct pci_dev *pdev = adapter->pdev;
1696 	struct atl1c_hw *hw = &adapter->hw;
1697 	int max_ints = AT_MAX_INT_WORK;
1698 	int handled = IRQ_NONE;
1699 	u32 status;
1700 	u32 reg_data;
1701 
1702 	do {
1703 		AT_READ_REG(hw, REG_ISR, &reg_data);
1704 		status = reg_data & hw->intr_mask;
1705 
1706 		if (status == 0 || (status & ISR_DIS_INT) != 0) {
1707 			if (max_ints != AT_MAX_INT_WORK)
1708 				handled = IRQ_HANDLED;
1709 			break;
1710 		}
1711 		/* link event */
1712 		if (status & ISR_GPHY)
1713 			atl1c_clear_phy_int(adapter);
1714 		/* Ack ISR */
1715 		AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1716 		if (status & (ISR_RX_PKT | ISR_TX_PKT))
1717 			atl1c_intr_rx_tx(adapter, status);
1718 
1719 		handled = IRQ_HANDLED;
1720 		/* check if PCIE PHY Link down */
1721 		if (status & ISR_ERROR) {
1722 			if (netif_msg_hw(adapter))
1723 				dev_err(&pdev->dev,
1724 					"atl1c hardware error (status = 0x%x)\n",
1725 					status & ISR_ERROR);
1726 			/* reset MAC */
1727 			set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
1728 			schedule_work(&adapter->common_task);
1729 			return IRQ_HANDLED;
1730 		}
1731 
1732 		if (status & ISR_OVER)
1733 			if (netif_msg_intr(adapter))
1734 				dev_warn(&pdev->dev,
1735 					"TX/RX overflow (status = 0x%x)\n",
1736 					status & ISR_OVER);
1737 
1738 		/* link event */
1739 		if (status & (ISR_GPHY | ISR_MANUAL)) {
1740 			netdev->stats.tx_carrier_errors++;
1741 			atl1c_link_chg_event(adapter);
1742 			break;
1743 		}
1744 
1745 	} while (--max_ints > 0);
1746 	/* re-enable Interrupt*/
1747 	AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1748 	return handled;
1749 }
1750 
1751 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1752 		  struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1753 {
1754 	if (adapter->hw.nic_type == athr_mt) {
1755 		if (prrs->word3 & RRS_MT_PROT_ID_TCPUDP)
1756 			skb->ip_summed = CHECKSUM_UNNECESSARY;
1757 		return;
1758 	}
1759 	/*
1760 	 * The pid field in RRS in not correct sometimes, so we
1761 	 * cannot figure out if the packet is fragmented or not,
1762 	 * so we tell the KERNEL CHECKSUM_NONE
1763 	 */
1764 	skb_checksum_none_assert(skb);
1765 }
1766 
1767 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter,
1768 				       u32 queue, bool napi_mode)
1769 {
1770 	struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue];
1771 	struct sk_buff *skb;
1772 	struct page *page;
1773 
1774 	if (adapter->rx_frag_size > PAGE_SIZE) {
1775 		if (likely(napi_mode))
1776 			return napi_alloc_skb(&rrd_ring->napi,
1777 					      adapter->rx_buffer_len);
1778 		else
1779 			return netdev_alloc_skb_ip_align(adapter->netdev,
1780 							 adapter->rx_buffer_len);
1781 	}
1782 
1783 	page = rrd_ring->rx_page;
1784 	if (!page) {
1785 		page = alloc_page(GFP_ATOMIC);
1786 		if (unlikely(!page))
1787 			return NULL;
1788 		rrd_ring->rx_page = page;
1789 		rrd_ring->rx_page_offset = 0;
1790 	}
1791 
1792 	skb = build_skb(page_address(page) + rrd_ring->rx_page_offset,
1793 			adapter->rx_frag_size);
1794 	if (likely(skb)) {
1795 		skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
1796 		rrd_ring->rx_page_offset += adapter->rx_frag_size;
1797 		if (rrd_ring->rx_page_offset >= PAGE_SIZE)
1798 			rrd_ring->rx_page = NULL;
1799 		else
1800 			get_page(page);
1801 	}
1802 	return skb;
1803 }
1804 
1805 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue,
1806 				 bool napi_mode)
1807 {
1808 	struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue];
1809 	struct pci_dev *pdev = adapter->pdev;
1810 	struct atl1c_buffer *buffer_info, *next_info;
1811 	struct sk_buff *skb;
1812 	void *vir_addr = NULL;
1813 	u16 num_alloc = 0;
1814 	u16 rfd_next_to_use, next_next;
1815 	struct atl1c_rx_free_desc *rfd_desc;
1816 	dma_addr_t mapping;
1817 
1818 	next_next = rfd_next_to_use = rfd_ring->next_to_use;
1819 	if (++next_next == rfd_ring->count)
1820 		next_next = 0;
1821 	buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1822 	next_info = &rfd_ring->buffer_info[next_next];
1823 
1824 	while (next_info->flags & ATL1C_BUFFER_FREE) {
1825 		rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1826 
1827 		skb = atl1c_alloc_skb(adapter, queue, napi_mode);
1828 		if (unlikely(!skb)) {
1829 			if (netif_msg_rx_err(adapter))
1830 				dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1831 			break;
1832 		}
1833 
1834 		/*
1835 		 * Make buffer alignment 2 beyond a 16 byte boundary
1836 		 * this will result in a 16 byte aligned IP header after
1837 		 * the 14 byte MAC header is removed
1838 		 */
1839 		vir_addr = skb->data;
1840 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1841 		buffer_info->skb = skb;
1842 		buffer_info->length = adapter->rx_buffer_len;
1843 		mapping = dma_map_single(&pdev->dev, vir_addr,
1844 					 buffer_info->length, DMA_FROM_DEVICE);
1845 		if (unlikely(dma_mapping_error(&pdev->dev, mapping))) {
1846 			dev_kfree_skb(skb);
1847 			buffer_info->skb = NULL;
1848 			buffer_info->length = 0;
1849 			ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
1850 			netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed");
1851 			break;
1852 		}
1853 		buffer_info->dma = mapping;
1854 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1855 			ATL1C_PCIMAP_FROMDEVICE);
1856 		rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1857 		rfd_next_to_use = next_next;
1858 		if (++next_next == rfd_ring->count)
1859 			next_next = 0;
1860 		buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1861 		next_info = &rfd_ring->buffer_info[next_next];
1862 		num_alloc++;
1863 	}
1864 
1865 	if (num_alloc) {
1866 		/* TODO: update mailbox here */
1867 		wmb();
1868 		rfd_ring->next_to_use = rfd_next_to_use;
1869 		AT_WRITE_REG(&adapter->hw, atl1c_qregs[queue].rfd_prod,
1870 			     rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1871 	}
1872 
1873 	return num_alloc;
1874 }
1875 
1876 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1877 			struct	atl1c_recv_ret_status *rrs, u16 num)
1878 {
1879 	u16 i;
1880 	/* the relationship between rrd and rfd is one map one */
1881 	for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1882 					rrd_ring->next_to_clean)) {
1883 		rrs->word3 &= ~RRS_RXD_UPDATED;
1884 		if (++rrd_ring->next_to_clean == rrd_ring->count)
1885 			rrd_ring->next_to_clean = 0;
1886 	}
1887 }
1888 
1889 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1890 	struct atl1c_recv_ret_status *rrs, u16 num)
1891 {
1892 	u16 i;
1893 	u16 rfd_index;
1894 	struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1895 
1896 	rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1897 			RRS_RX_RFD_INDEX_MASK;
1898 	for (i = 0; i < num; i++) {
1899 		buffer_info[rfd_index].skb = NULL;
1900 		ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1901 					ATL1C_BUFFER_FREE);
1902 		if (++rfd_index == rfd_ring->count)
1903 			rfd_index = 0;
1904 	}
1905 	rfd_ring->next_to_clean = rfd_index;
1906 }
1907 
1908 /**
1909  * atl1c_clean_rx - NAPI Rx polling callback
1910  * @napi: napi info
1911  * @budget: limit of packets to clean
1912  */
1913 static int atl1c_clean_rx(struct napi_struct *napi, int budget)
1914 {
1915 	struct atl1c_rrd_ring *rrd_ring =
1916 		container_of(napi, struct atl1c_rrd_ring, napi);
1917 	struct atl1c_adapter *adapter = rrd_ring->adapter;
1918 	u16 rfd_num, rfd_index;
1919 	u16 length;
1920 	struct pci_dev *pdev = adapter->pdev;
1921 	struct net_device *netdev  = adapter->netdev;
1922 	struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[rrd_ring->num];
1923 	struct sk_buff *skb;
1924 	struct atl1c_recv_ret_status *rrs;
1925 	struct atl1c_buffer *buffer_info;
1926 	int work_done = 0;
1927 	unsigned long flags;
1928 
1929 	/* Keep link state information with original netdev */
1930 	if (!netif_carrier_ok(adapter->netdev))
1931 		goto quit_polling;
1932 
1933 	while (1) {
1934 		if (work_done >= budget)
1935 			break;
1936 		rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1937 		if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1938 			rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1939 				RRS_RX_RFD_CNT_MASK;
1940 			if (unlikely(rfd_num != 1))
1941 				/* TODO support mul rfd*/
1942 				if (netif_msg_rx_err(adapter))
1943 					dev_warn(&pdev->dev,
1944 						"Multi rfd not support yet!\n");
1945 			goto rrs_checked;
1946 		} else {
1947 			break;
1948 		}
1949 rrs_checked:
1950 		atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1951 		if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1952 			atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1953 			if (netif_msg_rx_err(adapter))
1954 				dev_warn(&pdev->dev,
1955 					 "wrong packet! rrs word3 is %x\n",
1956 					 rrs->word3);
1957 			continue;
1958 		}
1959 
1960 		length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1961 				RRS_PKT_SIZE_MASK);
1962 		/* Good Receive */
1963 		if (likely(rfd_num == 1)) {
1964 			rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1965 					RRS_RX_RFD_INDEX_MASK;
1966 			buffer_info = &rfd_ring->buffer_info[rfd_index];
1967 			dma_unmap_single(&pdev->dev, buffer_info->dma,
1968 					 buffer_info->length, DMA_FROM_DEVICE);
1969 			skb = buffer_info->skb;
1970 		} else {
1971 			/* TODO */
1972 			if (netif_msg_rx_err(adapter))
1973 				dev_warn(&pdev->dev,
1974 					"Multi rfd not support yet!\n");
1975 			break;
1976 		}
1977 		atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1978 		skb_put(skb, length - ETH_FCS_LEN);
1979 		skb->protocol = eth_type_trans(skb, netdev);
1980 		atl1c_rx_checksum(adapter, skb, rrs);
1981 		if (rrs->word3 & RRS_VLAN_INS) {
1982 			u16 vlan;
1983 
1984 			AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1985 			vlan = le16_to_cpu(vlan);
1986 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
1987 		}
1988 		napi_gro_receive(napi, skb);
1989 
1990 		work_done++;
1991 	}
1992 	if (work_done)
1993 		atl1c_alloc_rx_buffer(adapter, rrd_ring->num, true);
1994 
1995 	if (work_done < budget) {
1996 quit_polling:
1997 		napi_complete_done(napi, work_done);
1998 		spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
1999 		adapter->hw.intr_mask |= atl1c_qregs[rrd_ring->num].rx_isr;
2000 		AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
2001 		spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
2002 	}
2003 	return work_done;
2004 }
2005 
2006 #ifdef CONFIG_NET_POLL_CONTROLLER
2007 
2008 /*
2009  * Polling 'interrupt' - used by things like netconsole to send skbs
2010  * without having to re-enable interrupts. It's not called while
2011  * the interrupt routine is executing.
2012  */
2013 static void atl1c_netpoll(struct net_device *netdev)
2014 {
2015 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2016 
2017 	disable_irq(adapter->pdev->irq);
2018 	atl1c_intr(adapter->pdev->irq, netdev);
2019 	enable_irq(adapter->pdev->irq);
2020 }
2021 #endif
2022 
2023 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, u32 queue)
2024 {
2025 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
2026 	u16 next_to_use = 0;
2027 	u16 next_to_clean = 0;
2028 
2029 	next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2030 	next_to_use   = tpd_ring->next_to_use;
2031 
2032 	return (u16)(next_to_clean > next_to_use) ?
2033 		(next_to_clean - next_to_use - 1) :
2034 		(tpd_ring->count + next_to_clean - next_to_use - 1);
2035 }
2036 
2037 /*
2038  * get next usable tpd
2039  * Note: should call atl1c_tdp_avail to make sure
2040  * there is enough tpd to use
2041  */
2042 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
2043 					    u32 queue)
2044 {
2045 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
2046 	struct atl1c_tpd_desc *tpd_desc;
2047 	u16 next_to_use = 0;
2048 
2049 	next_to_use = tpd_ring->next_to_use;
2050 	if (++tpd_ring->next_to_use == tpd_ring->count)
2051 		tpd_ring->next_to_use = 0;
2052 	tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
2053 	memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
2054 	return	tpd_desc;
2055 }
2056 
2057 static struct atl1c_buffer *
2058 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
2059 {
2060 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
2061 
2062 	return &tpd_ring->buffer_info[tpd -
2063 			(struct atl1c_tpd_desc *)tpd_ring->desc];
2064 }
2065 
2066 /* Calculate the transmit packet descript needed*/
2067 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
2068 {
2069 	u16 tpd_req;
2070 	u16 proto_hdr_len = 0;
2071 
2072 	tpd_req = skb_shinfo(skb)->nr_frags + 1;
2073 
2074 	if (skb_is_gso(skb)) {
2075 		proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2076 		if (proto_hdr_len < skb_headlen(skb))
2077 			tpd_req++;
2078 		if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
2079 			tpd_req++;
2080 	}
2081 	return tpd_req;
2082 }
2083 
2084 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2085 			  struct sk_buff *skb,
2086 			  struct atl1c_tpd_desc **tpd,
2087 			  u32 queue)
2088 {
2089 	struct pci_dev *pdev = adapter->pdev;
2090 	unsigned short offload_type;
2091 	u8 hdr_len;
2092 	u32 real_len;
2093 
2094 	if (skb_is_gso(skb)) {
2095 		int err;
2096 
2097 		err = skb_cow_head(skb, 0);
2098 		if (err < 0)
2099 			return err;
2100 
2101 		offload_type = skb_shinfo(skb)->gso_type;
2102 
2103 		if (offload_type & SKB_GSO_TCPV4) {
2104 			real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2105 					+ ntohs(ip_hdr(skb)->tot_len));
2106 
2107 			if (real_len < skb->len)
2108 				pskb_trim(skb, real_len);
2109 
2110 			hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2111 			if (unlikely(skb->len == hdr_len)) {
2112 				/* only xsum need */
2113 				if (netif_msg_tx_queued(adapter))
2114 					dev_warn(&pdev->dev,
2115 						"IPV4 tso with zero data??\n");
2116 				goto check_sum;
2117 			} else {
2118 				ip_hdr(skb)->check = 0;
2119 				tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2120 							ip_hdr(skb)->saddr,
2121 							ip_hdr(skb)->daddr,
2122 							0, IPPROTO_TCP, 0);
2123 				(*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2124 			}
2125 		}
2126 
2127 		if (offload_type & SKB_GSO_TCPV6) {
2128 			struct atl1c_tpd_ext_desc *etpd =
2129 				*(struct atl1c_tpd_ext_desc **)(tpd);
2130 
2131 			memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2132 			*tpd = atl1c_get_tpd(adapter, queue);
2133 			ipv6_hdr(skb)->payload_len = 0;
2134 			/* check payload == 0 byte ? */
2135 			hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2136 			if (unlikely(skb->len == hdr_len)) {
2137 				/* only xsum need */
2138 				if (netif_msg_tx_queued(adapter))
2139 					dev_warn(&pdev->dev,
2140 						"IPV6 tso with zero data??\n");
2141 				goto check_sum;
2142 			} else
2143 				tcp_v6_gso_csum_prep(skb);
2144 
2145 			etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2146 			etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2147 			etpd->pkt_len = cpu_to_le32(skb->len);
2148 			(*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2149 		}
2150 
2151 		(*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2152 		(*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2153 				TPD_TCPHDR_OFFSET_SHIFT;
2154 		(*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2155 				TPD_MSS_SHIFT;
2156 		return 0;
2157 	}
2158 
2159 check_sum:
2160 	if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2161 		u8 css, cso;
2162 		cso = skb_checksum_start_offset(skb);
2163 
2164 		if (unlikely(cso & 0x1)) {
2165 			if (netif_msg_tx_err(adapter))
2166 				dev_err(&adapter->pdev->dev,
2167 					"payload offset should not an event number\n");
2168 			return -1;
2169 		} else {
2170 			css = cso + skb->csum_offset;
2171 
2172 			(*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2173 					TPD_PLOADOFFSET_SHIFT;
2174 			(*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2175 					TPD_CCSUM_OFFSET_SHIFT;
2176 			(*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2177 		}
2178 	}
2179 	return 0;
2180 }
2181 
2182 static void atl1c_tx_rollback(struct atl1c_adapter *adpt,
2183 			      struct atl1c_tpd_desc *first_tpd,
2184 			      u32 queue)
2185 {
2186 	struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[queue];
2187 	struct atl1c_buffer *buffer_info;
2188 	struct atl1c_tpd_desc *tpd;
2189 	u16 first_index, index;
2190 
2191 	first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc;
2192 	index = first_index;
2193 	while (index != tpd_ring->next_to_use) {
2194 		tpd = ATL1C_TPD_DESC(tpd_ring, index);
2195 		buffer_info = &tpd_ring->buffer_info[index];
2196 		atl1c_clean_buffer(adpt->pdev, buffer_info);
2197 		memset(tpd, 0, sizeof(struct atl1c_tpd_desc));
2198 		if (++index == tpd_ring->count)
2199 			index = 0;
2200 	}
2201 	tpd_ring->next_to_use = first_index;
2202 }
2203 
2204 static int atl1c_tx_map(struct atl1c_adapter *adapter,
2205 			struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2206 			u32 queue)
2207 {
2208 	struct atl1c_tpd_desc *use_tpd = NULL;
2209 	struct atl1c_buffer *buffer_info = NULL;
2210 	u16 buf_len = skb_headlen(skb);
2211 	u16 map_len = 0;
2212 	u16 mapped_len = 0;
2213 	u16 hdr_len = 0;
2214 	u16 nr_frags;
2215 	u16 f;
2216 	int tso;
2217 
2218 	nr_frags = skb_shinfo(skb)->nr_frags;
2219 	tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2220 	if (tso) {
2221 		/* TSO */
2222 		map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2223 		use_tpd = tpd;
2224 
2225 		buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2226 		buffer_info->length = map_len;
2227 		buffer_info->dma = dma_map_single(&adapter->pdev->dev,
2228 						  skb->data, hdr_len,
2229 						  DMA_TO_DEVICE);
2230 		if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
2231 			goto err_dma;
2232 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2233 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2234 			ATL1C_PCIMAP_TODEVICE);
2235 		mapped_len += map_len;
2236 		use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2237 		use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2238 	}
2239 
2240 	if (mapped_len < buf_len) {
2241 		/* mapped_len == 0, means we should use the first tpd,
2242 		   which is given by caller  */
2243 		if (mapped_len == 0)
2244 			use_tpd = tpd;
2245 		else {
2246 			use_tpd = atl1c_get_tpd(adapter, queue);
2247 			memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2248 		}
2249 		buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2250 		buffer_info->length = buf_len - mapped_len;
2251 		buffer_info->dma =
2252 			dma_map_single(&adapter->pdev->dev,
2253 				       skb->data + mapped_len,
2254 				       buffer_info->length, DMA_TO_DEVICE);
2255 		if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
2256 			goto err_dma;
2257 
2258 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2259 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2260 			ATL1C_PCIMAP_TODEVICE);
2261 		use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2262 		use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
2263 	}
2264 
2265 	for (f = 0; f < nr_frags; f++) {
2266 		skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
2267 
2268 		use_tpd = atl1c_get_tpd(adapter, queue);
2269 		memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2270 
2271 		buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2272 		buffer_info->length = skb_frag_size(frag);
2273 		buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2274 						    frag, 0,
2275 						    buffer_info->length,
2276 						    DMA_TO_DEVICE);
2277 		if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))
2278 			goto err_dma;
2279 
2280 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2281 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2282 			ATL1C_PCIMAP_TODEVICE);
2283 		use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2284 		use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
2285 	}
2286 
2287 	/* The last tpd */
2288 	use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2289 	/* The last buffer info contain the skb address,
2290 	   so it will be free after unmap */
2291 	buffer_info->skb = skb;
2292 
2293 	return 0;
2294 
2295 err_dma:
2296 	buffer_info->dma = 0;
2297 	buffer_info->length = 0;
2298 	return -1;
2299 }
2300 
2301 static void atl1c_tx_queue(struct atl1c_adapter *adapter, u32 queue)
2302 {
2303 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
2304 
2305 	AT_WRITE_REGW(&adapter->hw, atl1c_qregs[queue].tpd_prod,
2306 		      tpd_ring->next_to_use);
2307 }
2308 
2309 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2310 					  struct net_device *netdev)
2311 {
2312 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2313 	u32 queue = skb_get_queue_mapping(skb);
2314 	struct netdev_queue *txq = netdev_get_tx_queue(netdev, queue);
2315 	struct atl1c_tpd_desc *tpd;
2316 	u16 tpd_req;
2317 
2318 	if (test_bit(__AT_DOWN, &adapter->flags)) {
2319 		dev_kfree_skb_any(skb);
2320 		return NETDEV_TX_OK;
2321 	}
2322 
2323 	tpd_req = atl1c_cal_tpd_req(skb);
2324 
2325 	if (atl1c_tpd_avail(adapter, queue) < tpd_req) {
2326 		/* no enough descriptor, just stop queue */
2327 		atl1c_tx_queue(adapter, queue);
2328 		netif_tx_stop_queue(txq);
2329 		return NETDEV_TX_BUSY;
2330 	}
2331 
2332 	tpd = atl1c_get_tpd(adapter, queue);
2333 
2334 	/* do TSO and check sum */
2335 	if (atl1c_tso_csum(adapter, skb, &tpd, queue) != 0) {
2336 		atl1c_tx_queue(adapter, queue);
2337 		dev_kfree_skb_any(skb);
2338 		return NETDEV_TX_OK;
2339 	}
2340 
2341 	if (unlikely(skb_vlan_tag_present(skb))) {
2342 		u16 vlan = skb_vlan_tag_get(skb);
2343 		__le16 tag;
2344 
2345 		vlan = cpu_to_le16(vlan);
2346 		AT_VLAN_TO_TAG(vlan, tag);
2347 		tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2348 		tpd->vlan_tag = tag;
2349 	}
2350 
2351 	if (skb_network_offset(skb) != ETH_HLEN)
2352 		tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2353 
2354 	if (atl1c_tx_map(adapter, skb, tpd, queue) < 0) {
2355 		netif_info(adapter, tx_done, adapter->netdev,
2356 			   "tx-skb dropped due to dma error\n");
2357 		/* roll back tpd/buffer */
2358 		atl1c_tx_rollback(adapter, tpd, queue);
2359 		dev_kfree_skb_any(skb);
2360 	} else {
2361 		bool more = netdev_xmit_more();
2362 
2363 		if (__netdev_tx_sent_queue(txq, skb->len, more))
2364 			atl1c_tx_queue(adapter, queue);
2365 	}
2366 
2367 	return NETDEV_TX_OK;
2368 }
2369 
2370 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2371 {
2372 	struct net_device *netdev = adapter->netdev;
2373 
2374 	free_irq(adapter->pdev->irq, netdev);
2375 
2376 	if (adapter->have_msi)
2377 		pci_disable_msi(adapter->pdev);
2378 }
2379 
2380 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2381 {
2382 	struct pci_dev    *pdev   = adapter->pdev;
2383 	struct net_device *netdev = adapter->netdev;
2384 	int flags = 0;
2385 	int err = 0;
2386 
2387 	adapter->have_msi = true;
2388 	err = pci_enable_msi(adapter->pdev);
2389 	if (err) {
2390 		if (netif_msg_ifup(adapter))
2391 			dev_err(&pdev->dev,
2392 				"Unable to allocate MSI interrupt Error: %d\n",
2393 				err);
2394 		adapter->have_msi = false;
2395 	}
2396 
2397 	if (!adapter->have_msi)
2398 		flags |= IRQF_SHARED;
2399 	err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2400 			netdev->name, netdev);
2401 	if (err) {
2402 		if (netif_msg_ifup(adapter))
2403 			dev_err(&pdev->dev,
2404 				"Unable to allocate interrupt Error: %d\n",
2405 				err);
2406 		if (adapter->have_msi)
2407 			pci_disable_msi(adapter->pdev);
2408 		return err;
2409 	}
2410 	if (netif_msg_ifup(adapter))
2411 		dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2412 	return err;
2413 }
2414 
2415 
2416 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
2417 {
2418 	int i;
2419 	/* release tx-pending skbs and reset tx/rx ring index */
2420 	for (i = 0; i < adapter->tx_queue_count; ++i)
2421 		atl1c_clean_tx_ring(adapter, i);
2422 	for (i = 0; i < adapter->rx_queue_count; ++i)
2423 		atl1c_clean_rx_ring(adapter, i);
2424 }
2425 
2426 static int atl1c_up(struct atl1c_adapter *adapter)
2427 {
2428 	struct net_device *netdev = adapter->netdev;
2429 	int err;
2430 	int i;
2431 
2432 	netif_carrier_off(netdev);
2433 
2434 	err = atl1c_configure(adapter);
2435 	if (unlikely(err))
2436 		goto err_up;
2437 
2438 	err = atl1c_request_irq(adapter);
2439 	if (unlikely(err))
2440 		goto err_up;
2441 
2442 	atl1c_check_link_status(adapter);
2443 	clear_bit(__AT_DOWN, &adapter->flags);
2444 	for (i = 0; i < adapter->tx_queue_count; ++i)
2445 		napi_enable(&adapter->tpd_ring[i].napi);
2446 	for (i = 0; i < adapter->rx_queue_count; ++i)
2447 		napi_enable(&adapter->rrd_ring[i].napi);
2448 	atl1c_irq_enable(adapter);
2449 	netif_start_queue(netdev);
2450 	return err;
2451 
2452 err_up:
2453 	for (i = 0; i < adapter->rx_queue_count; ++i)
2454 		atl1c_clean_rx_ring(adapter, i);
2455 	return err;
2456 }
2457 
2458 static void atl1c_down(struct atl1c_adapter *adapter)
2459 {
2460 	struct net_device *netdev = adapter->netdev;
2461 	int i;
2462 
2463 	atl1c_del_timer(adapter);
2464 	adapter->work_event = 0; /* clear all event */
2465 	/* signal that we're down so the interrupt handler does not
2466 	 * reschedule our watchdog timer */
2467 	set_bit(__AT_DOWN, &adapter->flags);
2468 	netif_carrier_off(netdev);
2469 	for (i = 0; i < adapter->tx_queue_count; ++i)
2470 		napi_disable(&adapter->tpd_ring[i].napi);
2471 	for (i = 0; i < adapter->rx_queue_count; ++i)
2472 		napi_disable(&adapter->rrd_ring[i].napi);
2473 	atl1c_irq_disable(adapter);
2474 	atl1c_free_irq(adapter);
2475 	/* disable ASPM if device inactive */
2476 	atl1c_disable_l0s_l1(&adapter->hw);
2477 	/* reset MAC to disable all RX/TX */
2478 	atl1c_reset_mac(&adapter->hw);
2479 	msleep(1);
2480 
2481 	adapter->link_speed = SPEED_0;
2482 	adapter->link_duplex = -1;
2483 	atl1c_reset_dma_ring(adapter);
2484 }
2485 
2486 /**
2487  * atl1c_open - Called when a network interface is made active
2488  * @netdev: network interface device structure
2489  *
2490  * Returns 0 on success, negative value on failure
2491  *
2492  * The open entry point is called when a network interface is made
2493  * active by the system (IFF_UP).  At this point all resources needed
2494  * for transmit and receive operations are allocated, the interrupt
2495  * handler is registered with the OS, the watchdog timer is started,
2496  * and the stack is notified that the interface is ready.
2497  */
2498 static int atl1c_open(struct net_device *netdev)
2499 {
2500 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2501 	int err;
2502 
2503 	/* disallow open during test */
2504 	if (test_bit(__AT_TESTING, &adapter->flags))
2505 		return -EBUSY;
2506 
2507 	/* allocate rx/tx dma buffer & descriptors */
2508 	err = atl1c_setup_ring_resources(adapter);
2509 	if (unlikely(err))
2510 		return err;
2511 
2512 	err = atl1c_up(adapter);
2513 	if (unlikely(err))
2514 		goto err_up;
2515 
2516 	return 0;
2517 
2518 err_up:
2519 	atl1c_free_irq(adapter);
2520 	atl1c_free_ring_resources(adapter);
2521 	atl1c_reset_mac(&adapter->hw);
2522 	return err;
2523 }
2524 
2525 /**
2526  * atl1c_close - Disables a network interface
2527  * @netdev: network interface device structure
2528  *
2529  * Returns 0, this is not allowed to fail
2530  *
2531  * The close entry point is called when an interface is de-activated
2532  * by the OS.  The hardware is still under the drivers control, but
2533  * needs to be disabled.  A global MAC reset is issued to stop the
2534  * hardware, and all transmit and receive resources are freed.
2535  */
2536 static int atl1c_close(struct net_device *netdev)
2537 {
2538 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2539 
2540 	WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2541 	set_bit(__AT_DOWN, &adapter->flags);
2542 	cancel_work_sync(&adapter->common_task);
2543 	atl1c_down(adapter);
2544 	atl1c_free_ring_resources(adapter);
2545 	return 0;
2546 }
2547 
2548 static int atl1c_suspend(struct device *dev)
2549 {
2550 	struct net_device *netdev = dev_get_drvdata(dev);
2551 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2552 	struct atl1c_hw *hw = &adapter->hw;
2553 	u32 wufc = adapter->wol;
2554 
2555 	atl1c_disable_l0s_l1(hw);
2556 	if (netif_running(netdev)) {
2557 		WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2558 		atl1c_down(adapter);
2559 	}
2560 	netif_device_detach(netdev);
2561 
2562 	if (wufc)
2563 		if (atl1c_phy_to_ps_link(hw) != 0)
2564 			dev_dbg(dev, "phy power saving failed");
2565 
2566 	atl1c_power_saving(hw, wufc);
2567 
2568 	return 0;
2569 }
2570 
2571 #ifdef CONFIG_PM_SLEEP
2572 static int atl1c_resume(struct device *dev)
2573 {
2574 	struct net_device *netdev = dev_get_drvdata(dev);
2575 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2576 
2577 	AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2578 	atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2579 
2580 	atl1c_phy_reset(&adapter->hw);
2581 	atl1c_reset_mac(&adapter->hw);
2582 	atl1c_phy_init(&adapter->hw);
2583 
2584 	netif_device_attach(netdev);
2585 	if (netif_running(netdev))
2586 		atl1c_up(adapter);
2587 
2588 	return 0;
2589 }
2590 #endif
2591 
2592 static void atl1c_shutdown(struct pci_dev *pdev)
2593 {
2594 	struct net_device *netdev = pci_get_drvdata(pdev);
2595 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2596 
2597 	atl1c_suspend(&pdev->dev);
2598 	pci_wake_from_d3(pdev, adapter->wol);
2599 	pci_set_power_state(pdev, PCI_D3hot);
2600 }
2601 
2602 static const struct net_device_ops atl1c_netdev_ops = {
2603 	.ndo_open		= atl1c_open,
2604 	.ndo_stop		= atl1c_close,
2605 	.ndo_validate_addr	= eth_validate_addr,
2606 	.ndo_start_xmit		= atl1c_xmit_frame,
2607 	.ndo_set_mac_address	= atl1c_set_mac_addr,
2608 	.ndo_set_rx_mode	= atl1c_set_multi,
2609 	.ndo_change_mtu		= atl1c_change_mtu,
2610 	.ndo_fix_features	= atl1c_fix_features,
2611 	.ndo_set_features	= atl1c_set_features,
2612 	.ndo_eth_ioctl		= atl1c_ioctl,
2613 	.ndo_tx_timeout		= atl1c_tx_timeout,
2614 	.ndo_get_stats		= atl1c_get_stats,
2615 #ifdef CONFIG_NET_POLL_CONTROLLER
2616 	.ndo_poll_controller	= atl1c_netpoll,
2617 #endif
2618 };
2619 
2620 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2621 {
2622 	SET_NETDEV_DEV(netdev, &pdev->dev);
2623 	pci_set_drvdata(pdev, netdev);
2624 
2625 	netdev->netdev_ops = &atl1c_netdev_ops;
2626 	netdev->watchdog_timeo = AT_TX_WATCHDOG;
2627 	netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
2628 	atl1c_set_ethtool_ops(netdev);
2629 
2630 	/* TODO: add when ready */
2631 	netdev->hw_features =	NETIF_F_SG		|
2632 				NETIF_F_HW_CSUM		|
2633 				NETIF_F_HW_VLAN_CTAG_RX	|
2634 				NETIF_F_TSO		|
2635 				NETIF_F_TSO6;
2636 	netdev->features =	netdev->hw_features	|
2637 				NETIF_F_HW_VLAN_CTAG_TX;
2638 	return 0;
2639 }
2640 
2641 /**
2642  * atl1c_probe - Device Initialization Routine
2643  * @pdev: PCI device information struct
2644  * @ent: entry in atl1c_pci_tbl
2645  *
2646  * Returns 0 on success, negative on failure
2647  *
2648  * atl1c_probe initializes an adapter identified by a pci_dev structure.
2649  * The OS initialization, configuring of the adapter private structure,
2650  * and a hardware reset occur.
2651  */
2652 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2653 {
2654 	struct net_device *netdev;
2655 	struct atl1c_adapter *adapter;
2656 	static int cards_found;
2657 	u8 __iomem *hw_addr;
2658 	enum atl1c_nic_type nic_type;
2659 	u32 queue_count = 1;
2660 	int err = 0;
2661 	int i;
2662 
2663 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
2664 	err = pci_enable_device_mem(pdev);
2665 	if (err) {
2666 		dev_err(&pdev->dev, "cannot enable PCI device\n");
2667 		return err;
2668 	}
2669 
2670 	/*
2671 	 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2672 	 * shared register for the high 32 bits, so only a single, aligned,
2673 	 * 4 GB physical address range can be used at a time.
2674 	 *
2675 	 * Supporting 64-bit DMA on this hardware is more trouble than it's
2676 	 * worth.  It is far easier to limit to 32-bit DMA than update
2677 	 * various kernel subsystems to support the mechanics required by a
2678 	 * fixed-high-32-bit system.
2679 	 */
2680 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2681 	if (err) {
2682 		dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2683 		goto err_dma;
2684 	}
2685 
2686 	err = pci_request_regions(pdev, atl1c_driver_name);
2687 	if (err) {
2688 		dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2689 		goto err_pci_reg;
2690 	}
2691 
2692 	pci_set_master(pdev);
2693 
2694 	hw_addr = pci_ioremap_bar(pdev, 0);
2695 	if (!hw_addr) {
2696 		err = -EIO;
2697 		dev_err(&pdev->dev, "cannot map device registers\n");
2698 		goto err_ioremap;
2699 	}
2700 
2701 	nic_type = atl1c_get_mac_type(pdev, hw_addr);
2702 	if (nic_type == athr_mt)
2703 		queue_count = 4;
2704 
2705 	netdev = alloc_etherdev_mq(sizeof(struct atl1c_adapter), queue_count);
2706 	if (netdev == NULL) {
2707 		err = -ENOMEM;
2708 		goto err_alloc_etherdev;
2709 	}
2710 
2711 	err = atl1c_init_netdev(netdev, pdev);
2712 	if (err) {
2713 		dev_err(&pdev->dev, "init netdevice failed\n");
2714 		goto err_init_netdev;
2715 	}
2716 	adapter = netdev_priv(netdev);
2717 	adapter->bd_number = cards_found;
2718 	adapter->netdev = netdev;
2719 	adapter->pdev = pdev;
2720 	adapter->hw.adapter = adapter;
2721 	adapter->hw.nic_type = nic_type;
2722 	adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2723 	adapter->hw.hw_addr = hw_addr;
2724 	adapter->tx_queue_count = queue_count;
2725 	adapter->rx_queue_count = queue_count;
2726 
2727 	/* init mii data */
2728 	adapter->mii.dev = netdev;
2729 	adapter->mii.mdio_read  = atl1c_mdio_read;
2730 	adapter->mii.mdio_write = atl1c_mdio_write;
2731 	adapter->mii.phy_id_mask = 0x1f;
2732 	adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
2733 	dev_set_threaded(netdev, true);
2734 	for (i = 0; i < adapter->rx_queue_count; ++i)
2735 		netif_napi_add(netdev, &adapter->rrd_ring[i].napi,
2736 			       atl1c_clean_rx, 64);
2737 	for (i = 0; i < adapter->tx_queue_count; ++i)
2738 		netif_napi_add(netdev, &adapter->tpd_ring[i].napi,
2739 			       atl1c_clean_tx, 64);
2740 	timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0);
2741 	/* setup the private structure */
2742 	err = atl1c_sw_init(adapter);
2743 	if (err) {
2744 		dev_err(&pdev->dev, "net device private data init failed\n");
2745 		goto err_sw_init;
2746 	}
2747 	/* set max MTU */
2748 	atl1c_set_max_mtu(netdev);
2749 
2750 	atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2751 
2752 	/* Init GPHY as early as possible due to power saving issue  */
2753 	atl1c_phy_reset(&adapter->hw);
2754 
2755 	err = atl1c_reset_mac(&adapter->hw);
2756 	if (err) {
2757 		err = -EIO;
2758 		goto err_reset;
2759 	}
2760 
2761 	/* reset the controller to
2762 	 * put the device in a known good starting state */
2763 	err = atl1c_phy_init(&adapter->hw);
2764 	if (err) {
2765 		err = -EIO;
2766 		goto err_reset;
2767 	}
2768 	if (atl1c_read_mac_addr(&adapter->hw)) {
2769 		/* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2770 		netdev->addr_assign_type = NET_ADDR_RANDOM;
2771 	}
2772 	memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2773 	if (netif_msg_probe(adapter))
2774 		dev_dbg(&pdev->dev, "mac address : %pM\n",
2775 			adapter->hw.mac_addr);
2776 
2777 	atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
2778 	INIT_WORK(&adapter->common_task, atl1c_common_task);
2779 	adapter->work_event = 0;
2780 	err = register_netdev(netdev);
2781 	if (err) {
2782 		dev_err(&pdev->dev, "register netdevice failed\n");
2783 		goto err_register;
2784 	}
2785 
2786 	cards_found++;
2787 	return 0;
2788 
2789 err_reset:
2790 err_register:
2791 err_sw_init:
2792 err_init_netdev:
2793 	free_netdev(netdev);
2794 err_alloc_etherdev:
2795 	iounmap(hw_addr);
2796 err_ioremap:
2797 	pci_release_regions(pdev);
2798 err_pci_reg:
2799 err_dma:
2800 	pci_disable_device(pdev);
2801 	return err;
2802 }
2803 
2804 /**
2805  * atl1c_remove - Device Removal Routine
2806  * @pdev: PCI device information struct
2807  *
2808  * atl1c_remove is called by the PCI subsystem to alert the driver
2809  * that it should release a PCI device.  The could be caused by a
2810  * Hot-Plug event, or because the driver is going to be removed from
2811  * memory.
2812  */
2813 static void atl1c_remove(struct pci_dev *pdev)
2814 {
2815 	struct net_device *netdev = pci_get_drvdata(pdev);
2816 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2817 
2818 	unregister_netdev(netdev);
2819 	/* restore permanent address */
2820 	atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
2821 	atl1c_phy_disable(&adapter->hw);
2822 
2823 	iounmap(adapter->hw.hw_addr);
2824 
2825 	pci_release_regions(pdev);
2826 	pci_disable_device(pdev);
2827 	free_netdev(netdev);
2828 }
2829 
2830 /**
2831  * atl1c_io_error_detected - called when PCI error is detected
2832  * @pdev: Pointer to PCI device
2833  * @state: The current pci connection state
2834  *
2835  * This function is called after a PCI bus error affecting
2836  * this device has been detected.
2837  */
2838 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2839 						pci_channel_state_t state)
2840 {
2841 	struct net_device *netdev = pci_get_drvdata(pdev);
2842 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2843 
2844 	netif_device_detach(netdev);
2845 
2846 	if (state == pci_channel_io_perm_failure)
2847 		return PCI_ERS_RESULT_DISCONNECT;
2848 
2849 	if (netif_running(netdev))
2850 		atl1c_down(adapter);
2851 
2852 	pci_disable_device(pdev);
2853 
2854 	/* Request a slot slot reset. */
2855 	return PCI_ERS_RESULT_NEED_RESET;
2856 }
2857 
2858 /**
2859  * atl1c_io_slot_reset - called after the pci bus has been reset.
2860  * @pdev: Pointer to PCI device
2861  *
2862  * Restart the card from scratch, as if from a cold-boot. Implementation
2863  * resembles the first-half of the e1000_resume routine.
2864  */
2865 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2866 {
2867 	struct net_device *netdev = pci_get_drvdata(pdev);
2868 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2869 
2870 	if (pci_enable_device(pdev)) {
2871 		if (netif_msg_hw(adapter))
2872 			dev_err(&pdev->dev,
2873 				"Cannot re-enable PCI device after reset\n");
2874 		return PCI_ERS_RESULT_DISCONNECT;
2875 	}
2876 	pci_set_master(pdev);
2877 
2878 	pci_enable_wake(pdev, PCI_D3hot, 0);
2879 	pci_enable_wake(pdev, PCI_D3cold, 0);
2880 
2881 	atl1c_reset_mac(&adapter->hw);
2882 
2883 	return PCI_ERS_RESULT_RECOVERED;
2884 }
2885 
2886 /**
2887  * atl1c_io_resume - called when traffic can start flowing again.
2888  * @pdev: Pointer to PCI device
2889  *
2890  * This callback is called when the error recovery driver tells us that
2891  * its OK to resume normal operation. Implementation resembles the
2892  * second-half of the atl1c_resume routine.
2893  */
2894 static void atl1c_io_resume(struct pci_dev *pdev)
2895 {
2896 	struct net_device *netdev = pci_get_drvdata(pdev);
2897 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2898 
2899 	if (netif_running(netdev)) {
2900 		if (atl1c_up(adapter)) {
2901 			if (netif_msg_hw(adapter))
2902 				dev_err(&pdev->dev,
2903 					"Cannot bring device back up after reset\n");
2904 			return;
2905 		}
2906 	}
2907 
2908 	netif_device_attach(netdev);
2909 }
2910 
2911 static const struct pci_error_handlers atl1c_err_handler = {
2912 	.error_detected = atl1c_io_error_detected,
2913 	.slot_reset = atl1c_io_slot_reset,
2914 	.resume = atl1c_io_resume,
2915 };
2916 
2917 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2918 
2919 static struct pci_driver atl1c_driver = {
2920 	.name     = atl1c_driver_name,
2921 	.id_table = atl1c_pci_tbl,
2922 	.probe    = atl1c_probe,
2923 	.remove   = atl1c_remove,
2924 	.shutdown = atl1c_shutdown,
2925 	.err_handler = &atl1c_err_handler,
2926 	.driver.pm = &atl1c_pm_ops,
2927 };
2928 
2929 module_pci_driver(atl1c_driver);
2930