1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 28 /* 29 * atl1c_pci_tbl - PCI Device ID Table 30 * 31 * Wildcard entries (PCI_ANY_ID) should come last 32 * Last entry must be all 0s 33 * 34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 35 * Class, Class Mask, private data (not used) } 36 */ 37 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { 38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 44 /* required last entry */ 45 { 0 } 46 }; 47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 48 49 MODULE_AUTHOR("Jie Yang"); 50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 51 MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver"); 52 MODULE_LICENSE("GPL"); 53 MODULE_VERSION(ATL1C_DRV_VERSION); 54 55 static int atl1c_stop_mac(struct atl1c_hw *hw); 56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 58 static void atl1c_start_mac(struct atl1c_adapter *adapter); 59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 60 int *work_done, int work_to_do); 61 static int atl1c_up(struct atl1c_adapter *adapter); 62 static void atl1c_down(struct atl1c_adapter *adapter); 63 static int atl1c_reset_mac(struct atl1c_hw *hw); 64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 65 static int atl1c_configure(struct atl1c_adapter *adapter); 66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter); 67 68 static const u16 atl1c_pay_load_size[] = { 69 128, 256, 512, 1024, 2048, 4096, 70 }; 71 72 73 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 74 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 75 static void atl1c_pcie_patch(struct atl1c_hw *hw) 76 { 77 u32 mst_data, data; 78 79 /* pclk sel could switch to 25M */ 80 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 81 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 82 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 83 84 /* WoL/PCIE related settings */ 85 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 86 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 87 data |= PCIE_PHYMISC_FORCE_RCV_DET; 88 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 89 } else { /* new dev set bit5 of MASTER */ 90 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 91 AT_WRITE_REG(hw, REG_MASTER_CTRL, 92 mst_data | MASTER_CTRL_WAKEN_25M); 93 } 94 /* aspm/PCIE setting only for l2cb 1.0 */ 95 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 96 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 97 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 98 L2CB1_PCIE_PHYMISC2_CDR_BW); 99 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 100 L2CB1_PCIE_PHYMISC2_L0S_TH); 101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 102 /* extend L1 sync timer */ 103 AT_READ_REG(hw, REG_LINK_CTRL, &data); 104 data |= LINK_CTRL_EXT_SYNC; 105 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 106 } 107 /* l2cb 1.x & l1d 1.x */ 108 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 109 AT_READ_REG(hw, REG_PM_CTRL, &data); 110 data |= PM_CTRL_L0S_BUFSRX_EN; 111 AT_WRITE_REG(hw, REG_PM_CTRL, data); 112 /* clear vendor msg */ 113 AT_READ_REG(hw, REG_DMA_DBG, &data); 114 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 115 } 116 } 117 118 /* FIXME: no need any more ? */ 119 /* 120 * atl1c_init_pcie - init PCIE module 121 */ 122 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 123 { 124 u32 data; 125 u32 pci_cmd; 126 struct pci_dev *pdev = hw->adapter->pdev; 127 int pos; 128 129 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 130 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 131 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 132 PCI_COMMAND_IO); 133 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 134 135 /* 136 * Clear any PowerSaveing Settings 137 */ 138 pci_enable_wake(pdev, PCI_D3hot, 0); 139 pci_enable_wake(pdev, PCI_D3cold, 0); 140 /* wol sts read-clear */ 141 AT_READ_REG(hw, REG_WOL_CTRL, &data); 142 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 143 144 /* 145 * Mask some pcie error bits 146 */ 147 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 148 if (pos) { 149 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 150 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 151 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 152 } 153 /* clear error status */ 154 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, 155 PCI_EXP_DEVSTA_NFED | 156 PCI_EXP_DEVSTA_FED | 157 PCI_EXP_DEVSTA_CED | 158 PCI_EXP_DEVSTA_URD); 159 160 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 161 data &= ~LTSSM_ID_EN_WRO; 162 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 163 164 atl1c_pcie_patch(hw); 165 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 166 atl1c_disable_l0s_l1(hw); 167 168 msleep(5); 169 } 170 171 /** 172 * atl1c_irq_enable - Enable default interrupt generation settings 173 * @adapter: board private structure 174 */ 175 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 176 { 177 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 178 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 179 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 180 AT_WRITE_FLUSH(&adapter->hw); 181 } 182 } 183 184 /** 185 * atl1c_irq_disable - Mask off interrupt generation on the NIC 186 * @adapter: board private structure 187 */ 188 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 189 { 190 atomic_inc(&adapter->irq_sem); 191 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 192 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 193 AT_WRITE_FLUSH(&adapter->hw); 194 synchronize_irq(adapter->pdev->irq); 195 } 196 197 /** 198 * atl1c_irq_reset - reset interrupt confiure on the NIC 199 * @adapter: board private structure 200 */ 201 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 202 { 203 atomic_set(&adapter->irq_sem, 1); 204 atl1c_irq_enable(adapter); 205 } 206 207 /* 208 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 209 * of the idle status register until the device is actually idle 210 */ 211 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 212 { 213 int timeout; 214 u32 data; 215 216 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 217 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 218 if ((data & modu_ctrl) == 0) 219 return 0; 220 msleep(1); 221 } 222 return data; 223 } 224 225 /** 226 * atl1c_phy_config - Timer Call-back 227 * @data: pointer to netdev cast into an unsigned long 228 */ 229 static void atl1c_phy_config(unsigned long data) 230 { 231 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 232 struct atl1c_hw *hw = &adapter->hw; 233 unsigned long flags; 234 235 spin_lock_irqsave(&adapter->mdio_lock, flags); 236 atl1c_restart_autoneg(hw); 237 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 238 } 239 240 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 241 { 242 WARN_ON(in_interrupt()); 243 atl1c_down(adapter); 244 atl1c_up(adapter); 245 clear_bit(__AT_RESETTING, &adapter->flags); 246 } 247 248 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 249 { 250 struct atl1c_hw *hw = &adapter->hw; 251 struct net_device *netdev = adapter->netdev; 252 struct pci_dev *pdev = adapter->pdev; 253 int err; 254 unsigned long flags; 255 u16 speed, duplex, phy_data; 256 257 spin_lock_irqsave(&adapter->mdio_lock, flags); 258 /* MII_BMSR must read twise */ 259 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 260 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 261 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 262 263 if ((phy_data & BMSR_LSTATUS) == 0) { 264 /* link down */ 265 netif_carrier_off(netdev); 266 hw->hibernate = true; 267 if (atl1c_reset_mac(hw) != 0) 268 if (netif_msg_hw(adapter)) 269 dev_warn(&pdev->dev, "reset mac failed\n"); 270 atl1c_set_aspm(hw, SPEED_0); 271 atl1c_post_phy_linkchg(hw, SPEED_0); 272 atl1c_reset_dma_ring(adapter); 273 atl1c_configure(adapter); 274 } else { 275 /* Link Up */ 276 hw->hibernate = false; 277 spin_lock_irqsave(&adapter->mdio_lock, flags); 278 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 279 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 280 if (unlikely(err)) 281 return; 282 /* link result is our setting */ 283 if (adapter->link_speed != speed || 284 adapter->link_duplex != duplex) { 285 adapter->link_speed = speed; 286 adapter->link_duplex = duplex; 287 atl1c_set_aspm(hw, speed); 288 atl1c_post_phy_linkchg(hw, speed); 289 atl1c_start_mac(adapter); 290 if (netif_msg_link(adapter)) 291 dev_info(&pdev->dev, 292 "%s: %s NIC Link is Up<%d Mbps %s>\n", 293 atl1c_driver_name, netdev->name, 294 adapter->link_speed, 295 adapter->link_duplex == FULL_DUPLEX ? 296 "Full Duplex" : "Half Duplex"); 297 } 298 if (!netif_carrier_ok(netdev)) 299 netif_carrier_on(netdev); 300 } 301 } 302 303 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 304 { 305 struct net_device *netdev = adapter->netdev; 306 struct pci_dev *pdev = adapter->pdev; 307 u16 phy_data; 308 u16 link_up; 309 310 spin_lock(&adapter->mdio_lock); 311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 312 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 313 spin_unlock(&adapter->mdio_lock); 314 link_up = phy_data & BMSR_LSTATUS; 315 /* notify upper layer link down ASAP */ 316 if (!link_up) { 317 if (netif_carrier_ok(netdev)) { 318 /* old link state: Up */ 319 netif_carrier_off(netdev); 320 if (netif_msg_link(adapter)) 321 dev_info(&pdev->dev, 322 "%s: %s NIC Link is Down\n", 323 atl1c_driver_name, netdev->name); 324 adapter->link_speed = SPEED_0; 325 } 326 } 327 328 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 329 schedule_work(&adapter->common_task); 330 } 331 332 static void atl1c_common_task(struct work_struct *work) 333 { 334 struct atl1c_adapter *adapter; 335 struct net_device *netdev; 336 337 adapter = container_of(work, struct atl1c_adapter, common_task); 338 netdev = adapter->netdev; 339 340 if (test_bit(__AT_DOWN, &adapter->flags)) 341 return; 342 343 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 344 netif_device_detach(netdev); 345 atl1c_down(adapter); 346 atl1c_up(adapter); 347 netif_device_attach(netdev); 348 } 349 350 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 351 &adapter->work_event)) { 352 atl1c_irq_disable(adapter); 353 atl1c_check_link_status(adapter); 354 atl1c_irq_enable(adapter); 355 } 356 } 357 358 359 static void atl1c_del_timer(struct atl1c_adapter *adapter) 360 { 361 del_timer_sync(&adapter->phy_config_timer); 362 } 363 364 365 /** 366 * atl1c_tx_timeout - Respond to a Tx Hang 367 * @netdev: network interface device structure 368 */ 369 static void atl1c_tx_timeout(struct net_device *netdev) 370 { 371 struct atl1c_adapter *adapter = netdev_priv(netdev); 372 373 /* Do the reset outside of interrupt context */ 374 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 375 schedule_work(&adapter->common_task); 376 } 377 378 /** 379 * atl1c_set_multi - Multicast and Promiscuous mode set 380 * @netdev: network interface device structure 381 * 382 * The set_multi entry point is called whenever the multicast address 383 * list or the network interface flags are updated. This routine is 384 * responsible for configuring the hardware for proper multicast, 385 * promiscuous mode, and all-multi behavior. 386 */ 387 static void atl1c_set_multi(struct net_device *netdev) 388 { 389 struct atl1c_adapter *adapter = netdev_priv(netdev); 390 struct atl1c_hw *hw = &adapter->hw; 391 struct netdev_hw_addr *ha; 392 u32 mac_ctrl_data; 393 u32 hash_value; 394 395 /* Check for Promiscuous and All Multicast modes */ 396 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 397 398 if (netdev->flags & IFF_PROMISC) { 399 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 400 } else if (netdev->flags & IFF_ALLMULTI) { 401 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 402 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 403 } else { 404 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 405 } 406 407 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 408 409 /* clear the old settings from the multicast hash table */ 410 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 411 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 412 413 /* comoute mc addresses' hash value ,and put it into hash table */ 414 netdev_for_each_mc_addr(ha, netdev) { 415 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 416 atl1c_hash_set(hw, hash_value); 417 } 418 } 419 420 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 421 { 422 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 423 /* enable VLAN tag insert/strip */ 424 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 425 } else { 426 /* disable VLAN tag insert/strip */ 427 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 428 } 429 } 430 431 static void atl1c_vlan_mode(struct net_device *netdev, 432 netdev_features_t features) 433 { 434 struct atl1c_adapter *adapter = netdev_priv(netdev); 435 struct pci_dev *pdev = adapter->pdev; 436 u32 mac_ctrl_data = 0; 437 438 if (netif_msg_pktdata(adapter)) 439 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 440 441 atl1c_irq_disable(adapter); 442 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 443 __atl1c_vlan_mode(features, &mac_ctrl_data); 444 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 445 atl1c_irq_enable(adapter); 446 } 447 448 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 449 { 450 struct pci_dev *pdev = adapter->pdev; 451 452 if (netif_msg_pktdata(adapter)) 453 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 454 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 455 } 456 457 /** 458 * atl1c_set_mac - Change the Ethernet Address of the NIC 459 * @netdev: network interface device structure 460 * @p: pointer to an address structure 461 * 462 * Returns 0 on success, negative on failure 463 */ 464 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 465 { 466 struct atl1c_adapter *adapter = netdev_priv(netdev); 467 struct sockaddr *addr = p; 468 469 if (!is_valid_ether_addr(addr->sa_data)) 470 return -EADDRNOTAVAIL; 471 472 if (netif_running(netdev)) 473 return -EBUSY; 474 475 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 476 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 477 478 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 479 480 return 0; 481 } 482 483 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 484 struct net_device *dev) 485 { 486 unsigned int head_size; 487 int mtu = dev->mtu; 488 489 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 490 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 491 492 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) + 493 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 494 adapter->rx_frag_size = roundup_pow_of_two(head_size); 495 } 496 497 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 498 netdev_features_t features) 499 { 500 /* 501 * Since there is no support for separate rx/tx vlan accel 502 * enable/disable make sure tx flag is always in same state as rx. 503 */ 504 if (features & NETIF_F_HW_VLAN_CTAG_RX) 505 features |= NETIF_F_HW_VLAN_CTAG_TX; 506 else 507 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 508 509 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 510 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 511 512 return features; 513 } 514 515 static int atl1c_set_features(struct net_device *netdev, 516 netdev_features_t features) 517 { 518 netdev_features_t changed = netdev->features ^ features; 519 520 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 521 atl1c_vlan_mode(netdev, features); 522 523 return 0; 524 } 525 526 /** 527 * atl1c_change_mtu - Change the Maximum Transfer Unit 528 * @netdev: network interface device structure 529 * @new_mtu: new value for maximum frame size 530 * 531 * Returns 0 on success, negative on failure 532 */ 533 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 534 { 535 struct atl1c_adapter *adapter = netdev_priv(netdev); 536 struct atl1c_hw *hw = &adapter->hw; 537 int old_mtu = netdev->mtu; 538 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 539 540 /* Fast Ethernet controller doesn't support jumbo packet */ 541 if (((hw->nic_type == athr_l2c || 542 hw->nic_type == athr_l2c_b || 543 hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) || 544 max_frame < ETH_ZLEN + ETH_FCS_LEN || 545 max_frame > MAX_JUMBO_FRAME_SIZE) { 546 if (netif_msg_link(adapter)) 547 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 548 return -EINVAL; 549 } 550 /* set MTU */ 551 if (old_mtu != new_mtu && netif_running(netdev)) { 552 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 553 msleep(1); 554 netdev->mtu = new_mtu; 555 adapter->hw.max_frame_size = new_mtu; 556 atl1c_set_rxbufsize(adapter, netdev); 557 atl1c_down(adapter); 558 netdev_update_features(netdev); 559 atl1c_up(adapter); 560 clear_bit(__AT_RESETTING, &adapter->flags); 561 } 562 return 0; 563 } 564 565 /* 566 * caller should hold mdio_lock 567 */ 568 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 569 { 570 struct atl1c_adapter *adapter = netdev_priv(netdev); 571 u16 result; 572 573 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 574 return result; 575 } 576 577 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 578 int reg_num, int val) 579 { 580 struct atl1c_adapter *adapter = netdev_priv(netdev); 581 582 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 583 } 584 585 static int atl1c_mii_ioctl(struct net_device *netdev, 586 struct ifreq *ifr, int cmd) 587 { 588 struct atl1c_adapter *adapter = netdev_priv(netdev); 589 struct pci_dev *pdev = adapter->pdev; 590 struct mii_ioctl_data *data = if_mii(ifr); 591 unsigned long flags; 592 int retval = 0; 593 594 if (!netif_running(netdev)) 595 return -EINVAL; 596 597 spin_lock_irqsave(&adapter->mdio_lock, flags); 598 switch (cmd) { 599 case SIOCGMIIPHY: 600 data->phy_id = 0; 601 break; 602 603 case SIOCGMIIREG: 604 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 605 &data->val_out)) { 606 retval = -EIO; 607 goto out; 608 } 609 break; 610 611 case SIOCSMIIREG: 612 if (data->reg_num & ~(0x1F)) { 613 retval = -EFAULT; 614 goto out; 615 } 616 617 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 618 data->reg_num, data->val_in); 619 if (atl1c_write_phy_reg(&adapter->hw, 620 data->reg_num, data->val_in)) { 621 retval = -EIO; 622 goto out; 623 } 624 break; 625 626 default: 627 retval = -EOPNOTSUPP; 628 break; 629 } 630 out: 631 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 632 return retval; 633 } 634 635 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 636 { 637 switch (cmd) { 638 case SIOCGMIIPHY: 639 case SIOCGMIIREG: 640 case SIOCSMIIREG: 641 return atl1c_mii_ioctl(netdev, ifr, cmd); 642 default: 643 return -EOPNOTSUPP; 644 } 645 } 646 647 /** 648 * atl1c_alloc_queues - Allocate memory for all rings 649 * @adapter: board private structure to initialize 650 * 651 */ 652 static int atl1c_alloc_queues(struct atl1c_adapter *adapter) 653 { 654 return 0; 655 } 656 657 static void atl1c_set_mac_type(struct atl1c_hw *hw) 658 { 659 switch (hw->device_id) { 660 case PCI_DEVICE_ID_ATTANSIC_L2C: 661 hw->nic_type = athr_l2c; 662 break; 663 case PCI_DEVICE_ID_ATTANSIC_L1C: 664 hw->nic_type = athr_l1c; 665 break; 666 case PCI_DEVICE_ID_ATHEROS_L2C_B: 667 hw->nic_type = athr_l2c_b; 668 break; 669 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 670 hw->nic_type = athr_l2c_b2; 671 break; 672 case PCI_DEVICE_ID_ATHEROS_L1D: 673 hw->nic_type = athr_l1d; 674 break; 675 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 676 hw->nic_type = athr_l1d_2; 677 break; 678 default: 679 break; 680 } 681 } 682 683 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 684 { 685 u32 link_ctrl_data; 686 687 atl1c_set_mac_type(hw); 688 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 689 690 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 691 ATL1C_TXQ_MODE_ENHANCE; 692 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 693 ATL1C_ASPM_L1_SUPPORT; 694 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 695 696 if (hw->nic_type == athr_l1c || 697 hw->nic_type == athr_l1d || 698 hw->nic_type == athr_l1d_2) 699 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 700 return 0; 701 } 702 703 struct atl1c_platform_patch { 704 u16 pci_did; 705 u8 pci_revid; 706 u16 subsystem_vid; 707 u16 subsystem_did; 708 u32 patch_flag; 709 #define ATL1C_LINK_PATCH 0x1 710 }; 711 static const struct atl1c_platform_patch plats[] = { 712 {0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 713 {0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 714 {0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 715 {0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 716 {0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 717 {0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 718 {0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 719 {0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 720 {0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 721 {0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 722 {0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 723 {0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 724 {0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 725 {0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 726 {0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 727 {0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 728 {0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 729 {0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 730 {0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 731 {0}, 732 }; 733 734 static void atl1c_patch_assign(struct atl1c_hw *hw) 735 { 736 struct pci_dev *pdev = hw->adapter->pdev; 737 u32 misc_ctrl; 738 int i = 0; 739 740 hw->msi_lnkpatch = false; 741 742 while (plats[i].pci_did != 0) { 743 if (plats[i].pci_did == hw->device_id && 744 plats[i].pci_revid == hw->revision_id && 745 plats[i].subsystem_vid == hw->subsystem_vendor_id && 746 plats[i].subsystem_did == hw->subsystem_id) { 747 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 748 hw->msi_lnkpatch = true; 749 } 750 i++; 751 } 752 753 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 && 754 hw->revision_id == L2CB_V21) { 755 /* config acess mode */ 756 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 757 REG_PCIE_DEV_MISC_CTRL); 758 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl); 759 misc_ctrl &= ~0x100; 760 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 761 REG_PCIE_DEV_MISC_CTRL); 762 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl); 763 } 764 } 765 /** 766 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 767 * @adapter: board private structure to initialize 768 * 769 * atl1c_sw_init initializes the Adapter private data structure. 770 * Fields are initialized based on PCI device information and 771 * OS network device settings (MTU size). 772 */ 773 static int atl1c_sw_init(struct atl1c_adapter *adapter) 774 { 775 struct atl1c_hw *hw = &adapter->hw; 776 struct pci_dev *pdev = adapter->pdev; 777 u32 revision; 778 779 780 adapter->wol = 0; 781 device_set_wakeup_enable(&pdev->dev, false); 782 adapter->link_speed = SPEED_0; 783 adapter->link_duplex = FULL_DUPLEX; 784 adapter->tpd_ring[0].count = 1024; 785 adapter->rfd_ring.count = 512; 786 787 hw->vendor_id = pdev->vendor; 788 hw->device_id = pdev->device; 789 hw->subsystem_vendor_id = pdev->subsystem_vendor; 790 hw->subsystem_id = pdev->subsystem_device; 791 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision); 792 hw->revision_id = revision & 0xFF; 793 /* before link up, we assume hibernate is true */ 794 hw->hibernate = true; 795 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 796 if (atl1c_setup_mac_funcs(hw) != 0) { 797 dev_err(&pdev->dev, "set mac function pointers failed\n"); 798 return -1; 799 } 800 atl1c_patch_assign(hw); 801 802 hw->intr_mask = IMR_NORMAL_MASK; 803 hw->phy_configured = false; 804 hw->preamble_len = 7; 805 hw->max_frame_size = adapter->netdev->mtu; 806 hw->autoneg_advertised = ADVERTISED_Autoneg; 807 hw->indirect_tab = 0xE4E4E4E4; 808 hw->base_cpu = 0; 809 810 hw->ict = 50000; /* 100ms */ 811 hw->smb_timer = 200000; /* 400ms */ 812 hw->rx_imt = 200; 813 hw->tx_imt = 1000; 814 815 hw->tpd_burst = 5; 816 hw->rfd_burst = 8; 817 hw->dma_order = atl1c_dma_ord_out; 818 hw->dmar_block = atl1c_dma_req_1024; 819 820 if (atl1c_alloc_queues(adapter)) { 821 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 822 return -ENOMEM; 823 } 824 /* TODO */ 825 atl1c_set_rxbufsize(adapter, adapter->netdev); 826 atomic_set(&adapter->irq_sem, 1); 827 spin_lock_init(&adapter->mdio_lock); 828 spin_lock_init(&adapter->tx_lock); 829 set_bit(__AT_DOWN, &adapter->flags); 830 831 return 0; 832 } 833 834 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 835 struct atl1c_buffer *buffer_info, int in_irq) 836 { 837 u16 pci_driection; 838 if (buffer_info->flags & ATL1C_BUFFER_FREE) 839 return; 840 if (buffer_info->dma) { 841 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 842 pci_driection = PCI_DMA_FROMDEVICE; 843 else 844 pci_driection = PCI_DMA_TODEVICE; 845 846 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 847 pci_unmap_single(pdev, buffer_info->dma, 848 buffer_info->length, pci_driection); 849 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 850 pci_unmap_page(pdev, buffer_info->dma, 851 buffer_info->length, pci_driection); 852 } 853 if (buffer_info->skb) { 854 if (in_irq) 855 dev_kfree_skb_irq(buffer_info->skb); 856 else 857 dev_kfree_skb(buffer_info->skb); 858 } 859 buffer_info->dma = 0; 860 buffer_info->skb = NULL; 861 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 862 } 863 /** 864 * atl1c_clean_tx_ring - Free Tx-skb 865 * @adapter: board private structure 866 */ 867 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 868 enum atl1c_trans_queue type) 869 { 870 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 871 struct atl1c_buffer *buffer_info; 872 struct pci_dev *pdev = adapter->pdev; 873 u16 index, ring_count; 874 875 ring_count = tpd_ring->count; 876 for (index = 0; index < ring_count; index++) { 877 buffer_info = &tpd_ring->buffer_info[index]; 878 atl1c_clean_buffer(pdev, buffer_info, 0); 879 } 880 881 /* Zero out Tx-buffers */ 882 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 883 ring_count); 884 atomic_set(&tpd_ring->next_to_clean, 0); 885 tpd_ring->next_to_use = 0; 886 } 887 888 /** 889 * atl1c_clean_rx_ring - Free rx-reservation skbs 890 * @adapter: board private structure 891 */ 892 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 893 { 894 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 895 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 896 struct atl1c_buffer *buffer_info; 897 struct pci_dev *pdev = adapter->pdev; 898 int j; 899 900 for (j = 0; j < rfd_ring->count; j++) { 901 buffer_info = &rfd_ring->buffer_info[j]; 902 atl1c_clean_buffer(pdev, buffer_info, 0); 903 } 904 /* zero out the descriptor ring */ 905 memset(rfd_ring->desc, 0, rfd_ring->size); 906 rfd_ring->next_to_clean = 0; 907 rfd_ring->next_to_use = 0; 908 rrd_ring->next_to_use = 0; 909 rrd_ring->next_to_clean = 0; 910 } 911 912 /* 913 * Read / Write Ptr Initialize: 914 */ 915 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 916 { 917 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 918 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 919 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 920 struct atl1c_buffer *buffer_info; 921 int i, j; 922 923 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 924 tpd_ring[i].next_to_use = 0; 925 atomic_set(&tpd_ring[i].next_to_clean, 0); 926 buffer_info = tpd_ring[i].buffer_info; 927 for (j = 0; j < tpd_ring->count; j++) 928 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 929 ATL1C_BUFFER_FREE); 930 } 931 rfd_ring->next_to_use = 0; 932 rfd_ring->next_to_clean = 0; 933 rrd_ring->next_to_use = 0; 934 rrd_ring->next_to_clean = 0; 935 for (j = 0; j < rfd_ring->count; j++) { 936 buffer_info = &rfd_ring->buffer_info[j]; 937 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 938 } 939 } 940 941 /** 942 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 943 * @adapter: board private structure 944 * 945 * Free all transmit software resources 946 */ 947 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 948 { 949 struct pci_dev *pdev = adapter->pdev; 950 951 pci_free_consistent(pdev, adapter->ring_header.size, 952 adapter->ring_header.desc, 953 adapter->ring_header.dma); 954 adapter->ring_header.desc = NULL; 955 956 /* Note: just free tdp_ring.buffer_info, 957 * it contain rfd_ring.buffer_info, do not double free */ 958 if (adapter->tpd_ring[0].buffer_info) { 959 kfree(adapter->tpd_ring[0].buffer_info); 960 adapter->tpd_ring[0].buffer_info = NULL; 961 } 962 if (adapter->rx_page) { 963 put_page(adapter->rx_page); 964 adapter->rx_page = NULL; 965 } 966 } 967 968 /** 969 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 970 * @adapter: board private structure 971 * 972 * Return 0 on success, negative on failure 973 */ 974 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 975 { 976 struct pci_dev *pdev = adapter->pdev; 977 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 978 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 979 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 980 struct atl1c_ring_header *ring_header = &adapter->ring_header; 981 int size; 982 int i; 983 int count = 0; 984 int rx_desc_count = 0; 985 u32 offset = 0; 986 987 rrd_ring->count = rfd_ring->count; 988 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 989 tpd_ring[i].count = tpd_ring[0].count; 990 991 /* 2 tpd queue, one high priority queue, 992 * another normal priority queue */ 993 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 994 rfd_ring->count); 995 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 996 if (unlikely(!tpd_ring->buffer_info)) 997 goto err_nomem; 998 999 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1000 tpd_ring[i].buffer_info = 1001 (tpd_ring->buffer_info + count); 1002 count += tpd_ring[i].count; 1003 } 1004 1005 rfd_ring->buffer_info = 1006 (tpd_ring->buffer_info + count); 1007 count += rfd_ring->count; 1008 rx_desc_count += rfd_ring->count; 1009 1010 /* 1011 * real ring DMA buffer 1012 * each ring/block may need up to 8 bytes for alignment, hence the 1013 * additional bytes tacked onto the end. 1014 */ 1015 ring_header->size = size = 1016 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 1017 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 1018 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 1019 8 * 4; 1020 1021 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, 1022 &ring_header->dma); 1023 if (unlikely(!ring_header->desc)) { 1024 dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); 1025 goto err_nomem; 1026 } 1027 memset(ring_header->desc, 0, ring_header->size); 1028 /* init TPD ring */ 1029 1030 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1031 offset = tpd_ring[0].dma - ring_header->dma; 1032 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1033 tpd_ring[i].dma = ring_header->dma + offset; 1034 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1035 tpd_ring[i].size = 1036 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1037 offset += roundup(tpd_ring[i].size, 8); 1038 } 1039 /* init RFD ring */ 1040 rfd_ring->dma = ring_header->dma + offset; 1041 rfd_ring->desc = (u8 *) ring_header->desc + offset; 1042 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 1043 offset += roundup(rfd_ring->size, 8); 1044 1045 /* init RRD ring */ 1046 rrd_ring->dma = ring_header->dma + offset; 1047 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1048 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1049 rrd_ring->count; 1050 offset += roundup(rrd_ring->size, 8); 1051 1052 return 0; 1053 1054 err_nomem: 1055 kfree(tpd_ring->buffer_info); 1056 return -ENOMEM; 1057 } 1058 1059 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1060 { 1061 struct atl1c_hw *hw = &adapter->hw; 1062 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1063 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1064 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1065 adapter->tpd_ring; 1066 1067 /* TPD */ 1068 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1069 (u32)((tpd_ring[atl1c_trans_normal].dma & 1070 AT_DMA_HI_ADDR_MASK) >> 32)); 1071 /* just enable normal priority TX queue */ 1072 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1073 (u32)(tpd_ring[atl1c_trans_normal].dma & 1074 AT_DMA_LO_ADDR_MASK)); 1075 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1076 (u32)(tpd_ring[atl1c_trans_high].dma & 1077 AT_DMA_LO_ADDR_MASK)); 1078 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1079 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1080 1081 1082 /* RFD */ 1083 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1084 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1085 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1086 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1087 1088 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1089 rfd_ring->count & RFD_RING_SIZE_MASK); 1090 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1091 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1092 1093 /* RRD */ 1094 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1095 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1096 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1097 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1098 1099 if (hw->nic_type == athr_l2c_b) { 1100 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1101 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1102 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1103 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1104 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1105 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1106 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1107 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1108 } 1109 /* Load all of base address above */ 1110 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1111 } 1112 1113 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1114 { 1115 struct atl1c_hw *hw = &adapter->hw; 1116 int max_pay_load; 1117 u16 tx_offload_thresh; 1118 u32 txq_ctrl_data; 1119 1120 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1121 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1122 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1123 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1124 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1125 /* 1126 * if BIOS had changed the dam-read-max-length to an invalid value, 1127 * restore it to default value 1128 */ 1129 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1130 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1131 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1132 } 1133 txq_ctrl_data = 1134 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1135 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1136 1137 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1138 } 1139 1140 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1141 { 1142 struct atl1c_hw *hw = &adapter->hw; 1143 u32 rxq_ctrl_data; 1144 1145 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1146 RXQ_RFD_BURST_NUM_SHIFT; 1147 1148 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1149 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1150 1151 /* aspm for gigabit */ 1152 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1153 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1154 ASPM_THRUPUT_LIMIT_100M); 1155 1156 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1157 } 1158 1159 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1160 { 1161 struct atl1c_hw *hw = &adapter->hw; 1162 u32 dma_ctrl_data; 1163 1164 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1165 DMA_CTRL_RREQ_PRI_DATA | 1166 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1167 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1168 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1169 1170 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1171 } 1172 1173 /* 1174 * Stop the mac, transmit and receive units 1175 * hw - Struct containing variables accessed by shared code 1176 * return : 0 or idle status (if error) 1177 */ 1178 static int atl1c_stop_mac(struct atl1c_hw *hw) 1179 { 1180 u32 data; 1181 1182 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1183 data &= ~RXQ_CTRL_EN; 1184 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1185 1186 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1187 data &= ~TXQ_CTRL_EN; 1188 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1189 1190 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1191 1192 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1193 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1194 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1195 1196 return (int)atl1c_wait_until_idle(hw, 1197 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1198 } 1199 1200 static void atl1c_start_mac(struct atl1c_adapter *adapter) 1201 { 1202 struct atl1c_hw *hw = &adapter->hw; 1203 u32 mac, txq, rxq; 1204 1205 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false; 1206 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1207 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1208 1209 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1210 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1211 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1212 1213 txq |= TXQ_CTRL_EN; 1214 rxq |= RXQ_CTRL_EN; 1215 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1216 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1217 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1218 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1219 MAC_CTRL_HASH_ALG_CRC32; 1220 if (hw->mac_duplex) 1221 mac |= MAC_CTRL_DUPLX; 1222 else 1223 mac &= ~MAC_CTRL_DUPLX; 1224 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1225 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1226 1227 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1228 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1229 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1230 } 1231 1232 /* 1233 * Reset the transmit and receive units; mask and clear all interrupts. 1234 * hw - Struct containing variables accessed by shared code 1235 * return : 0 or idle status (if error) 1236 */ 1237 static int atl1c_reset_mac(struct atl1c_hw *hw) 1238 { 1239 struct atl1c_adapter *adapter = hw->adapter; 1240 struct pci_dev *pdev = adapter->pdev; 1241 u32 ctrl_data = 0; 1242 1243 atl1c_stop_mac(hw); 1244 /* 1245 * Issue Soft Reset to the MAC. This will reset the chip's 1246 * transmit, receive, DMA. It will not effect 1247 * the current PCI configuration. The global reset bit is self- 1248 * clearing, and should clear within a microsecond. 1249 */ 1250 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1251 ctrl_data |= MASTER_CTRL_OOB_DIS; 1252 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1253 1254 AT_WRITE_FLUSH(hw); 1255 msleep(10); 1256 /* Wait at least 10ms for All module to be Idle */ 1257 1258 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1259 dev_err(&pdev->dev, 1260 "MAC state machine can't be idle since" 1261 " disabled for 10ms second\n"); 1262 return -1; 1263 } 1264 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1265 1266 /* driver control speed/duplex */ 1267 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1268 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1269 1270 /* clk switch setting */ 1271 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1272 switch (hw->nic_type) { 1273 case athr_l2c_b: 1274 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1275 SERDES_MAC_CLK_SLOWDOWN); 1276 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1277 break; 1278 case athr_l2c_b2: 1279 case athr_l1d_2: 1280 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1281 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1282 break; 1283 default: 1284 break; 1285 } 1286 1287 return 0; 1288 } 1289 1290 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1291 { 1292 u16 ctrl_flags = hw->ctrl_flags; 1293 1294 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1295 atl1c_set_aspm(hw, SPEED_0); 1296 hw->ctrl_flags = ctrl_flags; 1297 } 1298 1299 /* 1300 * Set ASPM state. 1301 * Enable/disable L0s/L1 depend on link state. 1302 */ 1303 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1304 { 1305 u32 pm_ctrl_data; 1306 u32 link_l1_timer; 1307 1308 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1309 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1310 PM_CTRL_ASPM_L0S_EN | 1311 PM_CTRL_MAC_ASPM_CHK); 1312 /* L1 timer */ 1313 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1314 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1315 link_l1_timer = 1316 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1317 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1318 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1319 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1320 } else { 1321 link_l1_timer = hw->nic_type == athr_l2c_b ? 1322 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1323 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1324 link_l1_timer = 1; 1325 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1326 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1327 } 1328 1329 /* L0S/L1 enable */ 1330 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1331 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1332 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1333 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1334 1335 /* l2cb & l1d & l2cb2 & l1d2 */ 1336 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1337 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1338 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1339 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1340 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1341 PM_CTRL_SERDES_PD_EX_L1 | 1342 PM_CTRL_CLK_SWH_L1; 1343 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1344 PM_CTRL_SERDES_PLL_L1_EN | 1345 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1346 PM_CTRL_SA_DLY_EN | 1347 PM_CTRL_HOTRST); 1348 /* disable l0s if link down or l2cb */ 1349 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1350 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1351 } else { /* l1c */ 1352 pm_ctrl_data = 1353 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1354 if (link_speed != SPEED_0) { 1355 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1356 PM_CTRL_SERDES_PLL_L1_EN | 1357 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1358 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1359 PM_CTRL_CLK_SWH_L1 | 1360 PM_CTRL_ASPM_L0S_EN | 1361 PM_CTRL_ASPM_L1_EN); 1362 } else { /* link down */ 1363 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1364 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1365 PM_CTRL_SERDES_PLL_L1_EN | 1366 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1367 PM_CTRL_ASPM_L0S_EN); 1368 } 1369 } 1370 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1371 1372 return; 1373 } 1374 1375 /** 1376 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1377 * @adapter: board private structure 1378 * 1379 * Configure the Tx /Rx unit of the MAC after a reset. 1380 */ 1381 static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1382 { 1383 struct atl1c_hw *hw = &adapter->hw; 1384 u32 master_ctrl_data = 0; 1385 u32 intr_modrt_data; 1386 u32 data; 1387 1388 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1389 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1390 MASTER_CTRL_RX_ITIMER_EN | 1391 MASTER_CTRL_INT_RDCLR); 1392 /* clear interrupt status */ 1393 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1394 /* Clear any WOL status */ 1395 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1396 /* set Interrupt Clear Timer 1397 * HW will enable self to assert interrupt event to system after 1398 * waiting x-time for software to notify it accept interrupt. 1399 */ 1400 1401 data = CLK_GATING_EN_ALL; 1402 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1403 if (hw->nic_type == athr_l2c_b) 1404 data &= ~CLK_GATING_RXMAC_EN; 1405 } else 1406 data = 0; 1407 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1408 1409 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1410 hw->ict & INT_RETRIG_TIMER_MASK); 1411 1412 atl1c_configure_des_ring(adapter); 1413 1414 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1415 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1416 IRQ_MODRT_TX_TIMER_SHIFT; 1417 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1418 IRQ_MODRT_RX_TIMER_SHIFT; 1419 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1420 master_ctrl_data |= 1421 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1422 } 1423 1424 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1425 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1426 1427 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1428 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1429 1430 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1431 hw->smb_timer & SMB_STAT_TIMER_MASK); 1432 1433 /* set MTU */ 1434 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1435 VLAN_HLEN + ETH_FCS_LEN); 1436 1437 atl1c_configure_tx(adapter); 1438 atl1c_configure_rx(adapter); 1439 atl1c_configure_dma(adapter); 1440 1441 return 0; 1442 } 1443 1444 static int atl1c_configure(struct atl1c_adapter *adapter) 1445 { 1446 struct net_device *netdev = adapter->netdev; 1447 int num; 1448 1449 atl1c_init_ring_ptrs(adapter); 1450 atl1c_set_multi(netdev); 1451 atl1c_restore_vlan(adapter); 1452 1453 num = atl1c_alloc_rx_buffer(adapter); 1454 if (unlikely(num == 0)) 1455 return -ENOMEM; 1456 1457 if (atl1c_configure_mac(adapter)) 1458 return -EIO; 1459 1460 return 0; 1461 } 1462 1463 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1464 { 1465 u16 hw_reg_addr = 0; 1466 unsigned long *stats_item = NULL; 1467 u32 data; 1468 1469 /* update rx status */ 1470 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1471 stats_item = &adapter->hw_stats.rx_ok; 1472 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1473 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1474 *stats_item += data; 1475 stats_item++; 1476 hw_reg_addr += 4; 1477 } 1478 /* update tx status */ 1479 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1480 stats_item = &adapter->hw_stats.tx_ok; 1481 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1482 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1483 *stats_item += data; 1484 stats_item++; 1485 hw_reg_addr += 4; 1486 } 1487 } 1488 1489 /** 1490 * atl1c_get_stats - Get System Network Statistics 1491 * @netdev: network interface device structure 1492 * 1493 * Returns the address of the device statistics structure. 1494 * The statistics are actually updated from the timer callback. 1495 */ 1496 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1497 { 1498 struct atl1c_adapter *adapter = netdev_priv(netdev); 1499 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1500 struct net_device_stats *net_stats = &netdev->stats; 1501 1502 atl1c_update_hw_stats(adapter); 1503 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1504 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1505 net_stats->multicast = hw_stats->rx_mcast; 1506 net_stats->collisions = hw_stats->tx_1_col + 1507 hw_stats->tx_2_col + 1508 hw_stats->tx_late_col + 1509 hw_stats->tx_abort_col; 1510 1511 net_stats->rx_errors = hw_stats->rx_frag + 1512 hw_stats->rx_fcs_err + 1513 hw_stats->rx_len_err + 1514 hw_stats->rx_sz_ov + 1515 hw_stats->rx_rrd_ov + 1516 hw_stats->rx_align_err + 1517 hw_stats->rx_rxf_ov; 1518 1519 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1520 net_stats->rx_length_errors = hw_stats->rx_len_err; 1521 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1522 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1523 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1524 1525 net_stats->tx_errors = hw_stats->tx_late_col + 1526 hw_stats->tx_abort_col + 1527 hw_stats->tx_underrun + 1528 hw_stats->tx_trunc; 1529 1530 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1531 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1532 net_stats->tx_window_errors = hw_stats->tx_late_col; 1533 1534 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1535 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1536 1537 return net_stats; 1538 } 1539 1540 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1541 { 1542 u16 phy_data; 1543 1544 spin_lock(&adapter->mdio_lock); 1545 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1546 spin_unlock(&adapter->mdio_lock); 1547 } 1548 1549 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1550 enum atl1c_trans_queue type) 1551 { 1552 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1553 struct atl1c_buffer *buffer_info; 1554 struct pci_dev *pdev = adapter->pdev; 1555 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1556 u16 hw_next_to_clean; 1557 u16 reg; 1558 1559 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1560 1561 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1562 1563 while (next_to_clean != hw_next_to_clean) { 1564 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1565 atl1c_clean_buffer(pdev, buffer_info, 1); 1566 if (++next_to_clean == tpd_ring->count) 1567 next_to_clean = 0; 1568 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1569 } 1570 1571 if (netif_queue_stopped(adapter->netdev) && 1572 netif_carrier_ok(adapter->netdev)) { 1573 netif_wake_queue(adapter->netdev); 1574 } 1575 1576 return true; 1577 } 1578 1579 /** 1580 * atl1c_intr - Interrupt Handler 1581 * @irq: interrupt number 1582 * @data: pointer to a network interface device structure 1583 */ 1584 static irqreturn_t atl1c_intr(int irq, void *data) 1585 { 1586 struct net_device *netdev = data; 1587 struct atl1c_adapter *adapter = netdev_priv(netdev); 1588 struct pci_dev *pdev = adapter->pdev; 1589 struct atl1c_hw *hw = &adapter->hw; 1590 int max_ints = AT_MAX_INT_WORK; 1591 int handled = IRQ_NONE; 1592 u32 status; 1593 u32 reg_data; 1594 1595 do { 1596 AT_READ_REG(hw, REG_ISR, ®_data); 1597 status = reg_data & hw->intr_mask; 1598 1599 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1600 if (max_ints != AT_MAX_INT_WORK) 1601 handled = IRQ_HANDLED; 1602 break; 1603 } 1604 /* link event */ 1605 if (status & ISR_GPHY) 1606 atl1c_clear_phy_int(adapter); 1607 /* Ack ISR */ 1608 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1609 if (status & ISR_RX_PKT) { 1610 if (likely(napi_schedule_prep(&adapter->napi))) { 1611 hw->intr_mask &= ~ISR_RX_PKT; 1612 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1613 __napi_schedule(&adapter->napi); 1614 } 1615 } 1616 if (status & ISR_TX_PKT) 1617 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1618 1619 handled = IRQ_HANDLED; 1620 /* check if PCIE PHY Link down */ 1621 if (status & ISR_ERROR) { 1622 if (netif_msg_hw(adapter)) 1623 dev_err(&pdev->dev, 1624 "atl1c hardware error (status = 0x%x)\n", 1625 status & ISR_ERROR); 1626 /* reset MAC */ 1627 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1628 schedule_work(&adapter->common_task); 1629 return IRQ_HANDLED; 1630 } 1631 1632 if (status & ISR_OVER) 1633 if (netif_msg_intr(adapter)) 1634 dev_warn(&pdev->dev, 1635 "TX/RX overflow (status = 0x%x)\n", 1636 status & ISR_OVER); 1637 1638 /* link event */ 1639 if (status & (ISR_GPHY | ISR_MANUAL)) { 1640 netdev->stats.tx_carrier_errors++; 1641 atl1c_link_chg_event(adapter); 1642 break; 1643 } 1644 1645 } while (--max_ints > 0); 1646 /* re-enable Interrupt*/ 1647 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1648 return handled; 1649 } 1650 1651 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1652 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1653 { 1654 /* 1655 * The pid field in RRS in not correct sometimes, so we 1656 * cannot figure out if the packet is fragmented or not, 1657 * so we tell the KERNEL CHECKSUM_NONE 1658 */ 1659 skb_checksum_none_assert(skb); 1660 } 1661 1662 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter) 1663 { 1664 struct sk_buff *skb; 1665 struct page *page; 1666 1667 if (adapter->rx_frag_size > PAGE_SIZE) 1668 return netdev_alloc_skb(adapter->netdev, 1669 adapter->rx_buffer_len); 1670 1671 page = adapter->rx_page; 1672 if (!page) { 1673 adapter->rx_page = page = alloc_page(GFP_ATOMIC); 1674 if (unlikely(!page)) 1675 return NULL; 1676 adapter->rx_page_offset = 0; 1677 } 1678 1679 skb = build_skb(page_address(page) + adapter->rx_page_offset, 1680 adapter->rx_frag_size); 1681 if (likely(skb)) { 1682 adapter->rx_page_offset += adapter->rx_frag_size; 1683 if (adapter->rx_page_offset >= PAGE_SIZE) 1684 adapter->rx_page = NULL; 1685 else 1686 get_page(page); 1687 } 1688 return skb; 1689 } 1690 1691 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1692 { 1693 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1694 struct pci_dev *pdev = adapter->pdev; 1695 struct atl1c_buffer *buffer_info, *next_info; 1696 struct sk_buff *skb; 1697 void *vir_addr = NULL; 1698 u16 num_alloc = 0; 1699 u16 rfd_next_to_use, next_next; 1700 struct atl1c_rx_free_desc *rfd_desc; 1701 dma_addr_t mapping; 1702 1703 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1704 if (++next_next == rfd_ring->count) 1705 next_next = 0; 1706 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1707 next_info = &rfd_ring->buffer_info[next_next]; 1708 1709 while (next_info->flags & ATL1C_BUFFER_FREE) { 1710 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1711 1712 skb = atl1c_alloc_skb(adapter); 1713 if (unlikely(!skb)) { 1714 if (netif_msg_rx_err(adapter)) 1715 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1716 break; 1717 } 1718 1719 /* 1720 * Make buffer alignment 2 beyond a 16 byte boundary 1721 * this will result in a 16 byte aligned IP header after 1722 * the 14 byte MAC header is removed 1723 */ 1724 vir_addr = skb->data; 1725 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1726 buffer_info->skb = skb; 1727 buffer_info->length = adapter->rx_buffer_len; 1728 mapping = pci_map_single(pdev, vir_addr, 1729 buffer_info->length, 1730 PCI_DMA_FROMDEVICE); 1731 if (unlikely(pci_dma_mapping_error(pdev, mapping))) { 1732 dev_kfree_skb(skb); 1733 buffer_info->skb = NULL; 1734 buffer_info->length = 0; 1735 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 1736 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed"); 1737 break; 1738 } 1739 buffer_info->dma = mapping; 1740 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1741 ATL1C_PCIMAP_FROMDEVICE); 1742 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1743 rfd_next_to_use = next_next; 1744 if (++next_next == rfd_ring->count) 1745 next_next = 0; 1746 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1747 next_info = &rfd_ring->buffer_info[next_next]; 1748 num_alloc++; 1749 } 1750 1751 if (num_alloc) { 1752 /* TODO: update mailbox here */ 1753 wmb(); 1754 rfd_ring->next_to_use = rfd_next_to_use; 1755 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1756 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1757 } 1758 1759 return num_alloc; 1760 } 1761 1762 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1763 struct atl1c_recv_ret_status *rrs, u16 num) 1764 { 1765 u16 i; 1766 /* the relationship between rrd and rfd is one map one */ 1767 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1768 rrd_ring->next_to_clean)) { 1769 rrs->word3 &= ~RRS_RXD_UPDATED; 1770 if (++rrd_ring->next_to_clean == rrd_ring->count) 1771 rrd_ring->next_to_clean = 0; 1772 } 1773 } 1774 1775 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1776 struct atl1c_recv_ret_status *rrs, u16 num) 1777 { 1778 u16 i; 1779 u16 rfd_index; 1780 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1781 1782 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1783 RRS_RX_RFD_INDEX_MASK; 1784 for (i = 0; i < num; i++) { 1785 buffer_info[rfd_index].skb = NULL; 1786 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1787 ATL1C_BUFFER_FREE); 1788 if (++rfd_index == rfd_ring->count) 1789 rfd_index = 0; 1790 } 1791 rfd_ring->next_to_clean = rfd_index; 1792 } 1793 1794 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1795 int *work_done, int work_to_do) 1796 { 1797 u16 rfd_num, rfd_index; 1798 u16 count = 0; 1799 u16 length; 1800 struct pci_dev *pdev = adapter->pdev; 1801 struct net_device *netdev = adapter->netdev; 1802 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1803 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1804 struct sk_buff *skb; 1805 struct atl1c_recv_ret_status *rrs; 1806 struct atl1c_buffer *buffer_info; 1807 1808 while (1) { 1809 if (*work_done >= work_to_do) 1810 break; 1811 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1812 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1813 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1814 RRS_RX_RFD_CNT_MASK; 1815 if (unlikely(rfd_num != 1)) 1816 /* TODO support mul rfd*/ 1817 if (netif_msg_rx_err(adapter)) 1818 dev_warn(&pdev->dev, 1819 "Multi rfd not support yet!\n"); 1820 goto rrs_checked; 1821 } else { 1822 break; 1823 } 1824 rrs_checked: 1825 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1826 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1827 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1828 if (netif_msg_rx_err(adapter)) 1829 dev_warn(&pdev->dev, 1830 "wrong packet! rrs word3 is %x\n", 1831 rrs->word3); 1832 continue; 1833 } 1834 1835 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1836 RRS_PKT_SIZE_MASK); 1837 /* Good Receive */ 1838 if (likely(rfd_num == 1)) { 1839 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1840 RRS_RX_RFD_INDEX_MASK; 1841 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1842 pci_unmap_single(pdev, buffer_info->dma, 1843 buffer_info->length, PCI_DMA_FROMDEVICE); 1844 skb = buffer_info->skb; 1845 } else { 1846 /* TODO */ 1847 if (netif_msg_rx_err(adapter)) 1848 dev_warn(&pdev->dev, 1849 "Multi rfd not support yet!\n"); 1850 break; 1851 } 1852 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1853 skb_put(skb, length - ETH_FCS_LEN); 1854 skb->protocol = eth_type_trans(skb, netdev); 1855 atl1c_rx_checksum(adapter, skb, rrs); 1856 if (rrs->word3 & RRS_VLAN_INS) { 1857 u16 vlan; 1858 1859 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1860 vlan = le16_to_cpu(vlan); 1861 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); 1862 } 1863 netif_receive_skb(skb); 1864 1865 (*work_done)++; 1866 count++; 1867 } 1868 if (count) 1869 atl1c_alloc_rx_buffer(adapter); 1870 } 1871 1872 /** 1873 * atl1c_clean - NAPI Rx polling callback 1874 */ 1875 static int atl1c_clean(struct napi_struct *napi, int budget) 1876 { 1877 struct atl1c_adapter *adapter = 1878 container_of(napi, struct atl1c_adapter, napi); 1879 int work_done = 0; 1880 1881 /* Keep link state information with original netdev */ 1882 if (!netif_carrier_ok(adapter->netdev)) 1883 goto quit_polling; 1884 /* just enable one RXQ */ 1885 atl1c_clean_rx_irq(adapter, &work_done, budget); 1886 1887 if (work_done < budget) { 1888 quit_polling: 1889 napi_complete(napi); 1890 adapter->hw.intr_mask |= ISR_RX_PKT; 1891 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1892 } 1893 return work_done; 1894 } 1895 1896 #ifdef CONFIG_NET_POLL_CONTROLLER 1897 1898 /* 1899 * Polling 'interrupt' - used by things like netconsole to send skbs 1900 * without having to re-enable interrupts. It's not called while 1901 * the interrupt routine is executing. 1902 */ 1903 static void atl1c_netpoll(struct net_device *netdev) 1904 { 1905 struct atl1c_adapter *adapter = netdev_priv(netdev); 1906 1907 disable_irq(adapter->pdev->irq); 1908 atl1c_intr(adapter->pdev->irq, netdev); 1909 enable_irq(adapter->pdev->irq); 1910 } 1911 #endif 1912 1913 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1914 { 1915 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1916 u16 next_to_use = 0; 1917 u16 next_to_clean = 0; 1918 1919 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1920 next_to_use = tpd_ring->next_to_use; 1921 1922 return (u16)(next_to_clean > next_to_use) ? 1923 (next_to_clean - next_to_use - 1) : 1924 (tpd_ring->count + next_to_clean - next_to_use - 1); 1925 } 1926 1927 /* 1928 * get next usable tpd 1929 * Note: should call atl1c_tdp_avail to make sure 1930 * there is enough tpd to use 1931 */ 1932 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1933 enum atl1c_trans_queue type) 1934 { 1935 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1936 struct atl1c_tpd_desc *tpd_desc; 1937 u16 next_to_use = 0; 1938 1939 next_to_use = tpd_ring->next_to_use; 1940 if (++tpd_ring->next_to_use == tpd_ring->count) 1941 tpd_ring->next_to_use = 0; 1942 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1943 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1944 return tpd_desc; 1945 } 1946 1947 static struct atl1c_buffer * 1948 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1949 { 1950 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1951 1952 return &tpd_ring->buffer_info[tpd - 1953 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1954 } 1955 1956 /* Calculate the transmit packet descript needed*/ 1957 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1958 { 1959 u16 tpd_req; 1960 u16 proto_hdr_len = 0; 1961 1962 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1963 1964 if (skb_is_gso(skb)) { 1965 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1966 if (proto_hdr_len < skb_headlen(skb)) 1967 tpd_req++; 1968 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1969 tpd_req++; 1970 } 1971 return tpd_req; 1972 } 1973 1974 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1975 struct sk_buff *skb, 1976 struct atl1c_tpd_desc **tpd, 1977 enum atl1c_trans_queue type) 1978 { 1979 struct pci_dev *pdev = adapter->pdev; 1980 u8 hdr_len; 1981 u32 real_len; 1982 unsigned short offload_type; 1983 int err; 1984 1985 if (skb_is_gso(skb)) { 1986 if (skb_header_cloned(skb)) { 1987 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 1988 if (unlikely(err)) 1989 return -1; 1990 } 1991 offload_type = skb_shinfo(skb)->gso_type; 1992 1993 if (offload_type & SKB_GSO_TCPV4) { 1994 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1995 + ntohs(ip_hdr(skb)->tot_len)); 1996 1997 if (real_len < skb->len) 1998 pskb_trim(skb, real_len); 1999 2000 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2001 if (unlikely(skb->len == hdr_len)) { 2002 /* only xsum need */ 2003 if (netif_msg_tx_queued(adapter)) 2004 dev_warn(&pdev->dev, 2005 "IPV4 tso with zero data??\n"); 2006 goto check_sum; 2007 } else { 2008 ip_hdr(skb)->check = 0; 2009 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2010 ip_hdr(skb)->saddr, 2011 ip_hdr(skb)->daddr, 2012 0, IPPROTO_TCP, 0); 2013 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2014 } 2015 } 2016 2017 if (offload_type & SKB_GSO_TCPV6) { 2018 struct atl1c_tpd_ext_desc *etpd = 2019 *(struct atl1c_tpd_ext_desc **)(tpd); 2020 2021 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2022 *tpd = atl1c_get_tpd(adapter, type); 2023 ipv6_hdr(skb)->payload_len = 0; 2024 /* check payload == 0 byte ? */ 2025 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2026 if (unlikely(skb->len == hdr_len)) { 2027 /* only xsum need */ 2028 if (netif_msg_tx_queued(adapter)) 2029 dev_warn(&pdev->dev, 2030 "IPV6 tso with zero data??\n"); 2031 goto check_sum; 2032 } else 2033 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2034 &ipv6_hdr(skb)->saddr, 2035 &ipv6_hdr(skb)->daddr, 2036 0, IPPROTO_TCP, 0); 2037 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2038 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2039 etpd->pkt_len = cpu_to_le32(skb->len); 2040 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2041 } 2042 2043 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2044 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2045 TPD_TCPHDR_OFFSET_SHIFT; 2046 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2047 TPD_MSS_SHIFT; 2048 return 0; 2049 } 2050 2051 check_sum: 2052 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2053 u8 css, cso; 2054 cso = skb_checksum_start_offset(skb); 2055 2056 if (unlikely(cso & 0x1)) { 2057 if (netif_msg_tx_err(adapter)) 2058 dev_err(&adapter->pdev->dev, 2059 "payload offset should not an event number\n"); 2060 return -1; 2061 } else { 2062 css = cso + skb->csum_offset; 2063 2064 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2065 TPD_PLOADOFFSET_SHIFT; 2066 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2067 TPD_CCSUM_OFFSET_SHIFT; 2068 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2069 } 2070 } 2071 return 0; 2072 } 2073 2074 static void atl1c_tx_rollback(struct atl1c_adapter *adpt, 2075 struct atl1c_tpd_desc *first_tpd, 2076 enum atl1c_trans_queue type) 2077 { 2078 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type]; 2079 struct atl1c_buffer *buffer_info; 2080 struct atl1c_tpd_desc *tpd; 2081 u16 first_index, index; 2082 2083 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc; 2084 index = first_index; 2085 while (index != tpd_ring->next_to_use) { 2086 tpd = ATL1C_TPD_DESC(tpd_ring, index); 2087 buffer_info = &tpd_ring->buffer_info[index]; 2088 atl1c_clean_buffer(adpt->pdev, buffer_info, 0); 2089 memset(tpd, 0, sizeof(struct atl1c_tpd_desc)); 2090 if (++index == tpd_ring->count) 2091 index = 0; 2092 } 2093 tpd_ring->next_to_use = first_index; 2094 } 2095 2096 static int atl1c_tx_map(struct atl1c_adapter *adapter, 2097 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2098 enum atl1c_trans_queue type) 2099 { 2100 struct atl1c_tpd_desc *use_tpd = NULL; 2101 struct atl1c_buffer *buffer_info = NULL; 2102 u16 buf_len = skb_headlen(skb); 2103 u16 map_len = 0; 2104 u16 mapped_len = 0; 2105 u16 hdr_len = 0; 2106 u16 nr_frags; 2107 u16 f; 2108 int tso; 2109 2110 nr_frags = skb_shinfo(skb)->nr_frags; 2111 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2112 if (tso) { 2113 /* TSO */ 2114 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2115 use_tpd = tpd; 2116 2117 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2118 buffer_info->length = map_len; 2119 buffer_info->dma = pci_map_single(adapter->pdev, 2120 skb->data, hdr_len, PCI_DMA_TODEVICE); 2121 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2122 buffer_info->dma))) 2123 goto err_dma; 2124 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2125 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2126 ATL1C_PCIMAP_TODEVICE); 2127 mapped_len += map_len; 2128 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2129 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2130 } 2131 2132 if (mapped_len < buf_len) { 2133 /* mapped_len == 0, means we should use the first tpd, 2134 which is given by caller */ 2135 if (mapped_len == 0) 2136 use_tpd = tpd; 2137 else { 2138 use_tpd = atl1c_get_tpd(adapter, type); 2139 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2140 } 2141 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2142 buffer_info->length = buf_len - mapped_len; 2143 buffer_info->dma = 2144 pci_map_single(adapter->pdev, skb->data + mapped_len, 2145 buffer_info->length, PCI_DMA_TODEVICE); 2146 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2147 buffer_info->dma))) 2148 goto err_dma; 2149 2150 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2151 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2152 ATL1C_PCIMAP_TODEVICE); 2153 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2154 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2155 } 2156 2157 for (f = 0; f < nr_frags; f++) { 2158 struct skb_frag_struct *frag; 2159 2160 frag = &skb_shinfo(skb)->frags[f]; 2161 2162 use_tpd = atl1c_get_tpd(adapter, type); 2163 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2164 2165 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2166 buffer_info->length = skb_frag_size(frag); 2167 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2168 frag, 0, 2169 buffer_info->length, 2170 DMA_TO_DEVICE); 2171 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) 2172 goto err_dma; 2173 2174 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2175 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2176 ATL1C_PCIMAP_TODEVICE); 2177 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2178 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2179 } 2180 2181 /* The last tpd */ 2182 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2183 /* The last buffer info contain the skb address, 2184 so it will be free after unmap */ 2185 buffer_info->skb = skb; 2186 2187 return 0; 2188 2189 err_dma: 2190 buffer_info->dma = 0; 2191 buffer_info->length = 0; 2192 return -1; 2193 } 2194 2195 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2196 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2197 { 2198 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2199 u16 reg; 2200 2201 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2202 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2203 } 2204 2205 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2206 struct net_device *netdev) 2207 { 2208 struct atl1c_adapter *adapter = netdev_priv(netdev); 2209 unsigned long flags; 2210 u16 tpd_req = 1; 2211 struct atl1c_tpd_desc *tpd; 2212 enum atl1c_trans_queue type = atl1c_trans_normal; 2213 2214 if (test_bit(__AT_DOWN, &adapter->flags)) { 2215 dev_kfree_skb_any(skb); 2216 return NETDEV_TX_OK; 2217 } 2218 2219 tpd_req = atl1c_cal_tpd_req(skb); 2220 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { 2221 if (netif_msg_pktdata(adapter)) 2222 dev_info(&adapter->pdev->dev, "tx locked\n"); 2223 return NETDEV_TX_LOCKED; 2224 } 2225 2226 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2227 /* no enough descriptor, just stop queue */ 2228 netif_stop_queue(netdev); 2229 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2230 return NETDEV_TX_BUSY; 2231 } 2232 2233 tpd = atl1c_get_tpd(adapter, type); 2234 2235 /* do TSO and check sum */ 2236 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2237 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2238 dev_kfree_skb_any(skb); 2239 return NETDEV_TX_OK; 2240 } 2241 2242 if (unlikely(vlan_tx_tag_present(skb))) { 2243 u16 vlan = vlan_tx_tag_get(skb); 2244 __le16 tag; 2245 2246 vlan = cpu_to_le16(vlan); 2247 AT_VLAN_TO_TAG(vlan, tag); 2248 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2249 tpd->vlan_tag = tag; 2250 } 2251 2252 if (skb_network_offset(skb) != ETH_HLEN) 2253 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2254 2255 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) { 2256 netif_info(adapter, tx_done, adapter->netdev, 2257 "tx-skb droppted due to dma error\n"); 2258 /* roll back tpd/buffer */ 2259 atl1c_tx_rollback(adapter, tpd, type); 2260 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2261 dev_kfree_skb(skb); 2262 } else { 2263 atl1c_tx_queue(adapter, skb, tpd, type); 2264 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2265 } 2266 2267 return NETDEV_TX_OK; 2268 } 2269 2270 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2271 { 2272 struct net_device *netdev = adapter->netdev; 2273 2274 free_irq(adapter->pdev->irq, netdev); 2275 2276 if (adapter->have_msi) 2277 pci_disable_msi(adapter->pdev); 2278 } 2279 2280 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2281 { 2282 struct pci_dev *pdev = adapter->pdev; 2283 struct net_device *netdev = adapter->netdev; 2284 int flags = 0; 2285 int err = 0; 2286 2287 adapter->have_msi = true; 2288 err = pci_enable_msi(adapter->pdev); 2289 if (err) { 2290 if (netif_msg_ifup(adapter)) 2291 dev_err(&pdev->dev, 2292 "Unable to allocate MSI interrupt Error: %d\n", 2293 err); 2294 adapter->have_msi = false; 2295 } 2296 2297 if (!adapter->have_msi) 2298 flags |= IRQF_SHARED; 2299 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2300 netdev->name, netdev); 2301 if (err) { 2302 if (netif_msg_ifup(adapter)) 2303 dev_err(&pdev->dev, 2304 "Unable to allocate interrupt Error: %d\n", 2305 err); 2306 if (adapter->have_msi) 2307 pci_disable_msi(adapter->pdev); 2308 return err; 2309 } 2310 if (netif_msg_ifup(adapter)) 2311 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2312 return err; 2313 } 2314 2315 2316 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2317 { 2318 /* release tx-pending skbs and reset tx/rx ring index */ 2319 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2320 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2321 atl1c_clean_rx_ring(adapter); 2322 } 2323 2324 static int atl1c_up(struct atl1c_adapter *adapter) 2325 { 2326 struct net_device *netdev = adapter->netdev; 2327 int err; 2328 2329 netif_carrier_off(netdev); 2330 2331 err = atl1c_configure(adapter); 2332 if (unlikely(err)) 2333 goto err_up; 2334 2335 err = atl1c_request_irq(adapter); 2336 if (unlikely(err)) 2337 goto err_up; 2338 2339 atl1c_check_link_status(adapter); 2340 clear_bit(__AT_DOWN, &adapter->flags); 2341 napi_enable(&adapter->napi); 2342 atl1c_irq_enable(adapter); 2343 netif_start_queue(netdev); 2344 return err; 2345 2346 err_up: 2347 atl1c_clean_rx_ring(adapter); 2348 return err; 2349 } 2350 2351 static void atl1c_down(struct atl1c_adapter *adapter) 2352 { 2353 struct net_device *netdev = adapter->netdev; 2354 2355 atl1c_del_timer(adapter); 2356 adapter->work_event = 0; /* clear all event */ 2357 /* signal that we're down so the interrupt handler does not 2358 * reschedule our watchdog timer */ 2359 set_bit(__AT_DOWN, &adapter->flags); 2360 netif_carrier_off(netdev); 2361 napi_disable(&adapter->napi); 2362 atl1c_irq_disable(adapter); 2363 atl1c_free_irq(adapter); 2364 /* disable ASPM if device inactive */ 2365 atl1c_disable_l0s_l1(&adapter->hw); 2366 /* reset MAC to disable all RX/TX */ 2367 atl1c_reset_mac(&adapter->hw); 2368 msleep(1); 2369 2370 adapter->link_speed = SPEED_0; 2371 adapter->link_duplex = -1; 2372 atl1c_reset_dma_ring(adapter); 2373 } 2374 2375 /** 2376 * atl1c_open - Called when a network interface is made active 2377 * @netdev: network interface device structure 2378 * 2379 * Returns 0 on success, negative value on failure 2380 * 2381 * The open entry point is called when a network interface is made 2382 * active by the system (IFF_UP). At this point all resources needed 2383 * for transmit and receive operations are allocated, the interrupt 2384 * handler is registered with the OS, the watchdog timer is started, 2385 * and the stack is notified that the interface is ready. 2386 */ 2387 static int atl1c_open(struct net_device *netdev) 2388 { 2389 struct atl1c_adapter *adapter = netdev_priv(netdev); 2390 int err; 2391 2392 /* disallow open during test */ 2393 if (test_bit(__AT_TESTING, &adapter->flags)) 2394 return -EBUSY; 2395 2396 /* allocate rx/tx dma buffer & descriptors */ 2397 err = atl1c_setup_ring_resources(adapter); 2398 if (unlikely(err)) 2399 return err; 2400 2401 err = atl1c_up(adapter); 2402 if (unlikely(err)) 2403 goto err_up; 2404 2405 return 0; 2406 2407 err_up: 2408 atl1c_free_irq(adapter); 2409 atl1c_free_ring_resources(adapter); 2410 atl1c_reset_mac(&adapter->hw); 2411 return err; 2412 } 2413 2414 /** 2415 * atl1c_close - Disables a network interface 2416 * @netdev: network interface device structure 2417 * 2418 * Returns 0, this is not allowed to fail 2419 * 2420 * The close entry point is called when an interface is de-activated 2421 * by the OS. The hardware is still under the drivers control, but 2422 * needs to be disabled. A global MAC reset is issued to stop the 2423 * hardware, and all transmit and receive resources are freed. 2424 */ 2425 static int atl1c_close(struct net_device *netdev) 2426 { 2427 struct atl1c_adapter *adapter = netdev_priv(netdev); 2428 2429 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2430 set_bit(__AT_DOWN, &adapter->flags); 2431 cancel_work_sync(&adapter->common_task); 2432 atl1c_down(adapter); 2433 atl1c_free_ring_resources(adapter); 2434 return 0; 2435 } 2436 2437 static int atl1c_suspend(struct device *dev) 2438 { 2439 struct pci_dev *pdev = to_pci_dev(dev); 2440 struct net_device *netdev = pci_get_drvdata(pdev); 2441 struct atl1c_adapter *adapter = netdev_priv(netdev); 2442 struct atl1c_hw *hw = &adapter->hw; 2443 u32 wufc = adapter->wol; 2444 2445 atl1c_disable_l0s_l1(hw); 2446 if (netif_running(netdev)) { 2447 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2448 atl1c_down(adapter); 2449 } 2450 netif_device_detach(netdev); 2451 2452 if (wufc) 2453 if (atl1c_phy_to_ps_link(hw) != 0) 2454 dev_dbg(&pdev->dev, "phy power saving failed"); 2455 2456 atl1c_power_saving(hw, wufc); 2457 2458 return 0; 2459 } 2460 2461 #ifdef CONFIG_PM_SLEEP 2462 static int atl1c_resume(struct device *dev) 2463 { 2464 struct pci_dev *pdev = to_pci_dev(dev); 2465 struct net_device *netdev = pci_get_drvdata(pdev); 2466 struct atl1c_adapter *adapter = netdev_priv(netdev); 2467 2468 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2469 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2470 2471 atl1c_phy_reset(&adapter->hw); 2472 atl1c_reset_mac(&adapter->hw); 2473 atl1c_phy_init(&adapter->hw); 2474 2475 #if 0 2476 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2477 pm_data &= ~PM_CTRLSTAT_PME_EN; 2478 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2479 #endif 2480 2481 netif_device_attach(netdev); 2482 if (netif_running(netdev)) 2483 atl1c_up(adapter); 2484 2485 return 0; 2486 } 2487 #endif 2488 2489 static void atl1c_shutdown(struct pci_dev *pdev) 2490 { 2491 struct net_device *netdev = pci_get_drvdata(pdev); 2492 struct atl1c_adapter *adapter = netdev_priv(netdev); 2493 2494 atl1c_suspend(&pdev->dev); 2495 pci_wake_from_d3(pdev, adapter->wol); 2496 pci_set_power_state(pdev, PCI_D3hot); 2497 } 2498 2499 static const struct net_device_ops atl1c_netdev_ops = { 2500 .ndo_open = atl1c_open, 2501 .ndo_stop = atl1c_close, 2502 .ndo_validate_addr = eth_validate_addr, 2503 .ndo_start_xmit = atl1c_xmit_frame, 2504 .ndo_set_mac_address = atl1c_set_mac_addr, 2505 .ndo_set_rx_mode = atl1c_set_multi, 2506 .ndo_change_mtu = atl1c_change_mtu, 2507 .ndo_fix_features = atl1c_fix_features, 2508 .ndo_set_features = atl1c_set_features, 2509 .ndo_do_ioctl = atl1c_ioctl, 2510 .ndo_tx_timeout = atl1c_tx_timeout, 2511 .ndo_get_stats = atl1c_get_stats, 2512 #ifdef CONFIG_NET_POLL_CONTROLLER 2513 .ndo_poll_controller = atl1c_netpoll, 2514 #endif 2515 }; 2516 2517 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2518 { 2519 SET_NETDEV_DEV(netdev, &pdev->dev); 2520 pci_set_drvdata(pdev, netdev); 2521 2522 netdev->netdev_ops = &atl1c_netdev_ops; 2523 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2524 atl1c_set_ethtool_ops(netdev); 2525 2526 /* TODO: add when ready */ 2527 netdev->hw_features = NETIF_F_SG | 2528 NETIF_F_HW_CSUM | 2529 NETIF_F_HW_VLAN_CTAG_RX | 2530 NETIF_F_TSO | 2531 NETIF_F_TSO6; 2532 netdev->features = netdev->hw_features | 2533 NETIF_F_HW_VLAN_CTAG_TX; 2534 return 0; 2535 } 2536 2537 /** 2538 * atl1c_probe - Device Initialization Routine 2539 * @pdev: PCI device information struct 2540 * @ent: entry in atl1c_pci_tbl 2541 * 2542 * Returns 0 on success, negative on failure 2543 * 2544 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2545 * The OS initialization, configuring of the adapter private structure, 2546 * and a hardware reset occur. 2547 */ 2548 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2549 { 2550 struct net_device *netdev; 2551 struct atl1c_adapter *adapter; 2552 static int cards_found; 2553 2554 int err = 0; 2555 2556 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2557 err = pci_enable_device_mem(pdev); 2558 if (err) { 2559 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2560 return err; 2561 } 2562 2563 /* 2564 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2565 * shared register for the high 32 bits, so only a single, aligned, 2566 * 4 GB physical address range can be used at a time. 2567 * 2568 * Supporting 64-bit DMA on this hardware is more trouble than it's 2569 * worth. It is far easier to limit to 32-bit DMA than update 2570 * various kernel subsystems to support the mechanics required by a 2571 * fixed-high-32-bit system. 2572 */ 2573 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2574 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2575 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2576 goto err_dma; 2577 } 2578 2579 err = pci_request_regions(pdev, atl1c_driver_name); 2580 if (err) { 2581 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2582 goto err_pci_reg; 2583 } 2584 2585 pci_set_master(pdev); 2586 2587 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2588 if (netdev == NULL) { 2589 err = -ENOMEM; 2590 goto err_alloc_etherdev; 2591 } 2592 2593 err = atl1c_init_netdev(netdev, pdev); 2594 if (err) { 2595 dev_err(&pdev->dev, "init netdevice failed\n"); 2596 goto err_init_netdev; 2597 } 2598 adapter = netdev_priv(netdev); 2599 adapter->bd_number = cards_found; 2600 adapter->netdev = netdev; 2601 adapter->pdev = pdev; 2602 adapter->hw.adapter = adapter; 2603 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2604 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2605 if (!adapter->hw.hw_addr) { 2606 err = -EIO; 2607 dev_err(&pdev->dev, "cannot map device registers\n"); 2608 goto err_ioremap; 2609 } 2610 2611 /* init mii data */ 2612 adapter->mii.dev = netdev; 2613 adapter->mii.mdio_read = atl1c_mdio_read; 2614 adapter->mii.mdio_write = atl1c_mdio_write; 2615 adapter->mii.phy_id_mask = 0x1f; 2616 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2617 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2618 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2619 (unsigned long)adapter); 2620 /* setup the private structure */ 2621 err = atl1c_sw_init(adapter); 2622 if (err) { 2623 dev_err(&pdev->dev, "net device private data init failed\n"); 2624 goto err_sw_init; 2625 } 2626 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2627 2628 /* Init GPHY as early as possible due to power saving issue */ 2629 atl1c_phy_reset(&adapter->hw); 2630 2631 err = atl1c_reset_mac(&adapter->hw); 2632 if (err) { 2633 err = -EIO; 2634 goto err_reset; 2635 } 2636 2637 /* reset the controller to 2638 * put the device in a known good starting state */ 2639 err = atl1c_phy_init(&adapter->hw); 2640 if (err) { 2641 err = -EIO; 2642 goto err_reset; 2643 } 2644 if (atl1c_read_mac_addr(&adapter->hw)) { 2645 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2646 netdev->addr_assign_type = NET_ADDR_RANDOM; 2647 } 2648 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2649 if (netif_msg_probe(adapter)) 2650 dev_dbg(&pdev->dev, "mac address : %pM\n", 2651 adapter->hw.mac_addr); 2652 2653 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2654 INIT_WORK(&adapter->common_task, atl1c_common_task); 2655 adapter->work_event = 0; 2656 err = register_netdev(netdev); 2657 if (err) { 2658 dev_err(&pdev->dev, "register netdevice failed\n"); 2659 goto err_register; 2660 } 2661 2662 if (netif_msg_probe(adapter)) 2663 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2664 cards_found++; 2665 return 0; 2666 2667 err_reset: 2668 err_register: 2669 err_sw_init: 2670 iounmap(adapter->hw.hw_addr); 2671 err_init_netdev: 2672 err_ioremap: 2673 free_netdev(netdev); 2674 err_alloc_etherdev: 2675 pci_release_regions(pdev); 2676 err_pci_reg: 2677 err_dma: 2678 pci_disable_device(pdev); 2679 return err; 2680 } 2681 2682 /** 2683 * atl1c_remove - Device Removal Routine 2684 * @pdev: PCI device information struct 2685 * 2686 * atl1c_remove is called by the PCI subsystem to alert the driver 2687 * that it should release a PCI device. The could be caused by a 2688 * Hot-Plug event, or because the driver is going to be removed from 2689 * memory. 2690 */ 2691 static void atl1c_remove(struct pci_dev *pdev) 2692 { 2693 struct net_device *netdev = pci_get_drvdata(pdev); 2694 struct atl1c_adapter *adapter = netdev_priv(netdev); 2695 2696 unregister_netdev(netdev); 2697 /* restore permanent address */ 2698 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2699 atl1c_phy_disable(&adapter->hw); 2700 2701 iounmap(adapter->hw.hw_addr); 2702 2703 pci_release_regions(pdev); 2704 pci_disable_device(pdev); 2705 free_netdev(netdev); 2706 } 2707 2708 /** 2709 * atl1c_io_error_detected - called when PCI error is detected 2710 * @pdev: Pointer to PCI device 2711 * @state: The current pci connection state 2712 * 2713 * This function is called after a PCI bus error affecting 2714 * this device has been detected. 2715 */ 2716 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2717 pci_channel_state_t state) 2718 { 2719 struct net_device *netdev = pci_get_drvdata(pdev); 2720 struct atl1c_adapter *adapter = netdev_priv(netdev); 2721 2722 netif_device_detach(netdev); 2723 2724 if (state == pci_channel_io_perm_failure) 2725 return PCI_ERS_RESULT_DISCONNECT; 2726 2727 if (netif_running(netdev)) 2728 atl1c_down(adapter); 2729 2730 pci_disable_device(pdev); 2731 2732 /* Request a slot slot reset. */ 2733 return PCI_ERS_RESULT_NEED_RESET; 2734 } 2735 2736 /** 2737 * atl1c_io_slot_reset - called after the pci bus has been reset. 2738 * @pdev: Pointer to PCI device 2739 * 2740 * Restart the card from scratch, as if from a cold-boot. Implementation 2741 * resembles the first-half of the e1000_resume routine. 2742 */ 2743 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2744 { 2745 struct net_device *netdev = pci_get_drvdata(pdev); 2746 struct atl1c_adapter *adapter = netdev_priv(netdev); 2747 2748 if (pci_enable_device(pdev)) { 2749 if (netif_msg_hw(adapter)) 2750 dev_err(&pdev->dev, 2751 "Cannot re-enable PCI device after reset\n"); 2752 return PCI_ERS_RESULT_DISCONNECT; 2753 } 2754 pci_set_master(pdev); 2755 2756 pci_enable_wake(pdev, PCI_D3hot, 0); 2757 pci_enable_wake(pdev, PCI_D3cold, 0); 2758 2759 atl1c_reset_mac(&adapter->hw); 2760 2761 return PCI_ERS_RESULT_RECOVERED; 2762 } 2763 2764 /** 2765 * atl1c_io_resume - called when traffic can start flowing again. 2766 * @pdev: Pointer to PCI device 2767 * 2768 * This callback is called when the error recovery driver tells us that 2769 * its OK to resume normal operation. Implementation resembles the 2770 * second-half of the atl1c_resume routine. 2771 */ 2772 static void atl1c_io_resume(struct pci_dev *pdev) 2773 { 2774 struct net_device *netdev = pci_get_drvdata(pdev); 2775 struct atl1c_adapter *adapter = netdev_priv(netdev); 2776 2777 if (netif_running(netdev)) { 2778 if (atl1c_up(adapter)) { 2779 if (netif_msg_hw(adapter)) 2780 dev_err(&pdev->dev, 2781 "Cannot bring device back up after reset\n"); 2782 return; 2783 } 2784 } 2785 2786 netif_device_attach(netdev); 2787 } 2788 2789 static const struct pci_error_handlers atl1c_err_handler = { 2790 .error_detected = atl1c_io_error_detected, 2791 .slot_reset = atl1c_io_slot_reset, 2792 .resume = atl1c_io_resume, 2793 }; 2794 2795 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2796 2797 static struct pci_driver atl1c_driver = { 2798 .name = atl1c_driver_name, 2799 .id_table = atl1c_pci_tbl, 2800 .probe = atl1c_probe, 2801 .remove = atl1c_remove, 2802 .shutdown = atl1c_shutdown, 2803 .err_handler = &atl1c_err_handler, 2804 .driver.pm = &atl1c_pm_ops, 2805 }; 2806 2807 module_pci_driver(atl1c_driver); 2808