1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 28 /* 29 * atl1c_pci_tbl - PCI Device ID Table 30 * 31 * Wildcard entries (PCI_ANY_ID) should come last 32 * Last entry must be all 0s 33 * 34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 35 * Class, Class Mask, private data (not used) } 36 */ 37 static const struct pci_device_id atl1c_pci_tbl[] = { 38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 44 /* required last entry */ 45 { 0 } 46 }; 47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 48 49 MODULE_AUTHOR("Jie Yang"); 50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 51 MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver"); 52 MODULE_LICENSE("GPL"); 53 MODULE_VERSION(ATL1C_DRV_VERSION); 54 55 static int atl1c_stop_mac(struct atl1c_hw *hw); 56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 58 static void atl1c_start_mac(struct atl1c_adapter *adapter); 59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 60 int *work_done, int work_to_do); 61 static int atl1c_up(struct atl1c_adapter *adapter); 62 static void atl1c_down(struct atl1c_adapter *adapter); 63 static int atl1c_reset_mac(struct atl1c_hw *hw); 64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 65 static int atl1c_configure(struct atl1c_adapter *adapter); 66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter); 67 68 static const u16 atl1c_pay_load_size[] = { 69 128, 256, 512, 1024, 2048, 4096, 70 }; 71 72 73 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 74 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 75 static void atl1c_pcie_patch(struct atl1c_hw *hw) 76 { 77 u32 mst_data, data; 78 79 /* pclk sel could switch to 25M */ 80 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 81 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 82 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 83 84 /* WoL/PCIE related settings */ 85 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 86 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 87 data |= PCIE_PHYMISC_FORCE_RCV_DET; 88 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 89 } else { /* new dev set bit5 of MASTER */ 90 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 91 AT_WRITE_REG(hw, REG_MASTER_CTRL, 92 mst_data | MASTER_CTRL_WAKEN_25M); 93 } 94 /* aspm/PCIE setting only for l2cb 1.0 */ 95 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 96 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 97 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 98 L2CB1_PCIE_PHYMISC2_CDR_BW); 99 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 100 L2CB1_PCIE_PHYMISC2_L0S_TH); 101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 102 /* extend L1 sync timer */ 103 AT_READ_REG(hw, REG_LINK_CTRL, &data); 104 data |= LINK_CTRL_EXT_SYNC; 105 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 106 } 107 /* l2cb 1.x & l1d 1.x */ 108 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 109 AT_READ_REG(hw, REG_PM_CTRL, &data); 110 data |= PM_CTRL_L0S_BUFSRX_EN; 111 AT_WRITE_REG(hw, REG_PM_CTRL, data); 112 /* clear vendor msg */ 113 AT_READ_REG(hw, REG_DMA_DBG, &data); 114 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 115 } 116 } 117 118 /* FIXME: no need any more ? */ 119 /* 120 * atl1c_init_pcie - init PCIE module 121 */ 122 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 123 { 124 u32 data; 125 u32 pci_cmd; 126 struct pci_dev *pdev = hw->adapter->pdev; 127 int pos; 128 129 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 130 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 131 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 132 PCI_COMMAND_IO); 133 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 134 135 /* 136 * Clear any PowerSaveing Settings 137 */ 138 pci_enable_wake(pdev, PCI_D3hot, 0); 139 pci_enable_wake(pdev, PCI_D3cold, 0); 140 /* wol sts read-clear */ 141 AT_READ_REG(hw, REG_WOL_CTRL, &data); 142 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 143 144 /* 145 * Mask some pcie error bits 146 */ 147 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 148 if (pos) { 149 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 150 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 151 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 152 } 153 /* clear error status */ 154 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, 155 PCI_EXP_DEVSTA_NFED | 156 PCI_EXP_DEVSTA_FED | 157 PCI_EXP_DEVSTA_CED | 158 PCI_EXP_DEVSTA_URD); 159 160 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 161 data &= ~LTSSM_ID_EN_WRO; 162 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 163 164 atl1c_pcie_patch(hw); 165 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 166 atl1c_disable_l0s_l1(hw); 167 168 msleep(5); 169 } 170 171 /** 172 * atl1c_irq_enable - Enable default interrupt generation settings 173 * @adapter: board private structure 174 */ 175 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 176 { 177 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 178 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 179 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 180 AT_WRITE_FLUSH(&adapter->hw); 181 } 182 } 183 184 /** 185 * atl1c_irq_disable - Mask off interrupt generation on the NIC 186 * @adapter: board private structure 187 */ 188 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 189 { 190 atomic_inc(&adapter->irq_sem); 191 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 192 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 193 AT_WRITE_FLUSH(&adapter->hw); 194 synchronize_irq(adapter->pdev->irq); 195 } 196 197 /** 198 * atl1c_irq_reset - reset interrupt confiure on the NIC 199 * @adapter: board private structure 200 */ 201 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 202 { 203 atomic_set(&adapter->irq_sem, 1); 204 atl1c_irq_enable(adapter); 205 } 206 207 /* 208 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 209 * of the idle status register until the device is actually idle 210 */ 211 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 212 { 213 int timeout; 214 u32 data; 215 216 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 217 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 218 if ((data & modu_ctrl) == 0) 219 return 0; 220 msleep(1); 221 } 222 return data; 223 } 224 225 /** 226 * atl1c_phy_config - Timer Call-back 227 * @data: pointer to netdev cast into an unsigned long 228 */ 229 static void atl1c_phy_config(unsigned long data) 230 { 231 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 232 struct atl1c_hw *hw = &adapter->hw; 233 unsigned long flags; 234 235 spin_lock_irqsave(&adapter->mdio_lock, flags); 236 atl1c_restart_autoneg(hw); 237 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 238 } 239 240 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 241 { 242 WARN_ON(in_interrupt()); 243 atl1c_down(adapter); 244 atl1c_up(adapter); 245 clear_bit(__AT_RESETTING, &adapter->flags); 246 } 247 248 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 249 { 250 struct atl1c_hw *hw = &adapter->hw; 251 struct net_device *netdev = adapter->netdev; 252 struct pci_dev *pdev = adapter->pdev; 253 int err; 254 unsigned long flags; 255 u16 speed, duplex, phy_data; 256 257 spin_lock_irqsave(&adapter->mdio_lock, flags); 258 /* MII_BMSR must read twise */ 259 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 260 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 261 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 262 263 if ((phy_data & BMSR_LSTATUS) == 0) { 264 /* link down */ 265 netif_carrier_off(netdev); 266 hw->hibernate = true; 267 if (atl1c_reset_mac(hw) != 0) 268 if (netif_msg_hw(adapter)) 269 dev_warn(&pdev->dev, "reset mac failed\n"); 270 atl1c_set_aspm(hw, SPEED_0); 271 atl1c_post_phy_linkchg(hw, SPEED_0); 272 atl1c_reset_dma_ring(adapter); 273 atl1c_configure(adapter); 274 } else { 275 /* Link Up */ 276 hw->hibernate = false; 277 spin_lock_irqsave(&adapter->mdio_lock, flags); 278 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 279 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 280 if (unlikely(err)) 281 return; 282 /* link result is our setting */ 283 if (adapter->link_speed != speed || 284 adapter->link_duplex != duplex) { 285 adapter->link_speed = speed; 286 adapter->link_duplex = duplex; 287 atl1c_set_aspm(hw, speed); 288 atl1c_post_phy_linkchg(hw, speed); 289 atl1c_start_mac(adapter); 290 if (netif_msg_link(adapter)) 291 dev_info(&pdev->dev, 292 "%s: %s NIC Link is Up<%d Mbps %s>\n", 293 atl1c_driver_name, netdev->name, 294 adapter->link_speed, 295 adapter->link_duplex == FULL_DUPLEX ? 296 "Full Duplex" : "Half Duplex"); 297 } 298 if (!netif_carrier_ok(netdev)) 299 netif_carrier_on(netdev); 300 } 301 } 302 303 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 304 { 305 struct net_device *netdev = adapter->netdev; 306 struct pci_dev *pdev = adapter->pdev; 307 u16 phy_data; 308 u16 link_up; 309 310 spin_lock(&adapter->mdio_lock); 311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 312 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 313 spin_unlock(&adapter->mdio_lock); 314 link_up = phy_data & BMSR_LSTATUS; 315 /* notify upper layer link down ASAP */ 316 if (!link_up) { 317 if (netif_carrier_ok(netdev)) { 318 /* old link state: Up */ 319 netif_carrier_off(netdev); 320 if (netif_msg_link(adapter)) 321 dev_info(&pdev->dev, 322 "%s: %s NIC Link is Down\n", 323 atl1c_driver_name, netdev->name); 324 adapter->link_speed = SPEED_0; 325 } 326 } 327 328 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 329 schedule_work(&adapter->common_task); 330 } 331 332 static void atl1c_common_task(struct work_struct *work) 333 { 334 struct atl1c_adapter *adapter; 335 struct net_device *netdev; 336 337 adapter = container_of(work, struct atl1c_adapter, common_task); 338 netdev = adapter->netdev; 339 340 if (test_bit(__AT_DOWN, &adapter->flags)) 341 return; 342 343 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 344 netif_device_detach(netdev); 345 atl1c_down(adapter); 346 atl1c_up(adapter); 347 netif_device_attach(netdev); 348 } 349 350 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 351 &adapter->work_event)) { 352 atl1c_irq_disable(adapter); 353 atl1c_check_link_status(adapter); 354 atl1c_irq_enable(adapter); 355 } 356 } 357 358 359 static void atl1c_del_timer(struct atl1c_adapter *adapter) 360 { 361 del_timer_sync(&adapter->phy_config_timer); 362 } 363 364 365 /** 366 * atl1c_tx_timeout - Respond to a Tx Hang 367 * @netdev: network interface device structure 368 */ 369 static void atl1c_tx_timeout(struct net_device *netdev) 370 { 371 struct atl1c_adapter *adapter = netdev_priv(netdev); 372 373 /* Do the reset outside of interrupt context */ 374 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 375 schedule_work(&adapter->common_task); 376 } 377 378 /** 379 * atl1c_set_multi - Multicast and Promiscuous mode set 380 * @netdev: network interface device structure 381 * 382 * The set_multi entry point is called whenever the multicast address 383 * list or the network interface flags are updated. This routine is 384 * responsible for configuring the hardware for proper multicast, 385 * promiscuous mode, and all-multi behavior. 386 */ 387 static void atl1c_set_multi(struct net_device *netdev) 388 { 389 struct atl1c_adapter *adapter = netdev_priv(netdev); 390 struct atl1c_hw *hw = &adapter->hw; 391 struct netdev_hw_addr *ha; 392 u32 mac_ctrl_data; 393 u32 hash_value; 394 395 /* Check for Promiscuous and All Multicast modes */ 396 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 397 398 if (netdev->flags & IFF_PROMISC) { 399 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 400 } else if (netdev->flags & IFF_ALLMULTI) { 401 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 402 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 403 } else { 404 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 405 } 406 407 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 408 409 /* clear the old settings from the multicast hash table */ 410 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 411 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 412 413 /* comoute mc addresses' hash value ,and put it into hash table */ 414 netdev_for_each_mc_addr(ha, netdev) { 415 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 416 atl1c_hash_set(hw, hash_value); 417 } 418 } 419 420 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 421 { 422 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 423 /* enable VLAN tag insert/strip */ 424 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 425 } else { 426 /* disable VLAN tag insert/strip */ 427 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 428 } 429 } 430 431 static void atl1c_vlan_mode(struct net_device *netdev, 432 netdev_features_t features) 433 { 434 struct atl1c_adapter *adapter = netdev_priv(netdev); 435 struct pci_dev *pdev = adapter->pdev; 436 u32 mac_ctrl_data = 0; 437 438 if (netif_msg_pktdata(adapter)) 439 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 440 441 atl1c_irq_disable(adapter); 442 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 443 __atl1c_vlan_mode(features, &mac_ctrl_data); 444 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 445 atl1c_irq_enable(adapter); 446 } 447 448 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 449 { 450 struct pci_dev *pdev = adapter->pdev; 451 452 if (netif_msg_pktdata(adapter)) 453 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 454 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 455 } 456 457 /** 458 * atl1c_set_mac - Change the Ethernet Address of the NIC 459 * @netdev: network interface device structure 460 * @p: pointer to an address structure 461 * 462 * Returns 0 on success, negative on failure 463 */ 464 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 465 { 466 struct atl1c_adapter *adapter = netdev_priv(netdev); 467 struct sockaddr *addr = p; 468 469 if (!is_valid_ether_addr(addr->sa_data)) 470 return -EADDRNOTAVAIL; 471 472 if (netif_running(netdev)) 473 return -EBUSY; 474 475 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 476 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 477 478 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 479 480 return 0; 481 } 482 483 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 484 struct net_device *dev) 485 { 486 unsigned int head_size; 487 int mtu = dev->mtu; 488 489 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 490 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 491 492 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) + 493 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 494 adapter->rx_frag_size = roundup_pow_of_two(head_size); 495 } 496 497 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 498 netdev_features_t features) 499 { 500 /* 501 * Since there is no support for separate rx/tx vlan accel 502 * enable/disable make sure tx flag is always in same state as rx. 503 */ 504 if (features & NETIF_F_HW_VLAN_CTAG_RX) 505 features |= NETIF_F_HW_VLAN_CTAG_TX; 506 else 507 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 508 509 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 510 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 511 512 return features; 513 } 514 515 static int atl1c_set_features(struct net_device *netdev, 516 netdev_features_t features) 517 { 518 netdev_features_t changed = netdev->features ^ features; 519 520 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 521 atl1c_vlan_mode(netdev, features); 522 523 return 0; 524 } 525 526 /** 527 * atl1c_change_mtu - Change the Maximum Transfer Unit 528 * @netdev: network interface device structure 529 * @new_mtu: new value for maximum frame size 530 * 531 * Returns 0 on success, negative on failure 532 */ 533 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 534 { 535 struct atl1c_adapter *adapter = netdev_priv(netdev); 536 struct atl1c_hw *hw = &adapter->hw; 537 int old_mtu = netdev->mtu; 538 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 539 540 /* Fast Ethernet controller doesn't support jumbo packet */ 541 if (((hw->nic_type == athr_l2c || 542 hw->nic_type == athr_l2c_b || 543 hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) || 544 max_frame < ETH_ZLEN + ETH_FCS_LEN || 545 max_frame > MAX_JUMBO_FRAME_SIZE) { 546 if (netif_msg_link(adapter)) 547 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 548 return -EINVAL; 549 } 550 /* set MTU */ 551 if (old_mtu != new_mtu && netif_running(netdev)) { 552 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 553 msleep(1); 554 netdev->mtu = new_mtu; 555 adapter->hw.max_frame_size = new_mtu; 556 atl1c_set_rxbufsize(adapter, netdev); 557 atl1c_down(adapter); 558 netdev_update_features(netdev); 559 atl1c_up(adapter); 560 clear_bit(__AT_RESETTING, &adapter->flags); 561 } 562 return 0; 563 } 564 565 /* 566 * caller should hold mdio_lock 567 */ 568 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 569 { 570 struct atl1c_adapter *adapter = netdev_priv(netdev); 571 u16 result; 572 573 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 574 return result; 575 } 576 577 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 578 int reg_num, int val) 579 { 580 struct atl1c_adapter *adapter = netdev_priv(netdev); 581 582 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 583 } 584 585 static int atl1c_mii_ioctl(struct net_device *netdev, 586 struct ifreq *ifr, int cmd) 587 { 588 struct atl1c_adapter *adapter = netdev_priv(netdev); 589 struct pci_dev *pdev = adapter->pdev; 590 struct mii_ioctl_data *data = if_mii(ifr); 591 unsigned long flags; 592 int retval = 0; 593 594 if (!netif_running(netdev)) 595 return -EINVAL; 596 597 spin_lock_irqsave(&adapter->mdio_lock, flags); 598 switch (cmd) { 599 case SIOCGMIIPHY: 600 data->phy_id = 0; 601 break; 602 603 case SIOCGMIIREG: 604 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 605 &data->val_out)) { 606 retval = -EIO; 607 goto out; 608 } 609 break; 610 611 case SIOCSMIIREG: 612 if (data->reg_num & ~(0x1F)) { 613 retval = -EFAULT; 614 goto out; 615 } 616 617 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 618 data->reg_num, data->val_in); 619 if (atl1c_write_phy_reg(&adapter->hw, 620 data->reg_num, data->val_in)) { 621 retval = -EIO; 622 goto out; 623 } 624 break; 625 626 default: 627 retval = -EOPNOTSUPP; 628 break; 629 } 630 out: 631 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 632 return retval; 633 } 634 635 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 636 { 637 switch (cmd) { 638 case SIOCGMIIPHY: 639 case SIOCGMIIREG: 640 case SIOCSMIIREG: 641 return atl1c_mii_ioctl(netdev, ifr, cmd); 642 default: 643 return -EOPNOTSUPP; 644 } 645 } 646 647 /** 648 * atl1c_alloc_queues - Allocate memory for all rings 649 * @adapter: board private structure to initialize 650 * 651 */ 652 static int atl1c_alloc_queues(struct atl1c_adapter *adapter) 653 { 654 return 0; 655 } 656 657 static void atl1c_set_mac_type(struct atl1c_hw *hw) 658 { 659 switch (hw->device_id) { 660 case PCI_DEVICE_ID_ATTANSIC_L2C: 661 hw->nic_type = athr_l2c; 662 break; 663 case PCI_DEVICE_ID_ATTANSIC_L1C: 664 hw->nic_type = athr_l1c; 665 break; 666 case PCI_DEVICE_ID_ATHEROS_L2C_B: 667 hw->nic_type = athr_l2c_b; 668 break; 669 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 670 hw->nic_type = athr_l2c_b2; 671 break; 672 case PCI_DEVICE_ID_ATHEROS_L1D: 673 hw->nic_type = athr_l1d; 674 break; 675 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 676 hw->nic_type = athr_l1d_2; 677 break; 678 default: 679 break; 680 } 681 } 682 683 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 684 { 685 u32 link_ctrl_data; 686 687 atl1c_set_mac_type(hw); 688 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 689 690 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 691 ATL1C_TXQ_MODE_ENHANCE; 692 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 693 ATL1C_ASPM_L1_SUPPORT; 694 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 695 696 if (hw->nic_type == athr_l1c || 697 hw->nic_type == athr_l1d || 698 hw->nic_type == athr_l1d_2) 699 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 700 return 0; 701 } 702 703 struct atl1c_platform_patch { 704 u16 pci_did; 705 u8 pci_revid; 706 u16 subsystem_vid; 707 u16 subsystem_did; 708 u32 patch_flag; 709 #define ATL1C_LINK_PATCH 0x1 710 }; 711 static const struct atl1c_platform_patch plats[] = { 712 {0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 713 {0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 714 {0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 715 {0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 716 {0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 717 {0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 718 {0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 719 {0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 720 {0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 721 {0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 722 {0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 723 {0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 724 {0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 725 {0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 726 {0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 727 {0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 728 {0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 729 {0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 730 {0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 731 {0}, 732 }; 733 734 static void atl1c_patch_assign(struct atl1c_hw *hw) 735 { 736 struct pci_dev *pdev = hw->adapter->pdev; 737 u32 misc_ctrl; 738 int i = 0; 739 740 hw->msi_lnkpatch = false; 741 742 while (plats[i].pci_did != 0) { 743 if (plats[i].pci_did == hw->device_id && 744 plats[i].pci_revid == hw->revision_id && 745 plats[i].subsystem_vid == hw->subsystem_vendor_id && 746 plats[i].subsystem_did == hw->subsystem_id) { 747 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 748 hw->msi_lnkpatch = true; 749 } 750 i++; 751 } 752 753 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 && 754 hw->revision_id == L2CB_V21) { 755 /* config acess mode */ 756 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 757 REG_PCIE_DEV_MISC_CTRL); 758 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl); 759 misc_ctrl &= ~0x100; 760 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 761 REG_PCIE_DEV_MISC_CTRL); 762 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl); 763 } 764 } 765 /** 766 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 767 * @adapter: board private structure to initialize 768 * 769 * atl1c_sw_init initializes the Adapter private data structure. 770 * Fields are initialized based on PCI device information and 771 * OS network device settings (MTU size). 772 */ 773 static int atl1c_sw_init(struct atl1c_adapter *adapter) 774 { 775 struct atl1c_hw *hw = &adapter->hw; 776 struct pci_dev *pdev = adapter->pdev; 777 u32 revision; 778 779 780 adapter->wol = 0; 781 device_set_wakeup_enable(&pdev->dev, false); 782 adapter->link_speed = SPEED_0; 783 adapter->link_duplex = FULL_DUPLEX; 784 adapter->tpd_ring[0].count = 1024; 785 adapter->rfd_ring.count = 512; 786 787 hw->vendor_id = pdev->vendor; 788 hw->device_id = pdev->device; 789 hw->subsystem_vendor_id = pdev->subsystem_vendor; 790 hw->subsystem_id = pdev->subsystem_device; 791 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision); 792 hw->revision_id = revision & 0xFF; 793 /* before link up, we assume hibernate is true */ 794 hw->hibernate = true; 795 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 796 if (atl1c_setup_mac_funcs(hw) != 0) { 797 dev_err(&pdev->dev, "set mac function pointers failed\n"); 798 return -1; 799 } 800 atl1c_patch_assign(hw); 801 802 hw->intr_mask = IMR_NORMAL_MASK; 803 hw->phy_configured = false; 804 hw->preamble_len = 7; 805 hw->max_frame_size = adapter->netdev->mtu; 806 hw->autoneg_advertised = ADVERTISED_Autoneg; 807 hw->indirect_tab = 0xE4E4E4E4; 808 hw->base_cpu = 0; 809 810 hw->ict = 50000; /* 100ms */ 811 hw->smb_timer = 200000; /* 400ms */ 812 hw->rx_imt = 200; 813 hw->tx_imt = 1000; 814 815 hw->tpd_burst = 5; 816 hw->rfd_burst = 8; 817 hw->dma_order = atl1c_dma_ord_out; 818 hw->dmar_block = atl1c_dma_req_1024; 819 820 if (atl1c_alloc_queues(adapter)) { 821 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 822 return -ENOMEM; 823 } 824 /* TODO */ 825 atl1c_set_rxbufsize(adapter, adapter->netdev); 826 atomic_set(&adapter->irq_sem, 1); 827 spin_lock_init(&adapter->mdio_lock); 828 spin_lock_init(&adapter->tx_lock); 829 set_bit(__AT_DOWN, &adapter->flags); 830 831 return 0; 832 } 833 834 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 835 struct atl1c_buffer *buffer_info) 836 { 837 u16 pci_driection; 838 if (buffer_info->flags & ATL1C_BUFFER_FREE) 839 return; 840 if (buffer_info->dma) { 841 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 842 pci_driection = PCI_DMA_FROMDEVICE; 843 else 844 pci_driection = PCI_DMA_TODEVICE; 845 846 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 847 pci_unmap_single(pdev, buffer_info->dma, 848 buffer_info->length, pci_driection); 849 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 850 pci_unmap_page(pdev, buffer_info->dma, 851 buffer_info->length, pci_driection); 852 } 853 if (buffer_info->skb) 854 dev_consume_skb_any(buffer_info->skb); 855 buffer_info->dma = 0; 856 buffer_info->skb = NULL; 857 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 858 } 859 /** 860 * atl1c_clean_tx_ring - Free Tx-skb 861 * @adapter: board private structure 862 */ 863 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 864 enum atl1c_trans_queue type) 865 { 866 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 867 struct atl1c_buffer *buffer_info; 868 struct pci_dev *pdev = adapter->pdev; 869 u16 index, ring_count; 870 871 ring_count = tpd_ring->count; 872 for (index = 0; index < ring_count; index++) { 873 buffer_info = &tpd_ring->buffer_info[index]; 874 atl1c_clean_buffer(pdev, buffer_info); 875 } 876 877 /* Zero out Tx-buffers */ 878 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 879 ring_count); 880 atomic_set(&tpd_ring->next_to_clean, 0); 881 tpd_ring->next_to_use = 0; 882 } 883 884 /** 885 * atl1c_clean_rx_ring - Free rx-reservation skbs 886 * @adapter: board private structure 887 */ 888 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 889 { 890 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 891 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 892 struct atl1c_buffer *buffer_info; 893 struct pci_dev *pdev = adapter->pdev; 894 int j; 895 896 for (j = 0; j < rfd_ring->count; j++) { 897 buffer_info = &rfd_ring->buffer_info[j]; 898 atl1c_clean_buffer(pdev, buffer_info); 899 } 900 /* zero out the descriptor ring */ 901 memset(rfd_ring->desc, 0, rfd_ring->size); 902 rfd_ring->next_to_clean = 0; 903 rfd_ring->next_to_use = 0; 904 rrd_ring->next_to_use = 0; 905 rrd_ring->next_to_clean = 0; 906 } 907 908 /* 909 * Read / Write Ptr Initialize: 910 */ 911 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 912 { 913 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 914 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 915 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 916 struct atl1c_buffer *buffer_info; 917 int i, j; 918 919 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 920 tpd_ring[i].next_to_use = 0; 921 atomic_set(&tpd_ring[i].next_to_clean, 0); 922 buffer_info = tpd_ring[i].buffer_info; 923 for (j = 0; j < tpd_ring->count; j++) 924 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 925 ATL1C_BUFFER_FREE); 926 } 927 rfd_ring->next_to_use = 0; 928 rfd_ring->next_to_clean = 0; 929 rrd_ring->next_to_use = 0; 930 rrd_ring->next_to_clean = 0; 931 for (j = 0; j < rfd_ring->count; j++) { 932 buffer_info = &rfd_ring->buffer_info[j]; 933 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 934 } 935 } 936 937 /** 938 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 939 * @adapter: board private structure 940 * 941 * Free all transmit software resources 942 */ 943 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 944 { 945 struct pci_dev *pdev = adapter->pdev; 946 947 pci_free_consistent(pdev, adapter->ring_header.size, 948 adapter->ring_header.desc, 949 adapter->ring_header.dma); 950 adapter->ring_header.desc = NULL; 951 952 /* Note: just free tdp_ring.buffer_info, 953 * it contain rfd_ring.buffer_info, do not double free */ 954 if (adapter->tpd_ring[0].buffer_info) { 955 kfree(adapter->tpd_ring[0].buffer_info); 956 adapter->tpd_ring[0].buffer_info = NULL; 957 } 958 if (adapter->rx_page) { 959 put_page(adapter->rx_page); 960 adapter->rx_page = NULL; 961 } 962 } 963 964 /** 965 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 966 * @adapter: board private structure 967 * 968 * Return 0 on success, negative on failure 969 */ 970 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 971 { 972 struct pci_dev *pdev = adapter->pdev; 973 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 974 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 975 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 976 struct atl1c_ring_header *ring_header = &adapter->ring_header; 977 int size; 978 int i; 979 int count = 0; 980 int rx_desc_count = 0; 981 u32 offset = 0; 982 983 rrd_ring->count = rfd_ring->count; 984 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 985 tpd_ring[i].count = tpd_ring[0].count; 986 987 /* 2 tpd queue, one high priority queue, 988 * another normal priority queue */ 989 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 990 rfd_ring->count); 991 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 992 if (unlikely(!tpd_ring->buffer_info)) 993 goto err_nomem; 994 995 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 996 tpd_ring[i].buffer_info = 997 (tpd_ring->buffer_info + count); 998 count += tpd_ring[i].count; 999 } 1000 1001 rfd_ring->buffer_info = 1002 (tpd_ring->buffer_info + count); 1003 count += rfd_ring->count; 1004 rx_desc_count += rfd_ring->count; 1005 1006 /* 1007 * real ring DMA buffer 1008 * each ring/block may need up to 8 bytes for alignment, hence the 1009 * additional bytes tacked onto the end. 1010 */ 1011 ring_header->size = size = 1012 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 1013 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 1014 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 1015 8 * 4; 1016 1017 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, 1018 &ring_header->dma); 1019 if (unlikely(!ring_header->desc)) { 1020 dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); 1021 goto err_nomem; 1022 } 1023 memset(ring_header->desc, 0, ring_header->size); 1024 /* init TPD ring */ 1025 1026 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1027 offset = tpd_ring[0].dma - ring_header->dma; 1028 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1029 tpd_ring[i].dma = ring_header->dma + offset; 1030 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1031 tpd_ring[i].size = 1032 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1033 offset += roundup(tpd_ring[i].size, 8); 1034 } 1035 /* init RFD ring */ 1036 rfd_ring->dma = ring_header->dma + offset; 1037 rfd_ring->desc = (u8 *) ring_header->desc + offset; 1038 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 1039 offset += roundup(rfd_ring->size, 8); 1040 1041 /* init RRD ring */ 1042 rrd_ring->dma = ring_header->dma + offset; 1043 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1044 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1045 rrd_ring->count; 1046 offset += roundup(rrd_ring->size, 8); 1047 1048 return 0; 1049 1050 err_nomem: 1051 kfree(tpd_ring->buffer_info); 1052 return -ENOMEM; 1053 } 1054 1055 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1056 { 1057 struct atl1c_hw *hw = &adapter->hw; 1058 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1059 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1060 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1061 adapter->tpd_ring; 1062 1063 /* TPD */ 1064 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1065 (u32)((tpd_ring[atl1c_trans_normal].dma & 1066 AT_DMA_HI_ADDR_MASK) >> 32)); 1067 /* just enable normal priority TX queue */ 1068 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1069 (u32)(tpd_ring[atl1c_trans_normal].dma & 1070 AT_DMA_LO_ADDR_MASK)); 1071 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1072 (u32)(tpd_ring[atl1c_trans_high].dma & 1073 AT_DMA_LO_ADDR_MASK)); 1074 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1075 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1076 1077 1078 /* RFD */ 1079 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1080 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1081 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1082 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1083 1084 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1085 rfd_ring->count & RFD_RING_SIZE_MASK); 1086 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1087 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1088 1089 /* RRD */ 1090 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1091 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1092 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1093 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1094 1095 if (hw->nic_type == athr_l2c_b) { 1096 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1097 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1098 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1099 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1100 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1101 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1102 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1103 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1104 } 1105 /* Load all of base address above */ 1106 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1107 } 1108 1109 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1110 { 1111 struct atl1c_hw *hw = &adapter->hw; 1112 int max_pay_load; 1113 u16 tx_offload_thresh; 1114 u32 txq_ctrl_data; 1115 1116 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1117 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1118 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1119 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1120 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1121 /* 1122 * if BIOS had changed the dam-read-max-length to an invalid value, 1123 * restore it to default value 1124 */ 1125 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1126 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1127 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1128 } 1129 txq_ctrl_data = 1130 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1131 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1132 1133 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1134 } 1135 1136 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1137 { 1138 struct atl1c_hw *hw = &adapter->hw; 1139 u32 rxq_ctrl_data; 1140 1141 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1142 RXQ_RFD_BURST_NUM_SHIFT; 1143 1144 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1145 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1146 1147 /* aspm for gigabit */ 1148 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1149 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1150 ASPM_THRUPUT_LIMIT_100M); 1151 1152 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1153 } 1154 1155 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1156 { 1157 struct atl1c_hw *hw = &adapter->hw; 1158 u32 dma_ctrl_data; 1159 1160 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1161 DMA_CTRL_RREQ_PRI_DATA | 1162 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1163 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1164 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1165 1166 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1167 } 1168 1169 /* 1170 * Stop the mac, transmit and receive units 1171 * hw - Struct containing variables accessed by shared code 1172 * return : 0 or idle status (if error) 1173 */ 1174 static int atl1c_stop_mac(struct atl1c_hw *hw) 1175 { 1176 u32 data; 1177 1178 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1179 data &= ~RXQ_CTRL_EN; 1180 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1181 1182 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1183 data &= ~TXQ_CTRL_EN; 1184 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1185 1186 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1187 1188 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1189 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1190 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1191 1192 return (int)atl1c_wait_until_idle(hw, 1193 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1194 } 1195 1196 static void atl1c_start_mac(struct atl1c_adapter *adapter) 1197 { 1198 struct atl1c_hw *hw = &adapter->hw; 1199 u32 mac, txq, rxq; 1200 1201 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false; 1202 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1203 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1204 1205 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1206 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1207 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1208 1209 txq |= TXQ_CTRL_EN; 1210 rxq |= RXQ_CTRL_EN; 1211 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1212 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1213 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1214 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1215 MAC_CTRL_HASH_ALG_CRC32; 1216 if (hw->mac_duplex) 1217 mac |= MAC_CTRL_DUPLX; 1218 else 1219 mac &= ~MAC_CTRL_DUPLX; 1220 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1221 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1222 1223 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1224 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1225 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1226 } 1227 1228 /* 1229 * Reset the transmit and receive units; mask and clear all interrupts. 1230 * hw - Struct containing variables accessed by shared code 1231 * return : 0 or idle status (if error) 1232 */ 1233 static int atl1c_reset_mac(struct atl1c_hw *hw) 1234 { 1235 struct atl1c_adapter *adapter = hw->adapter; 1236 struct pci_dev *pdev = adapter->pdev; 1237 u32 ctrl_data = 0; 1238 1239 atl1c_stop_mac(hw); 1240 /* 1241 * Issue Soft Reset to the MAC. This will reset the chip's 1242 * transmit, receive, DMA. It will not effect 1243 * the current PCI configuration. The global reset bit is self- 1244 * clearing, and should clear within a microsecond. 1245 */ 1246 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1247 ctrl_data |= MASTER_CTRL_OOB_DIS; 1248 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1249 1250 AT_WRITE_FLUSH(hw); 1251 msleep(10); 1252 /* Wait at least 10ms for All module to be Idle */ 1253 1254 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1255 dev_err(&pdev->dev, 1256 "MAC state machine can't be idle since" 1257 " disabled for 10ms second\n"); 1258 return -1; 1259 } 1260 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1261 1262 /* driver control speed/duplex */ 1263 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1264 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1265 1266 /* clk switch setting */ 1267 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1268 switch (hw->nic_type) { 1269 case athr_l2c_b: 1270 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1271 SERDES_MAC_CLK_SLOWDOWN); 1272 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1273 break; 1274 case athr_l2c_b2: 1275 case athr_l1d_2: 1276 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1277 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1278 break; 1279 default: 1280 break; 1281 } 1282 1283 return 0; 1284 } 1285 1286 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1287 { 1288 u16 ctrl_flags = hw->ctrl_flags; 1289 1290 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1291 atl1c_set_aspm(hw, SPEED_0); 1292 hw->ctrl_flags = ctrl_flags; 1293 } 1294 1295 /* 1296 * Set ASPM state. 1297 * Enable/disable L0s/L1 depend on link state. 1298 */ 1299 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1300 { 1301 u32 pm_ctrl_data; 1302 u32 link_l1_timer; 1303 1304 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1305 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1306 PM_CTRL_ASPM_L0S_EN | 1307 PM_CTRL_MAC_ASPM_CHK); 1308 /* L1 timer */ 1309 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1310 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1311 link_l1_timer = 1312 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1313 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1314 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1315 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1316 } else { 1317 link_l1_timer = hw->nic_type == athr_l2c_b ? 1318 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1319 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1320 link_l1_timer = 1; 1321 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1322 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1323 } 1324 1325 /* L0S/L1 enable */ 1326 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1327 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1328 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1329 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1330 1331 /* l2cb & l1d & l2cb2 & l1d2 */ 1332 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1333 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1334 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1335 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1336 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1337 PM_CTRL_SERDES_PD_EX_L1 | 1338 PM_CTRL_CLK_SWH_L1; 1339 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1340 PM_CTRL_SERDES_PLL_L1_EN | 1341 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1342 PM_CTRL_SA_DLY_EN | 1343 PM_CTRL_HOTRST); 1344 /* disable l0s if link down or l2cb */ 1345 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1346 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1347 } else { /* l1c */ 1348 pm_ctrl_data = 1349 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1350 if (link_speed != SPEED_0) { 1351 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1352 PM_CTRL_SERDES_PLL_L1_EN | 1353 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1354 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1355 PM_CTRL_CLK_SWH_L1 | 1356 PM_CTRL_ASPM_L0S_EN | 1357 PM_CTRL_ASPM_L1_EN); 1358 } else { /* link down */ 1359 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1360 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1361 PM_CTRL_SERDES_PLL_L1_EN | 1362 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1363 PM_CTRL_ASPM_L0S_EN); 1364 } 1365 } 1366 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1367 1368 return; 1369 } 1370 1371 /** 1372 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1373 * @adapter: board private structure 1374 * 1375 * Configure the Tx /Rx unit of the MAC after a reset. 1376 */ 1377 static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1378 { 1379 struct atl1c_hw *hw = &adapter->hw; 1380 u32 master_ctrl_data = 0; 1381 u32 intr_modrt_data; 1382 u32 data; 1383 1384 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1385 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1386 MASTER_CTRL_RX_ITIMER_EN | 1387 MASTER_CTRL_INT_RDCLR); 1388 /* clear interrupt status */ 1389 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1390 /* Clear any WOL status */ 1391 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1392 /* set Interrupt Clear Timer 1393 * HW will enable self to assert interrupt event to system after 1394 * waiting x-time for software to notify it accept interrupt. 1395 */ 1396 1397 data = CLK_GATING_EN_ALL; 1398 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1399 if (hw->nic_type == athr_l2c_b) 1400 data &= ~CLK_GATING_RXMAC_EN; 1401 } else 1402 data = 0; 1403 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1404 1405 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1406 hw->ict & INT_RETRIG_TIMER_MASK); 1407 1408 atl1c_configure_des_ring(adapter); 1409 1410 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1411 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1412 IRQ_MODRT_TX_TIMER_SHIFT; 1413 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1414 IRQ_MODRT_RX_TIMER_SHIFT; 1415 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1416 master_ctrl_data |= 1417 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1418 } 1419 1420 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1421 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1422 1423 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1424 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1425 1426 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1427 hw->smb_timer & SMB_STAT_TIMER_MASK); 1428 1429 /* set MTU */ 1430 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1431 VLAN_HLEN + ETH_FCS_LEN); 1432 1433 atl1c_configure_tx(adapter); 1434 atl1c_configure_rx(adapter); 1435 atl1c_configure_dma(adapter); 1436 1437 return 0; 1438 } 1439 1440 static int atl1c_configure(struct atl1c_adapter *adapter) 1441 { 1442 struct net_device *netdev = adapter->netdev; 1443 int num; 1444 1445 atl1c_init_ring_ptrs(adapter); 1446 atl1c_set_multi(netdev); 1447 atl1c_restore_vlan(adapter); 1448 1449 num = atl1c_alloc_rx_buffer(adapter); 1450 if (unlikely(num == 0)) 1451 return -ENOMEM; 1452 1453 if (atl1c_configure_mac(adapter)) 1454 return -EIO; 1455 1456 return 0; 1457 } 1458 1459 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1460 { 1461 u16 hw_reg_addr = 0; 1462 unsigned long *stats_item = NULL; 1463 u32 data; 1464 1465 /* update rx status */ 1466 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1467 stats_item = &adapter->hw_stats.rx_ok; 1468 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1469 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1470 *stats_item += data; 1471 stats_item++; 1472 hw_reg_addr += 4; 1473 } 1474 /* update tx status */ 1475 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1476 stats_item = &adapter->hw_stats.tx_ok; 1477 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1478 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1479 *stats_item += data; 1480 stats_item++; 1481 hw_reg_addr += 4; 1482 } 1483 } 1484 1485 /** 1486 * atl1c_get_stats - Get System Network Statistics 1487 * @netdev: network interface device structure 1488 * 1489 * Returns the address of the device statistics structure. 1490 * The statistics are actually updated from the timer callback. 1491 */ 1492 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1493 { 1494 struct atl1c_adapter *adapter = netdev_priv(netdev); 1495 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1496 struct net_device_stats *net_stats = &netdev->stats; 1497 1498 atl1c_update_hw_stats(adapter); 1499 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1500 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1501 net_stats->multicast = hw_stats->rx_mcast; 1502 net_stats->collisions = hw_stats->tx_1_col + 1503 hw_stats->tx_2_col + 1504 hw_stats->tx_late_col + 1505 hw_stats->tx_abort_col; 1506 1507 net_stats->rx_errors = hw_stats->rx_frag + 1508 hw_stats->rx_fcs_err + 1509 hw_stats->rx_len_err + 1510 hw_stats->rx_sz_ov + 1511 hw_stats->rx_rrd_ov + 1512 hw_stats->rx_align_err + 1513 hw_stats->rx_rxf_ov; 1514 1515 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1516 net_stats->rx_length_errors = hw_stats->rx_len_err; 1517 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1518 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1519 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1520 1521 net_stats->tx_errors = hw_stats->tx_late_col + 1522 hw_stats->tx_abort_col + 1523 hw_stats->tx_underrun + 1524 hw_stats->tx_trunc; 1525 1526 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1527 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1528 net_stats->tx_window_errors = hw_stats->tx_late_col; 1529 1530 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1531 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1532 1533 return net_stats; 1534 } 1535 1536 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1537 { 1538 u16 phy_data; 1539 1540 spin_lock(&adapter->mdio_lock); 1541 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1542 spin_unlock(&adapter->mdio_lock); 1543 } 1544 1545 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1546 enum atl1c_trans_queue type) 1547 { 1548 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1549 struct atl1c_buffer *buffer_info; 1550 struct pci_dev *pdev = adapter->pdev; 1551 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1552 u16 hw_next_to_clean; 1553 u16 reg; 1554 1555 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1556 1557 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1558 1559 while (next_to_clean != hw_next_to_clean) { 1560 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1561 atl1c_clean_buffer(pdev, buffer_info); 1562 if (++next_to_clean == tpd_ring->count) 1563 next_to_clean = 0; 1564 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1565 } 1566 1567 if (netif_queue_stopped(adapter->netdev) && 1568 netif_carrier_ok(adapter->netdev)) { 1569 netif_wake_queue(adapter->netdev); 1570 } 1571 1572 return true; 1573 } 1574 1575 /** 1576 * atl1c_intr - Interrupt Handler 1577 * @irq: interrupt number 1578 * @data: pointer to a network interface device structure 1579 */ 1580 static irqreturn_t atl1c_intr(int irq, void *data) 1581 { 1582 struct net_device *netdev = data; 1583 struct atl1c_adapter *adapter = netdev_priv(netdev); 1584 struct pci_dev *pdev = adapter->pdev; 1585 struct atl1c_hw *hw = &adapter->hw; 1586 int max_ints = AT_MAX_INT_WORK; 1587 int handled = IRQ_NONE; 1588 u32 status; 1589 u32 reg_data; 1590 1591 do { 1592 AT_READ_REG(hw, REG_ISR, ®_data); 1593 status = reg_data & hw->intr_mask; 1594 1595 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1596 if (max_ints != AT_MAX_INT_WORK) 1597 handled = IRQ_HANDLED; 1598 break; 1599 } 1600 /* link event */ 1601 if (status & ISR_GPHY) 1602 atl1c_clear_phy_int(adapter); 1603 /* Ack ISR */ 1604 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1605 if (status & ISR_RX_PKT) { 1606 if (likely(napi_schedule_prep(&adapter->napi))) { 1607 hw->intr_mask &= ~ISR_RX_PKT; 1608 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1609 __napi_schedule(&adapter->napi); 1610 } 1611 } 1612 if (status & ISR_TX_PKT) 1613 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1614 1615 handled = IRQ_HANDLED; 1616 /* check if PCIE PHY Link down */ 1617 if (status & ISR_ERROR) { 1618 if (netif_msg_hw(adapter)) 1619 dev_err(&pdev->dev, 1620 "atl1c hardware error (status = 0x%x)\n", 1621 status & ISR_ERROR); 1622 /* reset MAC */ 1623 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1624 schedule_work(&adapter->common_task); 1625 return IRQ_HANDLED; 1626 } 1627 1628 if (status & ISR_OVER) 1629 if (netif_msg_intr(adapter)) 1630 dev_warn(&pdev->dev, 1631 "TX/RX overflow (status = 0x%x)\n", 1632 status & ISR_OVER); 1633 1634 /* link event */ 1635 if (status & (ISR_GPHY | ISR_MANUAL)) { 1636 netdev->stats.tx_carrier_errors++; 1637 atl1c_link_chg_event(adapter); 1638 break; 1639 } 1640 1641 } while (--max_ints > 0); 1642 /* re-enable Interrupt*/ 1643 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1644 return handled; 1645 } 1646 1647 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1648 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1649 { 1650 /* 1651 * The pid field in RRS in not correct sometimes, so we 1652 * cannot figure out if the packet is fragmented or not, 1653 * so we tell the KERNEL CHECKSUM_NONE 1654 */ 1655 skb_checksum_none_assert(skb); 1656 } 1657 1658 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter) 1659 { 1660 struct sk_buff *skb; 1661 struct page *page; 1662 1663 if (adapter->rx_frag_size > PAGE_SIZE) 1664 return netdev_alloc_skb(adapter->netdev, 1665 adapter->rx_buffer_len); 1666 1667 page = adapter->rx_page; 1668 if (!page) { 1669 adapter->rx_page = page = alloc_page(GFP_ATOMIC); 1670 if (unlikely(!page)) 1671 return NULL; 1672 adapter->rx_page_offset = 0; 1673 } 1674 1675 skb = build_skb(page_address(page) + adapter->rx_page_offset, 1676 adapter->rx_frag_size); 1677 if (likely(skb)) { 1678 adapter->rx_page_offset += adapter->rx_frag_size; 1679 if (adapter->rx_page_offset >= PAGE_SIZE) 1680 adapter->rx_page = NULL; 1681 else 1682 get_page(page); 1683 } 1684 return skb; 1685 } 1686 1687 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1688 { 1689 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1690 struct pci_dev *pdev = adapter->pdev; 1691 struct atl1c_buffer *buffer_info, *next_info; 1692 struct sk_buff *skb; 1693 void *vir_addr = NULL; 1694 u16 num_alloc = 0; 1695 u16 rfd_next_to_use, next_next; 1696 struct atl1c_rx_free_desc *rfd_desc; 1697 dma_addr_t mapping; 1698 1699 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1700 if (++next_next == rfd_ring->count) 1701 next_next = 0; 1702 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1703 next_info = &rfd_ring->buffer_info[next_next]; 1704 1705 while (next_info->flags & ATL1C_BUFFER_FREE) { 1706 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1707 1708 skb = atl1c_alloc_skb(adapter); 1709 if (unlikely(!skb)) { 1710 if (netif_msg_rx_err(adapter)) 1711 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1712 break; 1713 } 1714 1715 /* 1716 * Make buffer alignment 2 beyond a 16 byte boundary 1717 * this will result in a 16 byte aligned IP header after 1718 * the 14 byte MAC header is removed 1719 */ 1720 vir_addr = skb->data; 1721 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1722 buffer_info->skb = skb; 1723 buffer_info->length = adapter->rx_buffer_len; 1724 mapping = pci_map_single(pdev, vir_addr, 1725 buffer_info->length, 1726 PCI_DMA_FROMDEVICE); 1727 if (unlikely(pci_dma_mapping_error(pdev, mapping))) { 1728 dev_kfree_skb(skb); 1729 buffer_info->skb = NULL; 1730 buffer_info->length = 0; 1731 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 1732 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed"); 1733 break; 1734 } 1735 buffer_info->dma = mapping; 1736 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1737 ATL1C_PCIMAP_FROMDEVICE); 1738 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1739 rfd_next_to_use = next_next; 1740 if (++next_next == rfd_ring->count) 1741 next_next = 0; 1742 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1743 next_info = &rfd_ring->buffer_info[next_next]; 1744 num_alloc++; 1745 } 1746 1747 if (num_alloc) { 1748 /* TODO: update mailbox here */ 1749 wmb(); 1750 rfd_ring->next_to_use = rfd_next_to_use; 1751 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1752 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1753 } 1754 1755 return num_alloc; 1756 } 1757 1758 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1759 struct atl1c_recv_ret_status *rrs, u16 num) 1760 { 1761 u16 i; 1762 /* the relationship between rrd and rfd is one map one */ 1763 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1764 rrd_ring->next_to_clean)) { 1765 rrs->word3 &= ~RRS_RXD_UPDATED; 1766 if (++rrd_ring->next_to_clean == rrd_ring->count) 1767 rrd_ring->next_to_clean = 0; 1768 } 1769 } 1770 1771 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1772 struct atl1c_recv_ret_status *rrs, u16 num) 1773 { 1774 u16 i; 1775 u16 rfd_index; 1776 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1777 1778 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1779 RRS_RX_RFD_INDEX_MASK; 1780 for (i = 0; i < num; i++) { 1781 buffer_info[rfd_index].skb = NULL; 1782 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1783 ATL1C_BUFFER_FREE); 1784 if (++rfd_index == rfd_ring->count) 1785 rfd_index = 0; 1786 } 1787 rfd_ring->next_to_clean = rfd_index; 1788 } 1789 1790 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1791 int *work_done, int work_to_do) 1792 { 1793 u16 rfd_num, rfd_index; 1794 u16 count = 0; 1795 u16 length; 1796 struct pci_dev *pdev = adapter->pdev; 1797 struct net_device *netdev = adapter->netdev; 1798 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1799 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1800 struct sk_buff *skb; 1801 struct atl1c_recv_ret_status *rrs; 1802 struct atl1c_buffer *buffer_info; 1803 1804 while (1) { 1805 if (*work_done >= work_to_do) 1806 break; 1807 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1808 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1809 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1810 RRS_RX_RFD_CNT_MASK; 1811 if (unlikely(rfd_num != 1)) 1812 /* TODO support mul rfd*/ 1813 if (netif_msg_rx_err(adapter)) 1814 dev_warn(&pdev->dev, 1815 "Multi rfd not support yet!\n"); 1816 goto rrs_checked; 1817 } else { 1818 break; 1819 } 1820 rrs_checked: 1821 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1822 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1823 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1824 if (netif_msg_rx_err(adapter)) 1825 dev_warn(&pdev->dev, 1826 "wrong packet! rrs word3 is %x\n", 1827 rrs->word3); 1828 continue; 1829 } 1830 1831 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1832 RRS_PKT_SIZE_MASK); 1833 /* Good Receive */ 1834 if (likely(rfd_num == 1)) { 1835 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1836 RRS_RX_RFD_INDEX_MASK; 1837 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1838 pci_unmap_single(pdev, buffer_info->dma, 1839 buffer_info->length, PCI_DMA_FROMDEVICE); 1840 skb = buffer_info->skb; 1841 } else { 1842 /* TODO */ 1843 if (netif_msg_rx_err(adapter)) 1844 dev_warn(&pdev->dev, 1845 "Multi rfd not support yet!\n"); 1846 break; 1847 } 1848 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1849 skb_put(skb, length - ETH_FCS_LEN); 1850 skb->protocol = eth_type_trans(skb, netdev); 1851 atl1c_rx_checksum(adapter, skb, rrs); 1852 if (rrs->word3 & RRS_VLAN_INS) { 1853 u16 vlan; 1854 1855 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1856 vlan = le16_to_cpu(vlan); 1857 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); 1858 } 1859 netif_receive_skb(skb); 1860 1861 (*work_done)++; 1862 count++; 1863 } 1864 if (count) 1865 atl1c_alloc_rx_buffer(adapter); 1866 } 1867 1868 /** 1869 * atl1c_clean - NAPI Rx polling callback 1870 */ 1871 static int atl1c_clean(struct napi_struct *napi, int budget) 1872 { 1873 struct atl1c_adapter *adapter = 1874 container_of(napi, struct atl1c_adapter, napi); 1875 int work_done = 0; 1876 1877 /* Keep link state information with original netdev */ 1878 if (!netif_carrier_ok(adapter->netdev)) 1879 goto quit_polling; 1880 /* just enable one RXQ */ 1881 atl1c_clean_rx_irq(adapter, &work_done, budget); 1882 1883 if (work_done < budget) { 1884 quit_polling: 1885 napi_complete(napi); 1886 adapter->hw.intr_mask |= ISR_RX_PKT; 1887 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1888 } 1889 return work_done; 1890 } 1891 1892 #ifdef CONFIG_NET_POLL_CONTROLLER 1893 1894 /* 1895 * Polling 'interrupt' - used by things like netconsole to send skbs 1896 * without having to re-enable interrupts. It's not called while 1897 * the interrupt routine is executing. 1898 */ 1899 static void atl1c_netpoll(struct net_device *netdev) 1900 { 1901 struct atl1c_adapter *adapter = netdev_priv(netdev); 1902 1903 disable_irq(adapter->pdev->irq); 1904 atl1c_intr(adapter->pdev->irq, netdev); 1905 enable_irq(adapter->pdev->irq); 1906 } 1907 #endif 1908 1909 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1910 { 1911 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1912 u16 next_to_use = 0; 1913 u16 next_to_clean = 0; 1914 1915 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1916 next_to_use = tpd_ring->next_to_use; 1917 1918 return (u16)(next_to_clean > next_to_use) ? 1919 (next_to_clean - next_to_use - 1) : 1920 (tpd_ring->count + next_to_clean - next_to_use - 1); 1921 } 1922 1923 /* 1924 * get next usable tpd 1925 * Note: should call atl1c_tdp_avail to make sure 1926 * there is enough tpd to use 1927 */ 1928 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1929 enum atl1c_trans_queue type) 1930 { 1931 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1932 struct atl1c_tpd_desc *tpd_desc; 1933 u16 next_to_use = 0; 1934 1935 next_to_use = tpd_ring->next_to_use; 1936 if (++tpd_ring->next_to_use == tpd_ring->count) 1937 tpd_ring->next_to_use = 0; 1938 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1939 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1940 return tpd_desc; 1941 } 1942 1943 static struct atl1c_buffer * 1944 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1945 { 1946 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1947 1948 return &tpd_ring->buffer_info[tpd - 1949 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1950 } 1951 1952 /* Calculate the transmit packet descript needed*/ 1953 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1954 { 1955 u16 tpd_req; 1956 u16 proto_hdr_len = 0; 1957 1958 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1959 1960 if (skb_is_gso(skb)) { 1961 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1962 if (proto_hdr_len < skb_headlen(skb)) 1963 tpd_req++; 1964 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1965 tpd_req++; 1966 } 1967 return tpd_req; 1968 } 1969 1970 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1971 struct sk_buff *skb, 1972 struct atl1c_tpd_desc **tpd, 1973 enum atl1c_trans_queue type) 1974 { 1975 struct pci_dev *pdev = adapter->pdev; 1976 unsigned short offload_type; 1977 u8 hdr_len; 1978 u32 real_len; 1979 1980 if (skb_is_gso(skb)) { 1981 int err; 1982 1983 err = skb_cow_head(skb, 0); 1984 if (err < 0) 1985 return err; 1986 1987 offload_type = skb_shinfo(skb)->gso_type; 1988 1989 if (offload_type & SKB_GSO_TCPV4) { 1990 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1991 + ntohs(ip_hdr(skb)->tot_len)); 1992 1993 if (real_len < skb->len) 1994 pskb_trim(skb, real_len); 1995 1996 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1997 if (unlikely(skb->len == hdr_len)) { 1998 /* only xsum need */ 1999 if (netif_msg_tx_queued(adapter)) 2000 dev_warn(&pdev->dev, 2001 "IPV4 tso with zero data??\n"); 2002 goto check_sum; 2003 } else { 2004 ip_hdr(skb)->check = 0; 2005 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2006 ip_hdr(skb)->saddr, 2007 ip_hdr(skb)->daddr, 2008 0, IPPROTO_TCP, 0); 2009 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2010 } 2011 } 2012 2013 if (offload_type & SKB_GSO_TCPV6) { 2014 struct atl1c_tpd_ext_desc *etpd = 2015 *(struct atl1c_tpd_ext_desc **)(tpd); 2016 2017 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2018 *tpd = atl1c_get_tpd(adapter, type); 2019 ipv6_hdr(skb)->payload_len = 0; 2020 /* check payload == 0 byte ? */ 2021 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2022 if (unlikely(skb->len == hdr_len)) { 2023 /* only xsum need */ 2024 if (netif_msg_tx_queued(adapter)) 2025 dev_warn(&pdev->dev, 2026 "IPV6 tso with zero data??\n"); 2027 goto check_sum; 2028 } else 2029 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2030 &ipv6_hdr(skb)->saddr, 2031 &ipv6_hdr(skb)->daddr, 2032 0, IPPROTO_TCP, 0); 2033 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2034 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2035 etpd->pkt_len = cpu_to_le32(skb->len); 2036 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2037 } 2038 2039 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2040 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2041 TPD_TCPHDR_OFFSET_SHIFT; 2042 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2043 TPD_MSS_SHIFT; 2044 return 0; 2045 } 2046 2047 check_sum: 2048 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2049 u8 css, cso; 2050 cso = skb_checksum_start_offset(skb); 2051 2052 if (unlikely(cso & 0x1)) { 2053 if (netif_msg_tx_err(adapter)) 2054 dev_err(&adapter->pdev->dev, 2055 "payload offset should not an event number\n"); 2056 return -1; 2057 } else { 2058 css = cso + skb->csum_offset; 2059 2060 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2061 TPD_PLOADOFFSET_SHIFT; 2062 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2063 TPD_CCSUM_OFFSET_SHIFT; 2064 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2065 } 2066 } 2067 return 0; 2068 } 2069 2070 static void atl1c_tx_rollback(struct atl1c_adapter *adpt, 2071 struct atl1c_tpd_desc *first_tpd, 2072 enum atl1c_trans_queue type) 2073 { 2074 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type]; 2075 struct atl1c_buffer *buffer_info; 2076 struct atl1c_tpd_desc *tpd; 2077 u16 first_index, index; 2078 2079 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc; 2080 index = first_index; 2081 while (index != tpd_ring->next_to_use) { 2082 tpd = ATL1C_TPD_DESC(tpd_ring, index); 2083 buffer_info = &tpd_ring->buffer_info[index]; 2084 atl1c_clean_buffer(adpt->pdev, buffer_info); 2085 memset(tpd, 0, sizeof(struct atl1c_tpd_desc)); 2086 if (++index == tpd_ring->count) 2087 index = 0; 2088 } 2089 tpd_ring->next_to_use = first_index; 2090 } 2091 2092 static int atl1c_tx_map(struct atl1c_adapter *adapter, 2093 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2094 enum atl1c_trans_queue type) 2095 { 2096 struct atl1c_tpd_desc *use_tpd = NULL; 2097 struct atl1c_buffer *buffer_info = NULL; 2098 u16 buf_len = skb_headlen(skb); 2099 u16 map_len = 0; 2100 u16 mapped_len = 0; 2101 u16 hdr_len = 0; 2102 u16 nr_frags; 2103 u16 f; 2104 int tso; 2105 2106 nr_frags = skb_shinfo(skb)->nr_frags; 2107 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2108 if (tso) { 2109 /* TSO */ 2110 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2111 use_tpd = tpd; 2112 2113 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2114 buffer_info->length = map_len; 2115 buffer_info->dma = pci_map_single(adapter->pdev, 2116 skb->data, hdr_len, PCI_DMA_TODEVICE); 2117 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2118 buffer_info->dma))) 2119 goto err_dma; 2120 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2121 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2122 ATL1C_PCIMAP_TODEVICE); 2123 mapped_len += map_len; 2124 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2125 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2126 } 2127 2128 if (mapped_len < buf_len) { 2129 /* mapped_len == 0, means we should use the first tpd, 2130 which is given by caller */ 2131 if (mapped_len == 0) 2132 use_tpd = tpd; 2133 else { 2134 use_tpd = atl1c_get_tpd(adapter, type); 2135 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2136 } 2137 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2138 buffer_info->length = buf_len - mapped_len; 2139 buffer_info->dma = 2140 pci_map_single(adapter->pdev, skb->data + mapped_len, 2141 buffer_info->length, PCI_DMA_TODEVICE); 2142 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2143 buffer_info->dma))) 2144 goto err_dma; 2145 2146 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2147 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2148 ATL1C_PCIMAP_TODEVICE); 2149 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2150 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2151 } 2152 2153 for (f = 0; f < nr_frags; f++) { 2154 struct skb_frag_struct *frag; 2155 2156 frag = &skb_shinfo(skb)->frags[f]; 2157 2158 use_tpd = atl1c_get_tpd(adapter, type); 2159 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2160 2161 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2162 buffer_info->length = skb_frag_size(frag); 2163 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2164 frag, 0, 2165 buffer_info->length, 2166 DMA_TO_DEVICE); 2167 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) 2168 goto err_dma; 2169 2170 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2171 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2172 ATL1C_PCIMAP_TODEVICE); 2173 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2174 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2175 } 2176 2177 /* The last tpd */ 2178 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2179 /* The last buffer info contain the skb address, 2180 so it will be free after unmap */ 2181 buffer_info->skb = skb; 2182 2183 return 0; 2184 2185 err_dma: 2186 buffer_info->dma = 0; 2187 buffer_info->length = 0; 2188 return -1; 2189 } 2190 2191 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2192 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2193 { 2194 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2195 u16 reg; 2196 2197 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2198 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2199 } 2200 2201 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2202 struct net_device *netdev) 2203 { 2204 struct atl1c_adapter *adapter = netdev_priv(netdev); 2205 unsigned long flags; 2206 u16 tpd_req = 1; 2207 struct atl1c_tpd_desc *tpd; 2208 enum atl1c_trans_queue type = atl1c_trans_normal; 2209 2210 if (test_bit(__AT_DOWN, &adapter->flags)) { 2211 dev_kfree_skb_any(skb); 2212 return NETDEV_TX_OK; 2213 } 2214 2215 tpd_req = atl1c_cal_tpd_req(skb); 2216 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { 2217 if (netif_msg_pktdata(adapter)) 2218 dev_info(&adapter->pdev->dev, "tx locked\n"); 2219 return NETDEV_TX_LOCKED; 2220 } 2221 2222 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2223 /* no enough descriptor, just stop queue */ 2224 netif_stop_queue(netdev); 2225 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2226 return NETDEV_TX_BUSY; 2227 } 2228 2229 tpd = atl1c_get_tpd(adapter, type); 2230 2231 /* do TSO and check sum */ 2232 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2233 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2234 dev_kfree_skb_any(skb); 2235 return NETDEV_TX_OK; 2236 } 2237 2238 if (unlikely(vlan_tx_tag_present(skb))) { 2239 u16 vlan = vlan_tx_tag_get(skb); 2240 __le16 tag; 2241 2242 vlan = cpu_to_le16(vlan); 2243 AT_VLAN_TO_TAG(vlan, tag); 2244 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2245 tpd->vlan_tag = tag; 2246 } 2247 2248 if (skb_network_offset(skb) != ETH_HLEN) 2249 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2250 2251 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) { 2252 netif_info(adapter, tx_done, adapter->netdev, 2253 "tx-skb droppted due to dma error\n"); 2254 /* roll back tpd/buffer */ 2255 atl1c_tx_rollback(adapter, tpd, type); 2256 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2257 dev_kfree_skb_any(skb); 2258 } else { 2259 atl1c_tx_queue(adapter, skb, tpd, type); 2260 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2261 } 2262 2263 return NETDEV_TX_OK; 2264 } 2265 2266 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2267 { 2268 struct net_device *netdev = adapter->netdev; 2269 2270 free_irq(adapter->pdev->irq, netdev); 2271 2272 if (adapter->have_msi) 2273 pci_disable_msi(adapter->pdev); 2274 } 2275 2276 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2277 { 2278 struct pci_dev *pdev = adapter->pdev; 2279 struct net_device *netdev = adapter->netdev; 2280 int flags = 0; 2281 int err = 0; 2282 2283 adapter->have_msi = true; 2284 err = pci_enable_msi(adapter->pdev); 2285 if (err) { 2286 if (netif_msg_ifup(adapter)) 2287 dev_err(&pdev->dev, 2288 "Unable to allocate MSI interrupt Error: %d\n", 2289 err); 2290 adapter->have_msi = false; 2291 } 2292 2293 if (!adapter->have_msi) 2294 flags |= IRQF_SHARED; 2295 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2296 netdev->name, netdev); 2297 if (err) { 2298 if (netif_msg_ifup(adapter)) 2299 dev_err(&pdev->dev, 2300 "Unable to allocate interrupt Error: %d\n", 2301 err); 2302 if (adapter->have_msi) 2303 pci_disable_msi(adapter->pdev); 2304 return err; 2305 } 2306 if (netif_msg_ifup(adapter)) 2307 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2308 return err; 2309 } 2310 2311 2312 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2313 { 2314 /* release tx-pending skbs and reset tx/rx ring index */ 2315 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2316 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2317 atl1c_clean_rx_ring(adapter); 2318 } 2319 2320 static int atl1c_up(struct atl1c_adapter *adapter) 2321 { 2322 struct net_device *netdev = adapter->netdev; 2323 int err; 2324 2325 netif_carrier_off(netdev); 2326 2327 err = atl1c_configure(adapter); 2328 if (unlikely(err)) 2329 goto err_up; 2330 2331 err = atl1c_request_irq(adapter); 2332 if (unlikely(err)) 2333 goto err_up; 2334 2335 atl1c_check_link_status(adapter); 2336 clear_bit(__AT_DOWN, &adapter->flags); 2337 napi_enable(&adapter->napi); 2338 atl1c_irq_enable(adapter); 2339 netif_start_queue(netdev); 2340 return err; 2341 2342 err_up: 2343 atl1c_clean_rx_ring(adapter); 2344 return err; 2345 } 2346 2347 static void atl1c_down(struct atl1c_adapter *adapter) 2348 { 2349 struct net_device *netdev = adapter->netdev; 2350 2351 atl1c_del_timer(adapter); 2352 adapter->work_event = 0; /* clear all event */ 2353 /* signal that we're down so the interrupt handler does not 2354 * reschedule our watchdog timer */ 2355 set_bit(__AT_DOWN, &adapter->flags); 2356 netif_carrier_off(netdev); 2357 napi_disable(&adapter->napi); 2358 atl1c_irq_disable(adapter); 2359 atl1c_free_irq(adapter); 2360 /* disable ASPM if device inactive */ 2361 atl1c_disable_l0s_l1(&adapter->hw); 2362 /* reset MAC to disable all RX/TX */ 2363 atl1c_reset_mac(&adapter->hw); 2364 msleep(1); 2365 2366 adapter->link_speed = SPEED_0; 2367 adapter->link_duplex = -1; 2368 atl1c_reset_dma_ring(adapter); 2369 } 2370 2371 /** 2372 * atl1c_open - Called when a network interface is made active 2373 * @netdev: network interface device structure 2374 * 2375 * Returns 0 on success, negative value on failure 2376 * 2377 * The open entry point is called when a network interface is made 2378 * active by the system (IFF_UP). At this point all resources needed 2379 * for transmit and receive operations are allocated, the interrupt 2380 * handler is registered with the OS, the watchdog timer is started, 2381 * and the stack is notified that the interface is ready. 2382 */ 2383 static int atl1c_open(struct net_device *netdev) 2384 { 2385 struct atl1c_adapter *adapter = netdev_priv(netdev); 2386 int err; 2387 2388 /* disallow open during test */ 2389 if (test_bit(__AT_TESTING, &adapter->flags)) 2390 return -EBUSY; 2391 2392 /* allocate rx/tx dma buffer & descriptors */ 2393 err = atl1c_setup_ring_resources(adapter); 2394 if (unlikely(err)) 2395 return err; 2396 2397 err = atl1c_up(adapter); 2398 if (unlikely(err)) 2399 goto err_up; 2400 2401 return 0; 2402 2403 err_up: 2404 atl1c_free_irq(adapter); 2405 atl1c_free_ring_resources(adapter); 2406 atl1c_reset_mac(&adapter->hw); 2407 return err; 2408 } 2409 2410 /** 2411 * atl1c_close - Disables a network interface 2412 * @netdev: network interface device structure 2413 * 2414 * Returns 0, this is not allowed to fail 2415 * 2416 * The close entry point is called when an interface is de-activated 2417 * by the OS. The hardware is still under the drivers control, but 2418 * needs to be disabled. A global MAC reset is issued to stop the 2419 * hardware, and all transmit and receive resources are freed. 2420 */ 2421 static int atl1c_close(struct net_device *netdev) 2422 { 2423 struct atl1c_adapter *adapter = netdev_priv(netdev); 2424 2425 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2426 set_bit(__AT_DOWN, &adapter->flags); 2427 cancel_work_sync(&adapter->common_task); 2428 atl1c_down(adapter); 2429 atl1c_free_ring_resources(adapter); 2430 return 0; 2431 } 2432 2433 static int atl1c_suspend(struct device *dev) 2434 { 2435 struct pci_dev *pdev = to_pci_dev(dev); 2436 struct net_device *netdev = pci_get_drvdata(pdev); 2437 struct atl1c_adapter *adapter = netdev_priv(netdev); 2438 struct atl1c_hw *hw = &adapter->hw; 2439 u32 wufc = adapter->wol; 2440 2441 atl1c_disable_l0s_l1(hw); 2442 if (netif_running(netdev)) { 2443 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2444 atl1c_down(adapter); 2445 } 2446 netif_device_detach(netdev); 2447 2448 if (wufc) 2449 if (atl1c_phy_to_ps_link(hw) != 0) 2450 dev_dbg(&pdev->dev, "phy power saving failed"); 2451 2452 atl1c_power_saving(hw, wufc); 2453 2454 return 0; 2455 } 2456 2457 #ifdef CONFIG_PM_SLEEP 2458 static int atl1c_resume(struct device *dev) 2459 { 2460 struct pci_dev *pdev = to_pci_dev(dev); 2461 struct net_device *netdev = pci_get_drvdata(pdev); 2462 struct atl1c_adapter *adapter = netdev_priv(netdev); 2463 2464 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2465 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2466 2467 atl1c_phy_reset(&adapter->hw); 2468 atl1c_reset_mac(&adapter->hw); 2469 atl1c_phy_init(&adapter->hw); 2470 2471 #if 0 2472 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2473 pm_data &= ~PM_CTRLSTAT_PME_EN; 2474 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2475 #endif 2476 2477 netif_device_attach(netdev); 2478 if (netif_running(netdev)) 2479 atl1c_up(adapter); 2480 2481 return 0; 2482 } 2483 #endif 2484 2485 static void atl1c_shutdown(struct pci_dev *pdev) 2486 { 2487 struct net_device *netdev = pci_get_drvdata(pdev); 2488 struct atl1c_adapter *adapter = netdev_priv(netdev); 2489 2490 atl1c_suspend(&pdev->dev); 2491 pci_wake_from_d3(pdev, adapter->wol); 2492 pci_set_power_state(pdev, PCI_D3hot); 2493 } 2494 2495 static const struct net_device_ops atl1c_netdev_ops = { 2496 .ndo_open = atl1c_open, 2497 .ndo_stop = atl1c_close, 2498 .ndo_validate_addr = eth_validate_addr, 2499 .ndo_start_xmit = atl1c_xmit_frame, 2500 .ndo_set_mac_address = atl1c_set_mac_addr, 2501 .ndo_set_rx_mode = atl1c_set_multi, 2502 .ndo_change_mtu = atl1c_change_mtu, 2503 .ndo_fix_features = atl1c_fix_features, 2504 .ndo_set_features = atl1c_set_features, 2505 .ndo_do_ioctl = atl1c_ioctl, 2506 .ndo_tx_timeout = atl1c_tx_timeout, 2507 .ndo_get_stats = atl1c_get_stats, 2508 #ifdef CONFIG_NET_POLL_CONTROLLER 2509 .ndo_poll_controller = atl1c_netpoll, 2510 #endif 2511 }; 2512 2513 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2514 { 2515 SET_NETDEV_DEV(netdev, &pdev->dev); 2516 pci_set_drvdata(pdev, netdev); 2517 2518 netdev->netdev_ops = &atl1c_netdev_ops; 2519 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2520 atl1c_set_ethtool_ops(netdev); 2521 2522 /* TODO: add when ready */ 2523 netdev->hw_features = NETIF_F_SG | 2524 NETIF_F_HW_CSUM | 2525 NETIF_F_HW_VLAN_CTAG_RX | 2526 NETIF_F_TSO | 2527 NETIF_F_TSO6; 2528 netdev->features = netdev->hw_features | 2529 NETIF_F_HW_VLAN_CTAG_TX; 2530 return 0; 2531 } 2532 2533 /** 2534 * atl1c_probe - Device Initialization Routine 2535 * @pdev: PCI device information struct 2536 * @ent: entry in atl1c_pci_tbl 2537 * 2538 * Returns 0 on success, negative on failure 2539 * 2540 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2541 * The OS initialization, configuring of the adapter private structure, 2542 * and a hardware reset occur. 2543 */ 2544 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2545 { 2546 struct net_device *netdev; 2547 struct atl1c_adapter *adapter; 2548 static int cards_found; 2549 2550 int err = 0; 2551 2552 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2553 err = pci_enable_device_mem(pdev); 2554 if (err) { 2555 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2556 return err; 2557 } 2558 2559 /* 2560 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2561 * shared register for the high 32 bits, so only a single, aligned, 2562 * 4 GB physical address range can be used at a time. 2563 * 2564 * Supporting 64-bit DMA on this hardware is more trouble than it's 2565 * worth. It is far easier to limit to 32-bit DMA than update 2566 * various kernel subsystems to support the mechanics required by a 2567 * fixed-high-32-bit system. 2568 */ 2569 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2570 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2571 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2572 goto err_dma; 2573 } 2574 2575 err = pci_request_regions(pdev, atl1c_driver_name); 2576 if (err) { 2577 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2578 goto err_pci_reg; 2579 } 2580 2581 pci_set_master(pdev); 2582 2583 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2584 if (netdev == NULL) { 2585 err = -ENOMEM; 2586 goto err_alloc_etherdev; 2587 } 2588 2589 err = atl1c_init_netdev(netdev, pdev); 2590 if (err) { 2591 dev_err(&pdev->dev, "init netdevice failed\n"); 2592 goto err_init_netdev; 2593 } 2594 adapter = netdev_priv(netdev); 2595 adapter->bd_number = cards_found; 2596 adapter->netdev = netdev; 2597 adapter->pdev = pdev; 2598 adapter->hw.adapter = adapter; 2599 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2600 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2601 if (!adapter->hw.hw_addr) { 2602 err = -EIO; 2603 dev_err(&pdev->dev, "cannot map device registers\n"); 2604 goto err_ioremap; 2605 } 2606 2607 /* init mii data */ 2608 adapter->mii.dev = netdev; 2609 adapter->mii.mdio_read = atl1c_mdio_read; 2610 adapter->mii.mdio_write = atl1c_mdio_write; 2611 adapter->mii.phy_id_mask = 0x1f; 2612 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2613 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2614 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2615 (unsigned long)adapter); 2616 /* setup the private structure */ 2617 err = atl1c_sw_init(adapter); 2618 if (err) { 2619 dev_err(&pdev->dev, "net device private data init failed\n"); 2620 goto err_sw_init; 2621 } 2622 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2623 2624 /* Init GPHY as early as possible due to power saving issue */ 2625 atl1c_phy_reset(&adapter->hw); 2626 2627 err = atl1c_reset_mac(&adapter->hw); 2628 if (err) { 2629 err = -EIO; 2630 goto err_reset; 2631 } 2632 2633 /* reset the controller to 2634 * put the device in a known good starting state */ 2635 err = atl1c_phy_init(&adapter->hw); 2636 if (err) { 2637 err = -EIO; 2638 goto err_reset; 2639 } 2640 if (atl1c_read_mac_addr(&adapter->hw)) { 2641 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2642 netdev->addr_assign_type = NET_ADDR_RANDOM; 2643 } 2644 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2645 if (netif_msg_probe(adapter)) 2646 dev_dbg(&pdev->dev, "mac address : %pM\n", 2647 adapter->hw.mac_addr); 2648 2649 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2650 INIT_WORK(&adapter->common_task, atl1c_common_task); 2651 adapter->work_event = 0; 2652 err = register_netdev(netdev); 2653 if (err) { 2654 dev_err(&pdev->dev, "register netdevice failed\n"); 2655 goto err_register; 2656 } 2657 2658 if (netif_msg_probe(adapter)) 2659 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2660 cards_found++; 2661 return 0; 2662 2663 err_reset: 2664 err_register: 2665 err_sw_init: 2666 iounmap(adapter->hw.hw_addr); 2667 err_init_netdev: 2668 err_ioremap: 2669 free_netdev(netdev); 2670 err_alloc_etherdev: 2671 pci_release_regions(pdev); 2672 err_pci_reg: 2673 err_dma: 2674 pci_disable_device(pdev); 2675 return err; 2676 } 2677 2678 /** 2679 * atl1c_remove - Device Removal Routine 2680 * @pdev: PCI device information struct 2681 * 2682 * atl1c_remove is called by the PCI subsystem to alert the driver 2683 * that it should release a PCI device. The could be caused by a 2684 * Hot-Plug event, or because the driver is going to be removed from 2685 * memory. 2686 */ 2687 static void atl1c_remove(struct pci_dev *pdev) 2688 { 2689 struct net_device *netdev = pci_get_drvdata(pdev); 2690 struct atl1c_adapter *adapter = netdev_priv(netdev); 2691 2692 unregister_netdev(netdev); 2693 /* restore permanent address */ 2694 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2695 atl1c_phy_disable(&adapter->hw); 2696 2697 iounmap(adapter->hw.hw_addr); 2698 2699 pci_release_regions(pdev); 2700 pci_disable_device(pdev); 2701 free_netdev(netdev); 2702 } 2703 2704 /** 2705 * atl1c_io_error_detected - called when PCI error is detected 2706 * @pdev: Pointer to PCI device 2707 * @state: The current pci connection state 2708 * 2709 * This function is called after a PCI bus error affecting 2710 * this device has been detected. 2711 */ 2712 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2713 pci_channel_state_t state) 2714 { 2715 struct net_device *netdev = pci_get_drvdata(pdev); 2716 struct atl1c_adapter *adapter = netdev_priv(netdev); 2717 2718 netif_device_detach(netdev); 2719 2720 if (state == pci_channel_io_perm_failure) 2721 return PCI_ERS_RESULT_DISCONNECT; 2722 2723 if (netif_running(netdev)) 2724 atl1c_down(adapter); 2725 2726 pci_disable_device(pdev); 2727 2728 /* Request a slot slot reset. */ 2729 return PCI_ERS_RESULT_NEED_RESET; 2730 } 2731 2732 /** 2733 * atl1c_io_slot_reset - called after the pci bus has been reset. 2734 * @pdev: Pointer to PCI device 2735 * 2736 * Restart the card from scratch, as if from a cold-boot. Implementation 2737 * resembles the first-half of the e1000_resume routine. 2738 */ 2739 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2740 { 2741 struct net_device *netdev = pci_get_drvdata(pdev); 2742 struct atl1c_adapter *adapter = netdev_priv(netdev); 2743 2744 if (pci_enable_device(pdev)) { 2745 if (netif_msg_hw(adapter)) 2746 dev_err(&pdev->dev, 2747 "Cannot re-enable PCI device after reset\n"); 2748 return PCI_ERS_RESULT_DISCONNECT; 2749 } 2750 pci_set_master(pdev); 2751 2752 pci_enable_wake(pdev, PCI_D3hot, 0); 2753 pci_enable_wake(pdev, PCI_D3cold, 0); 2754 2755 atl1c_reset_mac(&adapter->hw); 2756 2757 return PCI_ERS_RESULT_RECOVERED; 2758 } 2759 2760 /** 2761 * atl1c_io_resume - called when traffic can start flowing again. 2762 * @pdev: Pointer to PCI device 2763 * 2764 * This callback is called when the error recovery driver tells us that 2765 * its OK to resume normal operation. Implementation resembles the 2766 * second-half of the atl1c_resume routine. 2767 */ 2768 static void atl1c_io_resume(struct pci_dev *pdev) 2769 { 2770 struct net_device *netdev = pci_get_drvdata(pdev); 2771 struct atl1c_adapter *adapter = netdev_priv(netdev); 2772 2773 if (netif_running(netdev)) { 2774 if (atl1c_up(adapter)) { 2775 if (netif_msg_hw(adapter)) 2776 dev_err(&pdev->dev, 2777 "Cannot bring device back up after reset\n"); 2778 return; 2779 } 2780 } 2781 2782 netif_device_attach(netdev); 2783 } 2784 2785 static const struct pci_error_handlers atl1c_err_handler = { 2786 .error_detected = atl1c_io_error_detected, 2787 .slot_reset = atl1c_io_slot_reset, 2788 .resume = atl1c_io_resume, 2789 }; 2790 2791 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2792 2793 static struct pci_driver atl1c_driver = { 2794 .name = atl1c_driver_name, 2795 .id_table = atl1c_pci_tbl, 2796 .probe = atl1c_probe, 2797 .remove = atl1c_remove, 2798 .shutdown = atl1c_shutdown, 2799 .err_handler = &atl1c_err_handler, 2800 .driver.pm = &atl1c_pm_ops, 2801 }; 2802 2803 module_pci_driver(atl1c_driver); 2804