1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 28 /* 29 * atl1c_pci_tbl - PCI Device ID Table 30 * 31 * Wildcard entries (PCI_ANY_ID) should come last 32 * Last entry must be all 0s 33 * 34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 35 * Class, Class Mask, private data (not used) } 36 */ 37 static const struct pci_device_id atl1c_pci_tbl[] = { 38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 44 /* required last entry */ 45 { 0 } 46 }; 47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 48 49 MODULE_AUTHOR("Jie Yang"); 50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 51 MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver"); 52 MODULE_LICENSE("GPL"); 53 MODULE_VERSION(ATL1C_DRV_VERSION); 54 55 static int atl1c_stop_mac(struct atl1c_hw *hw); 56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 58 static void atl1c_start_mac(struct atl1c_adapter *adapter); 59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 60 int *work_done, int work_to_do); 61 static int atl1c_up(struct atl1c_adapter *adapter); 62 static void atl1c_down(struct atl1c_adapter *adapter); 63 static int atl1c_reset_mac(struct atl1c_hw *hw); 64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter); 65 static int atl1c_configure(struct atl1c_adapter *adapter); 66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter); 67 68 69 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 70 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 71 static void atl1c_pcie_patch(struct atl1c_hw *hw) 72 { 73 u32 mst_data, data; 74 75 /* pclk sel could switch to 25M */ 76 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 77 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 78 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 79 80 /* WoL/PCIE related settings */ 81 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 82 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 83 data |= PCIE_PHYMISC_FORCE_RCV_DET; 84 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 85 } else { /* new dev set bit5 of MASTER */ 86 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 87 AT_WRITE_REG(hw, REG_MASTER_CTRL, 88 mst_data | MASTER_CTRL_WAKEN_25M); 89 } 90 /* aspm/PCIE setting only for l2cb 1.0 */ 91 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 92 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 93 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 94 L2CB1_PCIE_PHYMISC2_CDR_BW); 95 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 96 L2CB1_PCIE_PHYMISC2_L0S_TH); 97 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 98 /* extend L1 sync timer */ 99 AT_READ_REG(hw, REG_LINK_CTRL, &data); 100 data |= LINK_CTRL_EXT_SYNC; 101 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 102 } 103 /* l2cb 1.x & l1d 1.x */ 104 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 105 AT_READ_REG(hw, REG_PM_CTRL, &data); 106 data |= PM_CTRL_L0S_BUFSRX_EN; 107 AT_WRITE_REG(hw, REG_PM_CTRL, data); 108 /* clear vendor msg */ 109 AT_READ_REG(hw, REG_DMA_DBG, &data); 110 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 111 } 112 } 113 114 /* FIXME: no need any more ? */ 115 /* 116 * atl1c_init_pcie - init PCIE module 117 */ 118 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 119 { 120 u32 data; 121 u32 pci_cmd; 122 struct pci_dev *pdev = hw->adapter->pdev; 123 int pos; 124 125 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 126 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 127 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 128 PCI_COMMAND_IO); 129 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 130 131 /* 132 * Clear any PowerSaveing Settings 133 */ 134 pci_enable_wake(pdev, PCI_D3hot, 0); 135 pci_enable_wake(pdev, PCI_D3cold, 0); 136 /* wol sts read-clear */ 137 AT_READ_REG(hw, REG_WOL_CTRL, &data); 138 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 139 140 /* 141 * Mask some pcie error bits 142 */ 143 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 144 if (pos) { 145 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 146 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 147 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 148 } 149 /* clear error status */ 150 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, 151 PCI_EXP_DEVSTA_NFED | 152 PCI_EXP_DEVSTA_FED | 153 PCI_EXP_DEVSTA_CED | 154 PCI_EXP_DEVSTA_URD); 155 156 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 157 data &= ~LTSSM_ID_EN_WRO; 158 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 159 160 atl1c_pcie_patch(hw); 161 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 162 atl1c_disable_l0s_l1(hw); 163 164 msleep(5); 165 } 166 167 /** 168 * atl1c_irq_enable - Enable default interrupt generation settings 169 * @adapter: board private structure 170 */ 171 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 172 { 173 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 174 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 175 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 176 AT_WRITE_FLUSH(&adapter->hw); 177 } 178 } 179 180 /** 181 * atl1c_irq_disable - Mask off interrupt generation on the NIC 182 * @adapter: board private structure 183 */ 184 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 185 { 186 atomic_inc(&adapter->irq_sem); 187 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 188 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 189 AT_WRITE_FLUSH(&adapter->hw); 190 synchronize_irq(adapter->pdev->irq); 191 } 192 193 /** 194 * atl1c_irq_reset - reset interrupt confiure on the NIC 195 * @adapter: board private structure 196 */ 197 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 198 { 199 atomic_set(&adapter->irq_sem, 1); 200 atl1c_irq_enable(adapter); 201 } 202 203 /* 204 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 205 * of the idle status register until the device is actually idle 206 */ 207 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 208 { 209 int timeout; 210 u32 data; 211 212 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 213 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 214 if ((data & modu_ctrl) == 0) 215 return 0; 216 msleep(1); 217 } 218 return data; 219 } 220 221 /** 222 * atl1c_phy_config - Timer Call-back 223 * @data: pointer to netdev cast into an unsigned long 224 */ 225 static void atl1c_phy_config(unsigned long data) 226 { 227 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 228 struct atl1c_hw *hw = &adapter->hw; 229 unsigned long flags; 230 231 spin_lock_irqsave(&adapter->mdio_lock, flags); 232 atl1c_restart_autoneg(hw); 233 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 234 } 235 236 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 237 { 238 WARN_ON(in_interrupt()); 239 atl1c_down(adapter); 240 atl1c_up(adapter); 241 clear_bit(__AT_RESETTING, &adapter->flags); 242 } 243 244 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 245 { 246 struct atl1c_hw *hw = &adapter->hw; 247 struct net_device *netdev = adapter->netdev; 248 struct pci_dev *pdev = adapter->pdev; 249 int err; 250 unsigned long flags; 251 u16 speed, duplex, phy_data; 252 253 spin_lock_irqsave(&adapter->mdio_lock, flags); 254 /* MII_BMSR must read twise */ 255 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 256 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 257 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 258 259 if ((phy_data & BMSR_LSTATUS) == 0) { 260 /* link down */ 261 netif_carrier_off(netdev); 262 hw->hibernate = true; 263 if (atl1c_reset_mac(hw) != 0) 264 if (netif_msg_hw(adapter)) 265 dev_warn(&pdev->dev, "reset mac failed\n"); 266 atl1c_set_aspm(hw, SPEED_0); 267 atl1c_post_phy_linkchg(hw, SPEED_0); 268 atl1c_reset_dma_ring(adapter); 269 atl1c_configure(adapter); 270 } else { 271 /* Link Up */ 272 hw->hibernate = false; 273 spin_lock_irqsave(&adapter->mdio_lock, flags); 274 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 275 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 276 if (unlikely(err)) 277 return; 278 /* link result is our setting */ 279 if (adapter->link_speed != speed || 280 adapter->link_duplex != duplex) { 281 adapter->link_speed = speed; 282 adapter->link_duplex = duplex; 283 atl1c_set_aspm(hw, speed); 284 atl1c_post_phy_linkchg(hw, speed); 285 atl1c_start_mac(adapter); 286 if (netif_msg_link(adapter)) 287 dev_info(&pdev->dev, 288 "%s: %s NIC Link is Up<%d Mbps %s>\n", 289 atl1c_driver_name, netdev->name, 290 adapter->link_speed, 291 adapter->link_duplex == FULL_DUPLEX ? 292 "Full Duplex" : "Half Duplex"); 293 } 294 if (!netif_carrier_ok(netdev)) 295 netif_carrier_on(netdev); 296 } 297 } 298 299 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 300 { 301 struct net_device *netdev = adapter->netdev; 302 struct pci_dev *pdev = adapter->pdev; 303 u16 phy_data; 304 u16 link_up; 305 306 spin_lock(&adapter->mdio_lock); 307 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 308 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 309 spin_unlock(&adapter->mdio_lock); 310 link_up = phy_data & BMSR_LSTATUS; 311 /* notify upper layer link down ASAP */ 312 if (!link_up) { 313 if (netif_carrier_ok(netdev)) { 314 /* old link state: Up */ 315 netif_carrier_off(netdev); 316 if (netif_msg_link(adapter)) 317 dev_info(&pdev->dev, 318 "%s: %s NIC Link is Down\n", 319 atl1c_driver_name, netdev->name); 320 adapter->link_speed = SPEED_0; 321 } 322 } 323 324 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 325 schedule_work(&adapter->common_task); 326 } 327 328 static void atl1c_common_task(struct work_struct *work) 329 { 330 struct atl1c_adapter *adapter; 331 struct net_device *netdev; 332 333 adapter = container_of(work, struct atl1c_adapter, common_task); 334 netdev = adapter->netdev; 335 336 if (test_bit(__AT_DOWN, &adapter->flags)) 337 return; 338 339 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 340 netif_device_detach(netdev); 341 atl1c_down(adapter); 342 atl1c_up(adapter); 343 netif_device_attach(netdev); 344 } 345 346 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 347 &adapter->work_event)) { 348 atl1c_irq_disable(adapter); 349 atl1c_check_link_status(adapter); 350 atl1c_irq_enable(adapter); 351 } 352 } 353 354 355 static void atl1c_del_timer(struct atl1c_adapter *adapter) 356 { 357 del_timer_sync(&adapter->phy_config_timer); 358 } 359 360 361 /** 362 * atl1c_tx_timeout - Respond to a Tx Hang 363 * @netdev: network interface device structure 364 */ 365 static void atl1c_tx_timeout(struct net_device *netdev) 366 { 367 struct atl1c_adapter *adapter = netdev_priv(netdev); 368 369 /* Do the reset outside of interrupt context */ 370 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 371 schedule_work(&adapter->common_task); 372 } 373 374 /** 375 * atl1c_set_multi - Multicast and Promiscuous mode set 376 * @netdev: network interface device structure 377 * 378 * The set_multi entry point is called whenever the multicast address 379 * list or the network interface flags are updated. This routine is 380 * responsible for configuring the hardware for proper multicast, 381 * promiscuous mode, and all-multi behavior. 382 */ 383 static void atl1c_set_multi(struct net_device *netdev) 384 { 385 struct atl1c_adapter *adapter = netdev_priv(netdev); 386 struct atl1c_hw *hw = &adapter->hw; 387 struct netdev_hw_addr *ha; 388 u32 mac_ctrl_data; 389 u32 hash_value; 390 391 /* Check for Promiscuous and All Multicast modes */ 392 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 393 394 if (netdev->flags & IFF_PROMISC) { 395 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 396 } else if (netdev->flags & IFF_ALLMULTI) { 397 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 398 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 399 } else { 400 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 401 } 402 403 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 404 405 /* clear the old settings from the multicast hash table */ 406 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 407 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 408 409 /* comoute mc addresses' hash value ,and put it into hash table */ 410 netdev_for_each_mc_addr(ha, netdev) { 411 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 412 atl1c_hash_set(hw, hash_value); 413 } 414 } 415 416 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 417 { 418 if (features & NETIF_F_HW_VLAN_CTAG_RX) { 419 /* enable VLAN tag insert/strip */ 420 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 421 } else { 422 /* disable VLAN tag insert/strip */ 423 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 424 } 425 } 426 427 static void atl1c_vlan_mode(struct net_device *netdev, 428 netdev_features_t features) 429 { 430 struct atl1c_adapter *adapter = netdev_priv(netdev); 431 struct pci_dev *pdev = adapter->pdev; 432 u32 mac_ctrl_data = 0; 433 434 if (netif_msg_pktdata(adapter)) 435 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 436 437 atl1c_irq_disable(adapter); 438 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 439 __atl1c_vlan_mode(features, &mac_ctrl_data); 440 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 441 atl1c_irq_enable(adapter); 442 } 443 444 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 445 { 446 struct pci_dev *pdev = adapter->pdev; 447 448 if (netif_msg_pktdata(adapter)) 449 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 450 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 451 } 452 453 /** 454 * atl1c_set_mac - Change the Ethernet Address of the NIC 455 * @netdev: network interface device structure 456 * @p: pointer to an address structure 457 * 458 * Returns 0 on success, negative on failure 459 */ 460 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 461 { 462 struct atl1c_adapter *adapter = netdev_priv(netdev); 463 struct sockaddr *addr = p; 464 465 if (!is_valid_ether_addr(addr->sa_data)) 466 return -EADDRNOTAVAIL; 467 468 if (netif_running(netdev)) 469 return -EBUSY; 470 471 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 472 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 473 474 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 475 476 return 0; 477 } 478 479 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 480 struct net_device *dev) 481 { 482 unsigned int head_size; 483 int mtu = dev->mtu; 484 485 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 486 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 487 488 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) + 489 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); 490 adapter->rx_frag_size = roundup_pow_of_two(head_size); 491 } 492 493 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 494 netdev_features_t features) 495 { 496 /* 497 * Since there is no support for separate rx/tx vlan accel 498 * enable/disable make sure tx flag is always in same state as rx. 499 */ 500 if (features & NETIF_F_HW_VLAN_CTAG_RX) 501 features |= NETIF_F_HW_VLAN_CTAG_TX; 502 else 503 features &= ~NETIF_F_HW_VLAN_CTAG_TX; 504 505 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 506 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 507 508 return features; 509 } 510 511 static int atl1c_set_features(struct net_device *netdev, 512 netdev_features_t features) 513 { 514 netdev_features_t changed = netdev->features ^ features; 515 516 if (changed & NETIF_F_HW_VLAN_CTAG_RX) 517 atl1c_vlan_mode(netdev, features); 518 519 return 0; 520 } 521 522 static void atl1c_set_max_mtu(struct net_device *netdev) 523 { 524 struct atl1c_adapter *adapter = netdev_priv(netdev); 525 struct atl1c_hw *hw = &adapter->hw; 526 527 switch (hw->nic_type) { 528 /* These (GbE) devices support jumbo packets, max_mtu 6122 */ 529 case athr_l1c: 530 case athr_l1d: 531 case athr_l1d_2: 532 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - 533 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); 534 break; 535 /* The 10/100 devices don't support jumbo packets, max_mtu 1500 */ 536 default: 537 netdev->max_mtu = ETH_DATA_LEN; 538 break; 539 } 540 } 541 542 /** 543 * atl1c_change_mtu - Change the Maximum Transfer Unit 544 * @netdev: network interface device structure 545 * @new_mtu: new value for maximum frame size 546 * 547 * Returns 0 on success, negative on failure 548 */ 549 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 550 { 551 struct atl1c_adapter *adapter = netdev_priv(netdev); 552 553 /* set MTU */ 554 if (netif_running(netdev)) { 555 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 556 msleep(1); 557 netdev->mtu = new_mtu; 558 adapter->hw.max_frame_size = new_mtu; 559 atl1c_set_rxbufsize(adapter, netdev); 560 atl1c_down(adapter); 561 netdev_update_features(netdev); 562 atl1c_up(adapter); 563 clear_bit(__AT_RESETTING, &adapter->flags); 564 } 565 return 0; 566 } 567 568 /* 569 * caller should hold mdio_lock 570 */ 571 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 572 { 573 struct atl1c_adapter *adapter = netdev_priv(netdev); 574 u16 result; 575 576 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 577 return result; 578 } 579 580 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 581 int reg_num, int val) 582 { 583 struct atl1c_adapter *adapter = netdev_priv(netdev); 584 585 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 586 } 587 588 static int atl1c_mii_ioctl(struct net_device *netdev, 589 struct ifreq *ifr, int cmd) 590 { 591 struct atl1c_adapter *adapter = netdev_priv(netdev); 592 struct pci_dev *pdev = adapter->pdev; 593 struct mii_ioctl_data *data = if_mii(ifr); 594 unsigned long flags; 595 int retval = 0; 596 597 if (!netif_running(netdev)) 598 return -EINVAL; 599 600 spin_lock_irqsave(&adapter->mdio_lock, flags); 601 switch (cmd) { 602 case SIOCGMIIPHY: 603 data->phy_id = 0; 604 break; 605 606 case SIOCGMIIREG: 607 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 608 &data->val_out)) { 609 retval = -EIO; 610 goto out; 611 } 612 break; 613 614 case SIOCSMIIREG: 615 if (data->reg_num & ~(0x1F)) { 616 retval = -EFAULT; 617 goto out; 618 } 619 620 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 621 data->reg_num, data->val_in); 622 if (atl1c_write_phy_reg(&adapter->hw, 623 data->reg_num, data->val_in)) { 624 retval = -EIO; 625 goto out; 626 } 627 break; 628 629 default: 630 retval = -EOPNOTSUPP; 631 break; 632 } 633 out: 634 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 635 return retval; 636 } 637 638 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 639 { 640 switch (cmd) { 641 case SIOCGMIIPHY: 642 case SIOCGMIIREG: 643 case SIOCSMIIREG: 644 return atl1c_mii_ioctl(netdev, ifr, cmd); 645 default: 646 return -EOPNOTSUPP; 647 } 648 } 649 650 /** 651 * atl1c_alloc_queues - Allocate memory for all rings 652 * @adapter: board private structure to initialize 653 * 654 */ 655 static int atl1c_alloc_queues(struct atl1c_adapter *adapter) 656 { 657 return 0; 658 } 659 660 static void atl1c_set_mac_type(struct atl1c_hw *hw) 661 { 662 switch (hw->device_id) { 663 case PCI_DEVICE_ID_ATTANSIC_L2C: 664 hw->nic_type = athr_l2c; 665 break; 666 case PCI_DEVICE_ID_ATTANSIC_L1C: 667 hw->nic_type = athr_l1c; 668 break; 669 case PCI_DEVICE_ID_ATHEROS_L2C_B: 670 hw->nic_type = athr_l2c_b; 671 break; 672 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 673 hw->nic_type = athr_l2c_b2; 674 break; 675 case PCI_DEVICE_ID_ATHEROS_L1D: 676 hw->nic_type = athr_l1d; 677 break; 678 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 679 hw->nic_type = athr_l1d_2; 680 break; 681 default: 682 break; 683 } 684 } 685 686 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 687 { 688 u32 link_ctrl_data; 689 690 atl1c_set_mac_type(hw); 691 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 692 693 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 694 ATL1C_TXQ_MODE_ENHANCE; 695 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 696 ATL1C_ASPM_L1_SUPPORT; 697 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 698 699 if (hw->nic_type == athr_l1c || 700 hw->nic_type == athr_l1d || 701 hw->nic_type == athr_l1d_2) 702 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 703 return 0; 704 } 705 706 struct atl1c_platform_patch { 707 u16 pci_did; 708 u8 pci_revid; 709 u16 subsystem_vid; 710 u16 subsystem_did; 711 u32 patch_flag; 712 #define ATL1C_LINK_PATCH 0x1 713 }; 714 static const struct atl1c_platform_patch plats[] = { 715 {0x2060, 0xC1, 0x1019, 0x8152, 0x1}, 716 {0x2060, 0xC1, 0x1019, 0x2060, 0x1}, 717 {0x2060, 0xC1, 0x1019, 0xE000, 0x1}, 718 {0x2062, 0xC0, 0x1019, 0x8152, 0x1}, 719 {0x2062, 0xC0, 0x1019, 0x2062, 0x1}, 720 {0x2062, 0xC0, 0x1458, 0xE000, 0x1}, 721 {0x2062, 0xC1, 0x1019, 0x8152, 0x1}, 722 {0x2062, 0xC1, 0x1019, 0x2062, 0x1}, 723 {0x2062, 0xC1, 0x1458, 0xE000, 0x1}, 724 {0x2062, 0xC1, 0x1565, 0x2802, 0x1}, 725 {0x2062, 0xC1, 0x1565, 0x2801, 0x1}, 726 {0x1073, 0xC0, 0x1019, 0x8151, 0x1}, 727 {0x1073, 0xC0, 0x1019, 0x1073, 0x1}, 728 {0x1073, 0xC0, 0x1458, 0xE000, 0x1}, 729 {0x1083, 0xC0, 0x1458, 0xE000, 0x1}, 730 {0x1083, 0xC0, 0x1019, 0x8151, 0x1}, 731 {0x1083, 0xC0, 0x1019, 0x1083, 0x1}, 732 {0x1083, 0xC0, 0x1462, 0x7680, 0x1}, 733 {0x1083, 0xC0, 0x1565, 0x2803, 0x1}, 734 {0}, 735 }; 736 737 static void atl1c_patch_assign(struct atl1c_hw *hw) 738 { 739 struct pci_dev *pdev = hw->adapter->pdev; 740 u32 misc_ctrl; 741 int i = 0; 742 743 hw->msi_lnkpatch = false; 744 745 while (plats[i].pci_did != 0) { 746 if (plats[i].pci_did == hw->device_id && 747 plats[i].pci_revid == hw->revision_id && 748 plats[i].subsystem_vid == hw->subsystem_vendor_id && 749 plats[i].subsystem_did == hw->subsystem_id) { 750 if (plats[i].patch_flag & ATL1C_LINK_PATCH) 751 hw->msi_lnkpatch = true; 752 } 753 i++; 754 } 755 756 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 && 757 hw->revision_id == L2CB_V21) { 758 /* config access mode */ 759 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 760 REG_PCIE_DEV_MISC_CTRL); 761 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl); 762 misc_ctrl &= ~0x100; 763 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR, 764 REG_PCIE_DEV_MISC_CTRL); 765 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl); 766 } 767 } 768 /** 769 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 770 * @adapter: board private structure to initialize 771 * 772 * atl1c_sw_init initializes the Adapter private data structure. 773 * Fields are initialized based on PCI device information and 774 * OS network device settings (MTU size). 775 */ 776 static int atl1c_sw_init(struct atl1c_adapter *adapter) 777 { 778 struct atl1c_hw *hw = &adapter->hw; 779 struct pci_dev *pdev = adapter->pdev; 780 u32 revision; 781 782 783 adapter->wol = 0; 784 device_set_wakeup_enable(&pdev->dev, false); 785 adapter->link_speed = SPEED_0; 786 adapter->link_duplex = FULL_DUPLEX; 787 adapter->tpd_ring[0].count = 1024; 788 adapter->rfd_ring.count = 512; 789 790 hw->vendor_id = pdev->vendor; 791 hw->device_id = pdev->device; 792 hw->subsystem_vendor_id = pdev->subsystem_vendor; 793 hw->subsystem_id = pdev->subsystem_device; 794 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision); 795 hw->revision_id = revision & 0xFF; 796 /* before link up, we assume hibernate is true */ 797 hw->hibernate = true; 798 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 799 if (atl1c_setup_mac_funcs(hw) != 0) { 800 dev_err(&pdev->dev, "set mac function pointers failed\n"); 801 return -1; 802 } 803 atl1c_patch_assign(hw); 804 805 hw->intr_mask = IMR_NORMAL_MASK; 806 hw->phy_configured = false; 807 hw->preamble_len = 7; 808 hw->max_frame_size = adapter->netdev->mtu; 809 hw->autoneg_advertised = ADVERTISED_Autoneg; 810 hw->indirect_tab = 0xE4E4E4E4; 811 hw->base_cpu = 0; 812 813 hw->ict = 50000; /* 100ms */ 814 hw->smb_timer = 200000; /* 400ms */ 815 hw->rx_imt = 200; 816 hw->tx_imt = 1000; 817 818 hw->tpd_burst = 5; 819 hw->rfd_burst = 8; 820 hw->dma_order = atl1c_dma_ord_out; 821 hw->dmar_block = atl1c_dma_req_1024; 822 823 if (atl1c_alloc_queues(adapter)) { 824 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 825 return -ENOMEM; 826 } 827 /* TODO */ 828 atl1c_set_rxbufsize(adapter, adapter->netdev); 829 atomic_set(&adapter->irq_sem, 1); 830 spin_lock_init(&adapter->mdio_lock); 831 set_bit(__AT_DOWN, &adapter->flags); 832 833 return 0; 834 } 835 836 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 837 struct atl1c_buffer *buffer_info) 838 { 839 u16 pci_driection; 840 if (buffer_info->flags & ATL1C_BUFFER_FREE) 841 return; 842 if (buffer_info->dma) { 843 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 844 pci_driection = PCI_DMA_FROMDEVICE; 845 else 846 pci_driection = PCI_DMA_TODEVICE; 847 848 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 849 pci_unmap_single(pdev, buffer_info->dma, 850 buffer_info->length, pci_driection); 851 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 852 pci_unmap_page(pdev, buffer_info->dma, 853 buffer_info->length, pci_driection); 854 } 855 if (buffer_info->skb) 856 dev_consume_skb_any(buffer_info->skb); 857 buffer_info->dma = 0; 858 buffer_info->skb = NULL; 859 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 860 } 861 /** 862 * atl1c_clean_tx_ring - Free Tx-skb 863 * @adapter: board private structure 864 */ 865 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 866 enum atl1c_trans_queue type) 867 { 868 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 869 struct atl1c_buffer *buffer_info; 870 struct pci_dev *pdev = adapter->pdev; 871 u16 index, ring_count; 872 873 ring_count = tpd_ring->count; 874 for (index = 0; index < ring_count; index++) { 875 buffer_info = &tpd_ring->buffer_info[index]; 876 atl1c_clean_buffer(pdev, buffer_info); 877 } 878 879 netdev_reset_queue(adapter->netdev); 880 881 /* Zero out Tx-buffers */ 882 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 883 ring_count); 884 atomic_set(&tpd_ring->next_to_clean, 0); 885 tpd_ring->next_to_use = 0; 886 } 887 888 /** 889 * atl1c_clean_rx_ring - Free rx-reservation skbs 890 * @adapter: board private structure 891 */ 892 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 893 { 894 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 895 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 896 struct atl1c_buffer *buffer_info; 897 struct pci_dev *pdev = adapter->pdev; 898 int j; 899 900 for (j = 0; j < rfd_ring->count; j++) { 901 buffer_info = &rfd_ring->buffer_info[j]; 902 atl1c_clean_buffer(pdev, buffer_info); 903 } 904 /* zero out the descriptor ring */ 905 memset(rfd_ring->desc, 0, rfd_ring->size); 906 rfd_ring->next_to_clean = 0; 907 rfd_ring->next_to_use = 0; 908 rrd_ring->next_to_use = 0; 909 rrd_ring->next_to_clean = 0; 910 } 911 912 /* 913 * Read / Write Ptr Initialize: 914 */ 915 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 916 { 917 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 918 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 919 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 920 struct atl1c_buffer *buffer_info; 921 int i, j; 922 923 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 924 tpd_ring[i].next_to_use = 0; 925 atomic_set(&tpd_ring[i].next_to_clean, 0); 926 buffer_info = tpd_ring[i].buffer_info; 927 for (j = 0; j < tpd_ring->count; j++) 928 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 929 ATL1C_BUFFER_FREE); 930 } 931 rfd_ring->next_to_use = 0; 932 rfd_ring->next_to_clean = 0; 933 rrd_ring->next_to_use = 0; 934 rrd_ring->next_to_clean = 0; 935 for (j = 0; j < rfd_ring->count; j++) { 936 buffer_info = &rfd_ring->buffer_info[j]; 937 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 938 } 939 } 940 941 /** 942 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 943 * @adapter: board private structure 944 * 945 * Free all transmit software resources 946 */ 947 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 948 { 949 struct pci_dev *pdev = adapter->pdev; 950 951 pci_free_consistent(pdev, adapter->ring_header.size, 952 adapter->ring_header.desc, 953 adapter->ring_header.dma); 954 adapter->ring_header.desc = NULL; 955 956 /* Note: just free tdp_ring.buffer_info, 957 * it contain rfd_ring.buffer_info, do not double free */ 958 if (adapter->tpd_ring[0].buffer_info) { 959 kfree(adapter->tpd_ring[0].buffer_info); 960 adapter->tpd_ring[0].buffer_info = NULL; 961 } 962 if (adapter->rx_page) { 963 put_page(adapter->rx_page); 964 adapter->rx_page = NULL; 965 } 966 } 967 968 /** 969 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 970 * @adapter: board private structure 971 * 972 * Return 0 on success, negative on failure 973 */ 974 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 975 { 976 struct pci_dev *pdev = adapter->pdev; 977 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 978 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 979 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 980 struct atl1c_ring_header *ring_header = &adapter->ring_header; 981 int size; 982 int i; 983 int count = 0; 984 int rx_desc_count = 0; 985 u32 offset = 0; 986 987 rrd_ring->count = rfd_ring->count; 988 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 989 tpd_ring[i].count = tpd_ring[0].count; 990 991 /* 2 tpd queue, one high priority queue, 992 * another normal priority queue */ 993 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 994 rfd_ring->count); 995 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 996 if (unlikely(!tpd_ring->buffer_info)) 997 goto err_nomem; 998 999 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1000 tpd_ring[i].buffer_info = 1001 (tpd_ring->buffer_info + count); 1002 count += tpd_ring[i].count; 1003 } 1004 1005 rfd_ring->buffer_info = 1006 (tpd_ring->buffer_info + count); 1007 count += rfd_ring->count; 1008 rx_desc_count += rfd_ring->count; 1009 1010 /* 1011 * real ring DMA buffer 1012 * each ring/block may need up to 8 bytes for alignment, hence the 1013 * additional bytes tacked onto the end. 1014 */ 1015 ring_header->size = size = 1016 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 1017 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 1018 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 1019 8 * 4; 1020 1021 ring_header->desc = dma_zalloc_coherent(&pdev->dev, ring_header->size, 1022 &ring_header->dma, GFP_KERNEL); 1023 if (unlikely(!ring_header->desc)) { 1024 dev_err(&pdev->dev, "could not get memory for DMA buffer\n"); 1025 goto err_nomem; 1026 } 1027 /* init TPD ring */ 1028 1029 tpd_ring[0].dma = roundup(ring_header->dma, 8); 1030 offset = tpd_ring[0].dma - ring_header->dma; 1031 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 1032 tpd_ring[i].dma = ring_header->dma + offset; 1033 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 1034 tpd_ring[i].size = 1035 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1036 offset += roundup(tpd_ring[i].size, 8); 1037 } 1038 /* init RFD ring */ 1039 rfd_ring->dma = ring_header->dma + offset; 1040 rfd_ring->desc = (u8 *) ring_header->desc + offset; 1041 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 1042 offset += roundup(rfd_ring->size, 8); 1043 1044 /* init RRD ring */ 1045 rrd_ring->dma = ring_header->dma + offset; 1046 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1047 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1048 rrd_ring->count; 1049 offset += roundup(rrd_ring->size, 8); 1050 1051 return 0; 1052 1053 err_nomem: 1054 kfree(tpd_ring->buffer_info); 1055 return -ENOMEM; 1056 } 1057 1058 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1059 { 1060 struct atl1c_hw *hw = &adapter->hw; 1061 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1062 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1063 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1064 adapter->tpd_ring; 1065 1066 /* TPD */ 1067 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1068 (u32)((tpd_ring[atl1c_trans_normal].dma & 1069 AT_DMA_HI_ADDR_MASK) >> 32)); 1070 /* just enable normal priority TX queue */ 1071 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1072 (u32)(tpd_ring[atl1c_trans_normal].dma & 1073 AT_DMA_LO_ADDR_MASK)); 1074 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1075 (u32)(tpd_ring[atl1c_trans_high].dma & 1076 AT_DMA_LO_ADDR_MASK)); 1077 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1078 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1079 1080 1081 /* RFD */ 1082 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1083 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1084 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1085 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1086 1087 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1088 rfd_ring->count & RFD_RING_SIZE_MASK); 1089 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1090 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1091 1092 /* RRD */ 1093 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1094 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1095 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1096 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1097 1098 if (hw->nic_type == athr_l2c_b) { 1099 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1100 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1101 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1102 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1103 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1104 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1105 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1106 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1107 } 1108 /* Load all of base address above */ 1109 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1110 } 1111 1112 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1113 { 1114 struct atl1c_hw *hw = &adapter->hw; 1115 int max_pay_load; 1116 u16 tx_offload_thresh; 1117 u32 txq_ctrl_data; 1118 1119 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1120 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1121 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1122 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1123 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1124 /* 1125 * if BIOS had changed the dam-read-max-length to an invalid value, 1126 * restore it to default value 1127 */ 1128 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1129 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1130 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1131 } 1132 txq_ctrl_data = 1133 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1134 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1135 1136 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1137 } 1138 1139 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1140 { 1141 struct atl1c_hw *hw = &adapter->hw; 1142 u32 rxq_ctrl_data; 1143 1144 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1145 RXQ_RFD_BURST_NUM_SHIFT; 1146 1147 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1148 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1149 1150 /* aspm for gigabit */ 1151 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1152 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1153 ASPM_THRUPUT_LIMIT_100M); 1154 1155 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1156 } 1157 1158 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1159 { 1160 struct atl1c_hw *hw = &adapter->hw; 1161 u32 dma_ctrl_data; 1162 1163 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1164 DMA_CTRL_RREQ_PRI_DATA | 1165 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1166 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1167 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1168 1169 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1170 } 1171 1172 /* 1173 * Stop the mac, transmit and receive units 1174 * hw - Struct containing variables accessed by shared code 1175 * return : 0 or idle status (if error) 1176 */ 1177 static int atl1c_stop_mac(struct atl1c_hw *hw) 1178 { 1179 u32 data; 1180 1181 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1182 data &= ~RXQ_CTRL_EN; 1183 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1184 1185 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1186 data &= ~TXQ_CTRL_EN; 1187 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1188 1189 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1190 1191 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1192 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1193 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1194 1195 return (int)atl1c_wait_until_idle(hw, 1196 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1197 } 1198 1199 static void atl1c_start_mac(struct atl1c_adapter *adapter) 1200 { 1201 struct atl1c_hw *hw = &adapter->hw; 1202 u32 mac, txq, rxq; 1203 1204 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false; 1205 hw->mac_speed = adapter->link_speed == SPEED_1000 ? 1206 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100; 1207 1208 AT_READ_REG(hw, REG_TXQ_CTRL, &txq); 1209 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq); 1210 AT_READ_REG(hw, REG_MAC_CTRL, &mac); 1211 1212 txq |= TXQ_CTRL_EN; 1213 rxq |= RXQ_CTRL_EN; 1214 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW | 1215 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW | 1216 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD | 1217 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN | 1218 MAC_CTRL_HASH_ALG_CRC32; 1219 if (hw->mac_duplex) 1220 mac |= MAC_CTRL_DUPLX; 1221 else 1222 mac &= ~MAC_CTRL_DUPLX; 1223 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed); 1224 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len); 1225 1226 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq); 1227 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq); 1228 AT_WRITE_REG(hw, REG_MAC_CTRL, mac); 1229 } 1230 1231 /* 1232 * Reset the transmit and receive units; mask and clear all interrupts. 1233 * hw - Struct containing variables accessed by shared code 1234 * return : 0 or idle status (if error) 1235 */ 1236 static int atl1c_reset_mac(struct atl1c_hw *hw) 1237 { 1238 struct atl1c_adapter *adapter = hw->adapter; 1239 struct pci_dev *pdev = adapter->pdev; 1240 u32 ctrl_data = 0; 1241 1242 atl1c_stop_mac(hw); 1243 /* 1244 * Issue Soft Reset to the MAC. This will reset the chip's 1245 * transmit, receive, DMA. It will not effect 1246 * the current PCI configuration. The global reset bit is self- 1247 * clearing, and should clear within a microsecond. 1248 */ 1249 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data); 1250 ctrl_data |= MASTER_CTRL_OOB_DIS; 1251 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST); 1252 1253 AT_WRITE_FLUSH(hw); 1254 msleep(10); 1255 /* Wait at least 10ms for All module to be Idle */ 1256 1257 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1258 dev_err(&pdev->dev, 1259 "MAC state machine can't be idle since" 1260 " disabled for 10ms second\n"); 1261 return -1; 1262 } 1263 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data); 1264 1265 /* driver control speed/duplex */ 1266 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data); 1267 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW); 1268 1269 /* clk switch setting */ 1270 AT_READ_REG(hw, REG_SERDES, &ctrl_data); 1271 switch (hw->nic_type) { 1272 case athr_l2c_b: 1273 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN | 1274 SERDES_MAC_CLK_SLOWDOWN); 1275 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1276 break; 1277 case athr_l2c_b2: 1278 case athr_l1d_2: 1279 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN; 1280 AT_WRITE_REG(hw, REG_SERDES, ctrl_data); 1281 break; 1282 default: 1283 break; 1284 } 1285 1286 return 0; 1287 } 1288 1289 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1290 { 1291 u16 ctrl_flags = hw->ctrl_flags; 1292 1293 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1294 atl1c_set_aspm(hw, SPEED_0); 1295 hw->ctrl_flags = ctrl_flags; 1296 } 1297 1298 /* 1299 * Set ASPM state. 1300 * Enable/disable L0s/L1 depend on link state. 1301 */ 1302 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1303 { 1304 u32 pm_ctrl_data; 1305 u32 link_l1_timer; 1306 1307 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1308 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1309 PM_CTRL_ASPM_L0S_EN | 1310 PM_CTRL_MAC_ASPM_CHK); 1311 /* L1 timer */ 1312 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1313 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1314 link_l1_timer = 1315 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1316 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1317 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1318 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1319 } else { 1320 link_l1_timer = hw->nic_type == athr_l2c_b ? 1321 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1322 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1323 link_l1_timer = 1; 1324 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1325 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1326 } 1327 1328 /* L0S/L1 enable */ 1329 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0) 1330 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1331 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1332 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1333 1334 /* l2cb & l1d & l2cb2 & l1d2 */ 1335 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1336 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1337 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1338 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1339 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1340 PM_CTRL_SERDES_PD_EX_L1 | 1341 PM_CTRL_CLK_SWH_L1; 1342 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1343 PM_CTRL_SERDES_PLL_L1_EN | 1344 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1345 PM_CTRL_SA_DLY_EN | 1346 PM_CTRL_HOTRST); 1347 /* disable l0s if link down or l2cb */ 1348 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1349 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1350 } else { /* l1c */ 1351 pm_ctrl_data = 1352 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1353 if (link_speed != SPEED_0) { 1354 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1355 PM_CTRL_SERDES_PLL_L1_EN | 1356 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1357 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1358 PM_CTRL_CLK_SWH_L1 | 1359 PM_CTRL_ASPM_L0S_EN | 1360 PM_CTRL_ASPM_L1_EN); 1361 } else { /* link down */ 1362 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1363 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1364 PM_CTRL_SERDES_PLL_L1_EN | 1365 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1366 PM_CTRL_ASPM_L0S_EN); 1367 } 1368 } 1369 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1370 1371 return; 1372 } 1373 1374 /** 1375 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1376 * @adapter: board private structure 1377 * 1378 * Configure the Tx /Rx unit of the MAC after a reset. 1379 */ 1380 static int atl1c_configure_mac(struct atl1c_adapter *adapter) 1381 { 1382 struct atl1c_hw *hw = &adapter->hw; 1383 u32 master_ctrl_data = 0; 1384 u32 intr_modrt_data; 1385 u32 data; 1386 1387 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1388 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1389 MASTER_CTRL_RX_ITIMER_EN | 1390 MASTER_CTRL_INT_RDCLR); 1391 /* clear interrupt status */ 1392 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1393 /* Clear any WOL status */ 1394 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1395 /* set Interrupt Clear Timer 1396 * HW will enable self to assert interrupt event to system after 1397 * waiting x-time for software to notify it accept interrupt. 1398 */ 1399 1400 data = CLK_GATING_EN_ALL; 1401 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1402 if (hw->nic_type == athr_l2c_b) 1403 data &= ~CLK_GATING_RXMAC_EN; 1404 } else 1405 data = 0; 1406 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1407 1408 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1409 hw->ict & INT_RETRIG_TIMER_MASK); 1410 1411 atl1c_configure_des_ring(adapter); 1412 1413 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1414 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1415 IRQ_MODRT_TX_TIMER_SHIFT; 1416 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1417 IRQ_MODRT_RX_TIMER_SHIFT; 1418 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1419 master_ctrl_data |= 1420 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1421 } 1422 1423 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1424 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1425 1426 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1427 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1428 1429 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1430 hw->smb_timer & SMB_STAT_TIMER_MASK); 1431 1432 /* set MTU */ 1433 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1434 VLAN_HLEN + ETH_FCS_LEN); 1435 1436 atl1c_configure_tx(adapter); 1437 atl1c_configure_rx(adapter); 1438 atl1c_configure_dma(adapter); 1439 1440 return 0; 1441 } 1442 1443 static int atl1c_configure(struct atl1c_adapter *adapter) 1444 { 1445 struct net_device *netdev = adapter->netdev; 1446 int num; 1447 1448 atl1c_init_ring_ptrs(adapter); 1449 atl1c_set_multi(netdev); 1450 atl1c_restore_vlan(adapter); 1451 1452 num = atl1c_alloc_rx_buffer(adapter); 1453 if (unlikely(num == 0)) 1454 return -ENOMEM; 1455 1456 if (atl1c_configure_mac(adapter)) 1457 return -EIO; 1458 1459 return 0; 1460 } 1461 1462 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1463 { 1464 u16 hw_reg_addr = 0; 1465 unsigned long *stats_item = NULL; 1466 u32 data; 1467 1468 /* update rx status */ 1469 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1470 stats_item = &adapter->hw_stats.rx_ok; 1471 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1472 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1473 *stats_item += data; 1474 stats_item++; 1475 hw_reg_addr += 4; 1476 } 1477 /* update tx status */ 1478 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1479 stats_item = &adapter->hw_stats.tx_ok; 1480 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1481 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1482 *stats_item += data; 1483 stats_item++; 1484 hw_reg_addr += 4; 1485 } 1486 } 1487 1488 /** 1489 * atl1c_get_stats - Get System Network Statistics 1490 * @netdev: network interface device structure 1491 * 1492 * Returns the address of the device statistics structure. 1493 * The statistics are actually updated from the timer callback. 1494 */ 1495 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1496 { 1497 struct atl1c_adapter *adapter = netdev_priv(netdev); 1498 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1499 struct net_device_stats *net_stats = &netdev->stats; 1500 1501 atl1c_update_hw_stats(adapter); 1502 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1503 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1504 net_stats->multicast = hw_stats->rx_mcast; 1505 net_stats->collisions = hw_stats->tx_1_col + 1506 hw_stats->tx_2_col + 1507 hw_stats->tx_late_col + 1508 hw_stats->tx_abort_col; 1509 1510 net_stats->rx_errors = hw_stats->rx_frag + 1511 hw_stats->rx_fcs_err + 1512 hw_stats->rx_len_err + 1513 hw_stats->rx_sz_ov + 1514 hw_stats->rx_rrd_ov + 1515 hw_stats->rx_align_err + 1516 hw_stats->rx_rxf_ov; 1517 1518 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1519 net_stats->rx_length_errors = hw_stats->rx_len_err; 1520 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1521 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1522 net_stats->rx_dropped = hw_stats->rx_rrd_ov; 1523 1524 net_stats->tx_errors = hw_stats->tx_late_col + 1525 hw_stats->tx_abort_col + 1526 hw_stats->tx_underrun + 1527 hw_stats->tx_trunc; 1528 1529 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1530 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1531 net_stats->tx_window_errors = hw_stats->tx_late_col; 1532 1533 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors; 1534 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors; 1535 1536 return net_stats; 1537 } 1538 1539 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1540 { 1541 u16 phy_data; 1542 1543 spin_lock(&adapter->mdio_lock); 1544 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1545 spin_unlock(&adapter->mdio_lock); 1546 } 1547 1548 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1549 enum atl1c_trans_queue type) 1550 { 1551 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1552 struct atl1c_buffer *buffer_info; 1553 struct pci_dev *pdev = adapter->pdev; 1554 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1555 u16 hw_next_to_clean; 1556 u16 reg; 1557 unsigned int total_bytes = 0, total_packets = 0; 1558 1559 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1560 1561 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1562 1563 while (next_to_clean != hw_next_to_clean) { 1564 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1565 if (buffer_info->skb) { 1566 total_bytes += buffer_info->skb->len; 1567 total_packets++; 1568 } 1569 atl1c_clean_buffer(pdev, buffer_info); 1570 if (++next_to_clean == tpd_ring->count) 1571 next_to_clean = 0; 1572 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1573 } 1574 1575 netdev_completed_queue(adapter->netdev, total_packets, total_bytes); 1576 1577 if (netif_queue_stopped(adapter->netdev) && 1578 netif_carrier_ok(adapter->netdev)) { 1579 netif_wake_queue(adapter->netdev); 1580 } 1581 1582 return true; 1583 } 1584 1585 /** 1586 * atl1c_intr - Interrupt Handler 1587 * @irq: interrupt number 1588 * @data: pointer to a network interface device structure 1589 */ 1590 static irqreturn_t atl1c_intr(int irq, void *data) 1591 { 1592 struct net_device *netdev = data; 1593 struct atl1c_adapter *adapter = netdev_priv(netdev); 1594 struct pci_dev *pdev = adapter->pdev; 1595 struct atl1c_hw *hw = &adapter->hw; 1596 int max_ints = AT_MAX_INT_WORK; 1597 int handled = IRQ_NONE; 1598 u32 status; 1599 u32 reg_data; 1600 1601 do { 1602 AT_READ_REG(hw, REG_ISR, ®_data); 1603 status = reg_data & hw->intr_mask; 1604 1605 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1606 if (max_ints != AT_MAX_INT_WORK) 1607 handled = IRQ_HANDLED; 1608 break; 1609 } 1610 /* link event */ 1611 if (status & ISR_GPHY) 1612 atl1c_clear_phy_int(adapter); 1613 /* Ack ISR */ 1614 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1615 if (status & ISR_RX_PKT) { 1616 if (likely(napi_schedule_prep(&adapter->napi))) { 1617 hw->intr_mask &= ~ISR_RX_PKT; 1618 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1619 __napi_schedule(&adapter->napi); 1620 } 1621 } 1622 if (status & ISR_TX_PKT) 1623 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1624 1625 handled = IRQ_HANDLED; 1626 /* check if PCIE PHY Link down */ 1627 if (status & ISR_ERROR) { 1628 if (netif_msg_hw(adapter)) 1629 dev_err(&pdev->dev, 1630 "atl1c hardware error (status = 0x%x)\n", 1631 status & ISR_ERROR); 1632 /* reset MAC */ 1633 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1634 schedule_work(&adapter->common_task); 1635 return IRQ_HANDLED; 1636 } 1637 1638 if (status & ISR_OVER) 1639 if (netif_msg_intr(adapter)) 1640 dev_warn(&pdev->dev, 1641 "TX/RX overflow (status = 0x%x)\n", 1642 status & ISR_OVER); 1643 1644 /* link event */ 1645 if (status & (ISR_GPHY | ISR_MANUAL)) { 1646 netdev->stats.tx_carrier_errors++; 1647 atl1c_link_chg_event(adapter); 1648 break; 1649 } 1650 1651 } while (--max_ints > 0); 1652 /* re-enable Interrupt*/ 1653 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1654 return handled; 1655 } 1656 1657 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1658 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1659 { 1660 /* 1661 * The pid field in RRS in not correct sometimes, so we 1662 * cannot figure out if the packet is fragmented or not, 1663 * so we tell the KERNEL CHECKSUM_NONE 1664 */ 1665 skb_checksum_none_assert(skb); 1666 } 1667 1668 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter) 1669 { 1670 struct sk_buff *skb; 1671 struct page *page; 1672 1673 if (adapter->rx_frag_size > PAGE_SIZE) 1674 return netdev_alloc_skb(adapter->netdev, 1675 adapter->rx_buffer_len); 1676 1677 page = adapter->rx_page; 1678 if (!page) { 1679 adapter->rx_page = page = alloc_page(GFP_ATOMIC); 1680 if (unlikely(!page)) 1681 return NULL; 1682 adapter->rx_page_offset = 0; 1683 } 1684 1685 skb = build_skb(page_address(page) + adapter->rx_page_offset, 1686 adapter->rx_frag_size); 1687 if (likely(skb)) { 1688 adapter->rx_page_offset += adapter->rx_frag_size; 1689 if (adapter->rx_page_offset >= PAGE_SIZE) 1690 adapter->rx_page = NULL; 1691 else 1692 get_page(page); 1693 } 1694 return skb; 1695 } 1696 1697 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1698 { 1699 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1700 struct pci_dev *pdev = adapter->pdev; 1701 struct atl1c_buffer *buffer_info, *next_info; 1702 struct sk_buff *skb; 1703 void *vir_addr = NULL; 1704 u16 num_alloc = 0; 1705 u16 rfd_next_to_use, next_next; 1706 struct atl1c_rx_free_desc *rfd_desc; 1707 dma_addr_t mapping; 1708 1709 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1710 if (++next_next == rfd_ring->count) 1711 next_next = 0; 1712 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1713 next_info = &rfd_ring->buffer_info[next_next]; 1714 1715 while (next_info->flags & ATL1C_BUFFER_FREE) { 1716 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1717 1718 skb = atl1c_alloc_skb(adapter); 1719 if (unlikely(!skb)) { 1720 if (netif_msg_rx_err(adapter)) 1721 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1722 break; 1723 } 1724 1725 /* 1726 * Make buffer alignment 2 beyond a 16 byte boundary 1727 * this will result in a 16 byte aligned IP header after 1728 * the 14 byte MAC header is removed 1729 */ 1730 vir_addr = skb->data; 1731 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1732 buffer_info->skb = skb; 1733 buffer_info->length = adapter->rx_buffer_len; 1734 mapping = pci_map_single(pdev, vir_addr, 1735 buffer_info->length, 1736 PCI_DMA_FROMDEVICE); 1737 if (unlikely(pci_dma_mapping_error(pdev, mapping))) { 1738 dev_kfree_skb(skb); 1739 buffer_info->skb = NULL; 1740 buffer_info->length = 0; 1741 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 1742 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed"); 1743 break; 1744 } 1745 buffer_info->dma = mapping; 1746 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1747 ATL1C_PCIMAP_FROMDEVICE); 1748 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1749 rfd_next_to_use = next_next; 1750 if (++next_next == rfd_ring->count) 1751 next_next = 0; 1752 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1753 next_info = &rfd_ring->buffer_info[next_next]; 1754 num_alloc++; 1755 } 1756 1757 if (num_alloc) { 1758 /* TODO: update mailbox here */ 1759 wmb(); 1760 rfd_ring->next_to_use = rfd_next_to_use; 1761 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1762 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1763 } 1764 1765 return num_alloc; 1766 } 1767 1768 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1769 struct atl1c_recv_ret_status *rrs, u16 num) 1770 { 1771 u16 i; 1772 /* the relationship between rrd and rfd is one map one */ 1773 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1774 rrd_ring->next_to_clean)) { 1775 rrs->word3 &= ~RRS_RXD_UPDATED; 1776 if (++rrd_ring->next_to_clean == rrd_ring->count) 1777 rrd_ring->next_to_clean = 0; 1778 } 1779 } 1780 1781 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1782 struct atl1c_recv_ret_status *rrs, u16 num) 1783 { 1784 u16 i; 1785 u16 rfd_index; 1786 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1787 1788 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1789 RRS_RX_RFD_INDEX_MASK; 1790 for (i = 0; i < num; i++) { 1791 buffer_info[rfd_index].skb = NULL; 1792 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1793 ATL1C_BUFFER_FREE); 1794 if (++rfd_index == rfd_ring->count) 1795 rfd_index = 0; 1796 } 1797 rfd_ring->next_to_clean = rfd_index; 1798 } 1799 1800 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1801 int *work_done, int work_to_do) 1802 { 1803 u16 rfd_num, rfd_index; 1804 u16 count = 0; 1805 u16 length; 1806 struct pci_dev *pdev = adapter->pdev; 1807 struct net_device *netdev = adapter->netdev; 1808 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1809 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1810 struct sk_buff *skb; 1811 struct atl1c_recv_ret_status *rrs; 1812 struct atl1c_buffer *buffer_info; 1813 1814 while (1) { 1815 if (*work_done >= work_to_do) 1816 break; 1817 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1818 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1819 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1820 RRS_RX_RFD_CNT_MASK; 1821 if (unlikely(rfd_num != 1)) 1822 /* TODO support mul rfd*/ 1823 if (netif_msg_rx_err(adapter)) 1824 dev_warn(&pdev->dev, 1825 "Multi rfd not support yet!\n"); 1826 goto rrs_checked; 1827 } else { 1828 break; 1829 } 1830 rrs_checked: 1831 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1832 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1833 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1834 if (netif_msg_rx_err(adapter)) 1835 dev_warn(&pdev->dev, 1836 "wrong packet! rrs word3 is %x\n", 1837 rrs->word3); 1838 continue; 1839 } 1840 1841 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1842 RRS_PKT_SIZE_MASK); 1843 /* Good Receive */ 1844 if (likely(rfd_num == 1)) { 1845 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1846 RRS_RX_RFD_INDEX_MASK; 1847 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1848 pci_unmap_single(pdev, buffer_info->dma, 1849 buffer_info->length, PCI_DMA_FROMDEVICE); 1850 skb = buffer_info->skb; 1851 } else { 1852 /* TODO */ 1853 if (netif_msg_rx_err(adapter)) 1854 dev_warn(&pdev->dev, 1855 "Multi rfd not support yet!\n"); 1856 break; 1857 } 1858 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1859 skb_put(skb, length - ETH_FCS_LEN); 1860 skb->protocol = eth_type_trans(skb, netdev); 1861 atl1c_rx_checksum(adapter, skb, rrs); 1862 if (rrs->word3 & RRS_VLAN_INS) { 1863 u16 vlan; 1864 1865 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1866 vlan = le16_to_cpu(vlan); 1867 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); 1868 } 1869 netif_receive_skb(skb); 1870 1871 (*work_done)++; 1872 count++; 1873 } 1874 if (count) 1875 atl1c_alloc_rx_buffer(adapter); 1876 } 1877 1878 /** 1879 * atl1c_clean - NAPI Rx polling callback 1880 */ 1881 static int atl1c_clean(struct napi_struct *napi, int budget) 1882 { 1883 struct atl1c_adapter *adapter = 1884 container_of(napi, struct atl1c_adapter, napi); 1885 int work_done = 0; 1886 1887 /* Keep link state information with original netdev */ 1888 if (!netif_carrier_ok(adapter->netdev)) 1889 goto quit_polling; 1890 /* just enable one RXQ */ 1891 atl1c_clean_rx_irq(adapter, &work_done, budget); 1892 1893 if (work_done < budget) { 1894 quit_polling: 1895 napi_complete_done(napi, work_done); 1896 adapter->hw.intr_mask |= ISR_RX_PKT; 1897 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1898 } 1899 return work_done; 1900 } 1901 1902 #ifdef CONFIG_NET_POLL_CONTROLLER 1903 1904 /* 1905 * Polling 'interrupt' - used by things like netconsole to send skbs 1906 * without having to re-enable interrupts. It's not called while 1907 * the interrupt routine is executing. 1908 */ 1909 static void atl1c_netpoll(struct net_device *netdev) 1910 { 1911 struct atl1c_adapter *adapter = netdev_priv(netdev); 1912 1913 disable_irq(adapter->pdev->irq); 1914 atl1c_intr(adapter->pdev->irq, netdev); 1915 enable_irq(adapter->pdev->irq); 1916 } 1917 #endif 1918 1919 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1920 { 1921 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1922 u16 next_to_use = 0; 1923 u16 next_to_clean = 0; 1924 1925 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1926 next_to_use = tpd_ring->next_to_use; 1927 1928 return (u16)(next_to_clean > next_to_use) ? 1929 (next_to_clean - next_to_use - 1) : 1930 (tpd_ring->count + next_to_clean - next_to_use - 1); 1931 } 1932 1933 /* 1934 * get next usable tpd 1935 * Note: should call atl1c_tdp_avail to make sure 1936 * there is enough tpd to use 1937 */ 1938 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1939 enum atl1c_trans_queue type) 1940 { 1941 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1942 struct atl1c_tpd_desc *tpd_desc; 1943 u16 next_to_use = 0; 1944 1945 next_to_use = tpd_ring->next_to_use; 1946 if (++tpd_ring->next_to_use == tpd_ring->count) 1947 tpd_ring->next_to_use = 0; 1948 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1949 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1950 return tpd_desc; 1951 } 1952 1953 static struct atl1c_buffer * 1954 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1955 { 1956 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1957 1958 return &tpd_ring->buffer_info[tpd - 1959 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1960 } 1961 1962 /* Calculate the transmit packet descript needed*/ 1963 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1964 { 1965 u16 tpd_req; 1966 u16 proto_hdr_len = 0; 1967 1968 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1969 1970 if (skb_is_gso(skb)) { 1971 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1972 if (proto_hdr_len < skb_headlen(skb)) 1973 tpd_req++; 1974 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1975 tpd_req++; 1976 } 1977 return tpd_req; 1978 } 1979 1980 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1981 struct sk_buff *skb, 1982 struct atl1c_tpd_desc **tpd, 1983 enum atl1c_trans_queue type) 1984 { 1985 struct pci_dev *pdev = adapter->pdev; 1986 unsigned short offload_type; 1987 u8 hdr_len; 1988 u32 real_len; 1989 1990 if (skb_is_gso(skb)) { 1991 int err; 1992 1993 err = skb_cow_head(skb, 0); 1994 if (err < 0) 1995 return err; 1996 1997 offload_type = skb_shinfo(skb)->gso_type; 1998 1999 if (offload_type & SKB_GSO_TCPV4) { 2000 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 2001 + ntohs(ip_hdr(skb)->tot_len)); 2002 2003 if (real_len < skb->len) 2004 pskb_trim(skb, real_len); 2005 2006 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2007 if (unlikely(skb->len == hdr_len)) { 2008 /* only xsum need */ 2009 if (netif_msg_tx_queued(adapter)) 2010 dev_warn(&pdev->dev, 2011 "IPV4 tso with zero data??\n"); 2012 goto check_sum; 2013 } else { 2014 ip_hdr(skb)->check = 0; 2015 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2016 ip_hdr(skb)->saddr, 2017 ip_hdr(skb)->daddr, 2018 0, IPPROTO_TCP, 0); 2019 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2020 } 2021 } 2022 2023 if (offload_type & SKB_GSO_TCPV6) { 2024 struct atl1c_tpd_ext_desc *etpd = 2025 *(struct atl1c_tpd_ext_desc **)(tpd); 2026 2027 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2028 *tpd = atl1c_get_tpd(adapter, type); 2029 ipv6_hdr(skb)->payload_len = 0; 2030 /* check payload == 0 byte ? */ 2031 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2032 if (unlikely(skb->len == hdr_len)) { 2033 /* only xsum need */ 2034 if (netif_msg_tx_queued(adapter)) 2035 dev_warn(&pdev->dev, 2036 "IPV6 tso with zero data??\n"); 2037 goto check_sum; 2038 } else 2039 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2040 &ipv6_hdr(skb)->saddr, 2041 &ipv6_hdr(skb)->daddr, 2042 0, IPPROTO_TCP, 0); 2043 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2044 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2045 etpd->pkt_len = cpu_to_le32(skb->len); 2046 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2047 } 2048 2049 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2050 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2051 TPD_TCPHDR_OFFSET_SHIFT; 2052 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2053 TPD_MSS_SHIFT; 2054 return 0; 2055 } 2056 2057 check_sum: 2058 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2059 u8 css, cso; 2060 cso = skb_checksum_start_offset(skb); 2061 2062 if (unlikely(cso & 0x1)) { 2063 if (netif_msg_tx_err(adapter)) 2064 dev_err(&adapter->pdev->dev, 2065 "payload offset should not an event number\n"); 2066 return -1; 2067 } else { 2068 css = cso + skb->csum_offset; 2069 2070 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2071 TPD_PLOADOFFSET_SHIFT; 2072 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2073 TPD_CCSUM_OFFSET_SHIFT; 2074 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2075 } 2076 } 2077 return 0; 2078 } 2079 2080 static void atl1c_tx_rollback(struct atl1c_adapter *adpt, 2081 struct atl1c_tpd_desc *first_tpd, 2082 enum atl1c_trans_queue type) 2083 { 2084 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type]; 2085 struct atl1c_buffer *buffer_info; 2086 struct atl1c_tpd_desc *tpd; 2087 u16 first_index, index; 2088 2089 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc; 2090 index = first_index; 2091 while (index != tpd_ring->next_to_use) { 2092 tpd = ATL1C_TPD_DESC(tpd_ring, index); 2093 buffer_info = &tpd_ring->buffer_info[index]; 2094 atl1c_clean_buffer(adpt->pdev, buffer_info); 2095 memset(tpd, 0, sizeof(struct atl1c_tpd_desc)); 2096 if (++index == tpd_ring->count) 2097 index = 0; 2098 } 2099 tpd_ring->next_to_use = first_index; 2100 } 2101 2102 static int atl1c_tx_map(struct atl1c_adapter *adapter, 2103 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2104 enum atl1c_trans_queue type) 2105 { 2106 struct atl1c_tpd_desc *use_tpd = NULL; 2107 struct atl1c_buffer *buffer_info = NULL; 2108 u16 buf_len = skb_headlen(skb); 2109 u16 map_len = 0; 2110 u16 mapped_len = 0; 2111 u16 hdr_len = 0; 2112 u16 nr_frags; 2113 u16 f; 2114 int tso; 2115 2116 nr_frags = skb_shinfo(skb)->nr_frags; 2117 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2118 if (tso) { 2119 /* TSO */ 2120 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2121 use_tpd = tpd; 2122 2123 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2124 buffer_info->length = map_len; 2125 buffer_info->dma = pci_map_single(adapter->pdev, 2126 skb->data, hdr_len, PCI_DMA_TODEVICE); 2127 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2128 buffer_info->dma))) 2129 goto err_dma; 2130 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2131 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2132 ATL1C_PCIMAP_TODEVICE); 2133 mapped_len += map_len; 2134 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2135 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2136 } 2137 2138 if (mapped_len < buf_len) { 2139 /* mapped_len == 0, means we should use the first tpd, 2140 which is given by caller */ 2141 if (mapped_len == 0) 2142 use_tpd = tpd; 2143 else { 2144 use_tpd = atl1c_get_tpd(adapter, type); 2145 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2146 } 2147 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2148 buffer_info->length = buf_len - mapped_len; 2149 buffer_info->dma = 2150 pci_map_single(adapter->pdev, skb->data + mapped_len, 2151 buffer_info->length, PCI_DMA_TODEVICE); 2152 if (unlikely(pci_dma_mapping_error(adapter->pdev, 2153 buffer_info->dma))) 2154 goto err_dma; 2155 2156 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2157 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2158 ATL1C_PCIMAP_TODEVICE); 2159 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2160 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2161 } 2162 2163 for (f = 0; f < nr_frags; f++) { 2164 struct skb_frag_struct *frag; 2165 2166 frag = &skb_shinfo(skb)->frags[f]; 2167 2168 use_tpd = atl1c_get_tpd(adapter, type); 2169 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2170 2171 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2172 buffer_info->length = skb_frag_size(frag); 2173 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2174 frag, 0, 2175 buffer_info->length, 2176 DMA_TO_DEVICE); 2177 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) 2178 goto err_dma; 2179 2180 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2181 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2182 ATL1C_PCIMAP_TODEVICE); 2183 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2184 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2185 } 2186 2187 /* The last tpd */ 2188 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2189 /* The last buffer info contain the skb address, 2190 so it will be free after unmap */ 2191 buffer_info->skb = skb; 2192 2193 return 0; 2194 2195 err_dma: 2196 buffer_info->dma = 0; 2197 buffer_info->length = 0; 2198 return -1; 2199 } 2200 2201 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2202 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2203 { 2204 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2205 u16 reg; 2206 2207 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2208 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2209 } 2210 2211 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2212 struct net_device *netdev) 2213 { 2214 struct atl1c_adapter *adapter = netdev_priv(netdev); 2215 u16 tpd_req = 1; 2216 struct atl1c_tpd_desc *tpd; 2217 enum atl1c_trans_queue type = atl1c_trans_normal; 2218 2219 if (test_bit(__AT_DOWN, &adapter->flags)) { 2220 dev_kfree_skb_any(skb); 2221 return NETDEV_TX_OK; 2222 } 2223 2224 tpd_req = atl1c_cal_tpd_req(skb); 2225 2226 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2227 /* no enough descriptor, just stop queue */ 2228 netif_stop_queue(netdev); 2229 return NETDEV_TX_BUSY; 2230 } 2231 2232 tpd = atl1c_get_tpd(adapter, type); 2233 2234 /* do TSO and check sum */ 2235 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2236 dev_kfree_skb_any(skb); 2237 return NETDEV_TX_OK; 2238 } 2239 2240 if (unlikely(skb_vlan_tag_present(skb))) { 2241 u16 vlan = skb_vlan_tag_get(skb); 2242 __le16 tag; 2243 2244 vlan = cpu_to_le16(vlan); 2245 AT_VLAN_TO_TAG(vlan, tag); 2246 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2247 tpd->vlan_tag = tag; 2248 } 2249 2250 if (skb_network_offset(skb) != ETH_HLEN) 2251 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2252 2253 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) { 2254 netif_info(adapter, tx_done, adapter->netdev, 2255 "tx-skb droppted due to dma error\n"); 2256 /* roll back tpd/buffer */ 2257 atl1c_tx_rollback(adapter, tpd, type); 2258 dev_kfree_skb_any(skb); 2259 } else { 2260 netdev_sent_queue(adapter->netdev, skb->len); 2261 atl1c_tx_queue(adapter, skb, tpd, type); 2262 } 2263 2264 return NETDEV_TX_OK; 2265 } 2266 2267 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2268 { 2269 struct net_device *netdev = adapter->netdev; 2270 2271 free_irq(adapter->pdev->irq, netdev); 2272 2273 if (adapter->have_msi) 2274 pci_disable_msi(adapter->pdev); 2275 } 2276 2277 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2278 { 2279 struct pci_dev *pdev = adapter->pdev; 2280 struct net_device *netdev = adapter->netdev; 2281 int flags = 0; 2282 int err = 0; 2283 2284 adapter->have_msi = true; 2285 err = pci_enable_msi(adapter->pdev); 2286 if (err) { 2287 if (netif_msg_ifup(adapter)) 2288 dev_err(&pdev->dev, 2289 "Unable to allocate MSI interrupt Error: %d\n", 2290 err); 2291 adapter->have_msi = false; 2292 } 2293 2294 if (!adapter->have_msi) 2295 flags |= IRQF_SHARED; 2296 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2297 netdev->name, netdev); 2298 if (err) { 2299 if (netif_msg_ifup(adapter)) 2300 dev_err(&pdev->dev, 2301 "Unable to allocate interrupt Error: %d\n", 2302 err); 2303 if (adapter->have_msi) 2304 pci_disable_msi(adapter->pdev); 2305 return err; 2306 } 2307 if (netif_msg_ifup(adapter)) 2308 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2309 return err; 2310 } 2311 2312 2313 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter) 2314 { 2315 /* release tx-pending skbs and reset tx/rx ring index */ 2316 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2317 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2318 atl1c_clean_rx_ring(adapter); 2319 } 2320 2321 static int atl1c_up(struct atl1c_adapter *adapter) 2322 { 2323 struct net_device *netdev = adapter->netdev; 2324 int err; 2325 2326 netif_carrier_off(netdev); 2327 2328 err = atl1c_configure(adapter); 2329 if (unlikely(err)) 2330 goto err_up; 2331 2332 err = atl1c_request_irq(adapter); 2333 if (unlikely(err)) 2334 goto err_up; 2335 2336 atl1c_check_link_status(adapter); 2337 clear_bit(__AT_DOWN, &adapter->flags); 2338 napi_enable(&adapter->napi); 2339 atl1c_irq_enable(adapter); 2340 netif_start_queue(netdev); 2341 return err; 2342 2343 err_up: 2344 atl1c_clean_rx_ring(adapter); 2345 return err; 2346 } 2347 2348 static void atl1c_down(struct atl1c_adapter *adapter) 2349 { 2350 struct net_device *netdev = adapter->netdev; 2351 2352 atl1c_del_timer(adapter); 2353 adapter->work_event = 0; /* clear all event */ 2354 /* signal that we're down so the interrupt handler does not 2355 * reschedule our watchdog timer */ 2356 set_bit(__AT_DOWN, &adapter->flags); 2357 netif_carrier_off(netdev); 2358 napi_disable(&adapter->napi); 2359 atl1c_irq_disable(adapter); 2360 atl1c_free_irq(adapter); 2361 /* disable ASPM if device inactive */ 2362 atl1c_disable_l0s_l1(&adapter->hw); 2363 /* reset MAC to disable all RX/TX */ 2364 atl1c_reset_mac(&adapter->hw); 2365 msleep(1); 2366 2367 adapter->link_speed = SPEED_0; 2368 adapter->link_duplex = -1; 2369 atl1c_reset_dma_ring(adapter); 2370 } 2371 2372 /** 2373 * atl1c_open - Called when a network interface is made active 2374 * @netdev: network interface device structure 2375 * 2376 * Returns 0 on success, negative value on failure 2377 * 2378 * The open entry point is called when a network interface is made 2379 * active by the system (IFF_UP). At this point all resources needed 2380 * for transmit and receive operations are allocated, the interrupt 2381 * handler is registered with the OS, the watchdog timer is started, 2382 * and the stack is notified that the interface is ready. 2383 */ 2384 static int atl1c_open(struct net_device *netdev) 2385 { 2386 struct atl1c_adapter *adapter = netdev_priv(netdev); 2387 int err; 2388 2389 /* disallow open during test */ 2390 if (test_bit(__AT_TESTING, &adapter->flags)) 2391 return -EBUSY; 2392 2393 /* allocate rx/tx dma buffer & descriptors */ 2394 err = atl1c_setup_ring_resources(adapter); 2395 if (unlikely(err)) 2396 return err; 2397 2398 err = atl1c_up(adapter); 2399 if (unlikely(err)) 2400 goto err_up; 2401 2402 return 0; 2403 2404 err_up: 2405 atl1c_free_irq(adapter); 2406 atl1c_free_ring_resources(adapter); 2407 atl1c_reset_mac(&adapter->hw); 2408 return err; 2409 } 2410 2411 /** 2412 * atl1c_close - Disables a network interface 2413 * @netdev: network interface device structure 2414 * 2415 * Returns 0, this is not allowed to fail 2416 * 2417 * The close entry point is called when an interface is de-activated 2418 * by the OS. The hardware is still under the drivers control, but 2419 * needs to be disabled. A global MAC reset is issued to stop the 2420 * hardware, and all transmit and receive resources are freed. 2421 */ 2422 static int atl1c_close(struct net_device *netdev) 2423 { 2424 struct atl1c_adapter *adapter = netdev_priv(netdev); 2425 2426 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2427 set_bit(__AT_DOWN, &adapter->flags); 2428 cancel_work_sync(&adapter->common_task); 2429 atl1c_down(adapter); 2430 atl1c_free_ring_resources(adapter); 2431 return 0; 2432 } 2433 2434 static int atl1c_suspend(struct device *dev) 2435 { 2436 struct pci_dev *pdev = to_pci_dev(dev); 2437 struct net_device *netdev = pci_get_drvdata(pdev); 2438 struct atl1c_adapter *adapter = netdev_priv(netdev); 2439 struct atl1c_hw *hw = &adapter->hw; 2440 u32 wufc = adapter->wol; 2441 2442 atl1c_disable_l0s_l1(hw); 2443 if (netif_running(netdev)) { 2444 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2445 atl1c_down(adapter); 2446 } 2447 netif_device_detach(netdev); 2448 2449 if (wufc) 2450 if (atl1c_phy_to_ps_link(hw) != 0) 2451 dev_dbg(&pdev->dev, "phy power saving failed"); 2452 2453 atl1c_power_saving(hw, wufc); 2454 2455 return 0; 2456 } 2457 2458 #ifdef CONFIG_PM_SLEEP 2459 static int atl1c_resume(struct device *dev) 2460 { 2461 struct pci_dev *pdev = to_pci_dev(dev); 2462 struct net_device *netdev = pci_get_drvdata(pdev); 2463 struct atl1c_adapter *adapter = netdev_priv(netdev); 2464 2465 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2466 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2467 2468 atl1c_phy_reset(&adapter->hw); 2469 atl1c_reset_mac(&adapter->hw); 2470 atl1c_phy_init(&adapter->hw); 2471 2472 #if 0 2473 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2474 pm_data &= ~PM_CTRLSTAT_PME_EN; 2475 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2476 #endif 2477 2478 netif_device_attach(netdev); 2479 if (netif_running(netdev)) 2480 atl1c_up(adapter); 2481 2482 return 0; 2483 } 2484 #endif 2485 2486 static void atl1c_shutdown(struct pci_dev *pdev) 2487 { 2488 struct net_device *netdev = pci_get_drvdata(pdev); 2489 struct atl1c_adapter *adapter = netdev_priv(netdev); 2490 2491 atl1c_suspend(&pdev->dev); 2492 pci_wake_from_d3(pdev, adapter->wol); 2493 pci_set_power_state(pdev, PCI_D3hot); 2494 } 2495 2496 static const struct net_device_ops atl1c_netdev_ops = { 2497 .ndo_open = atl1c_open, 2498 .ndo_stop = atl1c_close, 2499 .ndo_validate_addr = eth_validate_addr, 2500 .ndo_start_xmit = atl1c_xmit_frame, 2501 .ndo_set_mac_address = atl1c_set_mac_addr, 2502 .ndo_set_rx_mode = atl1c_set_multi, 2503 .ndo_change_mtu = atl1c_change_mtu, 2504 .ndo_fix_features = atl1c_fix_features, 2505 .ndo_set_features = atl1c_set_features, 2506 .ndo_do_ioctl = atl1c_ioctl, 2507 .ndo_tx_timeout = atl1c_tx_timeout, 2508 .ndo_get_stats = atl1c_get_stats, 2509 #ifdef CONFIG_NET_POLL_CONTROLLER 2510 .ndo_poll_controller = atl1c_netpoll, 2511 #endif 2512 }; 2513 2514 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2515 { 2516 SET_NETDEV_DEV(netdev, &pdev->dev); 2517 pci_set_drvdata(pdev, netdev); 2518 2519 netdev->netdev_ops = &atl1c_netdev_ops; 2520 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2521 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN); 2522 atl1c_set_ethtool_ops(netdev); 2523 2524 /* TODO: add when ready */ 2525 netdev->hw_features = NETIF_F_SG | 2526 NETIF_F_HW_CSUM | 2527 NETIF_F_HW_VLAN_CTAG_RX | 2528 NETIF_F_TSO | 2529 NETIF_F_TSO6; 2530 netdev->features = netdev->hw_features | 2531 NETIF_F_HW_VLAN_CTAG_TX; 2532 return 0; 2533 } 2534 2535 /** 2536 * atl1c_probe - Device Initialization Routine 2537 * @pdev: PCI device information struct 2538 * @ent: entry in atl1c_pci_tbl 2539 * 2540 * Returns 0 on success, negative on failure 2541 * 2542 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2543 * The OS initialization, configuring of the adapter private structure, 2544 * and a hardware reset occur. 2545 */ 2546 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2547 { 2548 struct net_device *netdev; 2549 struct atl1c_adapter *adapter; 2550 static int cards_found; 2551 2552 int err = 0; 2553 2554 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2555 err = pci_enable_device_mem(pdev); 2556 if (err) { 2557 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2558 return err; 2559 } 2560 2561 /* 2562 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2563 * shared register for the high 32 bits, so only a single, aligned, 2564 * 4 GB physical address range can be used at a time. 2565 * 2566 * Supporting 64-bit DMA on this hardware is more trouble than it's 2567 * worth. It is far easier to limit to 32-bit DMA than update 2568 * various kernel subsystems to support the mechanics required by a 2569 * fixed-high-32-bit system. 2570 */ 2571 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2572 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2573 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2574 goto err_dma; 2575 } 2576 2577 err = pci_request_regions(pdev, atl1c_driver_name); 2578 if (err) { 2579 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2580 goto err_pci_reg; 2581 } 2582 2583 pci_set_master(pdev); 2584 2585 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2586 if (netdev == NULL) { 2587 err = -ENOMEM; 2588 goto err_alloc_etherdev; 2589 } 2590 2591 err = atl1c_init_netdev(netdev, pdev); 2592 if (err) { 2593 dev_err(&pdev->dev, "init netdevice failed\n"); 2594 goto err_init_netdev; 2595 } 2596 adapter = netdev_priv(netdev); 2597 adapter->bd_number = cards_found; 2598 adapter->netdev = netdev; 2599 adapter->pdev = pdev; 2600 adapter->hw.adapter = adapter; 2601 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2602 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2603 if (!adapter->hw.hw_addr) { 2604 err = -EIO; 2605 dev_err(&pdev->dev, "cannot map device registers\n"); 2606 goto err_ioremap; 2607 } 2608 2609 /* init mii data */ 2610 adapter->mii.dev = netdev; 2611 adapter->mii.mdio_read = atl1c_mdio_read; 2612 adapter->mii.mdio_write = atl1c_mdio_write; 2613 adapter->mii.phy_id_mask = 0x1f; 2614 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK; 2615 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2616 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2617 (unsigned long)adapter); 2618 /* setup the private structure */ 2619 err = atl1c_sw_init(adapter); 2620 if (err) { 2621 dev_err(&pdev->dev, "net device private data init failed\n"); 2622 goto err_sw_init; 2623 } 2624 /* set max MTU */ 2625 atl1c_set_max_mtu(netdev); 2626 2627 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE); 2628 2629 /* Init GPHY as early as possible due to power saving issue */ 2630 atl1c_phy_reset(&adapter->hw); 2631 2632 err = atl1c_reset_mac(&adapter->hw); 2633 if (err) { 2634 err = -EIO; 2635 goto err_reset; 2636 } 2637 2638 /* reset the controller to 2639 * put the device in a known good starting state */ 2640 err = atl1c_phy_init(&adapter->hw); 2641 if (err) { 2642 err = -EIO; 2643 goto err_reset; 2644 } 2645 if (atl1c_read_mac_addr(&adapter->hw)) { 2646 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2647 netdev->addr_assign_type = NET_ADDR_RANDOM; 2648 } 2649 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2650 if (netif_msg_probe(adapter)) 2651 dev_dbg(&pdev->dev, "mac address : %pM\n", 2652 adapter->hw.mac_addr); 2653 2654 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr); 2655 INIT_WORK(&adapter->common_task, atl1c_common_task); 2656 adapter->work_event = 0; 2657 err = register_netdev(netdev); 2658 if (err) { 2659 dev_err(&pdev->dev, "register netdevice failed\n"); 2660 goto err_register; 2661 } 2662 2663 if (netif_msg_probe(adapter)) 2664 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2665 cards_found++; 2666 return 0; 2667 2668 err_reset: 2669 err_register: 2670 err_sw_init: 2671 iounmap(adapter->hw.hw_addr); 2672 err_init_netdev: 2673 err_ioremap: 2674 free_netdev(netdev); 2675 err_alloc_etherdev: 2676 pci_release_regions(pdev); 2677 err_pci_reg: 2678 err_dma: 2679 pci_disable_device(pdev); 2680 return err; 2681 } 2682 2683 /** 2684 * atl1c_remove - Device Removal Routine 2685 * @pdev: PCI device information struct 2686 * 2687 * atl1c_remove is called by the PCI subsystem to alert the driver 2688 * that it should release a PCI device. The could be caused by a 2689 * Hot-Plug event, or because the driver is going to be removed from 2690 * memory. 2691 */ 2692 static void atl1c_remove(struct pci_dev *pdev) 2693 { 2694 struct net_device *netdev = pci_get_drvdata(pdev); 2695 struct atl1c_adapter *adapter = netdev_priv(netdev); 2696 2697 unregister_netdev(netdev); 2698 /* restore permanent address */ 2699 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr); 2700 atl1c_phy_disable(&adapter->hw); 2701 2702 iounmap(adapter->hw.hw_addr); 2703 2704 pci_release_regions(pdev); 2705 pci_disable_device(pdev); 2706 free_netdev(netdev); 2707 } 2708 2709 /** 2710 * atl1c_io_error_detected - called when PCI error is detected 2711 * @pdev: Pointer to PCI device 2712 * @state: The current pci connection state 2713 * 2714 * This function is called after a PCI bus error affecting 2715 * this device has been detected. 2716 */ 2717 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2718 pci_channel_state_t state) 2719 { 2720 struct net_device *netdev = pci_get_drvdata(pdev); 2721 struct atl1c_adapter *adapter = netdev_priv(netdev); 2722 2723 netif_device_detach(netdev); 2724 2725 if (state == pci_channel_io_perm_failure) 2726 return PCI_ERS_RESULT_DISCONNECT; 2727 2728 if (netif_running(netdev)) 2729 atl1c_down(adapter); 2730 2731 pci_disable_device(pdev); 2732 2733 /* Request a slot slot reset. */ 2734 return PCI_ERS_RESULT_NEED_RESET; 2735 } 2736 2737 /** 2738 * atl1c_io_slot_reset - called after the pci bus has been reset. 2739 * @pdev: Pointer to PCI device 2740 * 2741 * Restart the card from scratch, as if from a cold-boot. Implementation 2742 * resembles the first-half of the e1000_resume routine. 2743 */ 2744 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2745 { 2746 struct net_device *netdev = pci_get_drvdata(pdev); 2747 struct atl1c_adapter *adapter = netdev_priv(netdev); 2748 2749 if (pci_enable_device(pdev)) { 2750 if (netif_msg_hw(adapter)) 2751 dev_err(&pdev->dev, 2752 "Cannot re-enable PCI device after reset\n"); 2753 return PCI_ERS_RESULT_DISCONNECT; 2754 } 2755 pci_set_master(pdev); 2756 2757 pci_enable_wake(pdev, PCI_D3hot, 0); 2758 pci_enable_wake(pdev, PCI_D3cold, 0); 2759 2760 atl1c_reset_mac(&adapter->hw); 2761 2762 return PCI_ERS_RESULT_RECOVERED; 2763 } 2764 2765 /** 2766 * atl1c_io_resume - called when traffic can start flowing again. 2767 * @pdev: Pointer to PCI device 2768 * 2769 * This callback is called when the error recovery driver tells us that 2770 * its OK to resume normal operation. Implementation resembles the 2771 * second-half of the atl1c_resume routine. 2772 */ 2773 static void atl1c_io_resume(struct pci_dev *pdev) 2774 { 2775 struct net_device *netdev = pci_get_drvdata(pdev); 2776 struct atl1c_adapter *adapter = netdev_priv(netdev); 2777 2778 if (netif_running(netdev)) { 2779 if (atl1c_up(adapter)) { 2780 if (netif_msg_hw(adapter)) 2781 dev_err(&pdev->dev, 2782 "Cannot bring device back up after reset\n"); 2783 return; 2784 } 2785 } 2786 2787 netif_device_attach(netdev); 2788 } 2789 2790 static const struct pci_error_handlers atl1c_err_handler = { 2791 .error_detected = atl1c_io_error_detected, 2792 .slot_reset = atl1c_io_slot_reset, 2793 .resume = atl1c_io_resume, 2794 }; 2795 2796 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2797 2798 static struct pci_driver atl1c_driver = { 2799 .name = atl1c_driver_name, 2800 .id_table = atl1c_pci_tbl, 2801 .probe = atl1c_probe, 2802 .remove = atl1c_remove, 2803 .shutdown = atl1c_shutdown, 2804 .err_handler = &atl1c_err_handler, 2805 .driver.pm = &atl1c_pm_ops, 2806 }; 2807 2808 module_pci_driver(atl1c_driver); 2809