1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
4  *
5  * Derived from Intel e1000 driver
6  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
7  */
8 
9 #include "atl1c.h"
10 
11 char atl1c_driver_name[] = "atl1c";
12 
13 /*
14  * atl1c_pci_tbl - PCI Device ID Table
15  *
16  * Wildcard entries (PCI_ANY_ID) should come last
17  * Last entry must be all 0s
18  *
19  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
20  *   Class, Class Mask, private data (not used) }
21  */
22 static const struct pci_device_id atl1c_pci_tbl[] = {
23 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
24 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
25 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
26 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
27 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
28 	{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
29 	/* required last entry */
30 	{ 0 }
31 };
32 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
33 
34 MODULE_AUTHOR("Jie Yang");
35 MODULE_AUTHOR("Qualcomm Atheros Inc.");
36 MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver");
37 MODULE_LICENSE("GPL");
38 
39 struct atl1c_qregs {
40 	u16 tpd_addr_lo;
41 	u16 tpd_prod;
42 	u16 tpd_cons;
43 	u16 rfd_addr_lo;
44 	u16 rrd_addr_lo;
45 	u16 rfd_prod;
46 	u32 tx_isr;
47 	u32 rx_isr;
48 };
49 
50 static struct atl1c_qregs atl1c_qregs[AT_MAX_TRANSMIT_QUEUE] = {
51 	{
52 		REG_TPD_PRI0_ADDR_LO, REG_TPD_PRI0_PIDX, REG_TPD_PRI0_CIDX,
53 		REG_RFD0_HEAD_ADDR_LO, REG_RRD0_HEAD_ADDR_LO,
54 		REG_MB_RFD0_PROD_IDX, ISR_TX_PKT_0, ISR_RX_PKT_0
55 	},
56 	{
57 		REG_TPD_PRI1_ADDR_LO, REG_TPD_PRI1_PIDX, REG_TPD_PRI1_CIDX,
58 		REG_RFD1_HEAD_ADDR_LO, REG_RRD1_HEAD_ADDR_LO,
59 		REG_MB_RFD1_PROD_IDX, ISR_TX_PKT_1, ISR_RX_PKT_1
60 	},
61 	{
62 		REG_TPD_PRI2_ADDR_LO, REG_TPD_PRI2_PIDX, REG_TPD_PRI2_CIDX,
63 		REG_RFD2_HEAD_ADDR_LO, REG_RRD2_HEAD_ADDR_LO,
64 		REG_MB_RFD2_PROD_IDX, ISR_TX_PKT_2, ISR_RX_PKT_2
65 	},
66 	{
67 		REG_TPD_PRI3_ADDR_LO, REG_TPD_PRI3_PIDX, REG_TPD_PRI3_CIDX,
68 		REG_RFD3_HEAD_ADDR_LO, REG_RRD3_HEAD_ADDR_LO,
69 		REG_MB_RFD3_PROD_IDX, ISR_TX_PKT_3, ISR_RX_PKT_3
70 	},
71 };
72 
73 static int atl1c_stop_mac(struct atl1c_hw *hw);
74 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
75 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
76 static void atl1c_start_mac(struct atl1c_adapter *adapter);
77 static int atl1c_up(struct atl1c_adapter *adapter);
78 static void atl1c_down(struct atl1c_adapter *adapter);
79 static int atl1c_reset_mac(struct atl1c_hw *hw);
80 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
81 static int atl1c_configure(struct atl1c_adapter *adapter);
82 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue,
83 				 bool napi_mode);
84 
85 
86 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
87 	NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
88 static void atl1c_pcie_patch(struct atl1c_hw *hw)
89 {
90 	u32 mst_data, data;
91 
92 	/* pclk sel could switch to 25M */
93 	AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
94 	mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
95 	AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
96 
97 	/* WoL/PCIE related settings */
98 	if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
99 		AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
100 		data |= PCIE_PHYMISC_FORCE_RCV_DET;
101 		AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
102 	} else { /* new dev set bit5 of MASTER */
103 		if (!(mst_data & MASTER_CTRL_WAKEN_25M))
104 			AT_WRITE_REG(hw, REG_MASTER_CTRL,
105 				mst_data | MASTER_CTRL_WAKEN_25M);
106 	}
107 	/* aspm/PCIE setting only for l2cb 1.0 */
108 	if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
109 		AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
110 		data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
111 			L2CB1_PCIE_PHYMISC2_CDR_BW);
112 		data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
113 			L2CB1_PCIE_PHYMISC2_L0S_TH);
114 		AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
115 		/* extend L1 sync timer */
116 		AT_READ_REG(hw, REG_LINK_CTRL, &data);
117 		data |= LINK_CTRL_EXT_SYNC;
118 		AT_WRITE_REG(hw, REG_LINK_CTRL, data);
119 	}
120 	/* l2cb 1.x & l1d 1.x */
121 	if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
122 		AT_READ_REG(hw, REG_PM_CTRL, &data);
123 		data |= PM_CTRL_L0S_BUFSRX_EN;
124 		AT_WRITE_REG(hw, REG_PM_CTRL, data);
125 		/* clear vendor msg */
126 		AT_READ_REG(hw, REG_DMA_DBG, &data);
127 		AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
128 	}
129 }
130 
131 /* FIXME: no need any more ? */
132 /*
133  * atl1c_init_pcie - init PCIE module
134  */
135 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
136 {
137 	u32 data;
138 	u32 pci_cmd;
139 	struct pci_dev *pdev = hw->adapter->pdev;
140 	int pos;
141 
142 	AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
143 	pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
144 	pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
145 		PCI_COMMAND_IO);
146 	AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
147 
148 	/*
149 	 * Clear any PowerSaveing Settings
150 	 */
151 	pci_enable_wake(pdev, PCI_D3hot, 0);
152 	pci_enable_wake(pdev, PCI_D3cold, 0);
153 	/* wol sts read-clear */
154 	AT_READ_REG(hw, REG_WOL_CTRL, &data);
155 	AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
156 
157 	/*
158 	 * Mask some pcie error bits
159 	 */
160 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
161 	if (pos) {
162 		pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
163 		data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
164 		pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
165 	}
166 	/* clear error status */
167 	pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
168 			PCI_EXP_DEVSTA_NFED |
169 			PCI_EXP_DEVSTA_FED |
170 			PCI_EXP_DEVSTA_CED |
171 			PCI_EXP_DEVSTA_URD);
172 
173 	AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
174 	data &= ~LTSSM_ID_EN_WRO;
175 	AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
176 
177 	atl1c_pcie_patch(hw);
178 	if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
179 		atl1c_disable_l0s_l1(hw);
180 
181 	msleep(5);
182 }
183 
184 /**
185  * atl1c_irq_enable - Enable default interrupt generation settings
186  * @adapter: board private structure
187  */
188 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
189 {
190 	if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
191 		AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
192 		AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
193 		AT_WRITE_FLUSH(&adapter->hw);
194 	}
195 }
196 
197 /**
198  * atl1c_irq_disable - Mask off interrupt generation on the NIC
199  * @adapter: board private structure
200  */
201 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
202 {
203 	atomic_inc(&adapter->irq_sem);
204 	AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
205 	AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
206 	AT_WRITE_FLUSH(&adapter->hw);
207 	synchronize_irq(adapter->pdev->irq);
208 }
209 
210 /*
211  * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
212  * of the idle status register until the device is actually idle
213  */
214 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
215 {
216 	int timeout;
217 	u32 data;
218 
219 	for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
220 		AT_READ_REG(hw, REG_IDLE_STATUS, &data);
221 		if ((data & modu_ctrl) == 0)
222 			return 0;
223 		msleep(1);
224 	}
225 	return data;
226 }
227 
228 /**
229  * atl1c_phy_config - Timer Call-back
230  * @t: timer list containing pointer to netdev cast into an unsigned long
231  */
232 static void atl1c_phy_config(struct timer_list *t)
233 {
234 	struct atl1c_adapter *adapter = from_timer(adapter, t,
235 						   phy_config_timer);
236 	struct atl1c_hw *hw = &adapter->hw;
237 	unsigned long flags;
238 
239 	spin_lock_irqsave(&adapter->mdio_lock, flags);
240 	atl1c_restart_autoneg(hw);
241 	spin_unlock_irqrestore(&adapter->mdio_lock, flags);
242 }
243 
244 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
245 {
246 	atl1c_down(adapter);
247 	atl1c_up(adapter);
248 	clear_bit(__AT_RESETTING, &adapter->flags);
249 }
250 
251 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
252 {
253 	struct atl1c_hw *hw = &adapter->hw;
254 	struct net_device *netdev = adapter->netdev;
255 	struct pci_dev    *pdev   = adapter->pdev;
256 	int err;
257 	unsigned long flags;
258 	u16 speed, duplex;
259 	bool link;
260 
261 	spin_lock_irqsave(&adapter->mdio_lock, flags);
262 	link = atl1c_get_link_status(hw);
263 	spin_unlock_irqrestore(&adapter->mdio_lock, flags);
264 
265 	if (!link) {
266 		/* link down */
267 		netif_carrier_off(netdev);
268 		hw->hibernate = true;
269 		if (atl1c_reset_mac(hw) != 0)
270 			if (netif_msg_hw(adapter))
271 				dev_warn(&pdev->dev, "reset mac failed\n");
272 		atl1c_set_aspm(hw, SPEED_0);
273 		atl1c_post_phy_linkchg(hw, SPEED_0);
274 		atl1c_reset_dma_ring(adapter);
275 		atl1c_configure(adapter);
276 	} else {
277 		/* Link Up */
278 		hw->hibernate = false;
279 		spin_lock_irqsave(&adapter->mdio_lock, flags);
280 		err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
281 		spin_unlock_irqrestore(&adapter->mdio_lock, flags);
282 		if (unlikely(err))
283 			return;
284 		/* link result is our setting */
285 		if (adapter->link_speed != speed ||
286 		    adapter->link_duplex != duplex) {
287 			adapter->link_speed  = speed;
288 			adapter->link_duplex = duplex;
289 			atl1c_set_aspm(hw, speed);
290 			atl1c_post_phy_linkchg(hw, speed);
291 			atl1c_start_mac(adapter);
292 			if (netif_msg_link(adapter))
293 				dev_info(&pdev->dev,
294 					"%s: %s NIC Link is Up<%d Mbps %s>\n",
295 					atl1c_driver_name, netdev->name,
296 					adapter->link_speed,
297 					adapter->link_duplex == FULL_DUPLEX ?
298 					"Full Duplex" : "Half Duplex");
299 		}
300 		if (!netif_carrier_ok(netdev))
301 			netif_carrier_on(netdev);
302 	}
303 }
304 
305 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
306 {
307 	struct net_device *netdev = adapter->netdev;
308 	struct pci_dev    *pdev   = adapter->pdev;
309 	bool link;
310 
311 	spin_lock(&adapter->mdio_lock);
312 	link = atl1c_get_link_status(&adapter->hw);
313 	spin_unlock(&adapter->mdio_lock);
314 	/* notify upper layer link down ASAP */
315 	if (!link) {
316 		if (netif_carrier_ok(netdev)) {
317 			/* old link state: Up */
318 			netif_carrier_off(netdev);
319 			if (netif_msg_link(adapter))
320 				dev_info(&pdev->dev,
321 					"%s: %s NIC Link is Down\n",
322 					atl1c_driver_name, netdev->name);
323 			adapter->link_speed = SPEED_0;
324 		}
325 	}
326 
327 	set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
328 	schedule_work(&adapter->common_task);
329 }
330 
331 static void atl1c_common_task(struct work_struct *work)
332 {
333 	struct atl1c_adapter *adapter;
334 	struct net_device *netdev;
335 
336 	adapter = container_of(work, struct atl1c_adapter, common_task);
337 	netdev = adapter->netdev;
338 
339 	if (test_bit(__AT_DOWN, &adapter->flags))
340 		return;
341 
342 	if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
343 		netif_device_detach(netdev);
344 		atl1c_down(adapter);
345 		atl1c_up(adapter);
346 		netif_device_attach(netdev);
347 	}
348 
349 	if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
350 		&adapter->work_event)) {
351 		atl1c_irq_disable(adapter);
352 		atl1c_check_link_status(adapter);
353 		atl1c_irq_enable(adapter);
354 	}
355 }
356 
357 
358 static void atl1c_del_timer(struct atl1c_adapter *adapter)
359 {
360 	del_timer_sync(&adapter->phy_config_timer);
361 }
362 
363 
364 /**
365  * atl1c_tx_timeout - Respond to a Tx Hang
366  * @netdev: network interface device structure
367  * @txqueue: index of hanging tx queue
368  */
369 static void atl1c_tx_timeout(struct net_device *netdev, unsigned int txqueue)
370 {
371 	struct atl1c_adapter *adapter = netdev_priv(netdev);
372 
373 	/* Do the reset outside of interrupt context */
374 	set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
375 	schedule_work(&adapter->common_task);
376 }
377 
378 /**
379  * atl1c_set_multi - Multicast and Promiscuous mode set
380  * @netdev: network interface device structure
381  *
382  * The set_multi entry point is called whenever the multicast address
383  * list or the network interface flags are updated.  This routine is
384  * responsible for configuring the hardware for proper multicast,
385  * promiscuous mode, and all-multi behavior.
386  */
387 static void atl1c_set_multi(struct net_device *netdev)
388 {
389 	struct atl1c_adapter *adapter = netdev_priv(netdev);
390 	struct atl1c_hw *hw = &adapter->hw;
391 	struct netdev_hw_addr *ha;
392 	u32 mac_ctrl_data;
393 	u32 hash_value;
394 
395 	/* Check for Promiscuous and All Multicast modes */
396 	AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
397 
398 	if (netdev->flags & IFF_PROMISC) {
399 		mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
400 	} else if (netdev->flags & IFF_ALLMULTI) {
401 		mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
402 		mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
403 	} else {
404 		mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
405 	}
406 
407 	AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
408 
409 	/* clear the old settings from the multicast hash table */
410 	AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
411 	AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
412 
413 	/* comoute mc addresses' hash value ,and put it into hash table */
414 	netdev_for_each_mc_addr(ha, netdev) {
415 		hash_value = atl1c_hash_mc_addr(hw, ha->addr);
416 		atl1c_hash_set(hw, hash_value);
417 	}
418 }
419 
420 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
421 {
422 	if (features & NETIF_F_HW_VLAN_CTAG_RX) {
423 		/* enable VLAN tag insert/strip */
424 		*mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
425 	} else {
426 		/* disable VLAN tag insert/strip */
427 		*mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
428 	}
429 }
430 
431 static void atl1c_vlan_mode(struct net_device *netdev,
432 	netdev_features_t features)
433 {
434 	struct atl1c_adapter *adapter = netdev_priv(netdev);
435 	struct pci_dev *pdev = adapter->pdev;
436 	u32 mac_ctrl_data = 0;
437 
438 	if (netif_msg_pktdata(adapter))
439 		dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
440 
441 	atl1c_irq_disable(adapter);
442 	AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
443 	__atl1c_vlan_mode(features, &mac_ctrl_data);
444 	AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
445 	atl1c_irq_enable(adapter);
446 }
447 
448 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
449 {
450 	struct pci_dev *pdev = adapter->pdev;
451 
452 	if (netif_msg_pktdata(adapter))
453 		dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
454 	atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
455 }
456 
457 /**
458  * atl1c_set_mac_addr - Change the Ethernet Address of the NIC
459  * @netdev: network interface device structure
460  * @p: pointer to an address structure
461  *
462  * Returns 0 on success, negative on failure
463  */
464 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
465 {
466 	struct atl1c_adapter *adapter = netdev_priv(netdev);
467 	struct sockaddr *addr = p;
468 
469 	if (!is_valid_ether_addr(addr->sa_data))
470 		return -EADDRNOTAVAIL;
471 
472 	if (netif_running(netdev))
473 		return -EBUSY;
474 
475 	eth_hw_addr_set(netdev, addr->sa_data);
476 	memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
477 
478 	atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
479 
480 	return 0;
481 }
482 
483 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
484 				struct net_device *dev)
485 {
486 	unsigned int head_size;
487 	int mtu = dev->mtu;
488 
489 	adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
490 		roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
491 
492 	head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD + NET_IP_ALIGN) +
493 		    SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
494 	adapter->rx_frag_size = roundup_pow_of_two(head_size);
495 }
496 
497 static netdev_features_t atl1c_fix_features(struct net_device *netdev,
498 	netdev_features_t features)
499 {
500 	struct atl1c_adapter *adapter = netdev_priv(netdev);
501 	struct atl1c_hw *hw = &adapter->hw;
502 
503 	/*
504 	 * Since there is no support for separate rx/tx vlan accel
505 	 * enable/disable make sure tx flag is always in same state as rx.
506 	 */
507 	if (features & NETIF_F_HW_VLAN_CTAG_RX)
508 		features |= NETIF_F_HW_VLAN_CTAG_TX;
509 	else
510 		features &= ~NETIF_F_HW_VLAN_CTAG_TX;
511 
512 	if (hw->nic_type != athr_mt) {
513 		if (netdev->mtu > MAX_TSO_FRAME_SIZE)
514 			features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
515 	}
516 
517 	return features;
518 }
519 
520 static int atl1c_set_features(struct net_device *netdev,
521 	netdev_features_t features)
522 {
523 	netdev_features_t changed = netdev->features ^ features;
524 
525 	if (changed & NETIF_F_HW_VLAN_CTAG_RX)
526 		atl1c_vlan_mode(netdev, features);
527 
528 	return 0;
529 }
530 
531 static void atl1c_set_max_mtu(struct net_device *netdev)
532 {
533 	struct atl1c_adapter *adapter = netdev_priv(netdev);
534 	struct atl1c_hw *hw = &adapter->hw;
535 
536 	switch (hw->nic_type) {
537 	/* These (GbE) devices support jumbo packets, max_mtu 6122 */
538 	case athr_l1c:
539 	case athr_l1d:
540 	case athr_l1d_2:
541 		netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
542 			(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
543 		break;
544 	case athr_mt:
545 		netdev->max_mtu = 9500;
546 		break;
547 		/* The 10/100 devices don't support jumbo packets, max_mtu 1500 */
548 	default:
549 		netdev->max_mtu = ETH_DATA_LEN;
550 		break;
551 	}
552 }
553 
554 /**
555  * atl1c_change_mtu - Change the Maximum Transfer Unit
556  * @netdev: network interface device structure
557  * @new_mtu: new value for maximum frame size
558  *
559  * Returns 0 on success, negative on failure
560  */
561 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
562 {
563 	struct atl1c_adapter *adapter = netdev_priv(netdev);
564 
565 	/* set MTU */
566 	if (netif_running(netdev)) {
567 		while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
568 			msleep(1);
569 		netdev->mtu = new_mtu;
570 		adapter->hw.max_frame_size = new_mtu;
571 		atl1c_set_rxbufsize(adapter, netdev);
572 		atl1c_down(adapter);
573 		netdev_update_features(netdev);
574 		atl1c_up(adapter);
575 		clear_bit(__AT_RESETTING, &adapter->flags);
576 	}
577 	return 0;
578 }
579 
580 /*
581  *  caller should hold mdio_lock
582  */
583 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
584 {
585 	struct atl1c_adapter *adapter = netdev_priv(netdev);
586 	u16 result;
587 
588 	atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
589 	return result;
590 }
591 
592 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
593 			     int reg_num, int val)
594 {
595 	struct atl1c_adapter *adapter = netdev_priv(netdev);
596 
597 	atl1c_write_phy_reg(&adapter->hw, reg_num, val);
598 }
599 
600 static int atl1c_mii_ioctl(struct net_device *netdev,
601 			   struct ifreq *ifr, int cmd)
602 {
603 	struct atl1c_adapter *adapter = netdev_priv(netdev);
604 	struct pci_dev *pdev = adapter->pdev;
605 	struct mii_ioctl_data *data = if_mii(ifr);
606 	unsigned long flags;
607 	int retval = 0;
608 
609 	if (!netif_running(netdev))
610 		return -EINVAL;
611 
612 	spin_lock_irqsave(&adapter->mdio_lock, flags);
613 	switch (cmd) {
614 	case SIOCGMIIPHY:
615 		data->phy_id = 0;
616 		break;
617 
618 	case SIOCGMIIREG:
619 		if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
620 				    &data->val_out)) {
621 			retval = -EIO;
622 			goto out;
623 		}
624 		break;
625 
626 	case SIOCSMIIREG:
627 		if (data->reg_num & ~(0x1F)) {
628 			retval = -EFAULT;
629 			goto out;
630 		}
631 
632 		dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
633 				data->reg_num, data->val_in);
634 		if (atl1c_write_phy_reg(&adapter->hw,
635 				     data->reg_num, data->val_in)) {
636 			retval = -EIO;
637 			goto out;
638 		}
639 		break;
640 
641 	default:
642 		retval = -EOPNOTSUPP;
643 		break;
644 	}
645 out:
646 	spin_unlock_irqrestore(&adapter->mdio_lock, flags);
647 	return retval;
648 }
649 
650 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
651 {
652 	switch (cmd) {
653 	case SIOCGMIIPHY:
654 	case SIOCGMIIREG:
655 	case SIOCSMIIREG:
656 		return atl1c_mii_ioctl(netdev, ifr, cmd);
657 	default:
658 		return -EOPNOTSUPP;
659 	}
660 }
661 
662 /**
663  * atl1c_alloc_queues - Allocate memory for all rings
664  * @adapter: board private structure to initialize
665  *
666  */
667 static int atl1c_alloc_queues(struct atl1c_adapter *adapter)
668 {
669 	return 0;
670 }
671 
672 static enum atl1c_nic_type atl1c_get_mac_type(struct pci_dev *pdev,
673 					      u8 __iomem *hw_addr)
674 {
675 	switch (pdev->device) {
676 	case PCI_DEVICE_ID_ATTANSIC_L2C:
677 		return athr_l2c;
678 	case PCI_DEVICE_ID_ATTANSIC_L1C:
679 		return athr_l1c;
680 	case PCI_DEVICE_ID_ATHEROS_L2C_B:
681 		return athr_l2c_b;
682 	case PCI_DEVICE_ID_ATHEROS_L2C_B2:
683 		return athr_l2c_b2;
684 	case PCI_DEVICE_ID_ATHEROS_L1D:
685 		return athr_l1d;
686 	case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
687 		if (readl(hw_addr + REG_MT_MAGIC) == MT_MAGIC)
688 			return athr_mt;
689 		return athr_l1d_2;
690 	default:
691 		return athr_l1c;
692 	}
693 }
694 
695 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
696 {
697 	u32 link_ctrl_data;
698 
699 	AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
700 
701 	hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE  |
702 			 ATL1C_TXQ_MODE_ENHANCE;
703 	hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
704 			  ATL1C_ASPM_L1_SUPPORT;
705 	hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
706 
707 	if (hw->nic_type == athr_l1c ||
708 	    hw->nic_type == athr_l1d ||
709 	    hw->nic_type == athr_l1d_2)
710 		hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
711 	return 0;
712 }
713 
714 struct atl1c_platform_patch {
715 	u16 pci_did;
716 	u8  pci_revid;
717 	u16 subsystem_vid;
718 	u16 subsystem_did;
719 	u32 patch_flag;
720 #define ATL1C_LINK_PATCH	0x1
721 };
722 static const struct atl1c_platform_patch plats[] = {
723 {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
724 {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
725 {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
726 {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
727 {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
728 {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
729 {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
730 {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
731 {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
732 {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
733 {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
734 {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
735 {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
736 {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
737 {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
738 {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
739 {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
740 {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
741 {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
742 {0},
743 };
744 
745 static void atl1c_patch_assign(struct atl1c_hw *hw)
746 {
747 	struct pci_dev	*pdev = hw->adapter->pdev;
748 	u32 misc_ctrl;
749 	int i = 0;
750 
751 	hw->msi_lnkpatch = false;
752 
753 	while (plats[i].pci_did != 0) {
754 		if (plats[i].pci_did == hw->device_id &&
755 		    plats[i].pci_revid == hw->revision_id &&
756 		    plats[i].subsystem_vid == hw->subsystem_vendor_id &&
757 		    plats[i].subsystem_did == hw->subsystem_id) {
758 			if (plats[i].patch_flag & ATL1C_LINK_PATCH)
759 				hw->msi_lnkpatch = true;
760 		}
761 		i++;
762 	}
763 
764 	if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
765 	    hw->revision_id == L2CB_V21) {
766 		/* config access mode */
767 		pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
768 				       REG_PCIE_DEV_MISC_CTRL);
769 		pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
770 		misc_ctrl &= ~0x100;
771 		pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
772 				       REG_PCIE_DEV_MISC_CTRL);
773 		pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
774 	}
775 }
776 /**
777  * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
778  * @adapter: board private structure to initialize
779  *
780  * atl1c_sw_init initializes the Adapter private data structure.
781  * Fields are initialized based on PCI device information and
782  * OS network device settings (MTU size).
783  */
784 static int atl1c_sw_init(struct atl1c_adapter *adapter)
785 {
786 	struct atl1c_hw *hw   = &adapter->hw;
787 	struct pci_dev	*pdev = adapter->pdev;
788 	u32 revision;
789 	int i;
790 
791 	adapter->wol = 0;
792 	device_set_wakeup_enable(&pdev->dev, false);
793 	adapter->link_speed = SPEED_0;
794 	adapter->link_duplex = FULL_DUPLEX;
795 	adapter->tpd_ring[0].count = 1024;
796 	adapter->rfd_ring[0].count = 512;
797 
798 	hw->vendor_id = pdev->vendor;
799 	hw->device_id = pdev->device;
800 	hw->subsystem_vendor_id = pdev->subsystem_vendor;
801 	hw->subsystem_id = pdev->subsystem_device;
802 	pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
803 	hw->revision_id = revision & 0xFF;
804 	/* before link up, we assume hibernate is true */
805 	hw->hibernate = true;
806 	hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
807 	if (atl1c_setup_mac_funcs(hw) != 0) {
808 		dev_err(&pdev->dev, "set mac function pointers failed\n");
809 		return -1;
810 	}
811 	atl1c_patch_assign(hw);
812 
813 	hw->intr_mask = IMR_NORMAL_MASK;
814 	for (i = 0; i < adapter->tx_queue_count; ++i)
815 		hw->intr_mask |= atl1c_qregs[i].tx_isr;
816 	for (i = 0; i < adapter->rx_queue_count; ++i)
817 		hw->intr_mask |= atl1c_qregs[i].rx_isr;
818 	hw->phy_configured = false;
819 	hw->preamble_len = 7;
820 	hw->max_frame_size = adapter->netdev->mtu;
821 	hw->autoneg_advertised = ADVERTISED_Autoneg;
822 	hw->indirect_tab = 0xE4E4E4E4;
823 	hw->base_cpu = 0;
824 
825 	hw->ict = 50000;		/* 100ms */
826 	hw->smb_timer = 200000;	  	/* 400ms */
827 	hw->rx_imt = 200;
828 	hw->tx_imt = 1000;
829 
830 	hw->tpd_burst = 5;
831 	hw->rfd_burst = 8;
832 	hw->dma_order = atl1c_dma_ord_out;
833 	hw->dmar_block = atl1c_dma_req_1024;
834 
835 	if (atl1c_alloc_queues(adapter)) {
836 		dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
837 		return -ENOMEM;
838 	}
839 	/* TODO */
840 	atl1c_set_rxbufsize(adapter, adapter->netdev);
841 	atomic_set(&adapter->irq_sem, 1);
842 	spin_lock_init(&adapter->mdio_lock);
843 	spin_lock_init(&adapter->hw.intr_mask_lock);
844 	set_bit(__AT_DOWN, &adapter->flags);
845 
846 	return 0;
847 }
848 
849 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
850 				struct atl1c_buffer *buffer_info)
851 {
852 	u16 pci_driection;
853 	if (buffer_info->flags & ATL1C_BUFFER_FREE)
854 		return;
855 	if (buffer_info->dma) {
856 		if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
857 			pci_driection = DMA_FROM_DEVICE;
858 		else
859 			pci_driection = DMA_TO_DEVICE;
860 
861 		if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
862 			dma_unmap_single(&pdev->dev, buffer_info->dma,
863 					 buffer_info->length, pci_driection);
864 		else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
865 			dma_unmap_page(&pdev->dev, buffer_info->dma,
866 				       buffer_info->length, pci_driection);
867 	}
868 	if (buffer_info->skb)
869 		dev_consume_skb_any(buffer_info->skb);
870 	buffer_info->dma = 0;
871 	buffer_info->skb = NULL;
872 	ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
873 }
874 /**
875  * atl1c_clean_tx_ring - Free Tx-skb
876  * @adapter: board private structure
877  * @queue: idx of transmit queue
878  */
879 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
880 				u32 queue)
881 {
882 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
883 	struct atl1c_buffer *buffer_info;
884 	struct pci_dev *pdev = adapter->pdev;
885 	u16 index, ring_count;
886 
887 	ring_count = tpd_ring->count;
888 	for (index = 0; index < ring_count; index++) {
889 		buffer_info = &tpd_ring->buffer_info[index];
890 		atl1c_clean_buffer(pdev, buffer_info);
891 	}
892 
893 	netdev_tx_reset_queue(netdev_get_tx_queue(adapter->netdev, queue));
894 
895 	/* Zero out Tx-buffers */
896 	memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
897 		ring_count);
898 	atomic_set(&tpd_ring->next_to_clean, 0);
899 	tpd_ring->next_to_use = 0;
900 }
901 
902 /**
903  * atl1c_clean_rx_ring - Free rx-reservation skbs
904  * @adapter: board private structure
905  * @queue: idx of transmit queue
906  */
907 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter, u32 queue)
908 {
909 	struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue];
910 	struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue];
911 	struct atl1c_buffer *buffer_info;
912 	struct pci_dev *pdev = adapter->pdev;
913 	int j;
914 
915 	for (j = 0; j < rfd_ring->count; j++) {
916 		buffer_info = &rfd_ring->buffer_info[j];
917 		atl1c_clean_buffer(pdev, buffer_info);
918 	}
919 	/* zero out the descriptor ring */
920 	memset(rfd_ring->desc, 0, rfd_ring->size);
921 	rfd_ring->next_to_clean = 0;
922 	rfd_ring->next_to_use = 0;
923 	rrd_ring->next_to_use = 0;
924 	rrd_ring->next_to_clean = 0;
925 }
926 
927 /*
928  * Read / Write Ptr Initialize:
929  */
930 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
931 {
932 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
933 	struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
934 	struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
935 	struct atl1c_buffer *buffer_info;
936 	int i, j;
937 
938 	for (i = 0; i < adapter->tx_queue_count; i++) {
939 		tpd_ring[i].next_to_use = 0;
940 		atomic_set(&tpd_ring[i].next_to_clean, 0);
941 		buffer_info = tpd_ring[i].buffer_info;
942 		for (j = 0; j < tpd_ring->count; j++)
943 			ATL1C_SET_BUFFER_STATE(&buffer_info[i],
944 					       ATL1C_BUFFER_FREE);
945 	}
946 	for (i = 0; i < adapter->rx_queue_count; i++) {
947 		rfd_ring[i].next_to_use = 0;
948 		rfd_ring[i].next_to_clean = 0;
949 		rrd_ring[i].next_to_use = 0;
950 		rrd_ring[i].next_to_clean = 0;
951 		for (j = 0; j < rfd_ring[i].count; j++) {
952 			buffer_info = &rfd_ring[i].buffer_info[j];
953 			ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
954 		}
955 	}
956 }
957 
958 /**
959  * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
960  * @adapter: board private structure
961  *
962  * Free all transmit software resources
963  */
964 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
965 {
966 	struct pci_dev *pdev = adapter->pdev;
967 	int i;
968 
969 	dma_free_coherent(&pdev->dev, adapter->ring_header.size,
970 			  adapter->ring_header.desc, adapter->ring_header.dma);
971 	adapter->ring_header.desc = NULL;
972 
973 	/* Note: just free tdp_ring.buffer_info,
974 	 * it contain rfd_ring.buffer_info, do not double free
975 	 */
976 	if (adapter->tpd_ring[0].buffer_info) {
977 		kfree(adapter->tpd_ring[0].buffer_info);
978 		adapter->tpd_ring[0].buffer_info = NULL;
979 	}
980 	for (i = 0; i < adapter->rx_queue_count; ++i) {
981 		if (adapter->rrd_ring[i].rx_page) {
982 			put_page(adapter->rrd_ring[i].rx_page);
983 			adapter->rrd_ring[i].rx_page = NULL;
984 		}
985 	}
986 }
987 
988 /**
989  * atl1c_setup_ring_resources - allocate Tx / RX descriptor resources
990  * @adapter: board private structure
991  *
992  * Return 0 on success, negative on failure
993  */
994 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
995 {
996 	struct pci_dev *pdev = adapter->pdev;
997 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
998 	struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
999 	struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
1000 	struct atl1c_ring_header *ring_header = &adapter->ring_header;
1001 	int tqc = adapter->tx_queue_count;
1002 	int rqc = adapter->rx_queue_count;
1003 	int size;
1004 	int i;
1005 	int count = 0;
1006 	u32 offset = 0;
1007 
1008 	/* Even though only one tpd queue is actually used, the "high"
1009 	 * priority tpd queue also gets initialized
1010 	 */
1011 	if (tqc == 1)
1012 		tqc = 2;
1013 
1014 	for (i = 1; i < tqc; i++)
1015 		tpd_ring[i].count = tpd_ring[0].count;
1016 
1017 	size = sizeof(struct atl1c_buffer) * (tpd_ring->count * tqc +
1018 					      rfd_ring->count * rqc);
1019 	tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1020 	if (unlikely(!tpd_ring->buffer_info))
1021 		goto err_nomem;
1022 
1023 	for (i = 0; i < tqc; i++) {
1024 		tpd_ring[i].adapter = adapter;
1025 		tpd_ring[i].num = i;
1026 		tpd_ring[i].buffer_info = (tpd_ring->buffer_info + count);
1027 		count += tpd_ring[i].count;
1028 	}
1029 
1030 	for (i = 0; i < rqc; i++) {
1031 		rrd_ring[i].adapter = adapter;
1032 		rrd_ring[i].num = i;
1033 		rrd_ring[i].count = rfd_ring[0].count;
1034 		rfd_ring[i].count = rfd_ring[0].count;
1035 		rfd_ring[i].buffer_info = (tpd_ring->buffer_info + count);
1036 		count += rfd_ring->count;
1037 	}
1038 
1039 	/*
1040 	 * real ring DMA buffer
1041 	 * each ring/block may need up to 8 bytes for alignment, hence the
1042 	 * additional bytes tacked onto the end.
1043 	 */
1044 	ring_header->size =
1045 		sizeof(struct atl1c_tpd_desc) * tpd_ring->count * tqc +
1046 		sizeof(struct atl1c_rx_free_desc) * rfd_ring->count * rqc +
1047 		sizeof(struct atl1c_recv_ret_status) * rfd_ring->count * rqc +
1048 		8 * 4;
1049 
1050 	ring_header->desc = dma_alloc_coherent(&pdev->dev, ring_header->size,
1051 					       &ring_header->dma, GFP_KERNEL);
1052 	if (unlikely(!ring_header->desc)) {
1053 		dev_err(&pdev->dev, "could not get memory for DMA buffer\n");
1054 		goto err_nomem;
1055 	}
1056 	/* init TPD ring */
1057 
1058 	tpd_ring[0].dma = roundup(ring_header->dma, 8);
1059 	offset = tpd_ring[0].dma - ring_header->dma;
1060 	for (i = 0; i < tqc; i++) {
1061 		tpd_ring[i].dma = ring_header->dma + offset;
1062 		tpd_ring[i].desc = (u8 *)ring_header->desc + offset;
1063 		tpd_ring[i].size =
1064 			sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1065 		offset += roundup(tpd_ring[i].size, 8);
1066 	}
1067 	for (i = 0; i < rqc; i++) {
1068 		/* init RFD ring */
1069 		rfd_ring[i].dma = ring_header->dma + offset;
1070 		rfd_ring[i].desc = (u8 *)ring_header->desc + offset;
1071 		rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
1072 			rfd_ring[i].count;
1073 		offset += roundup(rfd_ring[i].size, 8);
1074 
1075 		/* init RRD ring */
1076 		rrd_ring[i].dma = ring_header->dma + offset;
1077 		rrd_ring[i].desc = (u8 *)ring_header->desc + offset;
1078 		rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
1079 			rrd_ring[i].count;
1080 		offset += roundup(rrd_ring[i].size, 8);
1081 	}
1082 
1083 	return 0;
1084 
1085 err_nomem:
1086 	kfree(tpd_ring->buffer_info);
1087 	return -ENOMEM;
1088 }
1089 
1090 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1091 {
1092 	struct atl1c_hw *hw = &adapter->hw;
1093 	struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
1094 	struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
1095 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1096 	int i;
1097 	int tx_queue_count = adapter->tx_queue_count;
1098 
1099 	if (tx_queue_count == 1)
1100 		tx_queue_count = 2;
1101 
1102 	/* TPD */
1103 	AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1104 		     (u32)((tpd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
1105 	/* just enable normal priority TX queue */
1106 	for (i = 0; i < tx_queue_count; i++) {
1107 		AT_WRITE_REG(hw, atl1c_qregs[i].tpd_addr_lo,
1108 			     (u32)(tpd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1109 	}
1110 	AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1111 			(u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1112 
1113 
1114 	/* RFD */
1115 	AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1116 		     (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1117 	for (i = 0; i < adapter->rx_queue_count; i++) {
1118 		AT_WRITE_REG(hw, atl1c_qregs[i].rfd_addr_lo,
1119 			     (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1120 	}
1121 
1122 	AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1123 			rfd_ring->count & RFD_RING_SIZE_MASK);
1124 	AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1125 			adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1126 
1127 	/* RRD */
1128 	for (i = 0; i < adapter->rx_queue_count; i++) {
1129 		AT_WRITE_REG(hw, atl1c_qregs[i].rrd_addr_lo,
1130 			     (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1131 	}
1132 	AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1133 			(rrd_ring->count & RRD_RING_SIZE_MASK));
1134 
1135 	if (hw->nic_type == athr_l2c_b) {
1136 		AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1137 		AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1138 		AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1139 		AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1140 		AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1141 		AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1142 		AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0);	/* TX watermark, to enter l1 state.*/
1143 		AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0);		/* RXD threshold.*/
1144 	}
1145 	/* Load all of base address above */
1146 	AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1147 }
1148 
1149 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1150 {
1151 	struct atl1c_hw *hw = &adapter->hw;
1152 	int max_pay_load;
1153 	u16 tx_offload_thresh;
1154 	u32 txq_ctrl_data;
1155 
1156 	tx_offload_thresh = MAX_TSO_FRAME_SIZE;
1157 	AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1158 		(tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1159 	max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
1160 	hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1161 	/*
1162 	 * if BIOS had changed the dam-read-max-length to an invalid value,
1163 	 * restore it to default value
1164 	 */
1165 	if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
1166 		pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
1167 		hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
1168 	}
1169 	txq_ctrl_data =
1170 		hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
1171 		L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
1172 
1173 	AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1174 }
1175 
1176 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1177 {
1178 	struct atl1c_hw *hw = &adapter->hw;
1179 	u32 rxq_ctrl_data;
1180 
1181 	rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1182 			RXQ_RFD_BURST_NUM_SHIFT;
1183 
1184 	if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1185 		rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1186 
1187 	/* aspm for gigabit */
1188 	if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
1189 		rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
1190 			ASPM_THRUPUT_LIMIT_100M);
1191 
1192 	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1193 }
1194 
1195 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1196 {
1197 	struct atl1c_hw *hw = &adapter->hw;
1198 	u32 dma_ctrl_data;
1199 
1200 	dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1201 		DMA_CTRL_RREQ_PRI_DATA |
1202 		FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1203 		FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1204 		FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
1205 
1206 	AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1207 }
1208 
1209 /*
1210  * Stop the mac, transmit and receive units
1211  * hw - Struct containing variables accessed by shared code
1212  * return : 0  or  idle status (if error)
1213  */
1214 static int atl1c_stop_mac(struct atl1c_hw *hw)
1215 {
1216 	u32 data;
1217 
1218 	AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1219 	data &= ~RXQ_CTRL_EN;
1220 	AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1221 
1222 	AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1223 	data &= ~TXQ_CTRL_EN;
1224 	AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1225 
1226 	atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
1227 
1228 	AT_READ_REG(hw, REG_MAC_CTRL, &data);
1229 	data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1230 	AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1231 
1232 	return (int)atl1c_wait_until_idle(hw,
1233 		IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
1234 }
1235 
1236 static void atl1c_start_mac(struct atl1c_adapter *adapter)
1237 {
1238 	struct atl1c_hw *hw = &adapter->hw;
1239 	u32 mac, txq, rxq;
1240 
1241 	hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX;
1242 	hw->mac_speed = adapter->link_speed == SPEED_1000 ?
1243 		atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
1244 
1245 	AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
1246 	AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
1247 	AT_READ_REG(hw, REG_MAC_CTRL, &mac);
1248 
1249 	txq |= TXQ_CTRL_EN;
1250 	rxq |= RXQ_CTRL_EN;
1251 	mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
1252 	       MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
1253 	       MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
1254 	       MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
1255 	       MAC_CTRL_HASH_ALG_CRC32;
1256 	if (hw->mac_duplex)
1257 		mac |= MAC_CTRL_DUPLX;
1258 	else
1259 		mac &= ~MAC_CTRL_DUPLX;
1260 	mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
1261 	mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
1262 
1263 	AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
1264 	AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
1265 	AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
1266 }
1267 
1268 /*
1269  * Reset the transmit and receive units; mask and clear all interrupts.
1270  * hw - Struct containing variables accessed by shared code
1271  * return : 0  or  idle status (if error)
1272  */
1273 static int atl1c_reset_mac(struct atl1c_hw *hw)
1274 {
1275 	struct atl1c_adapter *adapter = hw->adapter;
1276 	struct pci_dev *pdev = adapter->pdev;
1277 	u32 ctrl_data = 0;
1278 
1279 	atl1c_stop_mac(hw);
1280 	/*
1281 	 * Issue Soft Reset to the MAC.  This will reset the chip's
1282 	 * transmit, receive, DMA.  It will not effect
1283 	 * the current PCI configuration.  The global reset bit is self-
1284 	 * clearing, and should clear within a microsecond.
1285 	 */
1286 	AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
1287 	ctrl_data |= MASTER_CTRL_OOB_DIS;
1288 	AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
1289 
1290 	AT_WRITE_FLUSH(hw);
1291 	msleep(10);
1292 	/* Wait at least 10ms for All module to be Idle */
1293 
1294 	if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
1295 		dev_err(&pdev->dev,
1296 			"MAC state machine can't be idle since"
1297 			" disabled for 10ms second\n");
1298 		return -1;
1299 	}
1300 	AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
1301 
1302 	/* driver control speed/duplex */
1303 	AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
1304 	AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
1305 
1306 	/* clk switch setting */
1307 	AT_READ_REG(hw, REG_SERDES, &ctrl_data);
1308 	switch (hw->nic_type) {
1309 	case athr_l2c_b:
1310 		ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
1311 				SERDES_MAC_CLK_SLOWDOWN);
1312 		AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1313 		break;
1314 	case athr_l2c_b2:
1315 	case athr_l1d_2:
1316 		ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
1317 		AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1318 		break;
1319 	default:
1320 		break;
1321 	}
1322 
1323 	return 0;
1324 }
1325 
1326 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1327 {
1328 	u16 ctrl_flags = hw->ctrl_flags;
1329 
1330 	hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
1331 	atl1c_set_aspm(hw, SPEED_0);
1332 	hw->ctrl_flags = ctrl_flags;
1333 }
1334 
1335 /*
1336  * Set ASPM state.
1337  * Enable/disable L0s/L1 depend on link state.
1338  */
1339 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
1340 {
1341 	u32 pm_ctrl_data;
1342 	u32 link_l1_timer;
1343 
1344 	AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1345 	pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
1346 			  PM_CTRL_ASPM_L0S_EN |
1347 			  PM_CTRL_MAC_ASPM_CHK);
1348 	/* L1 timer */
1349 	if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1350 		pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
1351 		link_l1_timer =
1352 			link_speed == SPEED_1000 || link_speed == SPEED_100 ?
1353 			L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
1354 		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1355 			L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
1356 	} else {
1357 		link_l1_timer = hw->nic_type == athr_l2c_b ?
1358 			L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
1359 		if (link_speed != SPEED_1000 && link_speed != SPEED_100)
1360 			link_l1_timer = 1;
1361 		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1362 			PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
1363 	}
1364 
1365 	/* L0S/L1 enable */
1366 	if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
1367 		pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
1368 	if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1369 		pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
1370 
1371 	/* l2cb & l1d & l2cb2 & l1d2 */
1372 	if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1373 	    hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1374 		pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1375 			PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
1376 		pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
1377 				PM_CTRL_SERDES_PD_EX_L1 |
1378 				PM_CTRL_CLK_SWH_L1;
1379 		pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1380 				  PM_CTRL_SERDES_PLL_L1_EN |
1381 				  PM_CTRL_SERDES_BUFS_RX_L1_EN |
1382 				  PM_CTRL_SA_DLY_EN |
1383 				  PM_CTRL_HOTRST);
1384 		/* disable l0s if link down or l2cb */
1385 		if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
1386 			pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1387 	} else { /* l1c */
1388 		pm_ctrl_data =
1389 			FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
1390 		if (link_speed != SPEED_0) {
1391 			pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
1392 					PM_CTRL_SERDES_PLL_L1_EN |
1393 					PM_CTRL_SERDES_BUFS_RX_L1_EN;
1394 			pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
1395 					  PM_CTRL_CLK_SWH_L1 |
1396 					  PM_CTRL_ASPM_L0S_EN |
1397 					  PM_CTRL_ASPM_L1_EN);
1398 		} else { /* link down */
1399 			pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1400 			pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1401 					  PM_CTRL_SERDES_PLL_L1_EN |
1402 					  PM_CTRL_SERDES_BUFS_RX_L1_EN |
1403 					  PM_CTRL_ASPM_L0S_EN);
1404 		}
1405 	}
1406 	AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1407 
1408 	return;
1409 }
1410 
1411 /**
1412  * atl1c_configure_mac - Configure Transmit&Receive Unit after Reset
1413  * @adapter: board private structure
1414  *
1415  * Configure the Tx /Rx unit of the MAC after a reset.
1416  */
1417 static int atl1c_configure_mac(struct atl1c_adapter *adapter)
1418 {
1419 	struct atl1c_hw *hw = &adapter->hw;
1420 	u32 master_ctrl_data = 0;
1421 	u32 intr_modrt_data;
1422 	u32 data;
1423 
1424 	AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1425 	master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
1426 			      MASTER_CTRL_RX_ITIMER_EN |
1427 			      MASTER_CTRL_INT_RDCLR);
1428 	/* clear interrupt status */
1429 	AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1430 	/*  Clear any WOL status */
1431 	AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1432 	/* set Interrupt Clear Timer
1433 	 * HW will enable self to assert interrupt event to system after
1434 	 * waiting x-time for software to notify it accept interrupt.
1435 	 */
1436 
1437 	data = CLK_GATING_EN_ALL;
1438 	if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1439 		if (hw->nic_type == athr_l2c_b)
1440 			data &= ~CLK_GATING_RXMAC_EN;
1441 	} else
1442 		data = 0;
1443 	AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1444 
1445 	AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1446 		hw->ict & INT_RETRIG_TIMER_MASK);
1447 
1448 	atl1c_configure_des_ring(adapter);
1449 
1450 	if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1451 		intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1452 					IRQ_MODRT_TX_TIMER_SHIFT;
1453 		intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1454 					IRQ_MODRT_RX_TIMER_SHIFT;
1455 		AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1456 		master_ctrl_data |=
1457 			MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1458 	}
1459 
1460 	if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1461 		master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1462 
1463 	master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1464 	AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1465 
1466 	AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1467 		hw->smb_timer & SMB_STAT_TIMER_MASK);
1468 
1469 	/* set MTU */
1470 	AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1471 			VLAN_HLEN + ETH_FCS_LEN);
1472 
1473 	atl1c_configure_tx(adapter);
1474 	atl1c_configure_rx(adapter);
1475 	atl1c_configure_dma(adapter);
1476 
1477 	return 0;
1478 }
1479 
1480 static int atl1c_configure(struct atl1c_adapter *adapter)
1481 {
1482 	struct net_device *netdev = adapter->netdev;
1483 	int num;
1484 	int i;
1485 
1486 	if (adapter->hw.nic_type == athr_mt) {
1487 		u32 mode;
1488 
1489 		AT_READ_REG(&adapter->hw, REG_MT_MODE, &mode);
1490 		if (adapter->rx_queue_count == 4)
1491 			mode |= MT_MODE_4Q;
1492 		else
1493 			mode &= ~MT_MODE_4Q;
1494 		AT_WRITE_REG(&adapter->hw, REG_MT_MODE, mode);
1495 	}
1496 
1497 	atl1c_init_ring_ptrs(adapter);
1498 	atl1c_set_multi(netdev);
1499 	atl1c_restore_vlan(adapter);
1500 
1501 	for (i = 0; i < adapter->rx_queue_count; ++i) {
1502 		num = atl1c_alloc_rx_buffer(adapter, i, false);
1503 		if (unlikely(num == 0))
1504 			return -ENOMEM;
1505 	}
1506 
1507 	if (atl1c_configure_mac(adapter))
1508 		return -EIO;
1509 
1510 	return 0;
1511 }
1512 
1513 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1514 {
1515 	u16 hw_reg_addr = 0;
1516 	unsigned long *stats_item = NULL;
1517 	u32 data;
1518 
1519 	/* update rx status */
1520 	hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1521 	stats_item  = &adapter->hw_stats.rx_ok;
1522 	while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1523 		AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1524 		*stats_item += data;
1525 		stats_item++;
1526 		hw_reg_addr += 4;
1527 	}
1528 /* update tx status */
1529 	hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1530 	stats_item  = &adapter->hw_stats.tx_ok;
1531 	while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1532 		AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1533 		*stats_item += data;
1534 		stats_item++;
1535 		hw_reg_addr += 4;
1536 	}
1537 }
1538 
1539 /**
1540  * atl1c_get_stats - Get System Network Statistics
1541  * @netdev: network interface device structure
1542  *
1543  * Returns the address of the device statistics structure.
1544  * The statistics are actually updated from the timer callback.
1545  */
1546 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1547 {
1548 	struct atl1c_adapter *adapter = netdev_priv(netdev);
1549 	struct atl1c_hw_stats  *hw_stats = &adapter->hw_stats;
1550 	struct net_device_stats *net_stats = &netdev->stats;
1551 
1552 	atl1c_update_hw_stats(adapter);
1553 	net_stats->rx_bytes   = hw_stats->rx_byte_cnt;
1554 	net_stats->tx_bytes   = hw_stats->tx_byte_cnt;
1555 	net_stats->multicast  = hw_stats->rx_mcast;
1556 	net_stats->collisions = hw_stats->tx_1_col +
1557 				hw_stats->tx_2_col +
1558 				hw_stats->tx_late_col +
1559 				hw_stats->tx_abort_col;
1560 
1561 	net_stats->rx_errors  = hw_stats->rx_frag +
1562 				hw_stats->rx_fcs_err +
1563 				hw_stats->rx_len_err +
1564 				hw_stats->rx_sz_ov +
1565 				hw_stats->rx_rrd_ov +
1566 				hw_stats->rx_align_err +
1567 				hw_stats->rx_rxf_ov;
1568 
1569 	net_stats->rx_fifo_errors   = hw_stats->rx_rxf_ov;
1570 	net_stats->rx_length_errors = hw_stats->rx_len_err;
1571 	net_stats->rx_crc_errors    = hw_stats->rx_fcs_err;
1572 	net_stats->rx_frame_errors  = hw_stats->rx_align_err;
1573 	net_stats->rx_dropped       = hw_stats->rx_rrd_ov;
1574 
1575 	net_stats->tx_errors = hw_stats->tx_late_col +
1576 			       hw_stats->tx_abort_col +
1577 			       hw_stats->tx_underrun +
1578 			       hw_stats->tx_trunc;
1579 
1580 	net_stats->tx_fifo_errors    = hw_stats->tx_underrun;
1581 	net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1582 	net_stats->tx_window_errors  = hw_stats->tx_late_col;
1583 
1584 	net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1585 	net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1586 
1587 	return net_stats;
1588 }
1589 
1590 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1591 {
1592 	u16 phy_data;
1593 
1594 	spin_lock(&adapter->mdio_lock);
1595 	atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1596 	spin_unlock(&adapter->mdio_lock);
1597 }
1598 
1599 static int atl1c_clean_tx(struct napi_struct *napi, int budget)
1600 {
1601 	struct atl1c_tpd_ring *tpd_ring =
1602 		container_of(napi, struct atl1c_tpd_ring, napi);
1603 	struct atl1c_adapter *adapter = tpd_ring->adapter;
1604 	struct netdev_queue *txq =
1605 		netdev_get_tx_queue(napi->dev, tpd_ring->num);
1606 	struct atl1c_buffer *buffer_info;
1607 	struct pci_dev *pdev = adapter->pdev;
1608 	u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1609 	u16 hw_next_to_clean;
1610 	unsigned int total_bytes = 0, total_packets = 0;
1611 	unsigned long flags;
1612 
1613 	AT_READ_REGW(&adapter->hw, atl1c_qregs[tpd_ring->num].tpd_cons,
1614 		     &hw_next_to_clean);
1615 
1616 	while (next_to_clean != hw_next_to_clean) {
1617 		buffer_info = &tpd_ring->buffer_info[next_to_clean];
1618 		if (buffer_info->skb) {
1619 			total_bytes += buffer_info->skb->len;
1620 			total_packets++;
1621 		}
1622 		atl1c_clean_buffer(pdev, buffer_info);
1623 		if (++next_to_clean == tpd_ring->count)
1624 			next_to_clean = 0;
1625 		atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1626 	}
1627 
1628 	netdev_tx_completed_queue(txq, total_packets, total_bytes);
1629 
1630 	if (netif_tx_queue_stopped(txq) && netif_carrier_ok(adapter->netdev))
1631 		netif_tx_wake_queue(txq);
1632 
1633 	if (total_packets < budget) {
1634 		napi_complete_done(napi, total_packets);
1635 		spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
1636 		adapter->hw.intr_mask |= atl1c_qregs[tpd_ring->num].tx_isr;
1637 		AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1638 		spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
1639 		return total_packets;
1640 	}
1641 	return budget;
1642 }
1643 
1644 static void atl1c_intr_rx_tx(struct atl1c_adapter *adapter, u32 status)
1645 {
1646 	struct atl1c_hw *hw = &adapter->hw;
1647 	u32 intr_mask;
1648 	int i;
1649 
1650 	spin_lock(&hw->intr_mask_lock);
1651 	intr_mask = hw->intr_mask;
1652 	for (i = 0; i < adapter->rx_queue_count; ++i) {
1653 		if (!(status & atl1c_qregs[i].rx_isr))
1654 			continue;
1655 		if (napi_schedule_prep(&adapter->rrd_ring[i].napi)) {
1656 			intr_mask &= ~atl1c_qregs[i].rx_isr;
1657 			__napi_schedule(&adapter->rrd_ring[i].napi);
1658 		}
1659 	}
1660 	for (i = 0; i < adapter->tx_queue_count; ++i) {
1661 		if (!(status & atl1c_qregs[i].tx_isr))
1662 			continue;
1663 		if (napi_schedule_prep(&adapter->tpd_ring[i].napi)) {
1664 			intr_mask &= ~atl1c_qregs[i].tx_isr;
1665 			__napi_schedule(&adapter->tpd_ring[i].napi);
1666 		}
1667 	}
1668 
1669 	if (hw->intr_mask != intr_mask) {
1670 		hw->intr_mask = intr_mask;
1671 		AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1672 	}
1673 	spin_unlock(&hw->intr_mask_lock);
1674 }
1675 
1676 /**
1677  * atl1c_intr - Interrupt Handler
1678  * @irq: interrupt number
1679  * @data: pointer to a network interface device structure
1680  */
1681 static irqreturn_t atl1c_intr(int irq, void *data)
1682 {
1683 	struct net_device *netdev  = data;
1684 	struct atl1c_adapter *adapter = netdev_priv(netdev);
1685 	struct pci_dev *pdev = adapter->pdev;
1686 	struct atl1c_hw *hw = &adapter->hw;
1687 	int max_ints = AT_MAX_INT_WORK;
1688 	int handled = IRQ_NONE;
1689 	u32 status;
1690 	u32 reg_data;
1691 
1692 	do {
1693 		AT_READ_REG(hw, REG_ISR, &reg_data);
1694 		status = reg_data & hw->intr_mask;
1695 
1696 		if (status == 0 || (status & ISR_DIS_INT) != 0) {
1697 			if (max_ints != AT_MAX_INT_WORK)
1698 				handled = IRQ_HANDLED;
1699 			break;
1700 		}
1701 		/* link event */
1702 		if (status & ISR_GPHY)
1703 			atl1c_clear_phy_int(adapter);
1704 		/* Ack ISR */
1705 		AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1706 		if (status & (ISR_RX_PKT | ISR_TX_PKT))
1707 			atl1c_intr_rx_tx(adapter, status);
1708 
1709 		handled = IRQ_HANDLED;
1710 		/* check if PCIE PHY Link down */
1711 		if (status & ISR_ERROR) {
1712 			if (netif_msg_hw(adapter))
1713 				dev_err(&pdev->dev,
1714 					"atl1c hardware error (status = 0x%x)\n",
1715 					status & ISR_ERROR);
1716 			/* reset MAC */
1717 			set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
1718 			schedule_work(&adapter->common_task);
1719 			return IRQ_HANDLED;
1720 		}
1721 
1722 		if (status & ISR_OVER)
1723 			if (netif_msg_intr(adapter))
1724 				dev_warn(&pdev->dev,
1725 					"TX/RX overflow (status = 0x%x)\n",
1726 					status & ISR_OVER);
1727 
1728 		/* link event */
1729 		if (status & (ISR_GPHY | ISR_MANUAL)) {
1730 			netdev->stats.tx_carrier_errors++;
1731 			atl1c_link_chg_event(adapter);
1732 			break;
1733 		}
1734 
1735 	} while (--max_ints > 0);
1736 	/* re-enable Interrupt*/
1737 	AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1738 	return handled;
1739 }
1740 
1741 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1742 		  struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1743 {
1744 	if (adapter->hw.nic_type == athr_mt) {
1745 		if (prrs->word3 & RRS_MT_PROT_ID_TCPUDP)
1746 			skb->ip_summed = CHECKSUM_UNNECESSARY;
1747 		return;
1748 	}
1749 	/*
1750 	 * The pid field in RRS in not correct sometimes, so we
1751 	 * cannot figure out if the packet is fragmented or not,
1752 	 * so we tell the KERNEL CHECKSUM_NONE
1753 	 */
1754 	skb_checksum_none_assert(skb);
1755 }
1756 
1757 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter,
1758 				       u32 queue, bool napi_mode)
1759 {
1760 	struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[queue];
1761 	struct sk_buff *skb;
1762 	struct page *page;
1763 
1764 	if (adapter->rx_frag_size > PAGE_SIZE) {
1765 		if (likely(napi_mode))
1766 			return napi_alloc_skb(&rrd_ring->napi,
1767 					      adapter->rx_buffer_len);
1768 		else
1769 			return netdev_alloc_skb_ip_align(adapter->netdev,
1770 							 adapter->rx_buffer_len);
1771 	}
1772 
1773 	page = rrd_ring->rx_page;
1774 	if (!page) {
1775 		page = alloc_page(GFP_ATOMIC);
1776 		if (unlikely(!page))
1777 			return NULL;
1778 		rrd_ring->rx_page = page;
1779 		rrd_ring->rx_page_offset = 0;
1780 	}
1781 
1782 	skb = build_skb(page_address(page) + rrd_ring->rx_page_offset,
1783 			adapter->rx_frag_size);
1784 	if (likely(skb)) {
1785 		skb_reserve(skb, NET_SKB_PAD + NET_IP_ALIGN);
1786 		rrd_ring->rx_page_offset += adapter->rx_frag_size;
1787 		if (rrd_ring->rx_page_offset >= PAGE_SIZE)
1788 			rrd_ring->rx_page = NULL;
1789 		else
1790 			get_page(page);
1791 	}
1792 	return skb;
1793 }
1794 
1795 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, u32 queue,
1796 				 bool napi_mode)
1797 {
1798 	struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[queue];
1799 	struct pci_dev *pdev = adapter->pdev;
1800 	struct atl1c_buffer *buffer_info, *next_info;
1801 	struct sk_buff *skb;
1802 	void *vir_addr = NULL;
1803 	u16 num_alloc = 0;
1804 	u16 rfd_next_to_use, next_next;
1805 	struct atl1c_rx_free_desc *rfd_desc;
1806 	dma_addr_t mapping;
1807 
1808 	next_next = rfd_next_to_use = rfd_ring->next_to_use;
1809 	if (++next_next == rfd_ring->count)
1810 		next_next = 0;
1811 	buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1812 	next_info = &rfd_ring->buffer_info[next_next];
1813 
1814 	while (next_info->flags & ATL1C_BUFFER_FREE) {
1815 		rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1816 
1817 		skb = atl1c_alloc_skb(adapter, queue, napi_mode);
1818 		if (unlikely(!skb)) {
1819 			if (netif_msg_rx_err(adapter))
1820 				dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1821 			break;
1822 		}
1823 
1824 		/*
1825 		 * Make buffer alignment 2 beyond a 16 byte boundary
1826 		 * this will result in a 16 byte aligned IP header after
1827 		 * the 14 byte MAC header is removed
1828 		 */
1829 		vir_addr = skb->data;
1830 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1831 		buffer_info->skb = skb;
1832 		buffer_info->length = adapter->rx_buffer_len;
1833 		mapping = dma_map_single(&pdev->dev, vir_addr,
1834 					 buffer_info->length, DMA_FROM_DEVICE);
1835 		if (unlikely(dma_mapping_error(&pdev->dev, mapping))) {
1836 			dev_kfree_skb(skb);
1837 			buffer_info->skb = NULL;
1838 			buffer_info->length = 0;
1839 			ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
1840 			netif_warn(adapter, rx_err, adapter->netdev, "RX dma_map_single failed");
1841 			break;
1842 		}
1843 		buffer_info->dma = mapping;
1844 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1845 			ATL1C_PCIMAP_FROMDEVICE);
1846 		rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1847 		rfd_next_to_use = next_next;
1848 		if (++next_next == rfd_ring->count)
1849 			next_next = 0;
1850 		buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1851 		next_info = &rfd_ring->buffer_info[next_next];
1852 		num_alloc++;
1853 	}
1854 
1855 	if (num_alloc) {
1856 		/* TODO: update mailbox here */
1857 		wmb();
1858 		rfd_ring->next_to_use = rfd_next_to_use;
1859 		AT_WRITE_REG(&adapter->hw, atl1c_qregs[queue].rfd_prod,
1860 			     rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1861 	}
1862 
1863 	return num_alloc;
1864 }
1865 
1866 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1867 			struct	atl1c_recv_ret_status *rrs, u16 num)
1868 {
1869 	u16 i;
1870 	/* the relationship between rrd and rfd is one map one */
1871 	for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1872 					rrd_ring->next_to_clean)) {
1873 		rrs->word3 &= ~RRS_RXD_UPDATED;
1874 		if (++rrd_ring->next_to_clean == rrd_ring->count)
1875 			rrd_ring->next_to_clean = 0;
1876 	}
1877 }
1878 
1879 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1880 	struct atl1c_recv_ret_status *rrs, u16 num)
1881 {
1882 	u16 i;
1883 	u16 rfd_index;
1884 	struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1885 
1886 	rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1887 			RRS_RX_RFD_INDEX_MASK;
1888 	for (i = 0; i < num; i++) {
1889 		buffer_info[rfd_index].skb = NULL;
1890 		ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1891 					ATL1C_BUFFER_FREE);
1892 		if (++rfd_index == rfd_ring->count)
1893 			rfd_index = 0;
1894 	}
1895 	rfd_ring->next_to_clean = rfd_index;
1896 }
1897 
1898 /**
1899  * atl1c_clean_rx - NAPI Rx polling callback
1900  * @napi: napi info
1901  * @budget: limit of packets to clean
1902  */
1903 static int atl1c_clean_rx(struct napi_struct *napi, int budget)
1904 {
1905 	struct atl1c_rrd_ring *rrd_ring =
1906 		container_of(napi, struct atl1c_rrd_ring, napi);
1907 	struct atl1c_adapter *adapter = rrd_ring->adapter;
1908 	u16 rfd_num, rfd_index;
1909 	u16 length;
1910 	struct pci_dev *pdev = adapter->pdev;
1911 	struct net_device *netdev  = adapter->netdev;
1912 	struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[rrd_ring->num];
1913 	struct sk_buff *skb;
1914 	struct atl1c_recv_ret_status *rrs;
1915 	struct atl1c_buffer *buffer_info;
1916 	int work_done = 0;
1917 	unsigned long flags;
1918 
1919 	/* Keep link state information with original netdev */
1920 	if (!netif_carrier_ok(adapter->netdev))
1921 		goto quit_polling;
1922 
1923 	while (1) {
1924 		if (work_done >= budget)
1925 			break;
1926 		rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1927 		if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1928 			rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1929 				RRS_RX_RFD_CNT_MASK;
1930 			if (unlikely(rfd_num != 1))
1931 				/* TODO support mul rfd*/
1932 				if (netif_msg_rx_err(adapter))
1933 					dev_warn(&pdev->dev,
1934 						"Multi rfd not support yet!\n");
1935 			goto rrs_checked;
1936 		} else {
1937 			break;
1938 		}
1939 rrs_checked:
1940 		atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1941 		if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1942 			atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1943 			if (netif_msg_rx_err(adapter))
1944 				dev_warn(&pdev->dev,
1945 					 "wrong packet! rrs word3 is %x\n",
1946 					 rrs->word3);
1947 			continue;
1948 		}
1949 
1950 		length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1951 				RRS_PKT_SIZE_MASK);
1952 		/* Good Receive */
1953 		if (likely(rfd_num == 1)) {
1954 			rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1955 					RRS_RX_RFD_INDEX_MASK;
1956 			buffer_info = &rfd_ring->buffer_info[rfd_index];
1957 			dma_unmap_single(&pdev->dev, buffer_info->dma,
1958 					 buffer_info->length, DMA_FROM_DEVICE);
1959 			skb = buffer_info->skb;
1960 		} else {
1961 			/* TODO */
1962 			if (netif_msg_rx_err(adapter))
1963 				dev_warn(&pdev->dev,
1964 					"Multi rfd not support yet!\n");
1965 			break;
1966 		}
1967 		atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1968 		skb_put(skb, length - ETH_FCS_LEN);
1969 		skb->protocol = eth_type_trans(skb, netdev);
1970 		atl1c_rx_checksum(adapter, skb, rrs);
1971 		if (rrs->word3 & RRS_VLAN_INS) {
1972 			u16 vlan;
1973 
1974 			AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1975 			vlan = le16_to_cpu(vlan);
1976 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
1977 		}
1978 		napi_gro_receive(napi, skb);
1979 
1980 		work_done++;
1981 	}
1982 	if (work_done)
1983 		atl1c_alloc_rx_buffer(adapter, rrd_ring->num, true);
1984 
1985 	if (work_done < budget) {
1986 quit_polling:
1987 		napi_complete_done(napi, work_done);
1988 		spin_lock_irqsave(&adapter->hw.intr_mask_lock, flags);
1989 		adapter->hw.intr_mask |= atl1c_qregs[rrd_ring->num].rx_isr;
1990 		AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1991 		spin_unlock_irqrestore(&adapter->hw.intr_mask_lock, flags);
1992 	}
1993 	return work_done;
1994 }
1995 
1996 #ifdef CONFIG_NET_POLL_CONTROLLER
1997 
1998 /*
1999  * Polling 'interrupt' - used by things like netconsole to send skbs
2000  * without having to re-enable interrupts. It's not called while
2001  * the interrupt routine is executing.
2002  */
2003 static void atl1c_netpoll(struct net_device *netdev)
2004 {
2005 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2006 
2007 	disable_irq(adapter->pdev->irq);
2008 	atl1c_intr(adapter->pdev->irq, netdev);
2009 	enable_irq(adapter->pdev->irq);
2010 }
2011 #endif
2012 
2013 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, u32 queue)
2014 {
2015 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
2016 	u16 next_to_use = 0;
2017 	u16 next_to_clean = 0;
2018 
2019 	next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2020 	next_to_use   = tpd_ring->next_to_use;
2021 
2022 	return (u16)(next_to_clean > next_to_use) ?
2023 		(next_to_clean - next_to_use - 1) :
2024 		(tpd_ring->count + next_to_clean - next_to_use - 1);
2025 }
2026 
2027 /*
2028  * get next usable tpd
2029  * Note: should call atl1c_tdp_avail to make sure
2030  * there is enough tpd to use
2031  */
2032 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
2033 					    u32 queue)
2034 {
2035 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
2036 	struct atl1c_tpd_desc *tpd_desc;
2037 	u16 next_to_use = 0;
2038 
2039 	next_to_use = tpd_ring->next_to_use;
2040 	if (++tpd_ring->next_to_use == tpd_ring->count)
2041 		tpd_ring->next_to_use = 0;
2042 	tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
2043 	memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
2044 	return	tpd_desc;
2045 }
2046 
2047 static struct atl1c_buffer *
2048 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
2049 {
2050 	struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
2051 
2052 	return &tpd_ring->buffer_info[tpd -
2053 			(struct atl1c_tpd_desc *)tpd_ring->desc];
2054 }
2055 
2056 /* Calculate the transmit packet descript needed*/
2057 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
2058 {
2059 	u16 tpd_req;
2060 	u16 proto_hdr_len = 0;
2061 
2062 	tpd_req = skb_shinfo(skb)->nr_frags + 1;
2063 
2064 	if (skb_is_gso(skb)) {
2065 		proto_hdr_len = skb_tcp_all_headers(skb);
2066 		if (proto_hdr_len < skb_headlen(skb))
2067 			tpd_req++;
2068 		if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
2069 			tpd_req++;
2070 	}
2071 	return tpd_req;
2072 }
2073 
2074 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
2075 			  struct sk_buff *skb,
2076 			  struct atl1c_tpd_desc **tpd,
2077 			  u32 queue)
2078 {
2079 	struct pci_dev *pdev = adapter->pdev;
2080 	unsigned short offload_type;
2081 	u8 hdr_len;
2082 	u32 real_len;
2083 
2084 	if (skb_is_gso(skb)) {
2085 		int err;
2086 
2087 		err = skb_cow_head(skb, 0);
2088 		if (err < 0)
2089 			return err;
2090 
2091 		offload_type = skb_shinfo(skb)->gso_type;
2092 
2093 		if (offload_type & SKB_GSO_TCPV4) {
2094 			real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2095 					+ ntohs(ip_hdr(skb)->tot_len));
2096 
2097 			if (real_len < skb->len) {
2098 				err = pskb_trim(skb, real_len);
2099 				if (err)
2100 					return err;
2101 			}
2102 
2103 			hdr_len = skb_tcp_all_headers(skb);
2104 			if (unlikely(skb->len == hdr_len)) {
2105 				/* only xsum need */
2106 				if (netif_msg_tx_queued(adapter))
2107 					dev_warn(&pdev->dev,
2108 						"IPV4 tso with zero data??\n");
2109 				goto check_sum;
2110 			} else {
2111 				ip_hdr(skb)->check = 0;
2112 				tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2113 							ip_hdr(skb)->saddr,
2114 							ip_hdr(skb)->daddr,
2115 							0, IPPROTO_TCP, 0);
2116 				(*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2117 			}
2118 		}
2119 
2120 		if (offload_type & SKB_GSO_TCPV6) {
2121 			struct atl1c_tpd_ext_desc *etpd =
2122 				*(struct atl1c_tpd_ext_desc **)(tpd);
2123 
2124 			memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2125 			*tpd = atl1c_get_tpd(adapter, queue);
2126 			ipv6_hdr(skb)->payload_len = 0;
2127 			/* check payload == 0 byte ? */
2128 			hdr_len = skb_tcp_all_headers(skb);
2129 			if (unlikely(skb->len == hdr_len)) {
2130 				/* only xsum need */
2131 				if (netif_msg_tx_queued(adapter))
2132 					dev_warn(&pdev->dev,
2133 						"IPV6 tso with zero data??\n");
2134 				goto check_sum;
2135 			} else
2136 				tcp_v6_gso_csum_prep(skb);
2137 
2138 			etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2139 			etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2140 			etpd->pkt_len = cpu_to_le32(skb->len);
2141 			(*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2142 		}
2143 
2144 		(*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2145 		(*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2146 				TPD_TCPHDR_OFFSET_SHIFT;
2147 		(*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2148 				TPD_MSS_SHIFT;
2149 		return 0;
2150 	}
2151 
2152 check_sum:
2153 	if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2154 		u8 css, cso;
2155 		cso = skb_checksum_start_offset(skb);
2156 
2157 		if (unlikely(cso & 0x1)) {
2158 			if (netif_msg_tx_err(adapter))
2159 				dev_err(&adapter->pdev->dev,
2160 					"payload offset should not an event number\n");
2161 			return -1;
2162 		} else {
2163 			css = cso + skb->csum_offset;
2164 
2165 			(*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2166 					TPD_PLOADOFFSET_SHIFT;
2167 			(*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2168 					TPD_CCSUM_OFFSET_SHIFT;
2169 			(*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2170 		}
2171 	}
2172 	return 0;
2173 }
2174 
2175 static void atl1c_tx_rollback(struct atl1c_adapter *adpt,
2176 			      struct atl1c_tpd_desc *first_tpd,
2177 			      u32 queue)
2178 {
2179 	struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[queue];
2180 	struct atl1c_buffer *buffer_info;
2181 	struct atl1c_tpd_desc *tpd;
2182 	u16 first_index, index;
2183 
2184 	first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc;
2185 	index = first_index;
2186 	while (index != tpd_ring->next_to_use) {
2187 		tpd = ATL1C_TPD_DESC(tpd_ring, index);
2188 		buffer_info = &tpd_ring->buffer_info[index];
2189 		atl1c_clean_buffer(adpt->pdev, buffer_info);
2190 		memset(tpd, 0, sizeof(struct atl1c_tpd_desc));
2191 		if (++index == tpd_ring->count)
2192 			index = 0;
2193 	}
2194 	tpd_ring->next_to_use = first_index;
2195 }
2196 
2197 static int atl1c_tx_map(struct atl1c_adapter *adapter,
2198 			struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2199 			u32 queue)
2200 {
2201 	struct atl1c_tpd_desc *use_tpd = NULL;
2202 	struct atl1c_buffer *buffer_info = NULL;
2203 	u16 buf_len = skb_headlen(skb);
2204 	u16 map_len = 0;
2205 	u16 mapped_len = 0;
2206 	u16 hdr_len = 0;
2207 	u16 nr_frags;
2208 	u16 f;
2209 	int tso;
2210 
2211 	nr_frags = skb_shinfo(skb)->nr_frags;
2212 	tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2213 	if (tso) {
2214 		/* TSO */
2215 		hdr_len = skb_tcp_all_headers(skb);
2216 		map_len = hdr_len;
2217 		use_tpd = tpd;
2218 
2219 		buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2220 		buffer_info->length = map_len;
2221 		buffer_info->dma = dma_map_single(&adapter->pdev->dev,
2222 						  skb->data, hdr_len,
2223 						  DMA_TO_DEVICE);
2224 		if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
2225 			goto err_dma;
2226 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2227 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2228 			ATL1C_PCIMAP_TODEVICE);
2229 		mapped_len += map_len;
2230 		use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2231 		use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2232 	}
2233 
2234 	if (mapped_len < buf_len) {
2235 		/* mapped_len == 0, means we should use the first tpd,
2236 		   which is given by caller  */
2237 		if (mapped_len == 0)
2238 			use_tpd = tpd;
2239 		else {
2240 			use_tpd = atl1c_get_tpd(adapter, queue);
2241 			memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2242 		}
2243 		buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2244 		buffer_info->length = buf_len - mapped_len;
2245 		buffer_info->dma =
2246 			dma_map_single(&adapter->pdev->dev,
2247 				       skb->data + mapped_len,
2248 				       buffer_info->length, DMA_TO_DEVICE);
2249 		if (unlikely(dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)))
2250 			goto err_dma;
2251 
2252 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2253 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2254 			ATL1C_PCIMAP_TODEVICE);
2255 		use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2256 		use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
2257 	}
2258 
2259 	for (f = 0; f < nr_frags; f++) {
2260 		skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
2261 
2262 		use_tpd = atl1c_get_tpd(adapter, queue);
2263 		memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2264 
2265 		buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2266 		buffer_info->length = skb_frag_size(frag);
2267 		buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2268 						    frag, 0,
2269 						    buffer_info->length,
2270 						    DMA_TO_DEVICE);
2271 		if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))
2272 			goto err_dma;
2273 
2274 		ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2275 		ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2276 			ATL1C_PCIMAP_TODEVICE);
2277 		use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2278 		use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
2279 	}
2280 
2281 	/* The last tpd */
2282 	use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2283 	/* The last buffer info contain the skb address,
2284 	   so it will be free after unmap */
2285 	buffer_info->skb = skb;
2286 
2287 	return 0;
2288 
2289 err_dma:
2290 	buffer_info->dma = 0;
2291 	buffer_info->length = 0;
2292 	return -1;
2293 }
2294 
2295 static void atl1c_tx_queue(struct atl1c_adapter *adapter, u32 queue)
2296 {
2297 	struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[queue];
2298 
2299 	AT_WRITE_REGW(&adapter->hw, atl1c_qregs[queue].tpd_prod,
2300 		      tpd_ring->next_to_use);
2301 }
2302 
2303 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2304 					  struct net_device *netdev)
2305 {
2306 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2307 	u32 queue = skb_get_queue_mapping(skb);
2308 	struct netdev_queue *txq = netdev_get_tx_queue(netdev, queue);
2309 	struct atl1c_tpd_desc *tpd;
2310 	u16 tpd_req;
2311 
2312 	if (test_bit(__AT_DOWN, &adapter->flags)) {
2313 		dev_kfree_skb_any(skb);
2314 		return NETDEV_TX_OK;
2315 	}
2316 
2317 	tpd_req = atl1c_cal_tpd_req(skb);
2318 
2319 	if (atl1c_tpd_avail(adapter, queue) < tpd_req) {
2320 		/* no enough descriptor, just stop queue */
2321 		atl1c_tx_queue(adapter, queue);
2322 		netif_tx_stop_queue(txq);
2323 		return NETDEV_TX_BUSY;
2324 	}
2325 
2326 	tpd = atl1c_get_tpd(adapter, queue);
2327 
2328 	/* do TSO and check sum */
2329 	if (atl1c_tso_csum(adapter, skb, &tpd, queue) != 0) {
2330 		atl1c_tx_queue(adapter, queue);
2331 		dev_kfree_skb_any(skb);
2332 		return NETDEV_TX_OK;
2333 	}
2334 
2335 	if (unlikely(skb_vlan_tag_present(skb))) {
2336 		u16 vlan = skb_vlan_tag_get(skb);
2337 		__le16 tag;
2338 
2339 		vlan = cpu_to_le16(vlan);
2340 		AT_VLAN_TO_TAG(vlan, tag);
2341 		tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2342 		tpd->vlan_tag = tag;
2343 	}
2344 
2345 	if (skb_network_offset(skb) != ETH_HLEN)
2346 		tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2347 
2348 	if (atl1c_tx_map(adapter, skb, tpd, queue) < 0) {
2349 		netif_info(adapter, tx_done, adapter->netdev,
2350 			   "tx-skb dropped due to dma error\n");
2351 		/* roll back tpd/buffer */
2352 		atl1c_tx_rollback(adapter, tpd, queue);
2353 		dev_kfree_skb_any(skb);
2354 	} else {
2355 		bool more = netdev_xmit_more();
2356 
2357 		if (__netdev_tx_sent_queue(txq, skb->len, more))
2358 			atl1c_tx_queue(adapter, queue);
2359 	}
2360 
2361 	return NETDEV_TX_OK;
2362 }
2363 
2364 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2365 {
2366 	struct net_device *netdev = adapter->netdev;
2367 
2368 	free_irq(adapter->pdev->irq, netdev);
2369 
2370 	if (adapter->have_msi)
2371 		pci_disable_msi(adapter->pdev);
2372 }
2373 
2374 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2375 {
2376 	struct pci_dev    *pdev   = adapter->pdev;
2377 	struct net_device *netdev = adapter->netdev;
2378 	int flags = 0;
2379 	int err = 0;
2380 
2381 	adapter->have_msi = true;
2382 	err = pci_enable_msi(adapter->pdev);
2383 	if (err) {
2384 		if (netif_msg_ifup(adapter))
2385 			dev_err(&pdev->dev,
2386 				"Unable to allocate MSI interrupt Error: %d\n",
2387 				err);
2388 		adapter->have_msi = false;
2389 	}
2390 
2391 	if (!adapter->have_msi)
2392 		flags |= IRQF_SHARED;
2393 	err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2394 			netdev->name, netdev);
2395 	if (err) {
2396 		if (netif_msg_ifup(adapter))
2397 			dev_err(&pdev->dev,
2398 				"Unable to allocate interrupt Error: %d\n",
2399 				err);
2400 		if (adapter->have_msi)
2401 			pci_disable_msi(adapter->pdev);
2402 		return err;
2403 	}
2404 	if (netif_msg_ifup(adapter))
2405 		dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2406 	return err;
2407 }
2408 
2409 
2410 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
2411 {
2412 	int i;
2413 	/* release tx-pending skbs and reset tx/rx ring index */
2414 	for (i = 0; i < adapter->tx_queue_count; ++i)
2415 		atl1c_clean_tx_ring(adapter, i);
2416 	for (i = 0; i < adapter->rx_queue_count; ++i)
2417 		atl1c_clean_rx_ring(adapter, i);
2418 }
2419 
2420 static int atl1c_up(struct atl1c_adapter *adapter)
2421 {
2422 	struct net_device *netdev = adapter->netdev;
2423 	int err;
2424 	int i;
2425 
2426 	netif_carrier_off(netdev);
2427 
2428 	err = atl1c_configure(adapter);
2429 	if (unlikely(err))
2430 		goto err_up;
2431 
2432 	err = atl1c_request_irq(adapter);
2433 	if (unlikely(err))
2434 		goto err_up;
2435 
2436 	atl1c_check_link_status(adapter);
2437 	clear_bit(__AT_DOWN, &adapter->flags);
2438 	for (i = 0; i < adapter->tx_queue_count; ++i)
2439 		napi_enable(&adapter->tpd_ring[i].napi);
2440 	for (i = 0; i < adapter->rx_queue_count; ++i)
2441 		napi_enable(&adapter->rrd_ring[i].napi);
2442 	atl1c_irq_enable(adapter);
2443 	netif_start_queue(netdev);
2444 	return err;
2445 
2446 err_up:
2447 	for (i = 0; i < adapter->rx_queue_count; ++i)
2448 		atl1c_clean_rx_ring(adapter, i);
2449 	return err;
2450 }
2451 
2452 static void atl1c_down(struct atl1c_adapter *adapter)
2453 {
2454 	struct net_device *netdev = adapter->netdev;
2455 	int i;
2456 
2457 	atl1c_del_timer(adapter);
2458 	adapter->work_event = 0; /* clear all event */
2459 	/* signal that we're down so the interrupt handler does not
2460 	 * reschedule our watchdog timer */
2461 	set_bit(__AT_DOWN, &adapter->flags);
2462 	netif_carrier_off(netdev);
2463 	for (i = 0; i < adapter->tx_queue_count; ++i)
2464 		napi_disable(&adapter->tpd_ring[i].napi);
2465 	for (i = 0; i < adapter->rx_queue_count; ++i)
2466 		napi_disable(&adapter->rrd_ring[i].napi);
2467 	atl1c_irq_disable(adapter);
2468 	atl1c_free_irq(adapter);
2469 	/* disable ASPM if device inactive */
2470 	atl1c_disable_l0s_l1(&adapter->hw);
2471 	/* reset MAC to disable all RX/TX */
2472 	atl1c_reset_mac(&adapter->hw);
2473 	msleep(1);
2474 
2475 	adapter->link_speed = SPEED_0;
2476 	adapter->link_duplex = -1;
2477 	atl1c_reset_dma_ring(adapter);
2478 }
2479 
2480 /**
2481  * atl1c_open - Called when a network interface is made active
2482  * @netdev: network interface device structure
2483  *
2484  * Returns 0 on success, negative value on failure
2485  *
2486  * The open entry point is called when a network interface is made
2487  * active by the system (IFF_UP).  At this point all resources needed
2488  * for transmit and receive operations are allocated, the interrupt
2489  * handler is registered with the OS, the watchdog timer is started,
2490  * and the stack is notified that the interface is ready.
2491  */
2492 static int atl1c_open(struct net_device *netdev)
2493 {
2494 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2495 	int err;
2496 
2497 	/* disallow open during test */
2498 	if (test_bit(__AT_TESTING, &adapter->flags))
2499 		return -EBUSY;
2500 
2501 	/* allocate rx/tx dma buffer & descriptors */
2502 	err = atl1c_setup_ring_resources(adapter);
2503 	if (unlikely(err))
2504 		return err;
2505 
2506 	err = atl1c_up(adapter);
2507 	if (unlikely(err))
2508 		goto err_up;
2509 
2510 	return 0;
2511 
2512 err_up:
2513 	atl1c_free_irq(adapter);
2514 	atl1c_free_ring_resources(adapter);
2515 	atl1c_reset_mac(&adapter->hw);
2516 	return err;
2517 }
2518 
2519 /**
2520  * atl1c_close - Disables a network interface
2521  * @netdev: network interface device structure
2522  *
2523  * Returns 0, this is not allowed to fail
2524  *
2525  * The close entry point is called when an interface is de-activated
2526  * by the OS.  The hardware is still under the drivers control, but
2527  * needs to be disabled.  A global MAC reset is issued to stop the
2528  * hardware, and all transmit and receive resources are freed.
2529  */
2530 static int atl1c_close(struct net_device *netdev)
2531 {
2532 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2533 
2534 	WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2535 	set_bit(__AT_DOWN, &adapter->flags);
2536 	cancel_work_sync(&adapter->common_task);
2537 	atl1c_down(adapter);
2538 	atl1c_free_ring_resources(adapter);
2539 	return 0;
2540 }
2541 
2542 static int atl1c_suspend(struct device *dev)
2543 {
2544 	struct net_device *netdev = dev_get_drvdata(dev);
2545 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2546 	struct atl1c_hw *hw = &adapter->hw;
2547 	u32 wufc = adapter->wol;
2548 
2549 	atl1c_disable_l0s_l1(hw);
2550 	if (netif_running(netdev)) {
2551 		WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2552 		atl1c_down(adapter);
2553 	}
2554 	netif_device_detach(netdev);
2555 
2556 	if (wufc)
2557 		if (atl1c_phy_to_ps_link(hw) != 0)
2558 			dev_dbg(dev, "phy power saving failed");
2559 
2560 	atl1c_power_saving(hw, wufc);
2561 
2562 	return 0;
2563 }
2564 
2565 #ifdef CONFIG_PM_SLEEP
2566 static int atl1c_resume(struct device *dev)
2567 {
2568 	struct net_device *netdev = dev_get_drvdata(dev);
2569 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2570 
2571 	AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2572 	atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2573 
2574 	atl1c_phy_reset(&adapter->hw);
2575 	atl1c_reset_mac(&adapter->hw);
2576 	atl1c_phy_init(&adapter->hw);
2577 
2578 	netif_device_attach(netdev);
2579 	if (netif_running(netdev))
2580 		atl1c_up(adapter);
2581 
2582 	return 0;
2583 }
2584 #endif
2585 
2586 static void atl1c_shutdown(struct pci_dev *pdev)
2587 {
2588 	struct net_device *netdev = pci_get_drvdata(pdev);
2589 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2590 
2591 	atl1c_suspend(&pdev->dev);
2592 	pci_wake_from_d3(pdev, adapter->wol);
2593 	pci_set_power_state(pdev, PCI_D3hot);
2594 }
2595 
2596 static const struct net_device_ops atl1c_netdev_ops = {
2597 	.ndo_open		= atl1c_open,
2598 	.ndo_stop		= atl1c_close,
2599 	.ndo_validate_addr	= eth_validate_addr,
2600 	.ndo_start_xmit		= atl1c_xmit_frame,
2601 	.ndo_set_mac_address	= atl1c_set_mac_addr,
2602 	.ndo_set_rx_mode	= atl1c_set_multi,
2603 	.ndo_change_mtu		= atl1c_change_mtu,
2604 	.ndo_fix_features	= atl1c_fix_features,
2605 	.ndo_set_features	= atl1c_set_features,
2606 	.ndo_eth_ioctl		= atl1c_ioctl,
2607 	.ndo_tx_timeout		= atl1c_tx_timeout,
2608 	.ndo_get_stats		= atl1c_get_stats,
2609 #ifdef CONFIG_NET_POLL_CONTROLLER
2610 	.ndo_poll_controller	= atl1c_netpoll,
2611 #endif
2612 };
2613 
2614 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2615 {
2616 	SET_NETDEV_DEV(netdev, &pdev->dev);
2617 	pci_set_drvdata(pdev, netdev);
2618 
2619 	netdev->netdev_ops = &atl1c_netdev_ops;
2620 	netdev->watchdog_timeo = AT_TX_WATCHDOG;
2621 	netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
2622 	atl1c_set_ethtool_ops(netdev);
2623 
2624 	/* TODO: add when ready */
2625 	netdev->hw_features =	NETIF_F_SG		|
2626 				NETIF_F_HW_CSUM		|
2627 				NETIF_F_HW_VLAN_CTAG_RX	|
2628 				NETIF_F_TSO		|
2629 				NETIF_F_TSO6;
2630 	netdev->features =	netdev->hw_features	|
2631 				NETIF_F_HW_VLAN_CTAG_TX;
2632 	return 0;
2633 }
2634 
2635 /**
2636  * atl1c_probe - Device Initialization Routine
2637  * @pdev: PCI device information struct
2638  * @ent: entry in atl1c_pci_tbl
2639  *
2640  * Returns 0 on success, negative on failure
2641  *
2642  * atl1c_probe initializes an adapter identified by a pci_dev structure.
2643  * The OS initialization, configuring of the adapter private structure,
2644  * and a hardware reset occur.
2645  */
2646 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2647 {
2648 	struct net_device *netdev;
2649 	struct atl1c_adapter *adapter;
2650 	static int cards_found;
2651 	u8 __iomem *hw_addr;
2652 	enum atl1c_nic_type nic_type;
2653 	u32 queue_count = 1;
2654 	int err = 0;
2655 	int i;
2656 
2657 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
2658 	err = pci_enable_device_mem(pdev);
2659 	if (err)
2660 		return dev_err_probe(&pdev->dev, err, "cannot enable PCI device\n");
2661 
2662 	/*
2663 	 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2664 	 * shared register for the high 32 bits, so only a single, aligned,
2665 	 * 4 GB physical address range can be used at a time.
2666 	 *
2667 	 * Supporting 64-bit DMA on this hardware is more trouble than it's
2668 	 * worth.  It is far easier to limit to 32-bit DMA than update
2669 	 * various kernel subsystems to support the mechanics required by a
2670 	 * fixed-high-32-bit system.
2671 	 */
2672 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2673 	if (err) {
2674 		dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2675 		goto err_dma;
2676 	}
2677 
2678 	err = pci_request_regions(pdev, atl1c_driver_name);
2679 	if (err) {
2680 		dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2681 		goto err_pci_reg;
2682 	}
2683 
2684 	pci_set_master(pdev);
2685 
2686 	hw_addr = pci_ioremap_bar(pdev, 0);
2687 	if (!hw_addr) {
2688 		err = -EIO;
2689 		dev_err(&pdev->dev, "cannot map device registers\n");
2690 		goto err_ioremap;
2691 	}
2692 
2693 	nic_type = atl1c_get_mac_type(pdev, hw_addr);
2694 	if (nic_type == athr_mt)
2695 		queue_count = 4;
2696 
2697 	netdev = alloc_etherdev_mq(sizeof(struct atl1c_adapter), queue_count);
2698 	if (netdev == NULL) {
2699 		err = -ENOMEM;
2700 		goto err_alloc_etherdev;
2701 	}
2702 
2703 	err = atl1c_init_netdev(netdev, pdev);
2704 	if (err) {
2705 		dev_err(&pdev->dev, "init netdevice failed\n");
2706 		goto err_init_netdev;
2707 	}
2708 	adapter = netdev_priv(netdev);
2709 	adapter->bd_number = cards_found;
2710 	adapter->netdev = netdev;
2711 	adapter->pdev = pdev;
2712 	adapter->hw.adapter = adapter;
2713 	adapter->hw.nic_type = nic_type;
2714 	adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2715 	adapter->hw.hw_addr = hw_addr;
2716 	adapter->tx_queue_count = queue_count;
2717 	adapter->rx_queue_count = queue_count;
2718 
2719 	/* init mii data */
2720 	adapter->mii.dev = netdev;
2721 	adapter->mii.mdio_read  = atl1c_mdio_read;
2722 	adapter->mii.mdio_write = atl1c_mdio_write;
2723 	adapter->mii.phy_id_mask = 0x1f;
2724 	adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
2725 	dev_set_threaded(netdev, true);
2726 	for (i = 0; i < adapter->rx_queue_count; ++i)
2727 		netif_napi_add(netdev, &adapter->rrd_ring[i].napi,
2728 			       atl1c_clean_rx);
2729 	for (i = 0; i < adapter->tx_queue_count; ++i)
2730 		netif_napi_add_tx(netdev, &adapter->tpd_ring[i].napi,
2731 				  atl1c_clean_tx);
2732 	timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0);
2733 	/* setup the private structure */
2734 	err = atl1c_sw_init(adapter);
2735 	if (err) {
2736 		dev_err(&pdev->dev, "net device private data init failed\n");
2737 		goto err_sw_init;
2738 	}
2739 	/* set max MTU */
2740 	atl1c_set_max_mtu(netdev);
2741 
2742 	atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2743 
2744 	/* Init GPHY as early as possible due to power saving issue  */
2745 	atl1c_phy_reset(&adapter->hw);
2746 
2747 	err = atl1c_reset_mac(&adapter->hw);
2748 	if (err) {
2749 		err = -EIO;
2750 		goto err_reset;
2751 	}
2752 
2753 	/* reset the controller to
2754 	 * put the device in a known good starting state */
2755 	err = atl1c_phy_init(&adapter->hw);
2756 	if (err) {
2757 		err = -EIO;
2758 		goto err_reset;
2759 	}
2760 	if (atl1c_read_mac_addr(&adapter->hw)) {
2761 		/* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2762 		netdev->addr_assign_type = NET_ADDR_RANDOM;
2763 	}
2764 	eth_hw_addr_set(netdev, adapter->hw.mac_addr);
2765 	if (netif_msg_probe(adapter))
2766 		dev_dbg(&pdev->dev, "mac address : %pM\n",
2767 			adapter->hw.mac_addr);
2768 
2769 	atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
2770 	INIT_WORK(&adapter->common_task, atl1c_common_task);
2771 	adapter->work_event = 0;
2772 	err = register_netdev(netdev);
2773 	if (err) {
2774 		dev_err(&pdev->dev, "register netdevice failed\n");
2775 		goto err_register;
2776 	}
2777 
2778 	cards_found++;
2779 	return 0;
2780 
2781 err_reset:
2782 err_register:
2783 err_sw_init:
2784 err_init_netdev:
2785 	free_netdev(netdev);
2786 err_alloc_etherdev:
2787 	iounmap(hw_addr);
2788 err_ioremap:
2789 	pci_release_regions(pdev);
2790 err_pci_reg:
2791 err_dma:
2792 	pci_disable_device(pdev);
2793 	return err;
2794 }
2795 
2796 /**
2797  * atl1c_remove - Device Removal Routine
2798  * @pdev: PCI device information struct
2799  *
2800  * atl1c_remove is called by the PCI subsystem to alert the driver
2801  * that it should release a PCI device.  The could be caused by a
2802  * Hot-Plug event, or because the driver is going to be removed from
2803  * memory.
2804  */
2805 static void atl1c_remove(struct pci_dev *pdev)
2806 {
2807 	struct net_device *netdev = pci_get_drvdata(pdev);
2808 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2809 
2810 	unregister_netdev(netdev);
2811 	/* restore permanent address */
2812 	atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
2813 	atl1c_phy_disable(&adapter->hw);
2814 
2815 	iounmap(adapter->hw.hw_addr);
2816 
2817 	pci_release_regions(pdev);
2818 	pci_disable_device(pdev);
2819 	free_netdev(netdev);
2820 }
2821 
2822 /**
2823  * atl1c_io_error_detected - called when PCI error is detected
2824  * @pdev: Pointer to PCI device
2825  * @state: The current pci connection state
2826  *
2827  * This function is called after a PCI bus error affecting
2828  * this device has been detected.
2829  */
2830 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2831 						pci_channel_state_t state)
2832 {
2833 	struct net_device *netdev = pci_get_drvdata(pdev);
2834 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2835 
2836 	netif_device_detach(netdev);
2837 
2838 	if (state == pci_channel_io_perm_failure)
2839 		return PCI_ERS_RESULT_DISCONNECT;
2840 
2841 	if (netif_running(netdev))
2842 		atl1c_down(adapter);
2843 
2844 	pci_disable_device(pdev);
2845 
2846 	/* Request a slot reset. */
2847 	return PCI_ERS_RESULT_NEED_RESET;
2848 }
2849 
2850 /**
2851  * atl1c_io_slot_reset - called after the pci bus has been reset.
2852  * @pdev: Pointer to PCI device
2853  *
2854  * Restart the card from scratch, as if from a cold-boot. Implementation
2855  * resembles the first-half of the e1000_resume routine.
2856  */
2857 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2858 {
2859 	struct net_device *netdev = pci_get_drvdata(pdev);
2860 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2861 
2862 	if (pci_enable_device(pdev)) {
2863 		if (netif_msg_hw(adapter))
2864 			dev_err(&pdev->dev,
2865 				"Cannot re-enable PCI device after reset\n");
2866 		return PCI_ERS_RESULT_DISCONNECT;
2867 	}
2868 	pci_set_master(pdev);
2869 
2870 	pci_enable_wake(pdev, PCI_D3hot, 0);
2871 	pci_enable_wake(pdev, PCI_D3cold, 0);
2872 
2873 	atl1c_reset_mac(&adapter->hw);
2874 
2875 	return PCI_ERS_RESULT_RECOVERED;
2876 }
2877 
2878 /**
2879  * atl1c_io_resume - called when traffic can start flowing again.
2880  * @pdev: Pointer to PCI device
2881  *
2882  * This callback is called when the error recovery driver tells us that
2883  * its OK to resume normal operation. Implementation resembles the
2884  * second-half of the atl1c_resume routine.
2885  */
2886 static void atl1c_io_resume(struct pci_dev *pdev)
2887 {
2888 	struct net_device *netdev = pci_get_drvdata(pdev);
2889 	struct atl1c_adapter *adapter = netdev_priv(netdev);
2890 
2891 	if (netif_running(netdev)) {
2892 		if (atl1c_up(adapter)) {
2893 			if (netif_msg_hw(adapter))
2894 				dev_err(&pdev->dev,
2895 					"Cannot bring device back up after reset\n");
2896 			return;
2897 		}
2898 	}
2899 
2900 	netif_device_attach(netdev);
2901 }
2902 
2903 static const struct pci_error_handlers atl1c_err_handler = {
2904 	.error_detected = atl1c_io_error_detected,
2905 	.slot_reset = atl1c_io_slot_reset,
2906 	.resume = atl1c_io_resume,
2907 };
2908 
2909 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2910 
2911 static struct pci_driver atl1c_driver = {
2912 	.name     = atl1c_driver_name,
2913 	.id_table = atl1c_pci_tbl,
2914 	.probe    = atl1c_probe,
2915 	.remove   = atl1c_remove,
2916 	.shutdown = atl1c_shutdown,
2917 	.err_handler = &atl1c_err_handler,
2918 	.driver.pm = &atl1c_pm_ops,
2919 };
2920 
2921 module_pci_driver(atl1c_driver);
2922