1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062 28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063 29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */ 30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */ 31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */ 32 #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */ 33 #define L2CB_V10 0xc0 34 #define L2CB_V11 0xc1 35 36 /* 37 * atl1c_pci_tbl - PCI Device ID Table 38 * 39 * Wildcard entries (PCI_ANY_ID) should come last 40 * Last entry must be all 0s 41 * 42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 43 * Class, Class Mask, private data (not used) } 44 */ 45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { 46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 52 /* required last entry */ 53 { 0 } 54 }; 55 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 56 57 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>"); 58 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); 59 MODULE_LICENSE("GPL"); 60 MODULE_VERSION(ATL1C_DRV_VERSION); 61 62 static int atl1c_stop_mac(struct atl1c_hw *hw); 63 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw); 64 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw); 65 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 66 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup); 67 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter); 68 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, 69 int *work_done, int work_to_do); 70 static int atl1c_up(struct atl1c_adapter *adapter); 71 static void atl1c_down(struct atl1c_adapter *adapter); 72 73 static const u16 atl1c_pay_load_size[] = { 74 128, 256, 512, 1024, 2048, 4096, 75 }; 76 77 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] = 78 { 79 REG_MB_RFD0_PROD_IDX, 80 REG_MB_RFD1_PROD_IDX, 81 REG_MB_RFD2_PROD_IDX, 82 REG_MB_RFD3_PROD_IDX 83 }; 84 85 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] = 86 { 87 REG_RFD0_HEAD_ADDR_LO, 88 REG_RFD1_HEAD_ADDR_LO, 89 REG_RFD2_HEAD_ADDR_LO, 90 REG_RFD3_HEAD_ADDR_LO 91 }; 92 93 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] = 94 { 95 REG_RRD0_HEAD_ADDR_LO, 96 REG_RRD1_HEAD_ADDR_LO, 97 REG_RRD2_HEAD_ADDR_LO, 98 REG_RRD3_HEAD_ADDR_LO 99 }; 100 101 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 102 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 103 static void atl1c_pcie_patch(struct atl1c_hw *hw) 104 { 105 u32 data; 106 107 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 108 data |= PCIE_PHYMISC_FORCE_RCV_DET; 109 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 110 111 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 112 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 113 114 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK << 115 PCIE_PHYMISC2_SERDES_CDR_SHIFT); 116 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT; 117 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK << 118 PCIE_PHYMISC2_SERDES_TH_SHIFT); 119 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT; 120 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 121 } 122 } 123 124 /* FIXME: no need any more ? */ 125 /* 126 * atl1c_init_pcie - init PCIE module 127 */ 128 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 129 { 130 u32 data; 131 u32 pci_cmd; 132 struct pci_dev *pdev = hw->adapter->pdev; 133 134 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 135 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 136 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 137 PCI_COMMAND_IO); 138 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 139 140 /* 141 * Clear any PowerSaveing Settings 142 */ 143 pci_enable_wake(pdev, PCI_D3hot, 0); 144 pci_enable_wake(pdev, PCI_D3cold, 0); 145 146 /* 147 * Mask some pcie error bits 148 */ 149 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data); 150 data &= ~PCIE_UC_SERVRITY_DLP; 151 data &= ~PCIE_UC_SERVRITY_FCP; 152 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data); 153 154 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 155 data &= ~LTSSM_ID_EN_WRO; 156 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 157 158 atl1c_pcie_patch(hw); 159 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 160 atl1c_disable_l0s_l1(hw); 161 if (flag & ATL1C_PCIE_PHY_RESET) 162 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT); 163 else 164 AT_WRITE_REG(hw, REG_GPHY_CTRL, 165 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET); 166 167 msleep(5); 168 } 169 170 /* 171 * atl1c_irq_enable - Enable default interrupt generation settings 172 * @adapter: board private structure 173 */ 174 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 175 { 176 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 177 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 178 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 179 AT_WRITE_FLUSH(&adapter->hw); 180 } 181 } 182 183 /* 184 * atl1c_irq_disable - Mask off interrupt generation on the NIC 185 * @adapter: board private structure 186 */ 187 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 188 { 189 atomic_inc(&adapter->irq_sem); 190 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 191 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 192 AT_WRITE_FLUSH(&adapter->hw); 193 synchronize_irq(adapter->pdev->irq); 194 } 195 196 /* 197 * atl1c_irq_reset - reset interrupt confiure on the NIC 198 * @adapter: board private structure 199 */ 200 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 201 { 202 atomic_set(&adapter->irq_sem, 1); 203 atl1c_irq_enable(adapter); 204 } 205 206 /* 207 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 208 * of the idle status register until the device is actually idle 209 */ 210 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw) 211 { 212 int timeout; 213 u32 data; 214 215 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 216 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 217 if ((data & IDLE_STATUS_MASK) == 0) 218 return 0; 219 msleep(1); 220 } 221 return data; 222 } 223 224 /* 225 * atl1c_phy_config - Timer Call-back 226 * @data: pointer to netdev cast into an unsigned long 227 */ 228 static void atl1c_phy_config(unsigned long data) 229 { 230 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 231 struct atl1c_hw *hw = &adapter->hw; 232 unsigned long flags; 233 234 spin_lock_irqsave(&adapter->mdio_lock, flags); 235 atl1c_restart_autoneg(hw); 236 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 237 } 238 239 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 240 { 241 WARN_ON(in_interrupt()); 242 atl1c_down(adapter); 243 atl1c_up(adapter); 244 clear_bit(__AT_RESETTING, &adapter->flags); 245 } 246 247 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 248 { 249 struct atl1c_hw *hw = &adapter->hw; 250 struct net_device *netdev = adapter->netdev; 251 struct pci_dev *pdev = adapter->pdev; 252 int err; 253 unsigned long flags; 254 u16 speed, duplex, phy_data; 255 256 spin_lock_irqsave(&adapter->mdio_lock, flags); 257 /* MII_BMSR must read twise */ 258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 259 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 260 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 261 262 if ((phy_data & BMSR_LSTATUS) == 0) { 263 /* link down */ 264 hw->hibernate = true; 265 if (atl1c_stop_mac(hw) != 0) 266 if (netif_msg_hw(adapter)) 267 dev_warn(&pdev->dev, "stop mac failed\n"); 268 atl1c_set_aspm(hw, false); 269 netif_carrier_off(netdev); 270 netif_stop_queue(netdev); 271 atl1c_phy_reset(hw); 272 atl1c_phy_init(&adapter->hw); 273 } else { 274 /* Link Up */ 275 hw->hibernate = false; 276 spin_lock_irqsave(&adapter->mdio_lock, flags); 277 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 278 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 279 if (unlikely(err)) 280 return; 281 /* link result is our setting */ 282 if (adapter->link_speed != speed || 283 adapter->link_duplex != duplex) { 284 adapter->link_speed = speed; 285 adapter->link_duplex = duplex; 286 atl1c_set_aspm(hw, true); 287 atl1c_enable_tx_ctrl(hw); 288 atl1c_enable_rx_ctrl(hw); 289 atl1c_setup_mac_ctrl(adapter); 290 if (netif_msg_link(adapter)) 291 dev_info(&pdev->dev, 292 "%s: %s NIC Link is Up<%d Mbps %s>\n", 293 atl1c_driver_name, netdev->name, 294 adapter->link_speed, 295 adapter->link_duplex == FULL_DUPLEX ? 296 "Full Duplex" : "Half Duplex"); 297 } 298 if (!netif_carrier_ok(netdev)) 299 netif_carrier_on(netdev); 300 } 301 } 302 303 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 304 { 305 struct net_device *netdev = adapter->netdev; 306 struct pci_dev *pdev = adapter->pdev; 307 u16 phy_data; 308 u16 link_up; 309 310 spin_lock(&adapter->mdio_lock); 311 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 312 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 313 spin_unlock(&adapter->mdio_lock); 314 link_up = phy_data & BMSR_LSTATUS; 315 /* notify upper layer link down ASAP */ 316 if (!link_up) { 317 if (netif_carrier_ok(netdev)) { 318 /* old link state: Up */ 319 netif_carrier_off(netdev); 320 if (netif_msg_link(adapter)) 321 dev_info(&pdev->dev, 322 "%s: %s NIC Link is Down\n", 323 atl1c_driver_name, netdev->name); 324 adapter->link_speed = SPEED_0; 325 } 326 } 327 328 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 329 schedule_work(&adapter->common_task); 330 } 331 332 static void atl1c_common_task(struct work_struct *work) 333 { 334 struct atl1c_adapter *adapter; 335 struct net_device *netdev; 336 337 adapter = container_of(work, struct atl1c_adapter, common_task); 338 netdev = adapter->netdev; 339 340 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 341 netif_device_detach(netdev); 342 atl1c_down(adapter); 343 atl1c_up(adapter); 344 netif_device_attach(netdev); 345 } 346 347 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 348 &adapter->work_event)) 349 atl1c_check_link_status(adapter); 350 } 351 352 353 static void atl1c_del_timer(struct atl1c_adapter *adapter) 354 { 355 del_timer_sync(&adapter->phy_config_timer); 356 } 357 358 359 /* 360 * atl1c_tx_timeout - Respond to a Tx Hang 361 * @netdev: network interface device structure 362 */ 363 static void atl1c_tx_timeout(struct net_device *netdev) 364 { 365 struct atl1c_adapter *adapter = netdev_priv(netdev); 366 367 /* Do the reset outside of interrupt context */ 368 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 369 schedule_work(&adapter->common_task); 370 } 371 372 /* 373 * atl1c_set_multi - Multicast and Promiscuous mode set 374 * @netdev: network interface device structure 375 * 376 * The set_multi entry point is called whenever the multicast address 377 * list or the network interface flags are updated. This routine is 378 * responsible for configuring the hardware for proper multicast, 379 * promiscuous mode, and all-multi behavior. 380 */ 381 static void atl1c_set_multi(struct net_device *netdev) 382 { 383 struct atl1c_adapter *adapter = netdev_priv(netdev); 384 struct atl1c_hw *hw = &adapter->hw; 385 struct netdev_hw_addr *ha; 386 u32 mac_ctrl_data; 387 u32 hash_value; 388 389 /* Check for Promiscuous and All Multicast modes */ 390 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 391 392 if (netdev->flags & IFF_PROMISC) { 393 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 394 } else if (netdev->flags & IFF_ALLMULTI) { 395 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 396 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 397 } else { 398 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 399 } 400 401 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 402 403 /* clear the old settings from the multicast hash table */ 404 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 405 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 406 407 /* comoute mc addresses' hash value ,and put it into hash table */ 408 netdev_for_each_mc_addr(ha, netdev) { 409 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 410 atl1c_hash_set(hw, hash_value); 411 } 412 } 413 414 static void __atl1c_vlan_mode(u32 features, u32 *mac_ctrl_data) 415 { 416 if (features & NETIF_F_HW_VLAN_RX) { 417 /* enable VLAN tag insert/strip */ 418 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 419 } else { 420 /* disable VLAN tag insert/strip */ 421 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 422 } 423 } 424 425 static void atl1c_vlan_mode(struct net_device *netdev, u32 features) 426 { 427 struct atl1c_adapter *adapter = netdev_priv(netdev); 428 struct pci_dev *pdev = adapter->pdev; 429 u32 mac_ctrl_data = 0; 430 431 if (netif_msg_pktdata(adapter)) 432 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 433 434 atl1c_irq_disable(adapter); 435 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 436 __atl1c_vlan_mode(features, &mac_ctrl_data); 437 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 438 atl1c_irq_enable(adapter); 439 } 440 441 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 442 { 443 struct pci_dev *pdev = adapter->pdev; 444 445 if (netif_msg_pktdata(adapter)) 446 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 447 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 448 } 449 450 /* 451 * atl1c_set_mac - Change the Ethernet Address of the NIC 452 * @netdev: network interface device structure 453 * @p: pointer to an address structure 454 * 455 * Returns 0 on success, negative on failure 456 */ 457 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 458 { 459 struct atl1c_adapter *adapter = netdev_priv(netdev); 460 struct sockaddr *addr = p; 461 462 if (!is_valid_ether_addr(addr->sa_data)) 463 return -EADDRNOTAVAIL; 464 465 if (netif_running(netdev)) 466 return -EBUSY; 467 468 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 469 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 470 471 atl1c_hw_set_mac_addr(&adapter->hw); 472 473 return 0; 474 } 475 476 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 477 struct net_device *dev) 478 { 479 int mtu = dev->mtu; 480 481 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 482 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 483 } 484 485 static u32 atl1c_fix_features(struct net_device *netdev, u32 features) 486 { 487 /* 488 * Since there is no support for separate rx/tx vlan accel 489 * enable/disable make sure tx flag is always in same state as rx. 490 */ 491 if (features & NETIF_F_HW_VLAN_RX) 492 features |= NETIF_F_HW_VLAN_TX; 493 else 494 features &= ~NETIF_F_HW_VLAN_TX; 495 496 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 497 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 498 499 return features; 500 } 501 502 static int atl1c_set_features(struct net_device *netdev, u32 features) 503 { 504 u32 changed = netdev->features ^ features; 505 506 if (changed & NETIF_F_HW_VLAN_RX) 507 atl1c_vlan_mode(netdev, features); 508 509 return 0; 510 } 511 512 /* 513 * atl1c_change_mtu - Change the Maximum Transfer Unit 514 * @netdev: network interface device structure 515 * @new_mtu: new value for maximum frame size 516 * 517 * Returns 0 on success, negative on failure 518 */ 519 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 520 { 521 struct atl1c_adapter *adapter = netdev_priv(netdev); 522 int old_mtu = netdev->mtu; 523 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 524 525 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || 526 (max_frame > MAX_JUMBO_FRAME_SIZE)) { 527 if (netif_msg_link(adapter)) 528 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 529 return -EINVAL; 530 } 531 /* set MTU */ 532 if (old_mtu != new_mtu && netif_running(netdev)) { 533 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 534 msleep(1); 535 netdev->mtu = new_mtu; 536 adapter->hw.max_frame_size = new_mtu; 537 atl1c_set_rxbufsize(adapter, netdev); 538 atl1c_down(adapter); 539 netdev_update_features(netdev); 540 atl1c_up(adapter); 541 clear_bit(__AT_RESETTING, &adapter->flags); 542 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { 543 u32 phy_data; 544 545 AT_READ_REG(&adapter->hw, 0x1414, &phy_data); 546 phy_data |= 0x10000000; 547 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data); 548 } 549 550 } 551 return 0; 552 } 553 554 /* 555 * caller should hold mdio_lock 556 */ 557 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 558 { 559 struct atl1c_adapter *adapter = netdev_priv(netdev); 560 u16 result; 561 562 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); 563 return result; 564 } 565 566 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 567 int reg_num, int val) 568 { 569 struct atl1c_adapter *adapter = netdev_priv(netdev); 570 571 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); 572 } 573 574 /* 575 * atl1c_mii_ioctl - 576 * @netdev: 577 * @ifreq: 578 * @cmd: 579 */ 580 static int atl1c_mii_ioctl(struct net_device *netdev, 581 struct ifreq *ifr, int cmd) 582 { 583 struct atl1c_adapter *adapter = netdev_priv(netdev); 584 struct pci_dev *pdev = adapter->pdev; 585 struct mii_ioctl_data *data = if_mii(ifr); 586 unsigned long flags; 587 int retval = 0; 588 589 if (!netif_running(netdev)) 590 return -EINVAL; 591 592 spin_lock_irqsave(&adapter->mdio_lock, flags); 593 switch (cmd) { 594 case SIOCGMIIPHY: 595 data->phy_id = 0; 596 break; 597 598 case SIOCGMIIREG: 599 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 600 &data->val_out)) { 601 retval = -EIO; 602 goto out; 603 } 604 break; 605 606 case SIOCSMIIREG: 607 if (data->reg_num & ~(0x1F)) { 608 retval = -EFAULT; 609 goto out; 610 } 611 612 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 613 data->reg_num, data->val_in); 614 if (atl1c_write_phy_reg(&adapter->hw, 615 data->reg_num, data->val_in)) { 616 retval = -EIO; 617 goto out; 618 } 619 break; 620 621 default: 622 retval = -EOPNOTSUPP; 623 break; 624 } 625 out: 626 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 627 return retval; 628 } 629 630 /* 631 * atl1c_ioctl - 632 * @netdev: 633 * @ifreq: 634 * @cmd: 635 */ 636 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 637 { 638 switch (cmd) { 639 case SIOCGMIIPHY: 640 case SIOCGMIIREG: 641 case SIOCSMIIREG: 642 return atl1c_mii_ioctl(netdev, ifr, cmd); 643 default: 644 return -EOPNOTSUPP; 645 } 646 } 647 648 /* 649 * atl1c_alloc_queues - Allocate memory for all rings 650 * @adapter: board private structure to initialize 651 * 652 */ 653 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter) 654 { 655 return 0; 656 } 657 658 static void atl1c_set_mac_type(struct atl1c_hw *hw) 659 { 660 switch (hw->device_id) { 661 case PCI_DEVICE_ID_ATTANSIC_L2C: 662 hw->nic_type = athr_l2c; 663 break; 664 case PCI_DEVICE_ID_ATTANSIC_L1C: 665 hw->nic_type = athr_l1c; 666 break; 667 case PCI_DEVICE_ID_ATHEROS_L2C_B: 668 hw->nic_type = athr_l2c_b; 669 break; 670 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 671 hw->nic_type = athr_l2c_b2; 672 break; 673 case PCI_DEVICE_ID_ATHEROS_L1D: 674 hw->nic_type = athr_l1d; 675 break; 676 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 677 hw->nic_type = athr_l1d_2; 678 break; 679 default: 680 break; 681 } 682 } 683 684 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 685 { 686 u32 phy_status_data; 687 u32 link_ctrl_data; 688 689 atl1c_set_mac_type(hw); 690 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data); 691 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 692 693 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 694 ATL1C_TXQ_MODE_ENHANCE; 695 if (link_ctrl_data & LINK_CTRL_L0S_EN) 696 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT; 697 if (link_ctrl_data & LINK_CTRL_L1_EN) 698 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT; 699 if (link_ctrl_data & LINK_CTRL_EXT_SYNC) 700 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC; 701 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 702 703 if (hw->nic_type == athr_l1c || 704 hw->nic_type == athr_l1d || 705 hw->nic_type == athr_l1d_2) 706 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 707 return 0; 708 } 709 /* 710 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 711 * @adapter: board private structure to initialize 712 * 713 * atl1c_sw_init initializes the Adapter private data structure. 714 * Fields are initialized based on PCI device information and 715 * OS network device settings (MTU size). 716 */ 717 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) 718 { 719 struct atl1c_hw *hw = &adapter->hw; 720 struct pci_dev *pdev = adapter->pdev; 721 u32 revision; 722 723 724 adapter->wol = 0; 725 device_set_wakeup_enable(&pdev->dev, false); 726 adapter->link_speed = SPEED_0; 727 adapter->link_duplex = FULL_DUPLEX; 728 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE; 729 adapter->tpd_ring[0].count = 1024; 730 adapter->rfd_ring[0].count = 512; 731 732 hw->vendor_id = pdev->vendor; 733 hw->device_id = pdev->device; 734 hw->subsystem_vendor_id = pdev->subsystem_vendor; 735 hw->subsystem_id = pdev->subsystem_device; 736 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision); 737 hw->revision_id = revision & 0xFF; 738 /* before link up, we assume hibernate is true */ 739 hw->hibernate = true; 740 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 741 if (atl1c_setup_mac_funcs(hw) != 0) { 742 dev_err(&pdev->dev, "set mac function pointers failed\n"); 743 return -1; 744 } 745 hw->intr_mask = IMR_NORMAL_MASK; 746 hw->phy_configured = false; 747 hw->preamble_len = 7; 748 hw->max_frame_size = adapter->netdev->mtu; 749 if (adapter->num_rx_queues < 2) { 750 hw->rss_type = atl1c_rss_disable; 751 hw->rss_mode = atl1c_rss_mode_disable; 752 } else { 753 hw->rss_type = atl1c_rss_ipv4; 754 hw->rss_mode = atl1c_rss_mul_que_mul_int; 755 hw->rss_hash_bits = 16; 756 } 757 hw->autoneg_advertised = ADVERTISED_Autoneg; 758 hw->indirect_tab = 0xE4E4E4E4; 759 hw->base_cpu = 0; 760 761 hw->ict = 50000; /* 100ms */ 762 hw->smb_timer = 200000; /* 400ms */ 763 hw->cmb_tpd = 4; 764 hw->cmb_tx_timer = 1; /* 2 us */ 765 hw->rx_imt = 200; 766 hw->tx_imt = 1000; 767 768 hw->tpd_burst = 5; 769 hw->rfd_burst = 8; 770 hw->dma_order = atl1c_dma_ord_out; 771 hw->dmar_block = atl1c_dma_req_1024; 772 hw->dmaw_block = atl1c_dma_req_1024; 773 hw->dmar_dly_cnt = 15; 774 hw->dmaw_dly_cnt = 4; 775 776 if (atl1c_alloc_queues(adapter)) { 777 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 778 return -ENOMEM; 779 } 780 /* TODO */ 781 atl1c_set_rxbufsize(adapter, adapter->netdev); 782 atomic_set(&adapter->irq_sem, 1); 783 spin_lock_init(&adapter->mdio_lock); 784 spin_lock_init(&adapter->tx_lock); 785 set_bit(__AT_DOWN, &adapter->flags); 786 787 return 0; 788 } 789 790 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 791 struct atl1c_buffer *buffer_info, int in_irq) 792 { 793 u16 pci_driection; 794 if (buffer_info->flags & ATL1C_BUFFER_FREE) 795 return; 796 if (buffer_info->dma) { 797 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 798 pci_driection = PCI_DMA_FROMDEVICE; 799 else 800 pci_driection = PCI_DMA_TODEVICE; 801 802 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 803 pci_unmap_single(pdev, buffer_info->dma, 804 buffer_info->length, pci_driection); 805 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 806 pci_unmap_page(pdev, buffer_info->dma, 807 buffer_info->length, pci_driection); 808 } 809 if (buffer_info->skb) { 810 if (in_irq) 811 dev_kfree_skb_irq(buffer_info->skb); 812 else 813 dev_kfree_skb(buffer_info->skb); 814 } 815 buffer_info->dma = 0; 816 buffer_info->skb = NULL; 817 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 818 } 819 /* 820 * atl1c_clean_tx_ring - Free Tx-skb 821 * @adapter: board private structure 822 */ 823 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 824 enum atl1c_trans_queue type) 825 { 826 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 827 struct atl1c_buffer *buffer_info; 828 struct pci_dev *pdev = adapter->pdev; 829 u16 index, ring_count; 830 831 ring_count = tpd_ring->count; 832 for (index = 0; index < ring_count; index++) { 833 buffer_info = &tpd_ring->buffer_info[index]; 834 atl1c_clean_buffer(pdev, buffer_info, 0); 835 } 836 837 /* Zero out Tx-buffers */ 838 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 839 ring_count); 840 atomic_set(&tpd_ring->next_to_clean, 0); 841 tpd_ring->next_to_use = 0; 842 } 843 844 /* 845 * atl1c_clean_rx_ring - Free rx-reservation skbs 846 * @adapter: board private structure 847 */ 848 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 849 { 850 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 851 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 852 struct atl1c_buffer *buffer_info; 853 struct pci_dev *pdev = adapter->pdev; 854 int i, j; 855 856 for (i = 0; i < adapter->num_rx_queues; i++) { 857 for (j = 0; j < rfd_ring[i].count; j++) { 858 buffer_info = &rfd_ring[i].buffer_info[j]; 859 atl1c_clean_buffer(pdev, buffer_info, 0); 860 } 861 /* zero out the descriptor ring */ 862 memset(rfd_ring[i].desc, 0, rfd_ring[i].size); 863 rfd_ring[i].next_to_clean = 0; 864 rfd_ring[i].next_to_use = 0; 865 rrd_ring[i].next_to_use = 0; 866 rrd_ring[i].next_to_clean = 0; 867 } 868 } 869 870 /* 871 * Read / Write Ptr Initialize: 872 */ 873 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 874 { 875 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 876 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 877 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 878 struct atl1c_buffer *buffer_info; 879 int i, j; 880 881 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 882 tpd_ring[i].next_to_use = 0; 883 atomic_set(&tpd_ring[i].next_to_clean, 0); 884 buffer_info = tpd_ring[i].buffer_info; 885 for (j = 0; j < tpd_ring->count; j++) 886 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 887 ATL1C_BUFFER_FREE); 888 } 889 for (i = 0; i < adapter->num_rx_queues; i++) { 890 rfd_ring[i].next_to_use = 0; 891 rfd_ring[i].next_to_clean = 0; 892 rrd_ring[i].next_to_use = 0; 893 rrd_ring[i].next_to_clean = 0; 894 for (j = 0; j < rfd_ring[i].count; j++) { 895 buffer_info = &rfd_ring[i].buffer_info[j]; 896 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 897 } 898 } 899 } 900 901 /* 902 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 903 * @adapter: board private structure 904 * 905 * Free all transmit software resources 906 */ 907 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 908 { 909 struct pci_dev *pdev = adapter->pdev; 910 911 pci_free_consistent(pdev, adapter->ring_header.size, 912 adapter->ring_header.desc, 913 adapter->ring_header.dma); 914 adapter->ring_header.desc = NULL; 915 916 /* Note: just free tdp_ring.buffer_info, 917 * it contain rfd_ring.buffer_info, do not double free */ 918 if (adapter->tpd_ring[0].buffer_info) { 919 kfree(adapter->tpd_ring[0].buffer_info); 920 adapter->tpd_ring[0].buffer_info = NULL; 921 } 922 } 923 924 /* 925 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 926 * @adapter: board private structure 927 * 928 * Return 0 on success, negative on failure 929 */ 930 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 931 { 932 struct pci_dev *pdev = adapter->pdev; 933 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 934 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; 935 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; 936 struct atl1c_ring_header *ring_header = &adapter->ring_header; 937 int num_rx_queues = adapter->num_rx_queues; 938 int size; 939 int i; 940 int count = 0; 941 int rx_desc_count = 0; 942 u32 offset = 0; 943 944 rrd_ring[0].count = rfd_ring[0].count; 945 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 946 tpd_ring[i].count = tpd_ring[0].count; 947 948 for (i = 1; i < adapter->num_rx_queues; i++) 949 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count; 950 951 /* 2 tpd queue, one high priority queue, 952 * another normal priority queue */ 953 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 954 rfd_ring->count * num_rx_queues); 955 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 956 if (unlikely(!tpd_ring->buffer_info)) { 957 dev_err(&pdev->dev, "kzalloc failed, size = %d\n", 958 size); 959 goto err_nomem; 960 } 961 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 962 tpd_ring[i].buffer_info = 963 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 964 count += tpd_ring[i].count; 965 } 966 967 for (i = 0; i < num_rx_queues; i++) { 968 rfd_ring[i].buffer_info = 969 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 970 count += rfd_ring[i].count; 971 rx_desc_count += rfd_ring[i].count; 972 } 973 /* 974 * real ring DMA buffer 975 * each ring/block may need up to 8 bytes for alignment, hence the 976 * additional bytes tacked onto the end. 977 */ 978 ring_header->size = size = 979 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 980 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 981 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 982 sizeof(struct atl1c_hw_stats) + 983 8 * 4 + 8 * 2 * num_rx_queues; 984 985 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, 986 &ring_header->dma); 987 if (unlikely(!ring_header->desc)) { 988 dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); 989 goto err_nomem; 990 } 991 memset(ring_header->desc, 0, ring_header->size); 992 /* init TPD ring */ 993 994 tpd_ring[0].dma = roundup(ring_header->dma, 8); 995 offset = tpd_ring[0].dma - ring_header->dma; 996 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 997 tpd_ring[i].dma = ring_header->dma + offset; 998 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 999 tpd_ring[i].size = 1000 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 1001 offset += roundup(tpd_ring[i].size, 8); 1002 } 1003 /* init RFD ring */ 1004 for (i = 0; i < num_rx_queues; i++) { 1005 rfd_ring[i].dma = ring_header->dma + offset; 1006 rfd_ring[i].desc = (u8 *) ring_header->desc + offset; 1007 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) * 1008 rfd_ring[i].count; 1009 offset += roundup(rfd_ring[i].size, 8); 1010 } 1011 1012 /* init RRD ring */ 1013 for (i = 0; i < num_rx_queues; i++) { 1014 rrd_ring[i].dma = ring_header->dma + offset; 1015 rrd_ring[i].desc = (u8 *) ring_header->desc + offset; 1016 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) * 1017 rrd_ring[i].count; 1018 offset += roundup(rrd_ring[i].size, 8); 1019 } 1020 1021 adapter->smb.dma = ring_header->dma + offset; 1022 adapter->smb.smb = (u8 *)ring_header->desc + offset; 1023 return 0; 1024 1025 err_nomem: 1026 kfree(tpd_ring->buffer_info); 1027 return -ENOMEM; 1028 } 1029 1030 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1031 { 1032 struct atl1c_hw *hw = &adapter->hw; 1033 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *) 1034 adapter->rfd_ring; 1035 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *) 1036 adapter->rrd_ring; 1037 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1038 adapter->tpd_ring; 1039 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb; 1040 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb; 1041 int i; 1042 u32 data; 1043 1044 /* TPD */ 1045 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1046 (u32)((tpd_ring[atl1c_trans_normal].dma & 1047 AT_DMA_HI_ADDR_MASK) >> 32)); 1048 /* just enable normal priority TX queue */ 1049 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO, 1050 (u32)(tpd_ring[atl1c_trans_normal].dma & 1051 AT_DMA_LO_ADDR_MASK)); 1052 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO, 1053 (u32)(tpd_ring[atl1c_trans_high].dma & 1054 AT_DMA_LO_ADDR_MASK)); 1055 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1056 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1057 1058 1059 /* RFD */ 1060 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1061 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1062 for (i = 0; i < adapter->num_rx_queues; i++) 1063 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i], 1064 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); 1065 1066 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1067 rfd_ring[0].count & RFD_RING_SIZE_MASK); 1068 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1069 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1070 1071 /* RRD */ 1072 for (i = 0; i < adapter->num_rx_queues; i++) 1073 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i], 1074 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); 1075 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1076 (rrd_ring[0].count & RRD_RING_SIZE_MASK)); 1077 1078 /* CMB */ 1079 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK); 1080 1081 /* SMB */ 1082 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI, 1083 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1084 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO, 1085 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK)); 1086 if (hw->nic_type == athr_l2c_b) { 1087 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1088 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1089 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1090 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1091 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1092 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1093 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1094 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1095 } 1096 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) { 1097 /* Power Saving for L2c_B */ 1098 AT_READ_REG(hw, REG_SERDES_LOCK, &data); 1099 data |= SERDES_MAC_CLK_SLOWDOWN; 1100 data |= SERDES_PYH_CLK_SLOWDOWN; 1101 AT_WRITE_REG(hw, REG_SERDES_LOCK, data); 1102 } 1103 /* Load all of base address above */ 1104 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1105 } 1106 1107 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1108 { 1109 struct atl1c_hw *hw = &adapter->hw; 1110 u32 dev_ctrl_data; 1111 u32 max_pay_load; 1112 u16 tx_offload_thresh; 1113 u32 txq_ctrl_data; 1114 u32 max_pay_load_data; 1115 1116 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH; 1117 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1118 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1119 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data); 1120 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) & 1121 DEVICE_CTRL_MAX_PAYLOAD_MASK; 1122 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block); 1123 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) & 1124 DEVICE_CTRL_MAX_RREQ_SZ_MASK; 1125 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1126 1127 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) << 1128 TXQ_NUM_TPD_BURST_SHIFT; 1129 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE) 1130 txq_ctrl_data |= TXQ_CTRL_ENH_MODE; 1131 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] & 1132 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT; 1133 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2) 1134 max_pay_load_data >>= 1; 1135 txq_ctrl_data |= max_pay_load_data; 1136 1137 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1138 } 1139 1140 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1141 { 1142 struct atl1c_hw *hw = &adapter->hw; 1143 u32 rxq_ctrl_data; 1144 1145 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1146 RXQ_RFD_BURST_NUM_SHIFT; 1147 1148 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1149 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1150 if (hw->rss_type == atl1c_rss_ipv4) 1151 rxq_ctrl_data |= RSS_HASH_IPV4; 1152 if (hw->rss_type == atl1c_rss_ipv4_tcp) 1153 rxq_ctrl_data |= RSS_HASH_IPV4_TCP; 1154 if (hw->rss_type == atl1c_rss_ipv6) 1155 rxq_ctrl_data |= RSS_HASH_IPV6; 1156 if (hw->rss_type == atl1c_rss_ipv6_tcp) 1157 rxq_ctrl_data |= RSS_HASH_IPV6_TCP; 1158 if (hw->rss_type != atl1c_rss_disable) 1159 rxq_ctrl_data |= RRS_HASH_CTRL_EN; 1160 1161 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) << 1162 RSS_MODE_SHIFT; 1163 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) << 1164 RSS_HASH_BITS_SHIFT; 1165 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON) 1166 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M & 1167 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT; 1168 1169 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1170 } 1171 1172 static void atl1c_configure_rss(struct atl1c_adapter *adapter) 1173 { 1174 struct atl1c_hw *hw = &adapter->hw; 1175 1176 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); 1177 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); 1178 } 1179 1180 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1181 { 1182 struct atl1c_hw *hw = &adapter->hw; 1183 u32 dma_ctrl_data; 1184 1185 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI; 1186 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) 1187 dma_ctrl_data |= DMA_CTRL_CMB_EN; 1188 if (hw->ctrl_flags & ATL1C_SMB_ENABLE) 1189 dma_ctrl_data |= DMA_CTRL_SMB_EN; 1190 else 1191 dma_ctrl_data |= MAC_CTRL_SMB_DIS; 1192 1193 switch (hw->dma_order) { 1194 case atl1c_dma_ord_in: 1195 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER; 1196 break; 1197 case atl1c_dma_ord_enh: 1198 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER; 1199 break; 1200 case atl1c_dma_ord_out: 1201 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER; 1202 break; 1203 default: 1204 break; 1205 } 1206 1207 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) 1208 << DMA_CTRL_DMAR_BURST_LEN_SHIFT; 1209 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) 1210 << DMA_CTRL_DMAW_BURST_LEN_SHIFT; 1211 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) 1212 << DMA_CTRL_DMAR_DLY_CNT_SHIFT; 1213 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) 1214 << DMA_CTRL_DMAW_DLY_CNT_SHIFT; 1215 1216 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1217 } 1218 1219 /* 1220 * Stop the mac, transmit and receive units 1221 * hw - Struct containing variables accessed by shared code 1222 * return : 0 or idle status (if error) 1223 */ 1224 static int atl1c_stop_mac(struct atl1c_hw *hw) 1225 { 1226 u32 data; 1227 1228 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1229 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN | 1230 RXQ3_CTRL_EN | RXQ_CTRL_EN); 1231 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1232 1233 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1234 data &= ~TXQ_CTRL_EN; 1235 AT_WRITE_REG(hw, REG_TWSI_CTRL, data); 1236 1237 atl1c_wait_until_idle(hw); 1238 1239 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1240 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1241 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1242 1243 return (int)atl1c_wait_until_idle(hw); 1244 } 1245 1246 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw) 1247 { 1248 u32 data; 1249 1250 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1251 switch (hw->adapter->num_rx_queues) { 1252 case 4: 1253 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN); 1254 break; 1255 case 3: 1256 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN); 1257 break; 1258 case 2: 1259 data |= RXQ1_CTRL_EN; 1260 break; 1261 default: 1262 break; 1263 } 1264 data |= RXQ_CTRL_EN; 1265 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1266 } 1267 1268 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw) 1269 { 1270 u32 data; 1271 1272 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1273 data |= TXQ_CTRL_EN; 1274 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1275 } 1276 1277 /* 1278 * Reset the transmit and receive units; mask and clear all interrupts. 1279 * hw - Struct containing variables accessed by shared code 1280 * return : 0 or idle status (if error) 1281 */ 1282 static int atl1c_reset_mac(struct atl1c_hw *hw) 1283 { 1284 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; 1285 struct pci_dev *pdev = adapter->pdev; 1286 u32 master_ctrl_data = 0; 1287 1288 AT_WRITE_REG(hw, REG_IMR, 0); 1289 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT); 1290 1291 atl1c_stop_mac(hw); 1292 /* 1293 * Issue Soft Reset to the MAC. This will reset the chip's 1294 * transmit, receive, DMA. It will not effect 1295 * the current PCI configuration. The global reset bit is self- 1296 * clearing, and should clear within a microsecond. 1297 */ 1298 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1299 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF; 1300 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST) 1301 & 0xFFFF)); 1302 1303 AT_WRITE_FLUSH(hw); 1304 msleep(10); 1305 /* Wait at least 10ms for All module to be Idle */ 1306 1307 if (atl1c_wait_until_idle(hw)) { 1308 dev_err(&pdev->dev, 1309 "MAC state machine can't be idle since" 1310 " disabled for 10ms second\n"); 1311 return -1; 1312 } 1313 return 0; 1314 } 1315 1316 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1317 { 1318 u32 pm_ctrl_data; 1319 1320 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1321 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1322 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1323 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; 1324 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1325 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1326 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK; 1327 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; 1328 1329 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN; 1330 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; 1331 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; 1332 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1333 } 1334 1335 /* 1336 * Set ASPM state. 1337 * Enable/disable L0s/L1 depend on link state. 1338 */ 1339 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) 1340 { 1341 u32 pm_ctrl_data; 1342 u32 link_ctrl_data; 1343 u32 link_l1_timer = 0xF; 1344 1345 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1346 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 1347 1348 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; 1349 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1350 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1351 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK << 1352 PM_CTRL_LCKDET_TIMER_SHIFT); 1353 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT; 1354 1355 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1356 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1357 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC; 1358 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) { 1359 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) 1360 link_ctrl_data |= LINK_CTRL_EXT_SYNC; 1361 } 1362 1363 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data); 1364 1365 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER; 1366 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK << 1367 PM_CTRL_PM_REQ_TIMER_SHIFT); 1368 pm_ctrl_data |= AT_ASPM_L1_TIMER << 1369 PM_CTRL_PM_REQ_TIMER_SHIFT; 1370 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN; 1371 pm_ctrl_data &= ~PM_CTRL_HOTRST; 1372 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT; 1373 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1; 1374 } 1375 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK; 1376 if (linkup) { 1377 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1378 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1379 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1380 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN; 1381 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) 1382 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN; 1383 1384 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1385 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1386 if (hw->nic_type == athr_l2c_b) 1387 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) 1388 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1389 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; 1390 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; 1391 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN; 1392 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1393 if (hw->adapter->link_speed == SPEED_100 || 1394 hw->adapter->link_speed == SPEED_1000) { 1395 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << 1396 PM_CTRL_L1_ENTRY_TIMER_SHIFT); 1397 if (hw->nic_type == athr_l2c_b) 1398 link_l1_timer = 7; 1399 else if (hw->nic_type == athr_l2c_b2 || 1400 hw->nic_type == athr_l1d_2) 1401 link_l1_timer = 4; 1402 pm_ctrl_data |= link_l1_timer << 1403 PM_CTRL_L1_ENTRY_TIMER_SHIFT; 1404 } 1405 } else { 1406 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; 1407 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; 1408 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN; 1409 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; 1410 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1411 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1412 1413 } 1414 } else { 1415 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; 1416 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1417 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; 1418 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1419 1420 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1421 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN; 1422 else 1423 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; 1424 } 1425 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1426 1427 return; 1428 } 1429 1430 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter) 1431 { 1432 struct atl1c_hw *hw = &adapter->hw; 1433 struct net_device *netdev = adapter->netdev; 1434 u32 mac_ctrl_data; 1435 1436 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN; 1437 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1438 1439 if (adapter->link_duplex == FULL_DUPLEX) { 1440 hw->mac_duplex = true; 1441 mac_ctrl_data |= MAC_CTRL_DUPLX; 1442 } 1443 1444 if (adapter->link_speed == SPEED_1000) 1445 hw->mac_speed = atl1c_mac_speed_1000; 1446 else 1447 hw->mac_speed = atl1c_mac_speed_10_100; 1448 1449 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) << 1450 MAC_CTRL_SPEED_SHIFT; 1451 1452 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1453 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) << 1454 MAC_CTRL_PRMLEN_SHIFT); 1455 1456 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data); 1457 1458 mac_ctrl_data |= MAC_CTRL_BC_EN; 1459 if (netdev->flags & IFF_PROMISC) 1460 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 1461 if (netdev->flags & IFF_ALLMULTI) 1462 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 1463 1464 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN; 1465 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 || 1466 hw->nic_type == athr_l1d_2) { 1467 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW; 1468 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32; 1469 } 1470 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 1471 } 1472 1473 /* 1474 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1475 * @adapter: board private structure 1476 * 1477 * Configure the Tx /Rx unit of the MAC after a reset. 1478 */ 1479 static int atl1c_configure(struct atl1c_adapter *adapter) 1480 { 1481 struct atl1c_hw *hw = &adapter->hw; 1482 u32 master_ctrl_data = 0; 1483 u32 intr_modrt_data; 1484 u32 data; 1485 1486 /* clear interrupt status */ 1487 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1488 /* Clear any WOL status */ 1489 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1490 /* set Interrupt Clear Timer 1491 * HW will enable self to assert interrupt event to system after 1492 * waiting x-time for software to notify it accept interrupt. 1493 */ 1494 1495 data = CLK_GATING_EN_ALL; 1496 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1497 if (hw->nic_type == athr_l2c_b) 1498 data &= ~CLK_GATING_RXMAC_EN; 1499 } else 1500 data = 0; 1501 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1502 1503 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1504 hw->ict & INT_RETRIG_TIMER_MASK); 1505 1506 atl1c_configure_des_ring(adapter); 1507 1508 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1509 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1510 IRQ_MODRT_TX_TIMER_SHIFT; 1511 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1512 IRQ_MODRT_RX_TIMER_SHIFT; 1513 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1514 master_ctrl_data |= 1515 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1516 } 1517 1518 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1519 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1520 1521 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1522 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1523 1524 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) { 1525 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH, 1526 hw->cmb_tpd & CMB_TPD_THRESH_MASK); 1527 AT_WRITE_REG(hw, REG_CMB_TX_TIMER, 1528 hw->cmb_tx_timer & CMB_TX_TIMER_MASK); 1529 } 1530 1531 if (hw->ctrl_flags & ATL1C_SMB_ENABLE) 1532 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1533 hw->smb_timer & SMB_STAT_TIMER_MASK); 1534 /* set MTU */ 1535 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1536 VLAN_HLEN + ETH_FCS_LEN); 1537 /* HDS, disable */ 1538 AT_WRITE_REG(hw, REG_HDS_CTRL, 0); 1539 1540 atl1c_configure_tx(adapter); 1541 atl1c_configure_rx(adapter); 1542 atl1c_configure_rss(adapter); 1543 atl1c_configure_dma(adapter); 1544 1545 return 0; 1546 } 1547 1548 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1549 { 1550 u16 hw_reg_addr = 0; 1551 unsigned long *stats_item = NULL; 1552 u32 data; 1553 1554 /* update rx status */ 1555 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1556 stats_item = &adapter->hw_stats.rx_ok; 1557 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1558 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1559 *stats_item += data; 1560 stats_item++; 1561 hw_reg_addr += 4; 1562 } 1563 /* update tx status */ 1564 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1565 stats_item = &adapter->hw_stats.tx_ok; 1566 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1567 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1568 *stats_item += data; 1569 stats_item++; 1570 hw_reg_addr += 4; 1571 } 1572 } 1573 1574 /* 1575 * atl1c_get_stats - Get System Network Statistics 1576 * @netdev: network interface device structure 1577 * 1578 * Returns the address of the device statistics structure. 1579 * The statistics are actually updated from the timer callback. 1580 */ 1581 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1582 { 1583 struct atl1c_adapter *adapter = netdev_priv(netdev); 1584 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1585 struct net_device_stats *net_stats = &netdev->stats; 1586 1587 atl1c_update_hw_stats(adapter); 1588 net_stats->rx_packets = hw_stats->rx_ok; 1589 net_stats->tx_packets = hw_stats->tx_ok; 1590 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1591 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1592 net_stats->multicast = hw_stats->rx_mcast; 1593 net_stats->collisions = hw_stats->tx_1_col + 1594 hw_stats->tx_2_col * 2 + 1595 hw_stats->tx_late_col + hw_stats->tx_abort_col; 1596 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err + 1597 hw_stats->rx_len_err + hw_stats->rx_sz_ov + 1598 hw_stats->rx_rrd_ov + hw_stats->rx_align_err; 1599 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1600 net_stats->rx_length_errors = hw_stats->rx_len_err; 1601 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1602 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1603 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1604 1605 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1606 1607 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col + 1608 hw_stats->tx_underrun + hw_stats->tx_trunc; 1609 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1610 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1611 net_stats->tx_window_errors = hw_stats->tx_late_col; 1612 1613 return net_stats; 1614 } 1615 1616 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1617 { 1618 u16 phy_data; 1619 1620 spin_lock(&adapter->mdio_lock); 1621 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1622 spin_unlock(&adapter->mdio_lock); 1623 } 1624 1625 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1626 enum atl1c_trans_queue type) 1627 { 1628 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1629 &adapter->tpd_ring[type]; 1630 struct atl1c_buffer *buffer_info; 1631 struct pci_dev *pdev = adapter->pdev; 1632 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1633 u16 hw_next_to_clean; 1634 u16 shift; 1635 u32 data; 1636 1637 if (type == atl1c_trans_high) 1638 shift = MB_HTPD_CONS_IDX_SHIFT; 1639 else 1640 shift = MB_NTPD_CONS_IDX_SHIFT; 1641 1642 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data); 1643 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK; 1644 1645 while (next_to_clean != hw_next_to_clean) { 1646 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1647 atl1c_clean_buffer(pdev, buffer_info, 1); 1648 if (++next_to_clean == tpd_ring->count) 1649 next_to_clean = 0; 1650 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1651 } 1652 1653 if (netif_queue_stopped(adapter->netdev) && 1654 netif_carrier_ok(adapter->netdev)) { 1655 netif_wake_queue(adapter->netdev); 1656 } 1657 1658 return true; 1659 } 1660 1661 /* 1662 * atl1c_intr - Interrupt Handler 1663 * @irq: interrupt number 1664 * @data: pointer to a network interface device structure 1665 * @pt_regs: CPU registers structure 1666 */ 1667 static irqreturn_t atl1c_intr(int irq, void *data) 1668 { 1669 struct net_device *netdev = data; 1670 struct atl1c_adapter *adapter = netdev_priv(netdev); 1671 struct pci_dev *pdev = adapter->pdev; 1672 struct atl1c_hw *hw = &adapter->hw; 1673 int max_ints = AT_MAX_INT_WORK; 1674 int handled = IRQ_NONE; 1675 u32 status; 1676 u32 reg_data; 1677 1678 do { 1679 AT_READ_REG(hw, REG_ISR, ®_data); 1680 status = reg_data & hw->intr_mask; 1681 1682 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1683 if (max_ints != AT_MAX_INT_WORK) 1684 handled = IRQ_HANDLED; 1685 break; 1686 } 1687 /* link event */ 1688 if (status & ISR_GPHY) 1689 atl1c_clear_phy_int(adapter); 1690 /* Ack ISR */ 1691 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1692 if (status & ISR_RX_PKT) { 1693 if (likely(napi_schedule_prep(&adapter->napi))) { 1694 hw->intr_mask &= ~ISR_RX_PKT; 1695 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1696 __napi_schedule(&adapter->napi); 1697 } 1698 } 1699 if (status & ISR_TX_PKT) 1700 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1701 1702 handled = IRQ_HANDLED; 1703 /* check if PCIE PHY Link down */ 1704 if (status & ISR_ERROR) { 1705 if (netif_msg_hw(adapter)) 1706 dev_err(&pdev->dev, 1707 "atl1c hardware error (status = 0x%x)\n", 1708 status & ISR_ERROR); 1709 /* reset MAC */ 1710 adapter->work_event |= ATL1C_WORK_EVENT_RESET; 1711 schedule_work(&adapter->common_task); 1712 return IRQ_HANDLED; 1713 } 1714 1715 if (status & ISR_OVER) 1716 if (netif_msg_intr(adapter)) 1717 dev_warn(&pdev->dev, 1718 "TX/RX overflow (status = 0x%x)\n", 1719 status & ISR_OVER); 1720 1721 /* link event */ 1722 if (status & (ISR_GPHY | ISR_MANUAL)) { 1723 netdev->stats.tx_carrier_errors++; 1724 atl1c_link_chg_event(adapter); 1725 break; 1726 } 1727 1728 } while (--max_ints > 0); 1729 /* re-enable Interrupt*/ 1730 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1731 return handled; 1732 } 1733 1734 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1735 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1736 { 1737 /* 1738 * The pid field in RRS in not correct sometimes, so we 1739 * cannot figure out if the packet is fragmented or not, 1740 * so we tell the KERNEL CHECKSUM_NONE 1741 */ 1742 skb_checksum_none_assert(skb); 1743 } 1744 1745 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid) 1746 { 1747 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid]; 1748 struct pci_dev *pdev = adapter->pdev; 1749 struct atl1c_buffer *buffer_info, *next_info; 1750 struct sk_buff *skb; 1751 void *vir_addr = NULL; 1752 u16 num_alloc = 0; 1753 u16 rfd_next_to_use, next_next; 1754 struct atl1c_rx_free_desc *rfd_desc; 1755 1756 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1757 if (++next_next == rfd_ring->count) 1758 next_next = 0; 1759 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1760 next_info = &rfd_ring->buffer_info[next_next]; 1761 1762 while (next_info->flags & ATL1C_BUFFER_FREE) { 1763 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1764 1765 skb = dev_alloc_skb(adapter->rx_buffer_len); 1766 if (unlikely(!skb)) { 1767 if (netif_msg_rx_err(adapter)) 1768 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1769 break; 1770 } 1771 1772 /* 1773 * Make buffer alignment 2 beyond a 16 byte boundary 1774 * this will result in a 16 byte aligned IP header after 1775 * the 14 byte MAC header is removed 1776 */ 1777 vir_addr = skb->data; 1778 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1779 buffer_info->skb = skb; 1780 buffer_info->length = adapter->rx_buffer_len; 1781 buffer_info->dma = pci_map_single(pdev, vir_addr, 1782 buffer_info->length, 1783 PCI_DMA_FROMDEVICE); 1784 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1785 ATL1C_PCIMAP_FROMDEVICE); 1786 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1787 rfd_next_to_use = next_next; 1788 if (++next_next == rfd_ring->count) 1789 next_next = 0; 1790 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1791 next_info = &rfd_ring->buffer_info[next_next]; 1792 num_alloc++; 1793 } 1794 1795 if (num_alloc) { 1796 /* TODO: update mailbox here */ 1797 wmb(); 1798 rfd_ring->next_to_use = rfd_next_to_use; 1799 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid], 1800 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1801 } 1802 1803 return num_alloc; 1804 } 1805 1806 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1807 struct atl1c_recv_ret_status *rrs, u16 num) 1808 { 1809 u16 i; 1810 /* the relationship between rrd and rfd is one map one */ 1811 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1812 rrd_ring->next_to_clean)) { 1813 rrs->word3 &= ~RRS_RXD_UPDATED; 1814 if (++rrd_ring->next_to_clean == rrd_ring->count) 1815 rrd_ring->next_to_clean = 0; 1816 } 1817 } 1818 1819 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1820 struct atl1c_recv_ret_status *rrs, u16 num) 1821 { 1822 u16 i; 1823 u16 rfd_index; 1824 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1825 1826 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1827 RRS_RX_RFD_INDEX_MASK; 1828 for (i = 0; i < num; i++) { 1829 buffer_info[rfd_index].skb = NULL; 1830 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1831 ATL1C_BUFFER_FREE); 1832 if (++rfd_index == rfd_ring->count) 1833 rfd_index = 0; 1834 } 1835 rfd_ring->next_to_clean = rfd_index; 1836 } 1837 1838 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, 1839 int *work_done, int work_to_do) 1840 { 1841 u16 rfd_num, rfd_index; 1842 u16 count = 0; 1843 u16 length; 1844 struct pci_dev *pdev = adapter->pdev; 1845 struct net_device *netdev = adapter->netdev; 1846 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que]; 1847 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que]; 1848 struct sk_buff *skb; 1849 struct atl1c_recv_ret_status *rrs; 1850 struct atl1c_buffer *buffer_info; 1851 1852 while (1) { 1853 if (*work_done >= work_to_do) 1854 break; 1855 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1856 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1857 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1858 RRS_RX_RFD_CNT_MASK; 1859 if (unlikely(rfd_num != 1)) 1860 /* TODO support mul rfd*/ 1861 if (netif_msg_rx_err(adapter)) 1862 dev_warn(&pdev->dev, 1863 "Multi rfd not support yet!\n"); 1864 goto rrs_checked; 1865 } else { 1866 break; 1867 } 1868 rrs_checked: 1869 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1870 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1871 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1872 if (netif_msg_rx_err(adapter)) 1873 dev_warn(&pdev->dev, 1874 "wrong packet! rrs word3 is %x\n", 1875 rrs->word3); 1876 continue; 1877 } 1878 1879 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1880 RRS_PKT_SIZE_MASK); 1881 /* Good Receive */ 1882 if (likely(rfd_num == 1)) { 1883 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1884 RRS_RX_RFD_INDEX_MASK; 1885 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1886 pci_unmap_single(pdev, buffer_info->dma, 1887 buffer_info->length, PCI_DMA_FROMDEVICE); 1888 skb = buffer_info->skb; 1889 } else { 1890 /* TODO */ 1891 if (netif_msg_rx_err(adapter)) 1892 dev_warn(&pdev->dev, 1893 "Multi rfd not support yet!\n"); 1894 break; 1895 } 1896 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1897 skb_put(skb, length - ETH_FCS_LEN); 1898 skb->protocol = eth_type_trans(skb, netdev); 1899 atl1c_rx_checksum(adapter, skb, rrs); 1900 if (rrs->word3 & RRS_VLAN_INS) { 1901 u16 vlan; 1902 1903 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1904 vlan = le16_to_cpu(vlan); 1905 __vlan_hwaccel_put_tag(skb, vlan); 1906 } 1907 netif_receive_skb(skb); 1908 1909 (*work_done)++; 1910 count++; 1911 } 1912 if (count) 1913 atl1c_alloc_rx_buffer(adapter, que); 1914 } 1915 1916 /* 1917 * atl1c_clean - NAPI Rx polling callback 1918 * @adapter: board private structure 1919 */ 1920 static int atl1c_clean(struct napi_struct *napi, int budget) 1921 { 1922 struct atl1c_adapter *adapter = 1923 container_of(napi, struct atl1c_adapter, napi); 1924 int work_done = 0; 1925 1926 /* Keep link state information with original netdev */ 1927 if (!netif_carrier_ok(adapter->netdev)) 1928 goto quit_polling; 1929 /* just enable one RXQ */ 1930 atl1c_clean_rx_irq(adapter, 0, &work_done, budget); 1931 1932 if (work_done < budget) { 1933 quit_polling: 1934 napi_complete(napi); 1935 adapter->hw.intr_mask |= ISR_RX_PKT; 1936 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1937 } 1938 return work_done; 1939 } 1940 1941 #ifdef CONFIG_NET_POLL_CONTROLLER 1942 1943 /* 1944 * Polling 'interrupt' - used by things like netconsole to send skbs 1945 * without having to re-enable interrupts. It's not called while 1946 * the interrupt routine is executing. 1947 */ 1948 static void atl1c_netpoll(struct net_device *netdev) 1949 { 1950 struct atl1c_adapter *adapter = netdev_priv(netdev); 1951 1952 disable_irq(adapter->pdev->irq); 1953 atl1c_intr(adapter->pdev->irq, netdev); 1954 enable_irq(adapter->pdev->irq); 1955 } 1956 #endif 1957 1958 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1959 { 1960 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1961 u16 next_to_use = 0; 1962 u16 next_to_clean = 0; 1963 1964 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1965 next_to_use = tpd_ring->next_to_use; 1966 1967 return (u16)(next_to_clean > next_to_use) ? 1968 (next_to_clean - next_to_use - 1) : 1969 (tpd_ring->count + next_to_clean - next_to_use - 1); 1970 } 1971 1972 /* 1973 * get next usable tpd 1974 * Note: should call atl1c_tdp_avail to make sure 1975 * there is enough tpd to use 1976 */ 1977 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1978 enum atl1c_trans_queue type) 1979 { 1980 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1981 struct atl1c_tpd_desc *tpd_desc; 1982 u16 next_to_use = 0; 1983 1984 next_to_use = tpd_ring->next_to_use; 1985 if (++tpd_ring->next_to_use == tpd_ring->count) 1986 tpd_ring->next_to_use = 0; 1987 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1988 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1989 return tpd_desc; 1990 } 1991 1992 static struct atl1c_buffer * 1993 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1994 { 1995 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1996 1997 return &tpd_ring->buffer_info[tpd - 1998 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1999 } 2000 2001 /* Calculate the transmit packet descript needed*/ 2002 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 2003 { 2004 u16 tpd_req; 2005 u16 proto_hdr_len = 0; 2006 2007 tpd_req = skb_shinfo(skb)->nr_frags + 1; 2008 2009 if (skb_is_gso(skb)) { 2010 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2011 if (proto_hdr_len < skb_headlen(skb)) 2012 tpd_req++; 2013 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 2014 tpd_req++; 2015 } 2016 return tpd_req; 2017 } 2018 2019 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 2020 struct sk_buff *skb, 2021 struct atl1c_tpd_desc **tpd, 2022 enum atl1c_trans_queue type) 2023 { 2024 struct pci_dev *pdev = adapter->pdev; 2025 u8 hdr_len; 2026 u32 real_len; 2027 unsigned short offload_type; 2028 int err; 2029 2030 if (skb_is_gso(skb)) { 2031 if (skb_header_cloned(skb)) { 2032 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 2033 if (unlikely(err)) 2034 return -1; 2035 } 2036 offload_type = skb_shinfo(skb)->gso_type; 2037 2038 if (offload_type & SKB_GSO_TCPV4) { 2039 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 2040 + ntohs(ip_hdr(skb)->tot_len)); 2041 2042 if (real_len < skb->len) 2043 pskb_trim(skb, real_len); 2044 2045 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2046 if (unlikely(skb->len == hdr_len)) { 2047 /* only xsum need */ 2048 if (netif_msg_tx_queued(adapter)) 2049 dev_warn(&pdev->dev, 2050 "IPV4 tso with zero data??\n"); 2051 goto check_sum; 2052 } else { 2053 ip_hdr(skb)->check = 0; 2054 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 2055 ip_hdr(skb)->saddr, 2056 ip_hdr(skb)->daddr, 2057 0, IPPROTO_TCP, 0); 2058 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 2059 } 2060 } 2061 2062 if (offload_type & SKB_GSO_TCPV6) { 2063 struct atl1c_tpd_ext_desc *etpd = 2064 *(struct atl1c_tpd_ext_desc **)(tpd); 2065 2066 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 2067 *tpd = atl1c_get_tpd(adapter, type); 2068 ipv6_hdr(skb)->payload_len = 0; 2069 /* check payload == 0 byte ? */ 2070 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 2071 if (unlikely(skb->len == hdr_len)) { 2072 /* only xsum need */ 2073 if (netif_msg_tx_queued(adapter)) 2074 dev_warn(&pdev->dev, 2075 "IPV6 tso with zero data??\n"); 2076 goto check_sum; 2077 } else 2078 tcp_hdr(skb)->check = ~csum_ipv6_magic( 2079 &ipv6_hdr(skb)->saddr, 2080 &ipv6_hdr(skb)->daddr, 2081 0, IPPROTO_TCP, 0); 2082 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 2083 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 2084 etpd->pkt_len = cpu_to_le32(skb->len); 2085 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 2086 } 2087 2088 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 2089 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 2090 TPD_TCPHDR_OFFSET_SHIFT; 2091 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 2092 TPD_MSS_SHIFT; 2093 return 0; 2094 } 2095 2096 check_sum: 2097 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 2098 u8 css, cso; 2099 cso = skb_checksum_start_offset(skb); 2100 2101 if (unlikely(cso & 0x1)) { 2102 if (netif_msg_tx_err(adapter)) 2103 dev_err(&adapter->pdev->dev, 2104 "payload offset should not an event number\n"); 2105 return -1; 2106 } else { 2107 css = cso + skb->csum_offset; 2108 2109 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 2110 TPD_PLOADOFFSET_SHIFT; 2111 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 2112 TPD_CCSUM_OFFSET_SHIFT; 2113 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 2114 } 2115 } 2116 return 0; 2117 } 2118 2119 static void atl1c_tx_map(struct atl1c_adapter *adapter, 2120 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 2121 enum atl1c_trans_queue type) 2122 { 2123 struct atl1c_tpd_desc *use_tpd = NULL; 2124 struct atl1c_buffer *buffer_info = NULL; 2125 u16 buf_len = skb_headlen(skb); 2126 u16 map_len = 0; 2127 u16 mapped_len = 0; 2128 u16 hdr_len = 0; 2129 u16 nr_frags; 2130 u16 f; 2131 int tso; 2132 2133 nr_frags = skb_shinfo(skb)->nr_frags; 2134 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 2135 if (tso) { 2136 /* TSO */ 2137 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2138 use_tpd = tpd; 2139 2140 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2141 buffer_info->length = map_len; 2142 buffer_info->dma = pci_map_single(adapter->pdev, 2143 skb->data, hdr_len, PCI_DMA_TODEVICE); 2144 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2145 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2146 ATL1C_PCIMAP_TODEVICE); 2147 mapped_len += map_len; 2148 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2149 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2150 } 2151 2152 if (mapped_len < buf_len) { 2153 /* mapped_len == 0, means we should use the first tpd, 2154 which is given by caller */ 2155 if (mapped_len == 0) 2156 use_tpd = tpd; 2157 else { 2158 use_tpd = atl1c_get_tpd(adapter, type); 2159 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2160 } 2161 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2162 buffer_info->length = buf_len - mapped_len; 2163 buffer_info->dma = 2164 pci_map_single(adapter->pdev, skb->data + mapped_len, 2165 buffer_info->length, PCI_DMA_TODEVICE); 2166 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2167 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2168 ATL1C_PCIMAP_TODEVICE); 2169 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2170 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2171 } 2172 2173 for (f = 0; f < nr_frags; f++) { 2174 struct skb_frag_struct *frag; 2175 2176 frag = &skb_shinfo(skb)->frags[f]; 2177 2178 use_tpd = atl1c_get_tpd(adapter, type); 2179 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2180 2181 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2182 buffer_info->length = skb_frag_size(frag); 2183 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2184 frag, 0, 2185 buffer_info->length, 2186 DMA_TO_DEVICE); 2187 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2188 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2189 ATL1C_PCIMAP_TODEVICE); 2190 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2191 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2192 } 2193 2194 /* The last tpd */ 2195 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2196 /* The last buffer info contain the skb address, 2197 so it will be free after unmap */ 2198 buffer_info->skb = skb; 2199 } 2200 2201 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2202 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2203 { 2204 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2205 u32 prod_data; 2206 2207 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data); 2208 switch (type) { 2209 case atl1c_trans_high: 2210 prod_data &= 0xFFFF0000; 2211 prod_data |= tpd_ring->next_to_use & 0xFFFF; 2212 break; 2213 case atl1c_trans_normal: 2214 prod_data &= 0x0000FFFF; 2215 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16; 2216 break; 2217 default: 2218 break; 2219 } 2220 wmb(); 2221 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data); 2222 } 2223 2224 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2225 struct net_device *netdev) 2226 { 2227 struct atl1c_adapter *adapter = netdev_priv(netdev); 2228 unsigned long flags; 2229 u16 tpd_req = 1; 2230 struct atl1c_tpd_desc *tpd; 2231 enum atl1c_trans_queue type = atl1c_trans_normal; 2232 2233 if (test_bit(__AT_DOWN, &adapter->flags)) { 2234 dev_kfree_skb_any(skb); 2235 return NETDEV_TX_OK; 2236 } 2237 2238 tpd_req = atl1c_cal_tpd_req(skb); 2239 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { 2240 if (netif_msg_pktdata(adapter)) 2241 dev_info(&adapter->pdev->dev, "tx locked\n"); 2242 return NETDEV_TX_LOCKED; 2243 } 2244 if (skb->mark == 0x01) 2245 type = atl1c_trans_high; 2246 else 2247 type = atl1c_trans_normal; 2248 2249 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2250 /* no enough descriptor, just stop queue */ 2251 netif_stop_queue(netdev); 2252 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2253 return NETDEV_TX_BUSY; 2254 } 2255 2256 tpd = atl1c_get_tpd(adapter, type); 2257 2258 /* do TSO and check sum */ 2259 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2260 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2261 dev_kfree_skb_any(skb); 2262 return NETDEV_TX_OK; 2263 } 2264 2265 if (unlikely(vlan_tx_tag_present(skb))) { 2266 u16 vlan = vlan_tx_tag_get(skb); 2267 __le16 tag; 2268 2269 vlan = cpu_to_le16(vlan); 2270 AT_VLAN_TO_TAG(vlan, tag); 2271 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2272 tpd->vlan_tag = tag; 2273 } 2274 2275 if (skb_network_offset(skb) != ETH_HLEN) 2276 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2277 2278 atl1c_tx_map(adapter, skb, tpd, type); 2279 atl1c_tx_queue(adapter, skb, tpd, type); 2280 2281 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2282 return NETDEV_TX_OK; 2283 } 2284 2285 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2286 { 2287 struct net_device *netdev = adapter->netdev; 2288 2289 free_irq(adapter->pdev->irq, netdev); 2290 2291 if (adapter->have_msi) 2292 pci_disable_msi(adapter->pdev); 2293 } 2294 2295 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2296 { 2297 struct pci_dev *pdev = adapter->pdev; 2298 struct net_device *netdev = adapter->netdev; 2299 int flags = 0; 2300 int err = 0; 2301 2302 adapter->have_msi = true; 2303 err = pci_enable_msi(adapter->pdev); 2304 if (err) { 2305 if (netif_msg_ifup(adapter)) 2306 dev_err(&pdev->dev, 2307 "Unable to allocate MSI interrupt Error: %d\n", 2308 err); 2309 adapter->have_msi = false; 2310 } else 2311 netdev->irq = pdev->irq; 2312 2313 if (!adapter->have_msi) 2314 flags |= IRQF_SHARED; 2315 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2316 netdev->name, netdev); 2317 if (err) { 2318 if (netif_msg_ifup(adapter)) 2319 dev_err(&pdev->dev, 2320 "Unable to allocate interrupt Error: %d\n", 2321 err); 2322 if (adapter->have_msi) 2323 pci_disable_msi(adapter->pdev); 2324 return err; 2325 } 2326 if (netif_msg_ifup(adapter)) 2327 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2328 return err; 2329 } 2330 2331 static int atl1c_up(struct atl1c_adapter *adapter) 2332 { 2333 struct net_device *netdev = adapter->netdev; 2334 int num; 2335 int err; 2336 int i; 2337 2338 netif_carrier_off(netdev); 2339 atl1c_init_ring_ptrs(adapter); 2340 atl1c_set_multi(netdev); 2341 atl1c_restore_vlan(adapter); 2342 2343 for (i = 0; i < adapter->num_rx_queues; i++) { 2344 num = atl1c_alloc_rx_buffer(adapter, i); 2345 if (unlikely(num == 0)) { 2346 err = -ENOMEM; 2347 goto err_alloc_rx; 2348 } 2349 } 2350 2351 if (atl1c_configure(adapter)) { 2352 err = -EIO; 2353 goto err_up; 2354 } 2355 2356 err = atl1c_request_irq(adapter); 2357 if (unlikely(err)) 2358 goto err_up; 2359 2360 clear_bit(__AT_DOWN, &adapter->flags); 2361 napi_enable(&adapter->napi); 2362 atl1c_irq_enable(adapter); 2363 atl1c_check_link_status(adapter); 2364 netif_start_queue(netdev); 2365 return err; 2366 2367 err_up: 2368 err_alloc_rx: 2369 atl1c_clean_rx_ring(adapter); 2370 return err; 2371 } 2372 2373 static void atl1c_down(struct atl1c_adapter *adapter) 2374 { 2375 struct net_device *netdev = adapter->netdev; 2376 2377 atl1c_del_timer(adapter); 2378 adapter->work_event = 0; /* clear all event */ 2379 /* signal that we're down so the interrupt handler does not 2380 * reschedule our watchdog timer */ 2381 set_bit(__AT_DOWN, &adapter->flags); 2382 netif_carrier_off(netdev); 2383 napi_disable(&adapter->napi); 2384 atl1c_irq_disable(adapter); 2385 atl1c_free_irq(adapter); 2386 /* reset MAC to disable all RX/TX */ 2387 atl1c_reset_mac(&adapter->hw); 2388 msleep(1); 2389 2390 adapter->link_speed = SPEED_0; 2391 adapter->link_duplex = -1; 2392 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2393 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2394 atl1c_clean_rx_ring(adapter); 2395 } 2396 2397 /* 2398 * atl1c_open - Called when a network interface is made active 2399 * @netdev: network interface device structure 2400 * 2401 * Returns 0 on success, negative value on failure 2402 * 2403 * The open entry point is called when a network interface is made 2404 * active by the system (IFF_UP). At this point all resources needed 2405 * for transmit and receive operations are allocated, the interrupt 2406 * handler is registered with the OS, the watchdog timer is started, 2407 * and the stack is notified that the interface is ready. 2408 */ 2409 static int atl1c_open(struct net_device *netdev) 2410 { 2411 struct atl1c_adapter *adapter = netdev_priv(netdev); 2412 int err; 2413 2414 /* disallow open during test */ 2415 if (test_bit(__AT_TESTING, &adapter->flags)) 2416 return -EBUSY; 2417 2418 /* allocate rx/tx dma buffer & descriptors */ 2419 err = atl1c_setup_ring_resources(adapter); 2420 if (unlikely(err)) 2421 return err; 2422 2423 err = atl1c_up(adapter); 2424 if (unlikely(err)) 2425 goto err_up; 2426 2427 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { 2428 u32 phy_data; 2429 2430 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data); 2431 phy_data |= MDIO_AP_EN; 2432 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data); 2433 } 2434 return 0; 2435 2436 err_up: 2437 atl1c_free_irq(adapter); 2438 atl1c_free_ring_resources(adapter); 2439 atl1c_reset_mac(&adapter->hw); 2440 return err; 2441 } 2442 2443 /* 2444 * atl1c_close - Disables a network interface 2445 * @netdev: network interface device structure 2446 * 2447 * Returns 0, this is not allowed to fail 2448 * 2449 * The close entry point is called when an interface is de-activated 2450 * by the OS. The hardware is still under the drivers control, but 2451 * needs to be disabled. A global MAC reset is issued to stop the 2452 * hardware, and all transmit and receive resources are freed. 2453 */ 2454 static int atl1c_close(struct net_device *netdev) 2455 { 2456 struct atl1c_adapter *adapter = netdev_priv(netdev); 2457 2458 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2459 atl1c_down(adapter); 2460 atl1c_free_ring_resources(adapter); 2461 return 0; 2462 } 2463 2464 static int atl1c_suspend(struct device *dev) 2465 { 2466 struct pci_dev *pdev = to_pci_dev(dev); 2467 struct net_device *netdev = pci_get_drvdata(pdev); 2468 struct atl1c_adapter *adapter = netdev_priv(netdev); 2469 struct atl1c_hw *hw = &adapter->hw; 2470 u32 mac_ctrl_data = 0; 2471 u32 master_ctrl_data = 0; 2472 u32 wol_ctrl_data = 0; 2473 u16 mii_intr_status_data = 0; 2474 u32 wufc = adapter->wol; 2475 2476 atl1c_disable_l0s_l1(hw); 2477 if (netif_running(netdev)) { 2478 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2479 atl1c_down(adapter); 2480 } 2481 netif_device_detach(netdev); 2482 2483 if (wufc) 2484 if (atl1c_phy_power_saving(hw) != 0) 2485 dev_dbg(&pdev->dev, "phy power saving failed"); 2486 2487 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 2488 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 2489 2490 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS; 2491 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT); 2492 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2493 MAC_CTRL_PRMLEN_MASK) << 2494 MAC_CTRL_PRMLEN_SHIFT); 2495 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT); 2496 mac_ctrl_data &= ~MAC_CTRL_DUPLX; 2497 2498 if (wufc) { 2499 mac_ctrl_data |= MAC_CTRL_RX_EN; 2500 if (adapter->link_speed == SPEED_1000 || 2501 adapter->link_speed == SPEED_0) { 2502 mac_ctrl_data |= atl1c_mac_speed_1000 << 2503 MAC_CTRL_SPEED_SHIFT; 2504 mac_ctrl_data |= MAC_CTRL_DUPLX; 2505 } else 2506 mac_ctrl_data |= atl1c_mac_speed_10_100 << 2507 MAC_CTRL_SPEED_SHIFT; 2508 2509 if (adapter->link_duplex == DUPLEX_FULL) 2510 mac_ctrl_data |= MAC_CTRL_DUPLX; 2511 2512 /* turn on magic packet wol */ 2513 if (wufc & AT_WUFC_MAG) 2514 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2515 2516 if (wufc & AT_WUFC_LNKC) { 2517 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2518 /* only link up can wake up */ 2519 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) { 2520 dev_dbg(&pdev->dev, "%s: read write phy " 2521 "register failed.\n", 2522 atl1c_driver_name); 2523 } 2524 } 2525 /* clear phy interrupt */ 2526 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data); 2527 /* Config MAC Ctrl register */ 2528 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data); 2529 2530 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2531 if (wufc & AT_WUFC_MAG) 2532 mac_ctrl_data |= MAC_CTRL_BC_EN; 2533 2534 dev_dbg(&pdev->dev, 2535 "%s: suspend MAC=0x%x\n", 2536 atl1c_driver_name, mac_ctrl_data); 2537 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 2538 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2539 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2540 2541 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT | 2542 GPHY_CTRL_EXT_RESET); 2543 } else { 2544 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING); 2545 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS; 2546 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT; 2547 mac_ctrl_data |= MAC_CTRL_DUPLX; 2548 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 2549 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2550 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2551 hw->phy_configured = false; /* re-init PHY when resume */ 2552 } 2553 2554 return 0; 2555 } 2556 2557 #ifdef CONFIG_PM_SLEEP 2558 static int atl1c_resume(struct device *dev) 2559 { 2560 struct pci_dev *pdev = to_pci_dev(dev); 2561 struct net_device *netdev = pci_get_drvdata(pdev); 2562 struct atl1c_adapter *adapter = netdev_priv(netdev); 2563 2564 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2565 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | 2566 ATL1C_PCIE_PHY_RESET); 2567 2568 atl1c_phy_reset(&adapter->hw); 2569 atl1c_reset_mac(&adapter->hw); 2570 atl1c_phy_init(&adapter->hw); 2571 2572 #if 0 2573 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2574 pm_data &= ~PM_CTRLSTAT_PME_EN; 2575 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2576 #endif 2577 2578 netif_device_attach(netdev); 2579 if (netif_running(netdev)) 2580 atl1c_up(adapter); 2581 2582 return 0; 2583 } 2584 #endif 2585 2586 static void atl1c_shutdown(struct pci_dev *pdev) 2587 { 2588 struct net_device *netdev = pci_get_drvdata(pdev); 2589 struct atl1c_adapter *adapter = netdev_priv(netdev); 2590 2591 atl1c_suspend(&pdev->dev); 2592 pci_wake_from_d3(pdev, adapter->wol); 2593 pci_set_power_state(pdev, PCI_D3hot); 2594 } 2595 2596 static const struct net_device_ops atl1c_netdev_ops = { 2597 .ndo_open = atl1c_open, 2598 .ndo_stop = atl1c_close, 2599 .ndo_validate_addr = eth_validate_addr, 2600 .ndo_start_xmit = atl1c_xmit_frame, 2601 .ndo_set_mac_address = atl1c_set_mac_addr, 2602 .ndo_set_rx_mode = atl1c_set_multi, 2603 .ndo_change_mtu = atl1c_change_mtu, 2604 .ndo_fix_features = atl1c_fix_features, 2605 .ndo_set_features = atl1c_set_features, 2606 .ndo_do_ioctl = atl1c_ioctl, 2607 .ndo_tx_timeout = atl1c_tx_timeout, 2608 .ndo_get_stats = atl1c_get_stats, 2609 #ifdef CONFIG_NET_POLL_CONTROLLER 2610 .ndo_poll_controller = atl1c_netpoll, 2611 #endif 2612 }; 2613 2614 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2615 { 2616 SET_NETDEV_DEV(netdev, &pdev->dev); 2617 pci_set_drvdata(pdev, netdev); 2618 2619 netdev->irq = pdev->irq; 2620 netdev->netdev_ops = &atl1c_netdev_ops; 2621 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2622 atl1c_set_ethtool_ops(netdev); 2623 2624 /* TODO: add when ready */ 2625 netdev->hw_features = NETIF_F_SG | 2626 NETIF_F_HW_CSUM | 2627 NETIF_F_HW_VLAN_RX | 2628 NETIF_F_TSO | 2629 NETIF_F_TSO6; 2630 netdev->features = netdev->hw_features | 2631 NETIF_F_HW_VLAN_TX; 2632 return 0; 2633 } 2634 2635 /* 2636 * atl1c_probe - Device Initialization Routine 2637 * @pdev: PCI device information struct 2638 * @ent: entry in atl1c_pci_tbl 2639 * 2640 * Returns 0 on success, negative on failure 2641 * 2642 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2643 * The OS initialization, configuring of the adapter private structure, 2644 * and a hardware reset occur. 2645 */ 2646 static int __devinit atl1c_probe(struct pci_dev *pdev, 2647 const struct pci_device_id *ent) 2648 { 2649 struct net_device *netdev; 2650 struct atl1c_adapter *adapter; 2651 static int cards_found; 2652 2653 int err = 0; 2654 2655 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2656 err = pci_enable_device_mem(pdev); 2657 if (err) { 2658 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2659 return err; 2660 } 2661 2662 /* 2663 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2664 * shared register for the high 32 bits, so only a single, aligned, 2665 * 4 GB physical address range can be used at a time. 2666 * 2667 * Supporting 64-bit DMA on this hardware is more trouble than it's 2668 * worth. It is far easier to limit to 32-bit DMA than update 2669 * various kernel subsystems to support the mechanics required by a 2670 * fixed-high-32-bit system. 2671 */ 2672 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2673 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2674 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2675 goto err_dma; 2676 } 2677 2678 err = pci_request_regions(pdev, atl1c_driver_name); 2679 if (err) { 2680 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2681 goto err_pci_reg; 2682 } 2683 2684 pci_set_master(pdev); 2685 2686 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2687 if (netdev == NULL) { 2688 err = -ENOMEM; 2689 dev_err(&pdev->dev, "etherdev alloc failed\n"); 2690 goto err_alloc_etherdev; 2691 } 2692 2693 err = atl1c_init_netdev(netdev, pdev); 2694 if (err) { 2695 dev_err(&pdev->dev, "init netdevice failed\n"); 2696 goto err_init_netdev; 2697 } 2698 adapter = netdev_priv(netdev); 2699 adapter->bd_number = cards_found; 2700 adapter->netdev = netdev; 2701 adapter->pdev = pdev; 2702 adapter->hw.adapter = adapter; 2703 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2704 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2705 if (!adapter->hw.hw_addr) { 2706 err = -EIO; 2707 dev_err(&pdev->dev, "cannot map device registers\n"); 2708 goto err_ioremap; 2709 } 2710 netdev->base_addr = (unsigned long)adapter->hw.hw_addr; 2711 2712 /* init mii data */ 2713 adapter->mii.dev = netdev; 2714 adapter->mii.mdio_read = atl1c_mdio_read; 2715 adapter->mii.mdio_write = atl1c_mdio_write; 2716 adapter->mii.phy_id_mask = 0x1f; 2717 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2718 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2719 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2720 (unsigned long)adapter); 2721 /* setup the private structure */ 2722 err = atl1c_sw_init(adapter); 2723 if (err) { 2724 dev_err(&pdev->dev, "net device private data init failed\n"); 2725 goto err_sw_init; 2726 } 2727 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | 2728 ATL1C_PCIE_PHY_RESET); 2729 2730 /* Init GPHY as early as possible due to power saving issue */ 2731 atl1c_phy_reset(&adapter->hw); 2732 2733 err = atl1c_reset_mac(&adapter->hw); 2734 if (err) { 2735 err = -EIO; 2736 goto err_reset; 2737 } 2738 2739 /* reset the controller to 2740 * put the device in a known good starting state */ 2741 err = atl1c_phy_init(&adapter->hw); 2742 if (err) { 2743 err = -EIO; 2744 goto err_reset; 2745 } 2746 if (atl1c_read_mac_addr(&adapter->hw) != 0) { 2747 err = -EIO; 2748 dev_err(&pdev->dev, "get mac address failed\n"); 2749 goto err_eeprom; 2750 } 2751 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2752 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); 2753 if (netif_msg_probe(adapter)) 2754 dev_dbg(&pdev->dev, "mac address : %pM\n", 2755 adapter->hw.mac_addr); 2756 2757 atl1c_hw_set_mac_addr(&adapter->hw); 2758 INIT_WORK(&adapter->common_task, atl1c_common_task); 2759 adapter->work_event = 0; 2760 err = register_netdev(netdev); 2761 if (err) { 2762 dev_err(&pdev->dev, "register netdevice failed\n"); 2763 goto err_register; 2764 } 2765 2766 if (netif_msg_probe(adapter)) 2767 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2768 cards_found++; 2769 return 0; 2770 2771 err_reset: 2772 err_register: 2773 err_sw_init: 2774 err_eeprom: 2775 iounmap(adapter->hw.hw_addr); 2776 err_init_netdev: 2777 err_ioremap: 2778 free_netdev(netdev); 2779 err_alloc_etherdev: 2780 pci_release_regions(pdev); 2781 err_pci_reg: 2782 err_dma: 2783 pci_disable_device(pdev); 2784 return err; 2785 } 2786 2787 /* 2788 * atl1c_remove - Device Removal Routine 2789 * @pdev: PCI device information struct 2790 * 2791 * atl1c_remove is called by the PCI subsystem to alert the driver 2792 * that it should release a PCI device. The could be caused by a 2793 * Hot-Plug event, or because the driver is going to be removed from 2794 * memory. 2795 */ 2796 static void __devexit atl1c_remove(struct pci_dev *pdev) 2797 { 2798 struct net_device *netdev = pci_get_drvdata(pdev); 2799 struct atl1c_adapter *adapter = netdev_priv(netdev); 2800 2801 unregister_netdev(netdev); 2802 atl1c_phy_disable(&adapter->hw); 2803 2804 iounmap(adapter->hw.hw_addr); 2805 2806 pci_release_regions(pdev); 2807 pci_disable_device(pdev); 2808 free_netdev(netdev); 2809 } 2810 2811 /* 2812 * atl1c_io_error_detected - called when PCI error is detected 2813 * @pdev: Pointer to PCI device 2814 * @state: The current pci connection state 2815 * 2816 * This function is called after a PCI bus error affecting 2817 * this device has been detected. 2818 */ 2819 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2820 pci_channel_state_t state) 2821 { 2822 struct net_device *netdev = pci_get_drvdata(pdev); 2823 struct atl1c_adapter *adapter = netdev_priv(netdev); 2824 2825 netif_device_detach(netdev); 2826 2827 if (state == pci_channel_io_perm_failure) 2828 return PCI_ERS_RESULT_DISCONNECT; 2829 2830 if (netif_running(netdev)) 2831 atl1c_down(adapter); 2832 2833 pci_disable_device(pdev); 2834 2835 /* Request a slot slot reset. */ 2836 return PCI_ERS_RESULT_NEED_RESET; 2837 } 2838 2839 /* 2840 * atl1c_io_slot_reset - called after the pci bus has been reset. 2841 * @pdev: Pointer to PCI device 2842 * 2843 * Restart the card from scratch, as if from a cold-boot. Implementation 2844 * resembles the first-half of the e1000_resume routine. 2845 */ 2846 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2847 { 2848 struct net_device *netdev = pci_get_drvdata(pdev); 2849 struct atl1c_adapter *adapter = netdev_priv(netdev); 2850 2851 if (pci_enable_device(pdev)) { 2852 if (netif_msg_hw(adapter)) 2853 dev_err(&pdev->dev, 2854 "Cannot re-enable PCI device after reset\n"); 2855 return PCI_ERS_RESULT_DISCONNECT; 2856 } 2857 pci_set_master(pdev); 2858 2859 pci_enable_wake(pdev, PCI_D3hot, 0); 2860 pci_enable_wake(pdev, PCI_D3cold, 0); 2861 2862 atl1c_reset_mac(&adapter->hw); 2863 2864 return PCI_ERS_RESULT_RECOVERED; 2865 } 2866 2867 /* 2868 * atl1c_io_resume - called when traffic can start flowing again. 2869 * @pdev: Pointer to PCI device 2870 * 2871 * This callback is called when the error recovery driver tells us that 2872 * its OK to resume normal operation. Implementation resembles the 2873 * second-half of the atl1c_resume routine. 2874 */ 2875 static void atl1c_io_resume(struct pci_dev *pdev) 2876 { 2877 struct net_device *netdev = pci_get_drvdata(pdev); 2878 struct atl1c_adapter *adapter = netdev_priv(netdev); 2879 2880 if (netif_running(netdev)) { 2881 if (atl1c_up(adapter)) { 2882 if (netif_msg_hw(adapter)) 2883 dev_err(&pdev->dev, 2884 "Cannot bring device back up after reset\n"); 2885 return; 2886 } 2887 } 2888 2889 netif_device_attach(netdev); 2890 } 2891 2892 static struct pci_error_handlers atl1c_err_handler = { 2893 .error_detected = atl1c_io_error_detected, 2894 .slot_reset = atl1c_io_slot_reset, 2895 .resume = atl1c_io_resume, 2896 }; 2897 2898 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2899 2900 static struct pci_driver atl1c_driver = { 2901 .name = atl1c_driver_name, 2902 .id_table = atl1c_pci_tbl, 2903 .probe = atl1c_probe, 2904 .remove = __devexit_p(atl1c_remove), 2905 .shutdown = atl1c_shutdown, 2906 .err_handler = &atl1c_err_handler, 2907 .driver.pm = &atl1c_pm_ops, 2908 }; 2909 2910 /* 2911 * atl1c_init_module - Driver Registration Routine 2912 * 2913 * atl1c_init_module is the first routine called when the driver is 2914 * loaded. All it does is register with the PCI subsystem. 2915 */ 2916 static int __init atl1c_init_module(void) 2917 { 2918 return pci_register_driver(&atl1c_driver); 2919 } 2920 2921 /* 2922 * atl1c_exit_module - Driver Exit Cleanup Routine 2923 * 2924 * atl1c_exit_module is called just before the driver is removed 2925 * from memory. 2926 */ 2927 static void __exit atl1c_exit_module(void) 2928 { 2929 pci_unregister_driver(&atl1c_driver); 2930 } 2931 2932 module_init(atl1c_init_module); 2933 module_exit(atl1c_exit_module); 2934