1 /* 2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. 3 * 4 * Derived from Intel e1000 driver 5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the Free 9 * Software Foundation; either version 2 of the License, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along with 18 * this program; if not, write to the Free Software Foundation, Inc., 59 19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. 20 */ 21 22 #include "atl1c.h" 23 24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI" 25 char atl1c_driver_name[] = "atl1c"; 26 char atl1c_driver_version[] = ATL1C_DRV_VERSION; 27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062 28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063 29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */ 30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */ 31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */ 32 #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */ 33 #define L2CB_V10 0xc0 34 #define L2CB_V11 0xc1 35 36 /* 37 * atl1c_pci_tbl - PCI Device ID Table 38 * 39 * Wildcard entries (PCI_ANY_ID) should come last 40 * Last entry must be all 0s 41 * 42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, 43 * Class, Class Mask, private data (not used) } 44 */ 45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { 46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, 47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, 48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, 49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, 50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, 51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, 52 /* required last entry */ 53 { 0 } 54 }; 55 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); 56 57 MODULE_AUTHOR("Jie Yang"); 58 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>"); 59 MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver"); 60 MODULE_LICENSE("GPL"); 61 MODULE_VERSION(ATL1C_DRV_VERSION); 62 63 static int atl1c_stop_mac(struct atl1c_hw *hw); 64 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw); 65 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw); 66 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); 67 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed); 68 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter); 69 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 70 int *work_done, int work_to_do); 71 static int atl1c_up(struct atl1c_adapter *adapter); 72 static void atl1c_down(struct atl1c_adapter *adapter); 73 74 static const u16 atl1c_pay_load_size[] = { 75 128, 256, 512, 1024, 2048, 4096, 76 }; 77 78 79 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | 80 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; 81 static void atl1c_pcie_patch(struct atl1c_hw *hw) 82 { 83 u32 mst_data, data; 84 85 /* pclk sel could switch to 25M */ 86 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data); 87 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS; 88 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data); 89 90 /* WoL/PCIE related settings */ 91 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { 92 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data); 93 data |= PCIE_PHYMISC_FORCE_RCV_DET; 94 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data); 95 } else { /* new dev set bit5 of MASTER */ 96 if (!(mst_data & MASTER_CTRL_WAKEN_25M)) 97 AT_WRITE_REG(hw, REG_MASTER_CTRL, 98 mst_data | MASTER_CTRL_WAKEN_25M); 99 } 100 /* aspm/PCIE setting only for l2cb 1.0 */ 101 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) { 102 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data); 103 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW, 104 L2CB1_PCIE_PHYMISC2_CDR_BW); 105 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH, 106 L2CB1_PCIE_PHYMISC2_L0S_TH); 107 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data); 108 /* extend L1 sync timer */ 109 AT_READ_REG(hw, REG_LINK_CTRL, &data); 110 data |= LINK_CTRL_EXT_SYNC; 111 AT_WRITE_REG(hw, REG_LINK_CTRL, data); 112 } 113 /* l2cb 1.x & l1d 1.x */ 114 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) { 115 AT_READ_REG(hw, REG_PM_CTRL, &data); 116 data |= PM_CTRL_L0S_BUFSRX_EN; 117 AT_WRITE_REG(hw, REG_PM_CTRL, data); 118 /* clear vendor msg */ 119 AT_READ_REG(hw, REG_DMA_DBG, &data); 120 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG); 121 } 122 } 123 124 /* FIXME: no need any more ? */ 125 /* 126 * atl1c_init_pcie - init PCIE module 127 */ 128 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) 129 { 130 u32 data; 131 u32 pci_cmd; 132 struct pci_dev *pdev = hw->adapter->pdev; 133 int pos; 134 135 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); 136 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 137 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 138 PCI_COMMAND_IO); 139 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); 140 141 /* 142 * Clear any PowerSaveing Settings 143 */ 144 pci_enable_wake(pdev, PCI_D3hot, 0); 145 pci_enable_wake(pdev, PCI_D3cold, 0); 146 147 /* 148 * Mask some pcie error bits 149 */ 150 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 151 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data); 152 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP); 153 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data); 154 /* clear error status */ 155 pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA, 156 PCI_EXP_DEVSTA_NFED | 157 PCI_EXP_DEVSTA_FED | 158 PCI_EXP_DEVSTA_CED | 159 PCI_EXP_DEVSTA_URD); 160 161 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data); 162 data &= ~LTSSM_ID_EN_WRO; 163 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data); 164 165 atl1c_pcie_patch(hw); 166 if (flag & ATL1C_PCIE_L0S_L1_DISABLE) 167 atl1c_disable_l0s_l1(hw); 168 if (flag & ATL1C_PCIE_PHY_RESET) 169 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT); 170 else 171 AT_WRITE_REG(hw, REG_GPHY_CTRL, 172 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET); 173 174 msleep(5); 175 } 176 177 /* 178 * atl1c_irq_enable - Enable default interrupt generation settings 179 * @adapter: board private structure 180 */ 181 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) 182 { 183 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 184 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); 185 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 186 AT_WRITE_FLUSH(&adapter->hw); 187 } 188 } 189 190 /* 191 * atl1c_irq_disable - Mask off interrupt generation on the NIC 192 * @adapter: board private structure 193 */ 194 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) 195 { 196 atomic_inc(&adapter->irq_sem); 197 AT_WRITE_REG(&adapter->hw, REG_IMR, 0); 198 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); 199 AT_WRITE_FLUSH(&adapter->hw); 200 synchronize_irq(adapter->pdev->irq); 201 } 202 203 /* 204 * atl1c_irq_reset - reset interrupt confiure on the NIC 205 * @adapter: board private structure 206 */ 207 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) 208 { 209 atomic_set(&adapter->irq_sem, 1); 210 atl1c_irq_enable(adapter); 211 } 212 213 /* 214 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads 215 * of the idle status register until the device is actually idle 216 */ 217 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl) 218 { 219 int timeout; 220 u32 data; 221 222 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { 223 AT_READ_REG(hw, REG_IDLE_STATUS, &data); 224 if ((data & modu_ctrl) == 0) 225 return 0; 226 msleep(1); 227 } 228 return data; 229 } 230 231 /* 232 * atl1c_phy_config - Timer Call-back 233 * @data: pointer to netdev cast into an unsigned long 234 */ 235 static void atl1c_phy_config(unsigned long data) 236 { 237 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; 238 struct atl1c_hw *hw = &adapter->hw; 239 unsigned long flags; 240 241 spin_lock_irqsave(&adapter->mdio_lock, flags); 242 atl1c_restart_autoneg(hw); 243 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 244 } 245 246 void atl1c_reinit_locked(struct atl1c_adapter *adapter) 247 { 248 WARN_ON(in_interrupt()); 249 atl1c_down(adapter); 250 atl1c_up(adapter); 251 clear_bit(__AT_RESETTING, &adapter->flags); 252 } 253 254 static void atl1c_check_link_status(struct atl1c_adapter *adapter) 255 { 256 struct atl1c_hw *hw = &adapter->hw; 257 struct net_device *netdev = adapter->netdev; 258 struct pci_dev *pdev = adapter->pdev; 259 int err; 260 unsigned long flags; 261 u16 speed, duplex, phy_data; 262 263 spin_lock_irqsave(&adapter->mdio_lock, flags); 264 /* MII_BMSR must read twise */ 265 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 266 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); 267 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 268 269 if ((phy_data & BMSR_LSTATUS) == 0) { 270 /* link down */ 271 hw->hibernate = true; 272 if (atl1c_stop_mac(hw) != 0) 273 if (netif_msg_hw(adapter)) 274 dev_warn(&pdev->dev, "stop mac failed\n"); 275 atl1c_set_aspm(hw, SPEED_0); 276 netif_carrier_off(netdev); 277 netif_stop_queue(netdev); 278 atl1c_phy_reset(hw); 279 atl1c_phy_init(&adapter->hw); 280 } else { 281 /* Link Up */ 282 hw->hibernate = false; 283 spin_lock_irqsave(&adapter->mdio_lock, flags); 284 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); 285 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 286 if (unlikely(err)) 287 return; 288 /* link result is our setting */ 289 if (adapter->link_speed != speed || 290 adapter->link_duplex != duplex) { 291 adapter->link_speed = speed; 292 adapter->link_duplex = duplex; 293 atl1c_set_aspm(hw, speed); 294 atl1c_enable_tx_ctrl(hw); 295 atl1c_enable_rx_ctrl(hw); 296 atl1c_setup_mac_ctrl(adapter); 297 if (netif_msg_link(adapter)) 298 dev_info(&pdev->dev, 299 "%s: %s NIC Link is Up<%d Mbps %s>\n", 300 atl1c_driver_name, netdev->name, 301 adapter->link_speed, 302 adapter->link_duplex == FULL_DUPLEX ? 303 "Full Duplex" : "Half Duplex"); 304 } 305 if (!netif_carrier_ok(netdev)) 306 netif_carrier_on(netdev); 307 } 308 } 309 310 static void atl1c_link_chg_event(struct atl1c_adapter *adapter) 311 { 312 struct net_device *netdev = adapter->netdev; 313 struct pci_dev *pdev = adapter->pdev; 314 u16 phy_data; 315 u16 link_up; 316 317 spin_lock(&adapter->mdio_lock); 318 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 319 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); 320 spin_unlock(&adapter->mdio_lock); 321 link_up = phy_data & BMSR_LSTATUS; 322 /* notify upper layer link down ASAP */ 323 if (!link_up) { 324 if (netif_carrier_ok(netdev)) { 325 /* old link state: Up */ 326 netif_carrier_off(netdev); 327 if (netif_msg_link(adapter)) 328 dev_info(&pdev->dev, 329 "%s: %s NIC Link is Down\n", 330 atl1c_driver_name, netdev->name); 331 adapter->link_speed = SPEED_0; 332 } 333 } 334 335 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event); 336 schedule_work(&adapter->common_task); 337 } 338 339 static void atl1c_common_task(struct work_struct *work) 340 { 341 struct atl1c_adapter *adapter; 342 struct net_device *netdev; 343 344 adapter = container_of(work, struct atl1c_adapter, common_task); 345 netdev = adapter->netdev; 346 347 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) { 348 netif_device_detach(netdev); 349 atl1c_down(adapter); 350 atl1c_up(adapter); 351 netif_device_attach(netdev); 352 } 353 354 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE, 355 &adapter->work_event)) 356 atl1c_check_link_status(adapter); 357 } 358 359 360 static void atl1c_del_timer(struct atl1c_adapter *adapter) 361 { 362 del_timer_sync(&adapter->phy_config_timer); 363 } 364 365 366 /* 367 * atl1c_tx_timeout - Respond to a Tx Hang 368 * @netdev: network interface device structure 369 */ 370 static void atl1c_tx_timeout(struct net_device *netdev) 371 { 372 struct atl1c_adapter *adapter = netdev_priv(netdev); 373 374 /* Do the reset outside of interrupt context */ 375 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 376 schedule_work(&adapter->common_task); 377 } 378 379 /* 380 * atl1c_set_multi - Multicast and Promiscuous mode set 381 * @netdev: network interface device structure 382 * 383 * The set_multi entry point is called whenever the multicast address 384 * list or the network interface flags are updated. This routine is 385 * responsible for configuring the hardware for proper multicast, 386 * promiscuous mode, and all-multi behavior. 387 */ 388 static void atl1c_set_multi(struct net_device *netdev) 389 { 390 struct atl1c_adapter *adapter = netdev_priv(netdev); 391 struct atl1c_hw *hw = &adapter->hw; 392 struct netdev_hw_addr *ha; 393 u32 mac_ctrl_data; 394 u32 hash_value; 395 396 /* Check for Promiscuous and All Multicast modes */ 397 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 398 399 if (netdev->flags & IFF_PROMISC) { 400 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 401 } else if (netdev->flags & IFF_ALLMULTI) { 402 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 403 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; 404 } else { 405 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); 406 } 407 408 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 409 410 /* clear the old settings from the multicast hash table */ 411 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); 412 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); 413 414 /* comoute mc addresses' hash value ,and put it into hash table */ 415 netdev_for_each_mc_addr(ha, netdev) { 416 hash_value = atl1c_hash_mc_addr(hw, ha->addr); 417 atl1c_hash_set(hw, hash_value); 418 } 419 } 420 421 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data) 422 { 423 if (features & NETIF_F_HW_VLAN_RX) { 424 /* enable VLAN tag insert/strip */ 425 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN; 426 } else { 427 /* disable VLAN tag insert/strip */ 428 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; 429 } 430 } 431 432 static void atl1c_vlan_mode(struct net_device *netdev, 433 netdev_features_t features) 434 { 435 struct atl1c_adapter *adapter = netdev_priv(netdev); 436 struct pci_dev *pdev = adapter->pdev; 437 u32 mac_ctrl_data = 0; 438 439 if (netif_msg_pktdata(adapter)) 440 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n"); 441 442 atl1c_irq_disable(adapter); 443 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); 444 __atl1c_vlan_mode(features, &mac_ctrl_data); 445 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); 446 atl1c_irq_enable(adapter); 447 } 448 449 static void atl1c_restore_vlan(struct atl1c_adapter *adapter) 450 { 451 struct pci_dev *pdev = adapter->pdev; 452 453 if (netif_msg_pktdata(adapter)) 454 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n"); 455 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features); 456 } 457 458 /* 459 * atl1c_set_mac - Change the Ethernet Address of the NIC 460 * @netdev: network interface device structure 461 * @p: pointer to an address structure 462 * 463 * Returns 0 on success, negative on failure 464 */ 465 static int atl1c_set_mac_addr(struct net_device *netdev, void *p) 466 { 467 struct atl1c_adapter *adapter = netdev_priv(netdev); 468 struct sockaddr *addr = p; 469 470 if (!is_valid_ether_addr(addr->sa_data)) 471 return -EADDRNOTAVAIL; 472 473 if (netif_running(netdev)) 474 return -EBUSY; 475 476 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 477 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 478 netdev->addr_assign_type &= ~NET_ADDR_RANDOM; 479 480 atl1c_hw_set_mac_addr(&adapter->hw); 481 482 return 0; 483 } 484 485 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, 486 struct net_device *dev) 487 { 488 int mtu = dev->mtu; 489 490 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? 491 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; 492 } 493 494 static netdev_features_t atl1c_fix_features(struct net_device *netdev, 495 netdev_features_t features) 496 { 497 /* 498 * Since there is no support for separate rx/tx vlan accel 499 * enable/disable make sure tx flag is always in same state as rx. 500 */ 501 if (features & NETIF_F_HW_VLAN_RX) 502 features |= NETIF_F_HW_VLAN_TX; 503 else 504 features &= ~NETIF_F_HW_VLAN_TX; 505 506 if (netdev->mtu > MAX_TSO_FRAME_SIZE) 507 features &= ~(NETIF_F_TSO | NETIF_F_TSO6); 508 509 return features; 510 } 511 512 static int atl1c_set_features(struct net_device *netdev, 513 netdev_features_t features) 514 { 515 netdev_features_t changed = netdev->features ^ features; 516 517 if (changed & NETIF_F_HW_VLAN_RX) 518 atl1c_vlan_mode(netdev, features); 519 520 return 0; 521 } 522 523 /* 524 * atl1c_change_mtu - Change the Maximum Transfer Unit 525 * @netdev: network interface device structure 526 * @new_mtu: new value for maximum frame size 527 * 528 * Returns 0 on success, negative on failure 529 */ 530 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) 531 { 532 struct atl1c_adapter *adapter = netdev_priv(netdev); 533 struct atl1c_hw *hw = &adapter->hw; 534 int old_mtu = netdev->mtu; 535 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; 536 537 /* Fast Ethernet controller doesn't support jumbo packet */ 538 if (((hw->nic_type == athr_l2c || 539 hw->nic_type == athr_l2c_b || 540 hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) || 541 max_frame < ETH_ZLEN + ETH_FCS_LEN || 542 max_frame > MAX_JUMBO_FRAME_SIZE) { 543 if (netif_msg_link(adapter)) 544 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); 545 return -EINVAL; 546 } 547 /* set MTU */ 548 if (old_mtu != new_mtu && netif_running(netdev)) { 549 while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) 550 msleep(1); 551 netdev->mtu = new_mtu; 552 adapter->hw.max_frame_size = new_mtu; 553 atl1c_set_rxbufsize(adapter, netdev); 554 atl1c_down(adapter); 555 netdev_update_features(netdev); 556 atl1c_up(adapter); 557 clear_bit(__AT_RESETTING, &adapter->flags); 558 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { 559 u32 phy_data; 560 561 AT_READ_REG(&adapter->hw, 0x1414, &phy_data); 562 phy_data |= 0x10000000; 563 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data); 564 } 565 566 } 567 return 0; 568 } 569 570 /* 571 * caller should hold mdio_lock 572 */ 573 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) 574 { 575 struct atl1c_adapter *adapter = netdev_priv(netdev); 576 u16 result; 577 578 atl1c_read_phy_reg(&adapter->hw, reg_num, &result); 579 return result; 580 } 581 582 static void atl1c_mdio_write(struct net_device *netdev, int phy_id, 583 int reg_num, int val) 584 { 585 struct atl1c_adapter *adapter = netdev_priv(netdev); 586 587 atl1c_write_phy_reg(&adapter->hw, reg_num, val); 588 } 589 590 /* 591 * atl1c_mii_ioctl - 592 * @netdev: 593 * @ifreq: 594 * @cmd: 595 */ 596 static int atl1c_mii_ioctl(struct net_device *netdev, 597 struct ifreq *ifr, int cmd) 598 { 599 struct atl1c_adapter *adapter = netdev_priv(netdev); 600 struct pci_dev *pdev = adapter->pdev; 601 struct mii_ioctl_data *data = if_mii(ifr); 602 unsigned long flags; 603 int retval = 0; 604 605 if (!netif_running(netdev)) 606 return -EINVAL; 607 608 spin_lock_irqsave(&adapter->mdio_lock, flags); 609 switch (cmd) { 610 case SIOCGMIIPHY: 611 data->phy_id = 0; 612 break; 613 614 case SIOCGMIIREG: 615 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 616 &data->val_out)) { 617 retval = -EIO; 618 goto out; 619 } 620 break; 621 622 case SIOCSMIIREG: 623 if (data->reg_num & ~(0x1F)) { 624 retval = -EFAULT; 625 goto out; 626 } 627 628 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", 629 data->reg_num, data->val_in); 630 if (atl1c_write_phy_reg(&adapter->hw, 631 data->reg_num, data->val_in)) { 632 retval = -EIO; 633 goto out; 634 } 635 break; 636 637 default: 638 retval = -EOPNOTSUPP; 639 break; 640 } 641 out: 642 spin_unlock_irqrestore(&adapter->mdio_lock, flags); 643 return retval; 644 } 645 646 /* 647 * atl1c_ioctl - 648 * @netdev: 649 * @ifreq: 650 * @cmd: 651 */ 652 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 653 { 654 switch (cmd) { 655 case SIOCGMIIPHY: 656 case SIOCGMIIREG: 657 case SIOCSMIIREG: 658 return atl1c_mii_ioctl(netdev, ifr, cmd); 659 default: 660 return -EOPNOTSUPP; 661 } 662 } 663 664 /* 665 * atl1c_alloc_queues - Allocate memory for all rings 666 * @adapter: board private structure to initialize 667 * 668 */ 669 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter) 670 { 671 return 0; 672 } 673 674 static void atl1c_set_mac_type(struct atl1c_hw *hw) 675 { 676 switch (hw->device_id) { 677 case PCI_DEVICE_ID_ATTANSIC_L2C: 678 hw->nic_type = athr_l2c; 679 break; 680 case PCI_DEVICE_ID_ATTANSIC_L1C: 681 hw->nic_type = athr_l1c; 682 break; 683 case PCI_DEVICE_ID_ATHEROS_L2C_B: 684 hw->nic_type = athr_l2c_b; 685 break; 686 case PCI_DEVICE_ID_ATHEROS_L2C_B2: 687 hw->nic_type = athr_l2c_b2; 688 break; 689 case PCI_DEVICE_ID_ATHEROS_L1D: 690 hw->nic_type = athr_l1d; 691 break; 692 case PCI_DEVICE_ID_ATHEROS_L1D_2_0: 693 hw->nic_type = athr_l1d_2; 694 break; 695 default: 696 break; 697 } 698 } 699 700 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) 701 { 702 u32 phy_status_data; 703 u32 link_ctrl_data; 704 705 atl1c_set_mac_type(hw); 706 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data); 707 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); 708 709 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE | 710 ATL1C_TXQ_MODE_ENHANCE; 711 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT | 712 ATL1C_ASPM_L1_SUPPORT; 713 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; 714 715 if (hw->nic_type == athr_l1c || 716 hw->nic_type == athr_l1d || 717 hw->nic_type == athr_l1d_2) 718 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M; 719 return 0; 720 } 721 /* 722 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) 723 * @adapter: board private structure to initialize 724 * 725 * atl1c_sw_init initializes the Adapter private data structure. 726 * Fields are initialized based on PCI device information and 727 * OS network device settings (MTU size). 728 */ 729 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) 730 { 731 struct atl1c_hw *hw = &adapter->hw; 732 struct pci_dev *pdev = adapter->pdev; 733 u32 revision; 734 735 736 adapter->wol = 0; 737 device_set_wakeup_enable(&pdev->dev, false); 738 adapter->link_speed = SPEED_0; 739 adapter->link_duplex = FULL_DUPLEX; 740 adapter->tpd_ring[0].count = 1024; 741 adapter->rfd_ring.count = 512; 742 743 hw->vendor_id = pdev->vendor; 744 hw->device_id = pdev->device; 745 hw->subsystem_vendor_id = pdev->subsystem_vendor; 746 hw->subsystem_id = pdev->subsystem_device; 747 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision); 748 hw->revision_id = revision & 0xFF; 749 /* before link up, we assume hibernate is true */ 750 hw->hibernate = true; 751 hw->media_type = MEDIA_TYPE_AUTO_SENSOR; 752 if (atl1c_setup_mac_funcs(hw) != 0) { 753 dev_err(&pdev->dev, "set mac function pointers failed\n"); 754 return -1; 755 } 756 hw->intr_mask = IMR_NORMAL_MASK; 757 hw->phy_configured = false; 758 hw->preamble_len = 7; 759 hw->max_frame_size = adapter->netdev->mtu; 760 hw->autoneg_advertised = ADVERTISED_Autoneg; 761 hw->indirect_tab = 0xE4E4E4E4; 762 hw->base_cpu = 0; 763 764 hw->ict = 50000; /* 100ms */ 765 hw->smb_timer = 200000; /* 400ms */ 766 hw->rx_imt = 200; 767 hw->tx_imt = 1000; 768 769 hw->tpd_burst = 5; 770 hw->rfd_burst = 8; 771 hw->dma_order = atl1c_dma_ord_out; 772 hw->dmar_block = atl1c_dma_req_1024; 773 774 if (atl1c_alloc_queues(adapter)) { 775 dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); 776 return -ENOMEM; 777 } 778 /* TODO */ 779 atl1c_set_rxbufsize(adapter, adapter->netdev); 780 atomic_set(&adapter->irq_sem, 1); 781 spin_lock_init(&adapter->mdio_lock); 782 spin_lock_init(&adapter->tx_lock); 783 set_bit(__AT_DOWN, &adapter->flags); 784 785 return 0; 786 } 787 788 static inline void atl1c_clean_buffer(struct pci_dev *pdev, 789 struct atl1c_buffer *buffer_info, int in_irq) 790 { 791 u16 pci_driection; 792 if (buffer_info->flags & ATL1C_BUFFER_FREE) 793 return; 794 if (buffer_info->dma) { 795 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE) 796 pci_driection = PCI_DMA_FROMDEVICE; 797 else 798 pci_driection = PCI_DMA_TODEVICE; 799 800 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE) 801 pci_unmap_single(pdev, buffer_info->dma, 802 buffer_info->length, pci_driection); 803 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE) 804 pci_unmap_page(pdev, buffer_info->dma, 805 buffer_info->length, pci_driection); 806 } 807 if (buffer_info->skb) { 808 if (in_irq) 809 dev_kfree_skb_irq(buffer_info->skb); 810 else 811 dev_kfree_skb(buffer_info->skb); 812 } 813 buffer_info->dma = 0; 814 buffer_info->skb = NULL; 815 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 816 } 817 /* 818 * atl1c_clean_tx_ring - Free Tx-skb 819 * @adapter: board private structure 820 */ 821 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, 822 enum atl1c_trans_queue type) 823 { 824 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 825 struct atl1c_buffer *buffer_info; 826 struct pci_dev *pdev = adapter->pdev; 827 u16 index, ring_count; 828 829 ring_count = tpd_ring->count; 830 for (index = 0; index < ring_count; index++) { 831 buffer_info = &tpd_ring->buffer_info[index]; 832 atl1c_clean_buffer(pdev, buffer_info, 0); 833 } 834 835 /* Zero out Tx-buffers */ 836 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * 837 ring_count); 838 atomic_set(&tpd_ring->next_to_clean, 0); 839 tpd_ring->next_to_use = 0; 840 } 841 842 /* 843 * atl1c_clean_rx_ring - Free rx-reservation skbs 844 * @adapter: board private structure 845 */ 846 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) 847 { 848 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 849 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 850 struct atl1c_buffer *buffer_info; 851 struct pci_dev *pdev = adapter->pdev; 852 int j; 853 854 for (j = 0; j < rfd_ring->count; j++) { 855 buffer_info = &rfd_ring->buffer_info[j]; 856 atl1c_clean_buffer(pdev, buffer_info, 0); 857 } 858 /* zero out the descriptor ring */ 859 memset(rfd_ring->desc, 0, rfd_ring->size); 860 rfd_ring->next_to_clean = 0; 861 rfd_ring->next_to_use = 0; 862 rrd_ring->next_to_use = 0; 863 rrd_ring->next_to_clean = 0; 864 } 865 866 /* 867 * Read / Write Ptr Initialize: 868 */ 869 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) 870 { 871 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 872 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 873 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 874 struct atl1c_buffer *buffer_info; 875 int i, j; 876 877 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 878 tpd_ring[i].next_to_use = 0; 879 atomic_set(&tpd_ring[i].next_to_clean, 0); 880 buffer_info = tpd_ring[i].buffer_info; 881 for (j = 0; j < tpd_ring->count; j++) 882 ATL1C_SET_BUFFER_STATE(&buffer_info[i], 883 ATL1C_BUFFER_FREE); 884 } 885 rfd_ring->next_to_use = 0; 886 rfd_ring->next_to_clean = 0; 887 rrd_ring->next_to_use = 0; 888 rrd_ring->next_to_clean = 0; 889 for (j = 0; j < rfd_ring->count; j++) { 890 buffer_info = &rfd_ring->buffer_info[j]; 891 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE); 892 } 893 } 894 895 /* 896 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources 897 * @adapter: board private structure 898 * 899 * Free all transmit software resources 900 */ 901 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) 902 { 903 struct pci_dev *pdev = adapter->pdev; 904 905 pci_free_consistent(pdev, adapter->ring_header.size, 906 adapter->ring_header.desc, 907 adapter->ring_header.dma); 908 adapter->ring_header.desc = NULL; 909 910 /* Note: just free tdp_ring.buffer_info, 911 * it contain rfd_ring.buffer_info, do not double free */ 912 if (adapter->tpd_ring[0].buffer_info) { 913 kfree(adapter->tpd_ring[0].buffer_info); 914 adapter->tpd_ring[0].buffer_info = NULL; 915 } 916 } 917 918 /* 919 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources 920 * @adapter: board private structure 921 * 922 * Return 0 on success, negative on failure 923 */ 924 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) 925 { 926 struct pci_dev *pdev = adapter->pdev; 927 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 928 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 929 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 930 struct atl1c_ring_header *ring_header = &adapter->ring_header; 931 int size; 932 int i; 933 int count = 0; 934 int rx_desc_count = 0; 935 u32 offset = 0; 936 937 rrd_ring->count = rfd_ring->count; 938 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) 939 tpd_ring[i].count = tpd_ring[0].count; 940 941 /* 2 tpd queue, one high priority queue, 942 * another normal priority queue */ 943 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + 944 rfd_ring->count); 945 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); 946 if (unlikely(!tpd_ring->buffer_info)) { 947 dev_err(&pdev->dev, "kzalloc failed, size = %d\n", 948 size); 949 goto err_nomem; 950 } 951 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 952 tpd_ring[i].buffer_info = 953 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 954 count += tpd_ring[i].count; 955 } 956 957 rfd_ring->buffer_info = 958 (struct atl1c_buffer *) (tpd_ring->buffer_info + count); 959 count += rfd_ring->count; 960 rx_desc_count += rfd_ring->count; 961 962 /* 963 * real ring DMA buffer 964 * each ring/block may need up to 8 bytes for alignment, hence the 965 * additional bytes tacked onto the end. 966 */ 967 ring_header->size = size = 968 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + 969 sizeof(struct atl1c_rx_free_desc) * rx_desc_count + 970 sizeof(struct atl1c_recv_ret_status) * rx_desc_count + 971 8 * 4; 972 973 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, 974 &ring_header->dma); 975 if (unlikely(!ring_header->desc)) { 976 dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); 977 goto err_nomem; 978 } 979 memset(ring_header->desc, 0, ring_header->size); 980 /* init TPD ring */ 981 982 tpd_ring[0].dma = roundup(ring_header->dma, 8); 983 offset = tpd_ring[0].dma - ring_header->dma; 984 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { 985 tpd_ring[i].dma = ring_header->dma + offset; 986 tpd_ring[i].desc = (u8 *) ring_header->desc + offset; 987 tpd_ring[i].size = 988 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; 989 offset += roundup(tpd_ring[i].size, 8); 990 } 991 /* init RFD ring */ 992 rfd_ring->dma = ring_header->dma + offset; 993 rfd_ring->desc = (u8 *) ring_header->desc + offset; 994 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count; 995 offset += roundup(rfd_ring->size, 8); 996 997 /* init RRD ring */ 998 rrd_ring->dma = ring_header->dma + offset; 999 rrd_ring->desc = (u8 *) ring_header->desc + offset; 1000 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) * 1001 rrd_ring->count; 1002 offset += roundup(rrd_ring->size, 8); 1003 1004 return 0; 1005 1006 err_nomem: 1007 kfree(tpd_ring->buffer_info); 1008 return -ENOMEM; 1009 } 1010 1011 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) 1012 { 1013 struct atl1c_hw *hw = &adapter->hw; 1014 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1015 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1016 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1017 adapter->tpd_ring; 1018 u32 data; 1019 1020 /* TPD */ 1021 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, 1022 (u32)((tpd_ring[atl1c_trans_normal].dma & 1023 AT_DMA_HI_ADDR_MASK) >> 32)); 1024 /* just enable normal priority TX queue */ 1025 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO, 1026 (u32)(tpd_ring[atl1c_trans_normal].dma & 1027 AT_DMA_LO_ADDR_MASK)); 1028 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO, 1029 (u32)(tpd_ring[atl1c_trans_high].dma & 1030 AT_DMA_LO_ADDR_MASK)); 1031 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, 1032 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); 1033 1034 1035 /* RFD */ 1036 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, 1037 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32)); 1038 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO, 1039 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1040 1041 AT_WRITE_REG(hw, REG_RFD_RING_SIZE, 1042 rfd_ring->count & RFD_RING_SIZE_MASK); 1043 AT_WRITE_REG(hw, REG_RX_BUF_SIZE, 1044 adapter->rx_buffer_len & RX_BUF_SIZE_MASK); 1045 1046 /* RRD */ 1047 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO, 1048 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK)); 1049 AT_WRITE_REG(hw, REG_RRD_RING_SIZE, 1050 (rrd_ring->count & RRD_RING_SIZE_MASK)); 1051 1052 if (hw->nic_type == athr_l2c_b) { 1053 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L); 1054 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L); 1055 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L); 1056 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L); 1057 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L); 1058 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L); 1059 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ 1060 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/ 1061 } 1062 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) { 1063 /* Power Saving for L2c_B */ 1064 AT_READ_REG(hw, REG_SERDES_LOCK, &data); 1065 data |= SERDES_MAC_CLK_SLOWDOWN; 1066 data |= SERDES_PYH_CLK_SLOWDOWN; 1067 AT_WRITE_REG(hw, REG_SERDES_LOCK, data); 1068 } 1069 /* Load all of base address above */ 1070 AT_WRITE_REG(hw, REG_LOAD_PTR, 1); 1071 } 1072 1073 static void atl1c_configure_tx(struct atl1c_adapter *adapter) 1074 { 1075 struct atl1c_hw *hw = &adapter->hw; 1076 int max_pay_load; 1077 u16 tx_offload_thresh; 1078 u32 txq_ctrl_data; 1079 1080 tx_offload_thresh = MAX_TSO_FRAME_SIZE; 1081 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, 1082 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); 1083 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8; 1084 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block); 1085 /* 1086 * if BIOS had changed the dam-read-max-length to an invalid value, 1087 * restore it to default value 1088 */ 1089 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) { 1090 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN); 1091 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN; 1092 } 1093 txq_ctrl_data = 1094 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ? 1095 L2CB_TXQ_CFGV : L1C_TXQ_CFGV; 1096 1097 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); 1098 } 1099 1100 static void atl1c_configure_rx(struct atl1c_adapter *adapter) 1101 { 1102 struct atl1c_hw *hw = &adapter->hw; 1103 u32 rxq_ctrl_data; 1104 1105 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << 1106 RXQ_RFD_BURST_NUM_SHIFT; 1107 1108 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) 1109 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; 1110 1111 /* aspm for gigabit */ 1112 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0) 1113 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT, 1114 ASPM_THRUPUT_LIMIT_100M); 1115 1116 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); 1117 } 1118 1119 static void atl1c_configure_dma(struct atl1c_adapter *adapter) 1120 { 1121 struct atl1c_hw *hw = &adapter->hw; 1122 u32 dma_ctrl_data; 1123 1124 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) | 1125 DMA_CTRL_RREQ_PRI_DATA | 1126 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) | 1127 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) | 1128 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF); 1129 1130 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); 1131 } 1132 1133 /* 1134 * Stop the mac, transmit and receive units 1135 * hw - Struct containing variables accessed by shared code 1136 * return : 0 or idle status (if error) 1137 */ 1138 static int atl1c_stop_mac(struct atl1c_hw *hw) 1139 { 1140 u32 data; 1141 1142 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1143 data &= ~RXQ_CTRL_EN; 1144 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1145 1146 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1147 data &= ~TXQ_CTRL_EN; 1148 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1149 1150 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY); 1151 1152 AT_READ_REG(hw, REG_MAC_CTRL, &data); 1153 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); 1154 AT_WRITE_REG(hw, REG_MAC_CTRL, data); 1155 1156 return (int)atl1c_wait_until_idle(hw, 1157 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY); 1158 } 1159 1160 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw) 1161 { 1162 u32 data; 1163 1164 AT_READ_REG(hw, REG_RXQ_CTRL, &data); 1165 data |= RXQ_CTRL_EN; 1166 AT_WRITE_REG(hw, REG_RXQ_CTRL, data); 1167 } 1168 1169 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw) 1170 { 1171 u32 data; 1172 1173 AT_READ_REG(hw, REG_TXQ_CTRL, &data); 1174 data |= TXQ_CTRL_EN; 1175 AT_WRITE_REG(hw, REG_TXQ_CTRL, data); 1176 } 1177 1178 /* 1179 * Reset the transmit and receive units; mask and clear all interrupts. 1180 * hw - Struct containing variables accessed by shared code 1181 * return : 0 or idle status (if error) 1182 */ 1183 static int atl1c_reset_mac(struct atl1c_hw *hw) 1184 { 1185 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; 1186 struct pci_dev *pdev = adapter->pdev; 1187 u32 master_ctrl_data = 0; 1188 1189 AT_WRITE_REG(hw, REG_IMR, 0); 1190 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT); 1191 1192 atl1c_stop_mac(hw); 1193 /* 1194 * Issue Soft Reset to the MAC. This will reset the chip's 1195 * transmit, receive, DMA. It will not effect 1196 * the current PCI configuration. The global reset bit is self- 1197 * clearing, and should clear within a microsecond. 1198 */ 1199 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1200 master_ctrl_data |= MASTER_CTRL_OOB_DIS; 1201 AT_WRITE_REG(hw, REG_MASTER_CTRL, 1202 master_ctrl_data | MASTER_CTRL_SOFT_RST); 1203 1204 AT_WRITE_FLUSH(hw); 1205 msleep(10); 1206 /* Wait at least 10ms for All module to be Idle */ 1207 1208 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) { 1209 dev_err(&pdev->dev, 1210 "MAC state machine can't be idle since" 1211 " disabled for 10ms second\n"); 1212 return -1; 1213 } 1214 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1215 1216 return 0; 1217 } 1218 1219 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) 1220 { 1221 u16 ctrl_flags = hw->ctrl_flags; 1222 1223 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT); 1224 atl1c_set_aspm(hw, SPEED_0); 1225 hw->ctrl_flags = ctrl_flags; 1226 } 1227 1228 /* 1229 * Set ASPM state. 1230 * Enable/disable L0s/L1 depend on link state. 1231 */ 1232 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed) 1233 { 1234 u32 pm_ctrl_data; 1235 u32 link_l1_timer; 1236 1237 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); 1238 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN | 1239 PM_CTRL_ASPM_L0S_EN | 1240 PM_CTRL_MAC_ASPM_CHK); 1241 /* L1 timer */ 1242 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1243 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S; 1244 link_l1_timer = 1245 link_speed == SPEED_1000 || link_speed == SPEED_100 ? 1246 L1D_PMCTRL_L1_ENTRY_TM_16US : 1; 1247 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1248 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer); 1249 } else { 1250 link_l1_timer = hw->nic_type == athr_l2c_b ? 1251 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM; 1252 if (link_speed != SPEED_1000 && link_speed != SPEED_100) 1253 link_l1_timer = 1; 1254 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1255 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer); 1256 } 1257 1258 /* L0S/L1 enable */ 1259 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) 1260 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK; 1261 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) 1262 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK; 1263 1264 /* l2cb & l1d & l2cb2 & l1d2 */ 1265 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d || 1266 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) { 1267 pm_ctrl_data = FIELD_SETX(pm_ctrl_data, 1268 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF); 1269 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER | 1270 PM_CTRL_SERDES_PD_EX_L1 | 1271 PM_CTRL_CLK_SWH_L1; 1272 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1273 PM_CTRL_SERDES_PLL_L1_EN | 1274 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1275 PM_CTRL_SA_DLY_EN | 1276 PM_CTRL_HOTRST); 1277 /* disable l0s if link down or l2cb */ 1278 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b) 1279 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; 1280 } else { /* l1c */ 1281 pm_ctrl_data = 1282 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0); 1283 if (link_speed != SPEED_0) { 1284 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN | 1285 PM_CTRL_SERDES_PLL_L1_EN | 1286 PM_CTRL_SERDES_BUFS_RX_L1_EN; 1287 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 | 1288 PM_CTRL_CLK_SWH_L1 | 1289 PM_CTRL_ASPM_L0S_EN | 1290 PM_CTRL_ASPM_L1_EN); 1291 } else { /* link down */ 1292 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; 1293 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN | 1294 PM_CTRL_SERDES_PLL_L1_EN | 1295 PM_CTRL_SERDES_BUFS_RX_L1_EN | 1296 PM_CTRL_ASPM_L0S_EN); 1297 } 1298 } 1299 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); 1300 1301 return; 1302 } 1303 1304 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter) 1305 { 1306 struct atl1c_hw *hw = &adapter->hw; 1307 struct net_device *netdev = adapter->netdev; 1308 u32 mac_ctrl_data; 1309 1310 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN; 1311 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); 1312 1313 if (adapter->link_duplex == FULL_DUPLEX) { 1314 hw->mac_duplex = true; 1315 mac_ctrl_data |= MAC_CTRL_DUPLX; 1316 } 1317 1318 if (adapter->link_speed == SPEED_1000) 1319 hw->mac_speed = atl1c_mac_speed_1000; 1320 else 1321 hw->mac_speed = atl1c_mac_speed_10_100; 1322 1323 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) << 1324 MAC_CTRL_SPEED_SHIFT; 1325 1326 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); 1327 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) << 1328 MAC_CTRL_PRMLEN_SHIFT); 1329 1330 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data); 1331 1332 mac_ctrl_data |= MAC_CTRL_BC_EN; 1333 if (netdev->flags & IFF_PROMISC) 1334 mac_ctrl_data |= MAC_CTRL_PROMIS_EN; 1335 if (netdev->flags & IFF_ALLMULTI) 1336 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; 1337 1338 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN; 1339 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 || 1340 hw->nic_type == athr_l1d_2) { 1341 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW; 1342 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32; 1343 } 1344 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 1345 } 1346 1347 /* 1348 * atl1c_configure - Configure Transmit&Receive Unit after Reset 1349 * @adapter: board private structure 1350 * 1351 * Configure the Tx /Rx unit of the MAC after a reset. 1352 */ 1353 static int atl1c_configure(struct atl1c_adapter *adapter) 1354 { 1355 struct atl1c_hw *hw = &adapter->hw; 1356 u32 master_ctrl_data = 0; 1357 u32 intr_modrt_data; 1358 u32 data; 1359 1360 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 1361 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN | 1362 MASTER_CTRL_RX_ITIMER_EN | 1363 MASTER_CTRL_INT_RDCLR); 1364 /* clear interrupt status */ 1365 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); 1366 /* Clear any WOL status */ 1367 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 1368 /* set Interrupt Clear Timer 1369 * HW will enable self to assert interrupt event to system after 1370 * waiting x-time for software to notify it accept interrupt. 1371 */ 1372 1373 data = CLK_GATING_EN_ALL; 1374 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) { 1375 if (hw->nic_type == athr_l2c_b) 1376 data &= ~CLK_GATING_RXMAC_EN; 1377 } else 1378 data = 0; 1379 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data); 1380 1381 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, 1382 hw->ict & INT_RETRIG_TIMER_MASK); 1383 1384 atl1c_configure_des_ring(adapter); 1385 1386 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { 1387 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << 1388 IRQ_MODRT_TX_TIMER_SHIFT; 1389 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << 1390 IRQ_MODRT_RX_TIMER_SHIFT; 1391 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); 1392 master_ctrl_data |= 1393 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; 1394 } 1395 1396 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) 1397 master_ctrl_data |= MASTER_CTRL_INT_RDCLR; 1398 1399 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN; 1400 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 1401 1402 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, 1403 hw->smb_timer & SMB_STAT_TIMER_MASK); 1404 1405 /* set MTU */ 1406 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + 1407 VLAN_HLEN + ETH_FCS_LEN); 1408 1409 atl1c_configure_tx(adapter); 1410 atl1c_configure_rx(adapter); 1411 atl1c_configure_dma(adapter); 1412 1413 return 0; 1414 } 1415 1416 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) 1417 { 1418 u16 hw_reg_addr = 0; 1419 unsigned long *stats_item = NULL; 1420 u32 data; 1421 1422 /* update rx status */ 1423 hw_reg_addr = REG_MAC_RX_STATUS_BIN; 1424 stats_item = &adapter->hw_stats.rx_ok; 1425 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { 1426 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1427 *stats_item += data; 1428 stats_item++; 1429 hw_reg_addr += 4; 1430 } 1431 /* update tx status */ 1432 hw_reg_addr = REG_MAC_TX_STATUS_BIN; 1433 stats_item = &adapter->hw_stats.tx_ok; 1434 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { 1435 AT_READ_REG(&adapter->hw, hw_reg_addr, &data); 1436 *stats_item += data; 1437 stats_item++; 1438 hw_reg_addr += 4; 1439 } 1440 } 1441 1442 /* 1443 * atl1c_get_stats - Get System Network Statistics 1444 * @netdev: network interface device structure 1445 * 1446 * Returns the address of the device statistics structure. 1447 * The statistics are actually updated from the timer callback. 1448 */ 1449 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) 1450 { 1451 struct atl1c_adapter *adapter = netdev_priv(netdev); 1452 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; 1453 struct net_device_stats *net_stats = &netdev->stats; 1454 1455 atl1c_update_hw_stats(adapter); 1456 net_stats->rx_packets = hw_stats->rx_ok; 1457 net_stats->tx_packets = hw_stats->tx_ok; 1458 net_stats->rx_bytes = hw_stats->rx_byte_cnt; 1459 net_stats->tx_bytes = hw_stats->tx_byte_cnt; 1460 net_stats->multicast = hw_stats->rx_mcast; 1461 net_stats->collisions = hw_stats->tx_1_col + 1462 hw_stats->tx_2_col * 2 + 1463 hw_stats->tx_late_col + hw_stats->tx_abort_col; 1464 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err + 1465 hw_stats->rx_len_err + hw_stats->rx_sz_ov + 1466 hw_stats->rx_rrd_ov + hw_stats->rx_align_err; 1467 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; 1468 net_stats->rx_length_errors = hw_stats->rx_len_err; 1469 net_stats->rx_crc_errors = hw_stats->rx_fcs_err; 1470 net_stats->rx_frame_errors = hw_stats->rx_align_err; 1471 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1472 1473 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; 1474 1475 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col + 1476 hw_stats->tx_underrun + hw_stats->tx_trunc; 1477 net_stats->tx_fifo_errors = hw_stats->tx_underrun; 1478 net_stats->tx_aborted_errors = hw_stats->tx_abort_col; 1479 net_stats->tx_window_errors = hw_stats->tx_late_col; 1480 1481 return net_stats; 1482 } 1483 1484 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) 1485 { 1486 u16 phy_data; 1487 1488 spin_lock(&adapter->mdio_lock); 1489 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); 1490 spin_unlock(&adapter->mdio_lock); 1491 } 1492 1493 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, 1494 enum atl1c_trans_queue type) 1495 { 1496 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) 1497 &adapter->tpd_ring[type]; 1498 struct atl1c_buffer *buffer_info; 1499 struct pci_dev *pdev = adapter->pdev; 1500 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1501 u16 hw_next_to_clean; 1502 u16 reg; 1503 1504 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX; 1505 1506 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean); 1507 1508 while (next_to_clean != hw_next_to_clean) { 1509 buffer_info = &tpd_ring->buffer_info[next_to_clean]; 1510 atl1c_clean_buffer(pdev, buffer_info, 1); 1511 if (++next_to_clean == tpd_ring->count) 1512 next_to_clean = 0; 1513 atomic_set(&tpd_ring->next_to_clean, next_to_clean); 1514 } 1515 1516 if (netif_queue_stopped(adapter->netdev) && 1517 netif_carrier_ok(adapter->netdev)) { 1518 netif_wake_queue(adapter->netdev); 1519 } 1520 1521 return true; 1522 } 1523 1524 /* 1525 * atl1c_intr - Interrupt Handler 1526 * @irq: interrupt number 1527 * @data: pointer to a network interface device structure 1528 * @pt_regs: CPU registers structure 1529 */ 1530 static irqreturn_t atl1c_intr(int irq, void *data) 1531 { 1532 struct net_device *netdev = data; 1533 struct atl1c_adapter *adapter = netdev_priv(netdev); 1534 struct pci_dev *pdev = adapter->pdev; 1535 struct atl1c_hw *hw = &adapter->hw; 1536 int max_ints = AT_MAX_INT_WORK; 1537 int handled = IRQ_NONE; 1538 u32 status; 1539 u32 reg_data; 1540 1541 do { 1542 AT_READ_REG(hw, REG_ISR, ®_data); 1543 status = reg_data & hw->intr_mask; 1544 1545 if (status == 0 || (status & ISR_DIS_INT) != 0) { 1546 if (max_ints != AT_MAX_INT_WORK) 1547 handled = IRQ_HANDLED; 1548 break; 1549 } 1550 /* link event */ 1551 if (status & ISR_GPHY) 1552 atl1c_clear_phy_int(adapter); 1553 /* Ack ISR */ 1554 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); 1555 if (status & ISR_RX_PKT) { 1556 if (likely(napi_schedule_prep(&adapter->napi))) { 1557 hw->intr_mask &= ~ISR_RX_PKT; 1558 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); 1559 __napi_schedule(&adapter->napi); 1560 } 1561 } 1562 if (status & ISR_TX_PKT) 1563 atl1c_clean_tx_irq(adapter, atl1c_trans_normal); 1564 1565 handled = IRQ_HANDLED; 1566 /* check if PCIE PHY Link down */ 1567 if (status & ISR_ERROR) { 1568 if (netif_msg_hw(adapter)) 1569 dev_err(&pdev->dev, 1570 "atl1c hardware error (status = 0x%x)\n", 1571 status & ISR_ERROR); 1572 /* reset MAC */ 1573 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event); 1574 schedule_work(&adapter->common_task); 1575 return IRQ_HANDLED; 1576 } 1577 1578 if (status & ISR_OVER) 1579 if (netif_msg_intr(adapter)) 1580 dev_warn(&pdev->dev, 1581 "TX/RX overflow (status = 0x%x)\n", 1582 status & ISR_OVER); 1583 1584 /* link event */ 1585 if (status & (ISR_GPHY | ISR_MANUAL)) { 1586 netdev->stats.tx_carrier_errors++; 1587 atl1c_link_chg_event(adapter); 1588 break; 1589 } 1590 1591 } while (--max_ints > 0); 1592 /* re-enable Interrupt*/ 1593 AT_WRITE_REG(&adapter->hw, REG_ISR, 0); 1594 return handled; 1595 } 1596 1597 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, 1598 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) 1599 { 1600 /* 1601 * The pid field in RRS in not correct sometimes, so we 1602 * cannot figure out if the packet is fragmented or not, 1603 * so we tell the KERNEL CHECKSUM_NONE 1604 */ 1605 skb_checksum_none_assert(skb); 1606 } 1607 1608 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter) 1609 { 1610 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1611 struct pci_dev *pdev = adapter->pdev; 1612 struct atl1c_buffer *buffer_info, *next_info; 1613 struct sk_buff *skb; 1614 void *vir_addr = NULL; 1615 u16 num_alloc = 0; 1616 u16 rfd_next_to_use, next_next; 1617 struct atl1c_rx_free_desc *rfd_desc; 1618 1619 next_next = rfd_next_to_use = rfd_ring->next_to_use; 1620 if (++next_next == rfd_ring->count) 1621 next_next = 0; 1622 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1623 next_info = &rfd_ring->buffer_info[next_next]; 1624 1625 while (next_info->flags & ATL1C_BUFFER_FREE) { 1626 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); 1627 1628 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len); 1629 if (unlikely(!skb)) { 1630 if (netif_msg_rx_err(adapter)) 1631 dev_warn(&pdev->dev, "alloc rx buffer failed\n"); 1632 break; 1633 } 1634 1635 /* 1636 * Make buffer alignment 2 beyond a 16 byte boundary 1637 * this will result in a 16 byte aligned IP header after 1638 * the 14 byte MAC header is removed 1639 */ 1640 vir_addr = skb->data; 1641 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 1642 buffer_info->skb = skb; 1643 buffer_info->length = adapter->rx_buffer_len; 1644 buffer_info->dma = pci_map_single(pdev, vir_addr, 1645 buffer_info->length, 1646 PCI_DMA_FROMDEVICE); 1647 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 1648 ATL1C_PCIMAP_FROMDEVICE); 1649 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 1650 rfd_next_to_use = next_next; 1651 if (++next_next == rfd_ring->count) 1652 next_next = 0; 1653 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; 1654 next_info = &rfd_ring->buffer_info[next_next]; 1655 num_alloc++; 1656 } 1657 1658 if (num_alloc) { 1659 /* TODO: update mailbox here */ 1660 wmb(); 1661 rfd_ring->next_to_use = rfd_next_to_use; 1662 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX, 1663 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); 1664 } 1665 1666 return num_alloc; 1667 } 1668 1669 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, 1670 struct atl1c_recv_ret_status *rrs, u16 num) 1671 { 1672 u16 i; 1673 /* the relationship between rrd and rfd is one map one */ 1674 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, 1675 rrd_ring->next_to_clean)) { 1676 rrs->word3 &= ~RRS_RXD_UPDATED; 1677 if (++rrd_ring->next_to_clean == rrd_ring->count) 1678 rrd_ring->next_to_clean = 0; 1679 } 1680 } 1681 1682 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, 1683 struct atl1c_recv_ret_status *rrs, u16 num) 1684 { 1685 u16 i; 1686 u16 rfd_index; 1687 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; 1688 1689 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1690 RRS_RX_RFD_INDEX_MASK; 1691 for (i = 0; i < num; i++) { 1692 buffer_info[rfd_index].skb = NULL; 1693 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index], 1694 ATL1C_BUFFER_FREE); 1695 if (++rfd_index == rfd_ring->count) 1696 rfd_index = 0; 1697 } 1698 rfd_ring->next_to_clean = rfd_index; 1699 } 1700 1701 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, 1702 int *work_done, int work_to_do) 1703 { 1704 u16 rfd_num, rfd_index; 1705 u16 count = 0; 1706 u16 length; 1707 struct pci_dev *pdev = adapter->pdev; 1708 struct net_device *netdev = adapter->netdev; 1709 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring; 1710 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring; 1711 struct sk_buff *skb; 1712 struct atl1c_recv_ret_status *rrs; 1713 struct atl1c_buffer *buffer_info; 1714 1715 while (1) { 1716 if (*work_done >= work_to_do) 1717 break; 1718 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); 1719 if (likely(RRS_RXD_IS_VALID(rrs->word3))) { 1720 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & 1721 RRS_RX_RFD_CNT_MASK; 1722 if (unlikely(rfd_num != 1)) 1723 /* TODO support mul rfd*/ 1724 if (netif_msg_rx_err(adapter)) 1725 dev_warn(&pdev->dev, 1726 "Multi rfd not support yet!\n"); 1727 goto rrs_checked; 1728 } else { 1729 break; 1730 } 1731 rrs_checked: 1732 atl1c_clean_rrd(rrd_ring, rrs, rfd_num); 1733 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { 1734 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1735 if (netif_msg_rx_err(adapter)) 1736 dev_warn(&pdev->dev, 1737 "wrong packet! rrs word3 is %x\n", 1738 rrs->word3); 1739 continue; 1740 } 1741 1742 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & 1743 RRS_PKT_SIZE_MASK); 1744 /* Good Receive */ 1745 if (likely(rfd_num == 1)) { 1746 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & 1747 RRS_RX_RFD_INDEX_MASK; 1748 buffer_info = &rfd_ring->buffer_info[rfd_index]; 1749 pci_unmap_single(pdev, buffer_info->dma, 1750 buffer_info->length, PCI_DMA_FROMDEVICE); 1751 skb = buffer_info->skb; 1752 } else { 1753 /* TODO */ 1754 if (netif_msg_rx_err(adapter)) 1755 dev_warn(&pdev->dev, 1756 "Multi rfd not support yet!\n"); 1757 break; 1758 } 1759 atl1c_clean_rfd(rfd_ring, rrs, rfd_num); 1760 skb_put(skb, length - ETH_FCS_LEN); 1761 skb->protocol = eth_type_trans(skb, netdev); 1762 atl1c_rx_checksum(adapter, skb, rrs); 1763 if (rrs->word3 & RRS_VLAN_INS) { 1764 u16 vlan; 1765 1766 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); 1767 vlan = le16_to_cpu(vlan); 1768 __vlan_hwaccel_put_tag(skb, vlan); 1769 } 1770 netif_receive_skb(skb); 1771 1772 (*work_done)++; 1773 count++; 1774 } 1775 if (count) 1776 atl1c_alloc_rx_buffer(adapter); 1777 } 1778 1779 /* 1780 * atl1c_clean - NAPI Rx polling callback 1781 * @adapter: board private structure 1782 */ 1783 static int atl1c_clean(struct napi_struct *napi, int budget) 1784 { 1785 struct atl1c_adapter *adapter = 1786 container_of(napi, struct atl1c_adapter, napi); 1787 int work_done = 0; 1788 1789 /* Keep link state information with original netdev */ 1790 if (!netif_carrier_ok(adapter->netdev)) 1791 goto quit_polling; 1792 /* just enable one RXQ */ 1793 atl1c_clean_rx_irq(adapter, &work_done, budget); 1794 1795 if (work_done < budget) { 1796 quit_polling: 1797 napi_complete(napi); 1798 adapter->hw.intr_mask |= ISR_RX_PKT; 1799 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); 1800 } 1801 return work_done; 1802 } 1803 1804 #ifdef CONFIG_NET_POLL_CONTROLLER 1805 1806 /* 1807 * Polling 'interrupt' - used by things like netconsole to send skbs 1808 * without having to re-enable interrupts. It's not called while 1809 * the interrupt routine is executing. 1810 */ 1811 static void atl1c_netpoll(struct net_device *netdev) 1812 { 1813 struct atl1c_adapter *adapter = netdev_priv(netdev); 1814 1815 disable_irq(adapter->pdev->irq); 1816 atl1c_intr(adapter->pdev->irq, netdev); 1817 enable_irq(adapter->pdev->irq); 1818 } 1819 #endif 1820 1821 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) 1822 { 1823 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1824 u16 next_to_use = 0; 1825 u16 next_to_clean = 0; 1826 1827 next_to_clean = atomic_read(&tpd_ring->next_to_clean); 1828 next_to_use = tpd_ring->next_to_use; 1829 1830 return (u16)(next_to_clean > next_to_use) ? 1831 (next_to_clean - next_to_use - 1) : 1832 (tpd_ring->count + next_to_clean - next_to_use - 1); 1833 } 1834 1835 /* 1836 * get next usable tpd 1837 * Note: should call atl1c_tdp_avail to make sure 1838 * there is enough tpd to use 1839 */ 1840 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, 1841 enum atl1c_trans_queue type) 1842 { 1843 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 1844 struct atl1c_tpd_desc *tpd_desc; 1845 u16 next_to_use = 0; 1846 1847 next_to_use = tpd_ring->next_to_use; 1848 if (++tpd_ring->next_to_use == tpd_ring->count) 1849 tpd_ring->next_to_use = 0; 1850 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); 1851 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); 1852 return tpd_desc; 1853 } 1854 1855 static struct atl1c_buffer * 1856 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) 1857 { 1858 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; 1859 1860 return &tpd_ring->buffer_info[tpd - 1861 (struct atl1c_tpd_desc *)tpd_ring->desc]; 1862 } 1863 1864 /* Calculate the transmit packet descript needed*/ 1865 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) 1866 { 1867 u16 tpd_req; 1868 u16 proto_hdr_len = 0; 1869 1870 tpd_req = skb_shinfo(skb)->nr_frags + 1; 1871 1872 if (skb_is_gso(skb)) { 1873 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 1874 if (proto_hdr_len < skb_headlen(skb)) 1875 tpd_req++; 1876 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) 1877 tpd_req++; 1878 } 1879 return tpd_req; 1880 } 1881 1882 static int atl1c_tso_csum(struct atl1c_adapter *adapter, 1883 struct sk_buff *skb, 1884 struct atl1c_tpd_desc **tpd, 1885 enum atl1c_trans_queue type) 1886 { 1887 struct pci_dev *pdev = adapter->pdev; 1888 u8 hdr_len; 1889 u32 real_len; 1890 unsigned short offload_type; 1891 int err; 1892 1893 if (skb_is_gso(skb)) { 1894 if (skb_header_cloned(skb)) { 1895 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 1896 if (unlikely(err)) 1897 return -1; 1898 } 1899 offload_type = skb_shinfo(skb)->gso_type; 1900 1901 if (offload_type & SKB_GSO_TCPV4) { 1902 real_len = (((unsigned char *)ip_hdr(skb) - skb->data) 1903 + ntohs(ip_hdr(skb)->tot_len)); 1904 1905 if (real_len < skb->len) 1906 pskb_trim(skb, real_len); 1907 1908 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1909 if (unlikely(skb->len == hdr_len)) { 1910 /* only xsum need */ 1911 if (netif_msg_tx_queued(adapter)) 1912 dev_warn(&pdev->dev, 1913 "IPV4 tso with zero data??\n"); 1914 goto check_sum; 1915 } else { 1916 ip_hdr(skb)->check = 0; 1917 tcp_hdr(skb)->check = ~csum_tcpudp_magic( 1918 ip_hdr(skb)->saddr, 1919 ip_hdr(skb)->daddr, 1920 0, IPPROTO_TCP, 0); 1921 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; 1922 } 1923 } 1924 1925 if (offload_type & SKB_GSO_TCPV6) { 1926 struct atl1c_tpd_ext_desc *etpd = 1927 *(struct atl1c_tpd_ext_desc **)(tpd); 1928 1929 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); 1930 *tpd = atl1c_get_tpd(adapter, type); 1931 ipv6_hdr(skb)->payload_len = 0; 1932 /* check payload == 0 byte ? */ 1933 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); 1934 if (unlikely(skb->len == hdr_len)) { 1935 /* only xsum need */ 1936 if (netif_msg_tx_queued(adapter)) 1937 dev_warn(&pdev->dev, 1938 "IPV6 tso with zero data??\n"); 1939 goto check_sum; 1940 } else 1941 tcp_hdr(skb)->check = ~csum_ipv6_magic( 1942 &ipv6_hdr(skb)->saddr, 1943 &ipv6_hdr(skb)->daddr, 1944 0, IPPROTO_TCP, 0); 1945 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; 1946 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; 1947 etpd->pkt_len = cpu_to_le32(skb->len); 1948 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; 1949 } 1950 1951 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; 1952 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << 1953 TPD_TCPHDR_OFFSET_SHIFT; 1954 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << 1955 TPD_MSS_SHIFT; 1956 return 0; 1957 } 1958 1959 check_sum: 1960 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 1961 u8 css, cso; 1962 cso = skb_checksum_start_offset(skb); 1963 1964 if (unlikely(cso & 0x1)) { 1965 if (netif_msg_tx_err(adapter)) 1966 dev_err(&adapter->pdev->dev, 1967 "payload offset should not an event number\n"); 1968 return -1; 1969 } else { 1970 css = cso + skb->csum_offset; 1971 1972 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << 1973 TPD_PLOADOFFSET_SHIFT; 1974 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << 1975 TPD_CCSUM_OFFSET_SHIFT; 1976 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; 1977 } 1978 } 1979 return 0; 1980 } 1981 1982 static void atl1c_tx_map(struct atl1c_adapter *adapter, 1983 struct sk_buff *skb, struct atl1c_tpd_desc *tpd, 1984 enum atl1c_trans_queue type) 1985 { 1986 struct atl1c_tpd_desc *use_tpd = NULL; 1987 struct atl1c_buffer *buffer_info = NULL; 1988 u16 buf_len = skb_headlen(skb); 1989 u16 map_len = 0; 1990 u16 mapped_len = 0; 1991 u16 hdr_len = 0; 1992 u16 nr_frags; 1993 u16 f; 1994 int tso; 1995 1996 nr_frags = skb_shinfo(skb)->nr_frags; 1997 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; 1998 if (tso) { 1999 /* TSO */ 2000 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2001 use_tpd = tpd; 2002 2003 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2004 buffer_info->length = map_len; 2005 buffer_info->dma = pci_map_single(adapter->pdev, 2006 skb->data, hdr_len, PCI_DMA_TODEVICE); 2007 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2008 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2009 ATL1C_PCIMAP_TODEVICE); 2010 mapped_len += map_len; 2011 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2012 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2013 } 2014 2015 if (mapped_len < buf_len) { 2016 /* mapped_len == 0, means we should use the first tpd, 2017 which is given by caller */ 2018 if (mapped_len == 0) 2019 use_tpd = tpd; 2020 else { 2021 use_tpd = atl1c_get_tpd(adapter, type); 2022 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2023 } 2024 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2025 buffer_info->length = buf_len - mapped_len; 2026 buffer_info->dma = 2027 pci_map_single(adapter->pdev, skb->data + mapped_len, 2028 buffer_info->length, PCI_DMA_TODEVICE); 2029 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2030 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE, 2031 ATL1C_PCIMAP_TODEVICE); 2032 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2033 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2034 } 2035 2036 for (f = 0; f < nr_frags; f++) { 2037 struct skb_frag_struct *frag; 2038 2039 frag = &skb_shinfo(skb)->frags[f]; 2040 2041 use_tpd = atl1c_get_tpd(adapter, type); 2042 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); 2043 2044 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); 2045 buffer_info->length = skb_frag_size(frag); 2046 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev, 2047 frag, 0, 2048 buffer_info->length, 2049 DMA_TO_DEVICE); 2050 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY); 2051 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE, 2052 ATL1C_PCIMAP_TODEVICE); 2053 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); 2054 use_tpd->buffer_len = cpu_to_le16(buffer_info->length); 2055 } 2056 2057 /* The last tpd */ 2058 use_tpd->word1 |= 1 << TPD_EOP_SHIFT; 2059 /* The last buffer info contain the skb address, 2060 so it will be free after unmap */ 2061 buffer_info->skb = skb; 2062 } 2063 2064 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, 2065 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) 2066 { 2067 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; 2068 u16 reg; 2069 2070 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX; 2071 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use); 2072 } 2073 2074 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb, 2075 struct net_device *netdev) 2076 { 2077 struct atl1c_adapter *adapter = netdev_priv(netdev); 2078 unsigned long flags; 2079 u16 tpd_req = 1; 2080 struct atl1c_tpd_desc *tpd; 2081 enum atl1c_trans_queue type = atl1c_trans_normal; 2082 2083 if (test_bit(__AT_DOWN, &adapter->flags)) { 2084 dev_kfree_skb_any(skb); 2085 return NETDEV_TX_OK; 2086 } 2087 2088 tpd_req = atl1c_cal_tpd_req(skb); 2089 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { 2090 if (netif_msg_pktdata(adapter)) 2091 dev_info(&adapter->pdev->dev, "tx locked\n"); 2092 return NETDEV_TX_LOCKED; 2093 } 2094 2095 if (atl1c_tpd_avail(adapter, type) < tpd_req) { 2096 /* no enough descriptor, just stop queue */ 2097 netif_stop_queue(netdev); 2098 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2099 return NETDEV_TX_BUSY; 2100 } 2101 2102 tpd = atl1c_get_tpd(adapter, type); 2103 2104 /* do TSO and check sum */ 2105 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { 2106 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2107 dev_kfree_skb_any(skb); 2108 return NETDEV_TX_OK; 2109 } 2110 2111 if (unlikely(vlan_tx_tag_present(skb))) { 2112 u16 vlan = vlan_tx_tag_get(skb); 2113 __le16 tag; 2114 2115 vlan = cpu_to_le16(vlan); 2116 AT_VLAN_TO_TAG(vlan, tag); 2117 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; 2118 tpd->vlan_tag = tag; 2119 } 2120 2121 if (skb_network_offset(skb) != ETH_HLEN) 2122 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ 2123 2124 atl1c_tx_map(adapter, skb, tpd, type); 2125 atl1c_tx_queue(adapter, skb, tpd, type); 2126 2127 spin_unlock_irqrestore(&adapter->tx_lock, flags); 2128 return NETDEV_TX_OK; 2129 } 2130 2131 static void atl1c_free_irq(struct atl1c_adapter *adapter) 2132 { 2133 struct net_device *netdev = adapter->netdev; 2134 2135 free_irq(adapter->pdev->irq, netdev); 2136 2137 if (adapter->have_msi) 2138 pci_disable_msi(adapter->pdev); 2139 } 2140 2141 static int atl1c_request_irq(struct atl1c_adapter *adapter) 2142 { 2143 struct pci_dev *pdev = adapter->pdev; 2144 struct net_device *netdev = adapter->netdev; 2145 int flags = 0; 2146 int err = 0; 2147 2148 adapter->have_msi = true; 2149 err = pci_enable_msi(adapter->pdev); 2150 if (err) { 2151 if (netif_msg_ifup(adapter)) 2152 dev_err(&pdev->dev, 2153 "Unable to allocate MSI interrupt Error: %d\n", 2154 err); 2155 adapter->have_msi = false; 2156 } 2157 2158 if (!adapter->have_msi) 2159 flags |= IRQF_SHARED; 2160 err = request_irq(adapter->pdev->irq, atl1c_intr, flags, 2161 netdev->name, netdev); 2162 if (err) { 2163 if (netif_msg_ifup(adapter)) 2164 dev_err(&pdev->dev, 2165 "Unable to allocate interrupt Error: %d\n", 2166 err); 2167 if (adapter->have_msi) 2168 pci_disable_msi(adapter->pdev); 2169 return err; 2170 } 2171 if (netif_msg_ifup(adapter)) 2172 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); 2173 return err; 2174 } 2175 2176 static int atl1c_up(struct atl1c_adapter *adapter) 2177 { 2178 struct net_device *netdev = adapter->netdev; 2179 int num; 2180 int err; 2181 2182 netif_carrier_off(netdev); 2183 atl1c_init_ring_ptrs(adapter); 2184 atl1c_set_multi(netdev); 2185 atl1c_restore_vlan(adapter); 2186 2187 num = atl1c_alloc_rx_buffer(adapter); 2188 if (unlikely(num == 0)) { 2189 err = -ENOMEM; 2190 goto err_alloc_rx; 2191 } 2192 2193 if (atl1c_configure(adapter)) { 2194 err = -EIO; 2195 goto err_up; 2196 } 2197 2198 err = atl1c_request_irq(adapter); 2199 if (unlikely(err)) 2200 goto err_up; 2201 2202 clear_bit(__AT_DOWN, &adapter->flags); 2203 napi_enable(&adapter->napi); 2204 atl1c_irq_enable(adapter); 2205 atl1c_check_link_status(adapter); 2206 netif_start_queue(netdev); 2207 return err; 2208 2209 err_up: 2210 err_alloc_rx: 2211 atl1c_clean_rx_ring(adapter); 2212 return err; 2213 } 2214 2215 static void atl1c_down(struct atl1c_adapter *adapter) 2216 { 2217 struct net_device *netdev = adapter->netdev; 2218 2219 atl1c_del_timer(adapter); 2220 adapter->work_event = 0; /* clear all event */ 2221 /* signal that we're down so the interrupt handler does not 2222 * reschedule our watchdog timer */ 2223 set_bit(__AT_DOWN, &adapter->flags); 2224 netif_carrier_off(netdev); 2225 napi_disable(&adapter->napi); 2226 atl1c_irq_disable(adapter); 2227 atl1c_free_irq(adapter); 2228 /* disable ASPM if device inactive */ 2229 atl1c_disable_l0s_l1(&adapter->hw); 2230 /* reset MAC to disable all RX/TX */ 2231 atl1c_reset_mac(&adapter->hw); 2232 msleep(1); 2233 2234 adapter->link_speed = SPEED_0; 2235 adapter->link_duplex = -1; 2236 atl1c_clean_tx_ring(adapter, atl1c_trans_normal); 2237 atl1c_clean_tx_ring(adapter, atl1c_trans_high); 2238 atl1c_clean_rx_ring(adapter); 2239 } 2240 2241 /* 2242 * atl1c_open - Called when a network interface is made active 2243 * @netdev: network interface device structure 2244 * 2245 * Returns 0 on success, negative value on failure 2246 * 2247 * The open entry point is called when a network interface is made 2248 * active by the system (IFF_UP). At this point all resources needed 2249 * for transmit and receive operations are allocated, the interrupt 2250 * handler is registered with the OS, the watchdog timer is started, 2251 * and the stack is notified that the interface is ready. 2252 */ 2253 static int atl1c_open(struct net_device *netdev) 2254 { 2255 struct atl1c_adapter *adapter = netdev_priv(netdev); 2256 int err; 2257 2258 /* disallow open during test */ 2259 if (test_bit(__AT_TESTING, &adapter->flags)) 2260 return -EBUSY; 2261 2262 /* allocate rx/tx dma buffer & descriptors */ 2263 err = atl1c_setup_ring_resources(adapter); 2264 if (unlikely(err)) 2265 return err; 2266 2267 err = atl1c_up(adapter); 2268 if (unlikely(err)) 2269 goto err_up; 2270 2271 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { 2272 u32 phy_data; 2273 2274 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data); 2275 phy_data |= MDIO_AP_EN; 2276 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data); 2277 } 2278 return 0; 2279 2280 err_up: 2281 atl1c_free_irq(adapter); 2282 atl1c_free_ring_resources(adapter); 2283 atl1c_reset_mac(&adapter->hw); 2284 return err; 2285 } 2286 2287 /* 2288 * atl1c_close - Disables a network interface 2289 * @netdev: network interface device structure 2290 * 2291 * Returns 0, this is not allowed to fail 2292 * 2293 * The close entry point is called when an interface is de-activated 2294 * by the OS. The hardware is still under the drivers control, but 2295 * needs to be disabled. A global MAC reset is issued to stop the 2296 * hardware, and all transmit and receive resources are freed. 2297 */ 2298 static int atl1c_close(struct net_device *netdev) 2299 { 2300 struct atl1c_adapter *adapter = netdev_priv(netdev); 2301 2302 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2303 atl1c_down(adapter); 2304 atl1c_free_ring_resources(adapter); 2305 return 0; 2306 } 2307 2308 static int atl1c_suspend(struct device *dev) 2309 { 2310 struct pci_dev *pdev = to_pci_dev(dev); 2311 struct net_device *netdev = pci_get_drvdata(pdev); 2312 struct atl1c_adapter *adapter = netdev_priv(netdev); 2313 struct atl1c_hw *hw = &adapter->hw; 2314 u32 mac_ctrl_data = 0; 2315 u32 master_ctrl_data = 0; 2316 u32 wol_ctrl_data = 0; 2317 u16 mii_intr_status_data = 0; 2318 u32 wufc = adapter->wol; 2319 2320 atl1c_disable_l0s_l1(hw); 2321 if (netif_running(netdev)) { 2322 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); 2323 atl1c_down(adapter); 2324 } 2325 netif_device_detach(netdev); 2326 2327 if (wufc) 2328 if (atl1c_phy_power_saving(hw) != 0) 2329 dev_dbg(&pdev->dev, "phy power saving failed"); 2330 2331 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); 2332 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); 2333 2334 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS; 2335 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT); 2336 mac_ctrl_data |= (((u32)adapter->hw.preamble_len & 2337 MAC_CTRL_PRMLEN_MASK) << 2338 MAC_CTRL_PRMLEN_SHIFT); 2339 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT); 2340 mac_ctrl_data &= ~MAC_CTRL_DUPLX; 2341 2342 if (wufc) { 2343 mac_ctrl_data |= MAC_CTRL_RX_EN; 2344 if (adapter->link_speed == SPEED_1000 || 2345 adapter->link_speed == SPEED_0) { 2346 mac_ctrl_data |= atl1c_mac_speed_1000 << 2347 MAC_CTRL_SPEED_SHIFT; 2348 mac_ctrl_data |= MAC_CTRL_DUPLX; 2349 } else 2350 mac_ctrl_data |= atl1c_mac_speed_10_100 << 2351 MAC_CTRL_SPEED_SHIFT; 2352 2353 if (adapter->link_duplex == DUPLEX_FULL) 2354 mac_ctrl_data |= MAC_CTRL_DUPLX; 2355 2356 /* turn on magic packet wol */ 2357 if (wufc & AT_WUFC_MAG) { 2358 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN; 2359 if (hw->nic_type == athr_l2c_b && 2360 hw->revision_id == L2CB_V11) { 2361 wol_ctrl_data |= 2362 WOL_PATTERN_EN | WOL_PATTERN_PME_EN; 2363 } 2364 } 2365 if (wufc & AT_WUFC_LNKC) { 2366 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; 2367 /* only link up can wake up */ 2368 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) { 2369 dev_dbg(&pdev->dev, "%s: read write phy " 2370 "register failed.\n", 2371 atl1c_driver_name); 2372 } 2373 } 2374 /* clear phy interrupt */ 2375 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data); 2376 /* Config MAC Ctrl register */ 2377 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data); 2378 2379 /* magic packet maybe Broadcast&multicast&Unicast frame */ 2380 if (wufc & AT_WUFC_MAG) 2381 mac_ctrl_data |= MAC_CTRL_BC_EN; 2382 2383 dev_dbg(&pdev->dev, 2384 "%s: suspend MAC=0x%x\n", 2385 atl1c_driver_name, mac_ctrl_data); 2386 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 2387 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); 2388 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2389 2390 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT | 2391 GPHY_CTRL_EXT_RESET); 2392 } else { 2393 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING); 2394 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS; 2395 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT; 2396 mac_ctrl_data |= MAC_CTRL_DUPLX; 2397 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); 2398 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); 2399 AT_WRITE_REG(hw, REG_WOL_CTRL, 0); 2400 hw->phy_configured = false; /* re-init PHY when resume */ 2401 } 2402 2403 return 0; 2404 } 2405 2406 #ifdef CONFIG_PM_SLEEP 2407 static int atl1c_resume(struct device *dev) 2408 { 2409 struct pci_dev *pdev = to_pci_dev(dev); 2410 struct net_device *netdev = pci_get_drvdata(pdev); 2411 struct atl1c_adapter *adapter = netdev_priv(netdev); 2412 2413 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); 2414 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | 2415 ATL1C_PCIE_PHY_RESET); 2416 2417 atl1c_phy_reset(&adapter->hw); 2418 atl1c_reset_mac(&adapter->hw); 2419 atl1c_phy_init(&adapter->hw); 2420 2421 #if 0 2422 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data); 2423 pm_data &= ~PM_CTRLSTAT_PME_EN; 2424 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data); 2425 #endif 2426 2427 netif_device_attach(netdev); 2428 if (netif_running(netdev)) 2429 atl1c_up(adapter); 2430 2431 return 0; 2432 } 2433 #endif 2434 2435 static void atl1c_shutdown(struct pci_dev *pdev) 2436 { 2437 struct net_device *netdev = pci_get_drvdata(pdev); 2438 struct atl1c_adapter *adapter = netdev_priv(netdev); 2439 2440 atl1c_suspend(&pdev->dev); 2441 pci_wake_from_d3(pdev, adapter->wol); 2442 pci_set_power_state(pdev, PCI_D3hot); 2443 } 2444 2445 static const struct net_device_ops atl1c_netdev_ops = { 2446 .ndo_open = atl1c_open, 2447 .ndo_stop = atl1c_close, 2448 .ndo_validate_addr = eth_validate_addr, 2449 .ndo_start_xmit = atl1c_xmit_frame, 2450 .ndo_set_mac_address = atl1c_set_mac_addr, 2451 .ndo_set_rx_mode = atl1c_set_multi, 2452 .ndo_change_mtu = atl1c_change_mtu, 2453 .ndo_fix_features = atl1c_fix_features, 2454 .ndo_set_features = atl1c_set_features, 2455 .ndo_do_ioctl = atl1c_ioctl, 2456 .ndo_tx_timeout = atl1c_tx_timeout, 2457 .ndo_get_stats = atl1c_get_stats, 2458 #ifdef CONFIG_NET_POLL_CONTROLLER 2459 .ndo_poll_controller = atl1c_netpoll, 2460 #endif 2461 }; 2462 2463 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) 2464 { 2465 SET_NETDEV_DEV(netdev, &pdev->dev); 2466 pci_set_drvdata(pdev, netdev); 2467 2468 netdev->netdev_ops = &atl1c_netdev_ops; 2469 netdev->watchdog_timeo = AT_TX_WATCHDOG; 2470 atl1c_set_ethtool_ops(netdev); 2471 2472 /* TODO: add when ready */ 2473 netdev->hw_features = NETIF_F_SG | 2474 NETIF_F_HW_CSUM | 2475 NETIF_F_HW_VLAN_RX | 2476 NETIF_F_TSO | 2477 NETIF_F_TSO6; 2478 netdev->features = netdev->hw_features | 2479 NETIF_F_HW_VLAN_TX; 2480 return 0; 2481 } 2482 2483 /* 2484 * atl1c_probe - Device Initialization Routine 2485 * @pdev: PCI device information struct 2486 * @ent: entry in atl1c_pci_tbl 2487 * 2488 * Returns 0 on success, negative on failure 2489 * 2490 * atl1c_probe initializes an adapter identified by a pci_dev structure. 2491 * The OS initialization, configuring of the adapter private structure, 2492 * and a hardware reset occur. 2493 */ 2494 static int __devinit atl1c_probe(struct pci_dev *pdev, 2495 const struct pci_device_id *ent) 2496 { 2497 struct net_device *netdev; 2498 struct atl1c_adapter *adapter; 2499 static int cards_found; 2500 2501 int err = 0; 2502 2503 /* enable device (incl. PCI PM wakeup and hotplug setup) */ 2504 err = pci_enable_device_mem(pdev); 2505 if (err) { 2506 dev_err(&pdev->dev, "cannot enable PCI device\n"); 2507 return err; 2508 } 2509 2510 /* 2511 * The atl1c chip can DMA to 64-bit addresses, but it uses a single 2512 * shared register for the high 32 bits, so only a single, aligned, 2513 * 4 GB physical address range can be used at a time. 2514 * 2515 * Supporting 64-bit DMA on this hardware is more trouble than it's 2516 * worth. It is far easier to limit to 32-bit DMA than update 2517 * various kernel subsystems to support the mechanics required by a 2518 * fixed-high-32-bit system. 2519 */ 2520 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || 2521 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { 2522 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2523 goto err_dma; 2524 } 2525 2526 err = pci_request_regions(pdev, atl1c_driver_name); 2527 if (err) { 2528 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); 2529 goto err_pci_reg; 2530 } 2531 2532 pci_set_master(pdev); 2533 2534 netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); 2535 if (netdev == NULL) { 2536 err = -ENOMEM; 2537 goto err_alloc_etherdev; 2538 } 2539 2540 err = atl1c_init_netdev(netdev, pdev); 2541 if (err) { 2542 dev_err(&pdev->dev, "init netdevice failed\n"); 2543 goto err_init_netdev; 2544 } 2545 adapter = netdev_priv(netdev); 2546 adapter->bd_number = cards_found; 2547 adapter->netdev = netdev; 2548 adapter->pdev = pdev; 2549 adapter->hw.adapter = adapter; 2550 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); 2551 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 2552 if (!adapter->hw.hw_addr) { 2553 err = -EIO; 2554 dev_err(&pdev->dev, "cannot map device registers\n"); 2555 goto err_ioremap; 2556 } 2557 2558 /* init mii data */ 2559 adapter->mii.dev = netdev; 2560 adapter->mii.mdio_read = atl1c_mdio_read; 2561 adapter->mii.mdio_write = atl1c_mdio_write; 2562 adapter->mii.phy_id_mask = 0x1f; 2563 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; 2564 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); 2565 setup_timer(&adapter->phy_config_timer, atl1c_phy_config, 2566 (unsigned long)adapter); 2567 /* setup the private structure */ 2568 err = atl1c_sw_init(adapter); 2569 if (err) { 2570 dev_err(&pdev->dev, "net device private data init failed\n"); 2571 goto err_sw_init; 2572 } 2573 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | 2574 ATL1C_PCIE_PHY_RESET); 2575 2576 /* Init GPHY as early as possible due to power saving issue */ 2577 atl1c_phy_reset(&adapter->hw); 2578 2579 err = atl1c_reset_mac(&adapter->hw); 2580 if (err) { 2581 err = -EIO; 2582 goto err_reset; 2583 } 2584 2585 /* reset the controller to 2586 * put the device in a known good starting state */ 2587 err = atl1c_phy_init(&adapter->hw); 2588 if (err) { 2589 err = -EIO; 2590 goto err_reset; 2591 } 2592 if (atl1c_read_mac_addr(&adapter->hw)) { 2593 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */ 2594 netdev->addr_assign_type |= NET_ADDR_RANDOM; 2595 } 2596 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 2597 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); 2598 if (netif_msg_probe(adapter)) 2599 dev_dbg(&pdev->dev, "mac address : %pM\n", 2600 adapter->hw.mac_addr); 2601 2602 atl1c_hw_set_mac_addr(&adapter->hw); 2603 INIT_WORK(&adapter->common_task, atl1c_common_task); 2604 adapter->work_event = 0; 2605 err = register_netdev(netdev); 2606 if (err) { 2607 dev_err(&pdev->dev, "register netdevice failed\n"); 2608 goto err_register; 2609 } 2610 2611 if (netif_msg_probe(adapter)) 2612 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); 2613 cards_found++; 2614 return 0; 2615 2616 err_reset: 2617 err_register: 2618 err_sw_init: 2619 iounmap(adapter->hw.hw_addr); 2620 err_init_netdev: 2621 err_ioremap: 2622 free_netdev(netdev); 2623 err_alloc_etherdev: 2624 pci_release_regions(pdev); 2625 err_pci_reg: 2626 err_dma: 2627 pci_disable_device(pdev); 2628 return err; 2629 } 2630 2631 /* 2632 * atl1c_remove - Device Removal Routine 2633 * @pdev: PCI device information struct 2634 * 2635 * atl1c_remove is called by the PCI subsystem to alert the driver 2636 * that it should release a PCI device. The could be caused by a 2637 * Hot-Plug event, or because the driver is going to be removed from 2638 * memory. 2639 */ 2640 static void __devexit atl1c_remove(struct pci_dev *pdev) 2641 { 2642 struct net_device *netdev = pci_get_drvdata(pdev); 2643 struct atl1c_adapter *adapter = netdev_priv(netdev); 2644 2645 unregister_netdev(netdev); 2646 atl1c_phy_disable(&adapter->hw); 2647 2648 iounmap(adapter->hw.hw_addr); 2649 2650 pci_release_regions(pdev); 2651 pci_disable_device(pdev); 2652 free_netdev(netdev); 2653 } 2654 2655 /* 2656 * atl1c_io_error_detected - called when PCI error is detected 2657 * @pdev: Pointer to PCI device 2658 * @state: The current pci connection state 2659 * 2660 * This function is called after a PCI bus error affecting 2661 * this device has been detected. 2662 */ 2663 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, 2664 pci_channel_state_t state) 2665 { 2666 struct net_device *netdev = pci_get_drvdata(pdev); 2667 struct atl1c_adapter *adapter = netdev_priv(netdev); 2668 2669 netif_device_detach(netdev); 2670 2671 if (state == pci_channel_io_perm_failure) 2672 return PCI_ERS_RESULT_DISCONNECT; 2673 2674 if (netif_running(netdev)) 2675 atl1c_down(adapter); 2676 2677 pci_disable_device(pdev); 2678 2679 /* Request a slot slot reset. */ 2680 return PCI_ERS_RESULT_NEED_RESET; 2681 } 2682 2683 /* 2684 * atl1c_io_slot_reset - called after the pci bus has been reset. 2685 * @pdev: Pointer to PCI device 2686 * 2687 * Restart the card from scratch, as if from a cold-boot. Implementation 2688 * resembles the first-half of the e1000_resume routine. 2689 */ 2690 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) 2691 { 2692 struct net_device *netdev = pci_get_drvdata(pdev); 2693 struct atl1c_adapter *adapter = netdev_priv(netdev); 2694 2695 if (pci_enable_device(pdev)) { 2696 if (netif_msg_hw(adapter)) 2697 dev_err(&pdev->dev, 2698 "Cannot re-enable PCI device after reset\n"); 2699 return PCI_ERS_RESULT_DISCONNECT; 2700 } 2701 pci_set_master(pdev); 2702 2703 pci_enable_wake(pdev, PCI_D3hot, 0); 2704 pci_enable_wake(pdev, PCI_D3cold, 0); 2705 2706 atl1c_reset_mac(&adapter->hw); 2707 2708 return PCI_ERS_RESULT_RECOVERED; 2709 } 2710 2711 /* 2712 * atl1c_io_resume - called when traffic can start flowing again. 2713 * @pdev: Pointer to PCI device 2714 * 2715 * This callback is called when the error recovery driver tells us that 2716 * its OK to resume normal operation. Implementation resembles the 2717 * second-half of the atl1c_resume routine. 2718 */ 2719 static void atl1c_io_resume(struct pci_dev *pdev) 2720 { 2721 struct net_device *netdev = pci_get_drvdata(pdev); 2722 struct atl1c_adapter *adapter = netdev_priv(netdev); 2723 2724 if (netif_running(netdev)) { 2725 if (atl1c_up(adapter)) { 2726 if (netif_msg_hw(adapter)) 2727 dev_err(&pdev->dev, 2728 "Cannot bring device back up after reset\n"); 2729 return; 2730 } 2731 } 2732 2733 netif_device_attach(netdev); 2734 } 2735 2736 static struct pci_error_handlers atl1c_err_handler = { 2737 .error_detected = atl1c_io_error_detected, 2738 .slot_reset = atl1c_io_slot_reset, 2739 .resume = atl1c_io_resume, 2740 }; 2741 2742 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume); 2743 2744 static struct pci_driver atl1c_driver = { 2745 .name = atl1c_driver_name, 2746 .id_table = atl1c_pci_tbl, 2747 .probe = atl1c_probe, 2748 .remove = __devexit_p(atl1c_remove), 2749 .shutdown = atl1c_shutdown, 2750 .err_handler = &atl1c_err_handler, 2751 .driver.pm = &atl1c_pm_ops, 2752 }; 2753 2754 /* 2755 * atl1c_init_module - Driver Registration Routine 2756 * 2757 * atl1c_init_module is the first routine called when the driver is 2758 * loaded. All it does is register with the PCI subsystem. 2759 */ 2760 static int __init atl1c_init_module(void) 2761 { 2762 return pci_register_driver(&atl1c_driver); 2763 } 2764 2765 /* 2766 * atl1c_exit_module - Driver Exit Cleanup Routine 2767 * 2768 * atl1c_exit_module is called just before the driver is removed 2769 * from memory. 2770 */ 2771 static void __exit atl1c_exit_module(void) 2772 { 2773 pci_unregister_driver(&atl1c_driver); 2774 } 2775 2776 module_init(atl1c_init_module); 2777 module_exit(atl1c_exit_module); 2778