1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /** 3 * emac-rockchip.c - Rockchip EMAC specific glue layer 4 * 5 * Copyright (C) 2014 Romain Perier <romain.perier@gmail.com> 6 */ 7 8 #include <linux/etherdevice.h> 9 #include <linux/mfd/syscon.h> 10 #include <linux/module.h> 11 #include <linux/of_net.h> 12 #include <linux/platform_device.h> 13 #include <linux/regmap.h> 14 #include <linux/regulator/consumer.h> 15 16 #include "emac.h" 17 18 #define DRV_NAME "rockchip_emac" 19 #define DRV_VERSION "1.1" 20 21 struct emac_rockchip_soc_data { 22 unsigned int grf_offset; 23 unsigned int grf_mode_offset; 24 unsigned int grf_speed_offset; 25 bool need_div_macclk; 26 }; 27 28 struct rockchip_priv_data { 29 struct arc_emac_priv emac; 30 struct regmap *grf; 31 const struct emac_rockchip_soc_data *soc_data; 32 struct regulator *regulator; 33 struct clk *refclk; 34 struct clk *macclk; 35 }; 36 37 static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed) 38 { 39 struct rockchip_priv_data *emac = priv; 40 u32 speed_offset = emac->soc_data->grf_speed_offset; 41 u32 data; 42 int err = 0; 43 44 switch (speed) { 45 case 10: 46 data = (1 << (speed_offset + 16)) | (0 << speed_offset); 47 break; 48 case 100: 49 data = (1 << (speed_offset + 16)) | (1 << speed_offset); 50 break; 51 default: 52 pr_err("speed %u not supported\n", speed); 53 return; 54 } 55 56 err = regmap_write(emac->grf, emac->soc_data->grf_offset, data); 57 if (err) 58 pr_err("unable to apply speed %u to grf (%d)\n", speed, err); 59 } 60 61 static const struct emac_rockchip_soc_data emac_rk3036_emac_data = { 62 .grf_offset = 0x140, .grf_mode_offset = 8, 63 .grf_speed_offset = 9, .need_div_macclk = 1, 64 }; 65 66 static const struct emac_rockchip_soc_data emac_rk3066_emac_data = { 67 .grf_offset = 0x154, .grf_mode_offset = 0, 68 .grf_speed_offset = 1, .need_div_macclk = 0, 69 }; 70 71 static const struct emac_rockchip_soc_data emac_rk3188_emac_data = { 72 .grf_offset = 0x0a4, .grf_mode_offset = 0, 73 .grf_speed_offset = 1, .need_div_macclk = 0, 74 }; 75 76 static const struct of_device_id emac_rockchip_dt_ids[] = { 77 { 78 .compatible = "rockchip,rk3036-emac", 79 .data = &emac_rk3036_emac_data, 80 }, 81 { 82 .compatible = "rockchip,rk3066-emac", 83 .data = &emac_rk3066_emac_data, 84 }, 85 { 86 .compatible = "rockchip,rk3188-emac", 87 .data = &emac_rk3188_emac_data, 88 }, 89 { /* Sentinel */ } 90 }; 91 92 MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids); 93 94 static int emac_rockchip_probe(struct platform_device *pdev) 95 { 96 struct device *dev = &pdev->dev; 97 struct net_device *ndev; 98 struct rockchip_priv_data *priv; 99 const struct of_device_id *match; 100 phy_interface_t interface; 101 u32 data; 102 int err; 103 104 if (!pdev->dev.of_node) 105 return -ENODEV; 106 107 ndev = alloc_etherdev(sizeof(struct rockchip_priv_data)); 108 if (!ndev) 109 return -ENOMEM; 110 platform_set_drvdata(pdev, ndev); 111 SET_NETDEV_DEV(ndev, dev); 112 113 priv = netdev_priv(ndev); 114 priv->emac.drv_name = DRV_NAME; 115 priv->emac.drv_version = DRV_VERSION; 116 priv->emac.set_mac_speed = emac_rockchip_set_mac_speed; 117 118 err = of_get_phy_mode(dev->of_node, &interface); 119 if (err) 120 goto out_netdev; 121 122 /* RK3036/RK3066/RK3188 SoCs only support RMII */ 123 if (interface != PHY_INTERFACE_MODE_RMII) { 124 dev_err(dev, "unsupported phy interface mode %d\n", interface); 125 err = -ENOTSUPP; 126 goto out_netdev; 127 } 128 129 priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, 130 "rockchip,grf"); 131 if (IS_ERR(priv->grf)) { 132 dev_err(dev, "failed to retrieve global register file (%ld)\n", 133 PTR_ERR(priv->grf)); 134 err = PTR_ERR(priv->grf); 135 goto out_netdev; 136 } 137 138 match = of_match_node(emac_rockchip_dt_ids, dev->of_node); 139 priv->soc_data = match->data; 140 141 priv->emac.clk = devm_clk_get(dev, "hclk"); 142 if (IS_ERR(priv->emac.clk)) { 143 dev_err(dev, "failed to retrieve host clock (%ld)\n", 144 PTR_ERR(priv->emac.clk)); 145 err = PTR_ERR(priv->emac.clk); 146 goto out_netdev; 147 } 148 149 priv->refclk = devm_clk_get(dev, "macref"); 150 if (IS_ERR(priv->refclk)) { 151 dev_err(dev, "failed to retrieve reference clock (%ld)\n", 152 PTR_ERR(priv->refclk)); 153 err = PTR_ERR(priv->refclk); 154 goto out_netdev; 155 } 156 157 err = clk_prepare_enable(priv->refclk); 158 if (err) { 159 dev_err(dev, "failed to enable reference clock (%d)\n", err); 160 goto out_netdev; 161 } 162 163 /* Optional regulator for PHY */ 164 priv->regulator = devm_regulator_get_optional(dev, "phy"); 165 if (IS_ERR(priv->regulator)) { 166 if (PTR_ERR(priv->regulator) == -EPROBE_DEFER) { 167 err = -EPROBE_DEFER; 168 goto out_clk_disable; 169 } 170 dev_err(dev, "no regulator found\n"); 171 priv->regulator = NULL; 172 } 173 174 if (priv->regulator) { 175 err = regulator_enable(priv->regulator); 176 if (err) { 177 dev_err(dev, "failed to enable phy-supply (%d)\n", err); 178 goto out_clk_disable; 179 } 180 } 181 182 /* Set speed 100M */ 183 data = (1 << (priv->soc_data->grf_speed_offset + 16)) | 184 (1 << priv->soc_data->grf_speed_offset); 185 /* Set RMII mode */ 186 data |= (1 << (priv->soc_data->grf_mode_offset + 16)) | 187 (0 << priv->soc_data->grf_mode_offset); 188 189 err = regmap_write(priv->grf, priv->soc_data->grf_offset, data); 190 if (err) { 191 dev_err(dev, "unable to apply initial settings to grf (%d)\n", 192 err); 193 goto out_regulator_disable; 194 } 195 196 /* RMII interface needs always a rate of 50MHz */ 197 err = clk_set_rate(priv->refclk, 50000000); 198 if (err) { 199 dev_err(dev, 200 "failed to change reference clock rate (%d)\n", err); 201 goto out_regulator_disable; 202 } 203 204 if (priv->soc_data->need_div_macclk) { 205 priv->macclk = devm_clk_get(dev, "macclk"); 206 if (IS_ERR(priv->macclk)) { 207 dev_err(dev, "failed to retrieve mac clock (%ld)\n", 208 PTR_ERR(priv->macclk)); 209 err = PTR_ERR(priv->macclk); 210 goto out_regulator_disable; 211 } 212 213 err = clk_prepare_enable(priv->macclk); 214 if (err) { 215 dev_err(dev, "failed to enable mac clock (%d)\n", err); 216 goto out_regulator_disable; 217 } 218 219 /* RMII TX/RX needs always a rate of 25MHz */ 220 err = clk_set_rate(priv->macclk, 25000000); 221 if (err) { 222 dev_err(dev, 223 "failed to change mac clock rate (%d)\n", err); 224 goto out_clk_disable_macclk; 225 } 226 } 227 228 err = arc_emac_probe(ndev, interface); 229 if (err) { 230 dev_err(dev, "failed to probe arc emac (%d)\n", err); 231 goto out_clk_disable_macclk; 232 } 233 234 return 0; 235 236 out_clk_disable_macclk: 237 if (priv->soc_data->need_div_macclk) 238 clk_disable_unprepare(priv->macclk); 239 out_regulator_disable: 240 if (priv->regulator) 241 regulator_disable(priv->regulator); 242 out_clk_disable: 243 clk_disable_unprepare(priv->refclk); 244 out_netdev: 245 free_netdev(ndev); 246 return err; 247 } 248 249 static int emac_rockchip_remove(struct platform_device *pdev) 250 { 251 struct net_device *ndev = platform_get_drvdata(pdev); 252 struct rockchip_priv_data *priv = netdev_priv(ndev); 253 int err; 254 255 err = arc_emac_remove(ndev); 256 257 clk_disable_unprepare(priv->refclk); 258 259 if (priv->regulator) 260 regulator_disable(priv->regulator); 261 262 if (priv->soc_data->need_div_macclk) 263 clk_disable_unprepare(priv->macclk); 264 265 free_netdev(ndev); 266 return err; 267 } 268 269 static struct platform_driver emac_rockchip_driver = { 270 .probe = emac_rockchip_probe, 271 .remove = emac_rockchip_remove, 272 .driver = { 273 .name = DRV_NAME, 274 .of_match_table = emac_rockchip_dt_ids, 275 }, 276 }; 277 278 module_platform_driver(emac_rockchip_driver); 279 280 MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>"); 281 MODULE_DESCRIPTION("Rockchip EMAC platform driver"); 282 MODULE_LICENSE("GPL"); 283