1 /* 2 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * Driver for the ARC EMAC 10100 (hardware revision 5) 9 * 10 * Contributors: 11 * Amit Bhor 12 * Sameer Dhavale 13 * Vineet Gupta 14 */ 15 16 #include <linux/crc32.h> 17 #include <linux/etherdevice.h> 18 #include <linux/interrupt.h> 19 #include <linux/io.h> 20 #include <linux/module.h> 21 #include <linux/of_address.h> 22 #include <linux/of_irq.h> 23 #include <linux/of_mdio.h> 24 #include <linux/of_net.h> 25 #include <linux/of_platform.h> 26 27 #include "emac.h" 28 29 static void arc_emac_restart(struct net_device *ndev); 30 31 /** 32 * arc_emac_tx_avail - Return the number of available slots in the tx ring. 33 * @priv: Pointer to ARC EMAC private data structure. 34 * 35 * returns: the number of slots available for transmission in tx the ring. 36 */ 37 static inline int arc_emac_tx_avail(struct arc_emac_priv *priv) 38 { 39 return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM; 40 } 41 42 /** 43 * arc_emac_adjust_link - Adjust the PHY link duplex. 44 * @ndev: Pointer to the net_device structure. 45 * 46 * This function is called to change the duplex setting after auto negotiation 47 * is done by the PHY. 48 */ 49 static void arc_emac_adjust_link(struct net_device *ndev) 50 { 51 struct arc_emac_priv *priv = netdev_priv(ndev); 52 struct phy_device *phy_dev = ndev->phydev; 53 unsigned int reg, state_changed = 0; 54 55 if (priv->link != phy_dev->link) { 56 priv->link = phy_dev->link; 57 state_changed = 1; 58 } 59 60 if (priv->speed != phy_dev->speed) { 61 priv->speed = phy_dev->speed; 62 state_changed = 1; 63 if (priv->set_mac_speed) 64 priv->set_mac_speed(priv, priv->speed); 65 } 66 67 if (priv->duplex != phy_dev->duplex) { 68 reg = arc_reg_get(priv, R_CTRL); 69 70 if (phy_dev->duplex == DUPLEX_FULL) 71 reg |= ENFL_MASK; 72 else 73 reg &= ~ENFL_MASK; 74 75 arc_reg_set(priv, R_CTRL, reg); 76 priv->duplex = phy_dev->duplex; 77 state_changed = 1; 78 } 79 80 if (state_changed) 81 phy_print_status(phy_dev); 82 } 83 84 /** 85 * arc_emac_get_drvinfo - Get EMAC driver information. 86 * @ndev: Pointer to net_device structure. 87 * @info: Pointer to ethtool_drvinfo structure. 88 * 89 * This implements ethtool command for getting the driver information. 90 * Issue "ethtool -i ethX" under linux prompt to execute this function. 91 */ 92 static void arc_emac_get_drvinfo(struct net_device *ndev, 93 struct ethtool_drvinfo *info) 94 { 95 struct arc_emac_priv *priv = netdev_priv(ndev); 96 97 strlcpy(info->driver, priv->drv_name, sizeof(info->driver)); 98 strlcpy(info->version, priv->drv_version, sizeof(info->version)); 99 } 100 101 static const struct ethtool_ops arc_emac_ethtool_ops = { 102 .get_drvinfo = arc_emac_get_drvinfo, 103 .get_link = ethtool_op_get_link, 104 .get_link_ksettings = phy_ethtool_get_link_ksettings, 105 .set_link_ksettings = phy_ethtool_set_link_ksettings, 106 }; 107 108 #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK) 109 110 /** 111 * arc_emac_tx_clean - clears processed by EMAC Tx BDs. 112 * @ndev: Pointer to the network device. 113 */ 114 static void arc_emac_tx_clean(struct net_device *ndev) 115 { 116 struct arc_emac_priv *priv = netdev_priv(ndev); 117 struct net_device_stats *stats = &ndev->stats; 118 unsigned int i; 119 120 for (i = 0; i < TX_BD_NUM; i++) { 121 unsigned int *txbd_dirty = &priv->txbd_dirty; 122 struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty]; 123 struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty]; 124 struct sk_buff *skb = tx_buff->skb; 125 unsigned int info = le32_to_cpu(txbd->info); 126 127 if ((info & FOR_EMAC) || !txbd->data || !skb) 128 break; 129 130 if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) { 131 stats->tx_errors++; 132 stats->tx_dropped++; 133 134 if (info & DEFR) 135 stats->tx_carrier_errors++; 136 137 if (info & LTCL) 138 stats->collisions++; 139 140 if (info & UFLO) 141 stats->tx_fifo_errors++; 142 } else if (likely(info & FIRST_OR_LAST_MASK)) { 143 stats->tx_packets++; 144 stats->tx_bytes += skb->len; 145 } 146 147 dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr), 148 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE); 149 150 /* return the sk_buff to system */ 151 dev_consume_skb_irq(skb); 152 153 txbd->data = 0; 154 txbd->info = 0; 155 tx_buff->skb = NULL; 156 157 *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM; 158 } 159 160 /* Ensure that txbd_dirty is visible to tx() before checking 161 * for queue stopped. 162 */ 163 smp_mb(); 164 165 if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv)) 166 netif_wake_queue(ndev); 167 } 168 169 /** 170 * arc_emac_rx - processing of Rx packets. 171 * @ndev: Pointer to the network device. 172 * @budget: How many BDs to process on 1 call. 173 * 174 * returns: Number of processed BDs 175 * 176 * Iterate through Rx BDs and deliver received packages to upper layer. 177 */ 178 static int arc_emac_rx(struct net_device *ndev, int budget) 179 { 180 struct arc_emac_priv *priv = netdev_priv(ndev); 181 unsigned int work_done; 182 183 for (work_done = 0; work_done < budget; work_done++) { 184 unsigned int *last_rx_bd = &priv->last_rx_bd; 185 struct net_device_stats *stats = &ndev->stats; 186 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; 187 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; 188 unsigned int pktlen, info = le32_to_cpu(rxbd->info); 189 struct sk_buff *skb; 190 dma_addr_t addr; 191 192 if (unlikely((info & OWN_MASK) == FOR_EMAC)) 193 break; 194 195 /* Make a note that we saw a packet at this BD. 196 * So next time, driver starts from this + 1 197 */ 198 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; 199 200 if (unlikely((info & FIRST_OR_LAST_MASK) != 201 FIRST_OR_LAST_MASK)) { 202 /* We pre-allocate buffers of MTU size so incoming 203 * packets won't be split/chained. 204 */ 205 if (net_ratelimit()) 206 netdev_err(ndev, "incomplete packet received\n"); 207 208 /* Return ownership to EMAC */ 209 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); 210 stats->rx_errors++; 211 stats->rx_length_errors++; 212 continue; 213 } 214 215 /* Prepare the BD for next cycle. netif_receive_skb() 216 * only if new skb was allocated and mapped to avoid holes 217 * in the RX fifo. 218 */ 219 skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE); 220 if (unlikely(!skb)) { 221 if (net_ratelimit()) 222 netdev_err(ndev, "cannot allocate skb\n"); 223 /* Return ownership to EMAC */ 224 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); 225 stats->rx_errors++; 226 stats->rx_dropped++; 227 continue; 228 } 229 230 addr = dma_map_single(&ndev->dev, (void *)skb->data, 231 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); 232 if (dma_mapping_error(&ndev->dev, addr)) { 233 if (net_ratelimit()) 234 netdev_err(ndev, "cannot map dma buffer\n"); 235 dev_kfree_skb(skb); 236 /* Return ownership to EMAC */ 237 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); 238 stats->rx_errors++; 239 stats->rx_dropped++; 240 continue; 241 } 242 243 /* unmap previosly mapped skb */ 244 dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr), 245 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE); 246 247 pktlen = info & LEN_MASK; 248 stats->rx_packets++; 249 stats->rx_bytes += pktlen; 250 skb_put(rx_buff->skb, pktlen); 251 rx_buff->skb->dev = ndev; 252 rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev); 253 254 netif_receive_skb(rx_buff->skb); 255 256 rx_buff->skb = skb; 257 dma_unmap_addr_set(rx_buff, addr, addr); 258 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); 259 260 rxbd->data = cpu_to_le32(addr); 261 262 /* Make sure pointer to data buffer is set */ 263 wmb(); 264 265 /* Return ownership to EMAC */ 266 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); 267 } 268 269 return work_done; 270 } 271 272 /** 273 * arc_emac_rx_miss_handle - handle R_MISS register 274 * @ndev: Pointer to the net_device structure. 275 */ 276 static void arc_emac_rx_miss_handle(struct net_device *ndev) 277 { 278 struct arc_emac_priv *priv = netdev_priv(ndev); 279 struct net_device_stats *stats = &ndev->stats; 280 unsigned int miss; 281 282 miss = arc_reg_get(priv, R_MISS); 283 if (miss) { 284 stats->rx_errors += miss; 285 stats->rx_missed_errors += miss; 286 priv->rx_missed_errors += miss; 287 } 288 } 289 290 /** 291 * arc_emac_rx_stall_check - check RX stall 292 * @ndev: Pointer to the net_device structure. 293 * @budget: How many BDs requested to process on 1 call. 294 * @work_done: How many BDs processed 295 * 296 * Under certain conditions EMAC stop reception of incoming packets and 297 * continuously increment R_MISS register instead of saving data into 298 * provided buffer. This function detect that condition and restart 299 * EMAC. 300 */ 301 static void arc_emac_rx_stall_check(struct net_device *ndev, 302 int budget, unsigned int work_done) 303 { 304 struct arc_emac_priv *priv = netdev_priv(ndev); 305 struct arc_emac_bd *rxbd; 306 307 if (work_done) 308 priv->rx_missed_errors = 0; 309 310 if (priv->rx_missed_errors && budget) { 311 rxbd = &priv->rxbd[priv->last_rx_bd]; 312 if (le32_to_cpu(rxbd->info) & FOR_EMAC) { 313 arc_emac_restart(ndev); 314 priv->rx_missed_errors = 0; 315 } 316 } 317 } 318 319 /** 320 * arc_emac_poll - NAPI poll handler. 321 * @napi: Pointer to napi_struct structure. 322 * @budget: How many BDs to process on 1 call. 323 * 324 * returns: Number of processed BDs 325 */ 326 static int arc_emac_poll(struct napi_struct *napi, int budget) 327 { 328 struct net_device *ndev = napi->dev; 329 struct arc_emac_priv *priv = netdev_priv(ndev); 330 unsigned int work_done; 331 332 arc_emac_tx_clean(ndev); 333 arc_emac_rx_miss_handle(ndev); 334 335 work_done = arc_emac_rx(ndev, budget); 336 if (work_done < budget) { 337 napi_complete_done(napi, work_done); 338 arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK); 339 } 340 341 arc_emac_rx_stall_check(ndev, budget, work_done); 342 343 return work_done; 344 } 345 346 /** 347 * arc_emac_intr - Global interrupt handler for EMAC. 348 * @irq: irq number. 349 * @dev_instance: device instance. 350 * 351 * returns: IRQ_HANDLED for all cases. 352 * 353 * ARC EMAC has only 1 interrupt line, and depending on bits raised in 354 * STATUS register we may tell what is a reason for interrupt to fire. 355 */ 356 static irqreturn_t arc_emac_intr(int irq, void *dev_instance) 357 { 358 struct net_device *ndev = dev_instance; 359 struct arc_emac_priv *priv = netdev_priv(ndev); 360 struct net_device_stats *stats = &ndev->stats; 361 unsigned int status; 362 363 status = arc_reg_get(priv, R_STATUS); 364 status &= ~MDIO_MASK; 365 366 /* Reset all flags except "MDIO complete" */ 367 arc_reg_set(priv, R_STATUS, status); 368 369 if (status & (RXINT_MASK | TXINT_MASK)) { 370 if (likely(napi_schedule_prep(&priv->napi))) { 371 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK); 372 __napi_schedule(&priv->napi); 373 } 374 } 375 376 if (status & ERR_MASK) { 377 /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding 378 * 8-bit error counter overrun. 379 */ 380 381 if (status & MSER_MASK) { 382 stats->rx_missed_errors += 0x100; 383 stats->rx_errors += 0x100; 384 priv->rx_missed_errors += 0x100; 385 napi_schedule(&priv->napi); 386 } 387 388 if (status & RXCR_MASK) { 389 stats->rx_crc_errors += 0x100; 390 stats->rx_errors += 0x100; 391 } 392 393 if (status & RXFR_MASK) { 394 stats->rx_frame_errors += 0x100; 395 stats->rx_errors += 0x100; 396 } 397 398 if (status & RXFL_MASK) { 399 stats->rx_over_errors += 0x100; 400 stats->rx_errors += 0x100; 401 } 402 } 403 404 return IRQ_HANDLED; 405 } 406 407 #ifdef CONFIG_NET_POLL_CONTROLLER 408 static void arc_emac_poll_controller(struct net_device *dev) 409 { 410 disable_irq(dev->irq); 411 arc_emac_intr(dev->irq, dev); 412 enable_irq(dev->irq); 413 } 414 #endif 415 416 /** 417 * arc_emac_open - Open the network device. 418 * @ndev: Pointer to the network device. 419 * 420 * returns: 0, on success or non-zero error value on failure. 421 * 422 * This function sets the MAC address, requests and enables an IRQ 423 * for the EMAC device and starts the Tx queue. 424 * It also connects to the phy device. 425 */ 426 static int arc_emac_open(struct net_device *ndev) 427 { 428 struct arc_emac_priv *priv = netdev_priv(ndev); 429 struct phy_device *phy_dev = ndev->phydev; 430 int i; 431 432 phy_dev->autoneg = AUTONEG_ENABLE; 433 phy_dev->speed = 0; 434 phy_dev->duplex = 0; 435 linkmode_and(phy_dev->advertising, phy_dev->advertising, 436 phy_dev->supported); 437 438 priv->last_rx_bd = 0; 439 440 /* Allocate and set buffers for Rx BD's */ 441 for (i = 0; i < RX_BD_NUM; i++) { 442 dma_addr_t addr; 443 unsigned int *last_rx_bd = &priv->last_rx_bd; 444 struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd]; 445 struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd]; 446 447 rx_buff->skb = netdev_alloc_skb_ip_align(ndev, 448 EMAC_BUFFER_SIZE); 449 if (unlikely(!rx_buff->skb)) 450 return -ENOMEM; 451 452 addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data, 453 EMAC_BUFFER_SIZE, DMA_FROM_DEVICE); 454 if (dma_mapping_error(&ndev->dev, addr)) { 455 netdev_err(ndev, "cannot dma map\n"); 456 dev_kfree_skb(rx_buff->skb); 457 return -ENOMEM; 458 } 459 dma_unmap_addr_set(rx_buff, addr, addr); 460 dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE); 461 462 rxbd->data = cpu_to_le32(addr); 463 464 /* Make sure pointer to data buffer is set */ 465 wmb(); 466 467 /* Return ownership to EMAC */ 468 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); 469 470 *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM; 471 } 472 473 priv->txbd_curr = 0; 474 priv->txbd_dirty = 0; 475 476 /* Clean Tx BD's */ 477 memset(priv->txbd, 0, TX_RING_SZ); 478 479 /* Initialize logical address filter */ 480 arc_reg_set(priv, R_LAFL, 0); 481 arc_reg_set(priv, R_LAFH, 0); 482 483 /* Set BD ring pointers for device side */ 484 arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma); 485 arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma); 486 487 /* Enable interrupts */ 488 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); 489 490 /* Set CONTROL */ 491 arc_reg_set(priv, R_CTRL, 492 (RX_BD_NUM << 24) | /* RX BD table length */ 493 (TX_BD_NUM << 16) | /* TX BD table length */ 494 TXRN_MASK | RXRN_MASK); 495 496 napi_enable(&priv->napi); 497 498 /* Enable EMAC */ 499 arc_reg_or(priv, R_CTRL, EN_MASK); 500 501 phy_start(ndev->phydev); 502 503 netif_start_queue(ndev); 504 505 return 0; 506 } 507 508 /** 509 * arc_emac_set_rx_mode - Change the receive filtering mode. 510 * @ndev: Pointer to the network device. 511 * 512 * This function enables/disables promiscuous or all-multicast mode 513 * and updates the multicast filtering list of the network device. 514 */ 515 static void arc_emac_set_rx_mode(struct net_device *ndev) 516 { 517 struct arc_emac_priv *priv = netdev_priv(ndev); 518 519 if (ndev->flags & IFF_PROMISC) { 520 arc_reg_or(priv, R_CTRL, PROM_MASK); 521 } else { 522 arc_reg_clr(priv, R_CTRL, PROM_MASK); 523 524 if (ndev->flags & IFF_ALLMULTI) { 525 arc_reg_set(priv, R_LAFL, ~0); 526 arc_reg_set(priv, R_LAFH, ~0); 527 } else if (ndev->flags & IFF_MULTICAST) { 528 struct netdev_hw_addr *ha; 529 unsigned int filter[2] = { 0, 0 }; 530 int bit; 531 532 netdev_for_each_mc_addr(ha, ndev) { 533 bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26; 534 filter[bit >> 5] |= 1 << (bit & 31); 535 } 536 537 arc_reg_set(priv, R_LAFL, filter[0]); 538 arc_reg_set(priv, R_LAFH, filter[1]); 539 } else { 540 arc_reg_set(priv, R_LAFL, 0); 541 arc_reg_set(priv, R_LAFH, 0); 542 } 543 } 544 } 545 546 /** 547 * arc_free_tx_queue - free skb from tx queue 548 * @ndev: Pointer to the network device. 549 * 550 * This function must be called while EMAC disable 551 */ 552 static void arc_free_tx_queue(struct net_device *ndev) 553 { 554 struct arc_emac_priv *priv = netdev_priv(ndev); 555 unsigned int i; 556 557 for (i = 0; i < TX_BD_NUM; i++) { 558 struct arc_emac_bd *txbd = &priv->txbd[i]; 559 struct buffer_state *tx_buff = &priv->tx_buff[i]; 560 561 if (tx_buff->skb) { 562 dma_unmap_single(&ndev->dev, 563 dma_unmap_addr(tx_buff, addr), 564 dma_unmap_len(tx_buff, len), 565 DMA_TO_DEVICE); 566 567 /* return the sk_buff to system */ 568 dev_kfree_skb_irq(tx_buff->skb); 569 } 570 571 txbd->info = 0; 572 txbd->data = 0; 573 tx_buff->skb = NULL; 574 } 575 } 576 577 /** 578 * arc_free_rx_queue - free skb from rx queue 579 * @ndev: Pointer to the network device. 580 * 581 * This function must be called while EMAC disable 582 */ 583 static void arc_free_rx_queue(struct net_device *ndev) 584 { 585 struct arc_emac_priv *priv = netdev_priv(ndev); 586 unsigned int i; 587 588 for (i = 0; i < RX_BD_NUM; i++) { 589 struct arc_emac_bd *rxbd = &priv->rxbd[i]; 590 struct buffer_state *rx_buff = &priv->rx_buff[i]; 591 592 if (rx_buff->skb) { 593 dma_unmap_single(&ndev->dev, 594 dma_unmap_addr(rx_buff, addr), 595 dma_unmap_len(rx_buff, len), 596 DMA_FROM_DEVICE); 597 598 /* return the sk_buff to system */ 599 dev_kfree_skb_irq(rx_buff->skb); 600 } 601 602 rxbd->info = 0; 603 rxbd->data = 0; 604 rx_buff->skb = NULL; 605 } 606 } 607 608 /** 609 * arc_emac_stop - Close the network device. 610 * @ndev: Pointer to the network device. 611 * 612 * This function stops the Tx queue, disables interrupts and frees the IRQ for 613 * the EMAC device. 614 * It also disconnects the PHY device associated with the EMAC device. 615 */ 616 static int arc_emac_stop(struct net_device *ndev) 617 { 618 struct arc_emac_priv *priv = netdev_priv(ndev); 619 620 napi_disable(&priv->napi); 621 netif_stop_queue(ndev); 622 623 phy_stop(ndev->phydev); 624 625 /* Disable interrupts */ 626 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); 627 628 /* Disable EMAC */ 629 arc_reg_clr(priv, R_CTRL, EN_MASK); 630 631 /* Return the sk_buff to system */ 632 arc_free_tx_queue(ndev); 633 arc_free_rx_queue(ndev); 634 635 return 0; 636 } 637 638 /** 639 * arc_emac_stats - Get system network statistics. 640 * @ndev: Pointer to net_device structure. 641 * 642 * Returns the address of the device statistics structure. 643 * Statistics are updated in interrupt handler. 644 */ 645 static struct net_device_stats *arc_emac_stats(struct net_device *ndev) 646 { 647 struct arc_emac_priv *priv = netdev_priv(ndev); 648 struct net_device_stats *stats = &ndev->stats; 649 unsigned long miss, rxerr; 650 u8 rxcrc, rxfram, rxoflow; 651 652 rxerr = arc_reg_get(priv, R_RXERR); 653 miss = arc_reg_get(priv, R_MISS); 654 655 rxcrc = rxerr; 656 rxfram = rxerr >> 8; 657 rxoflow = rxerr >> 16; 658 659 stats->rx_errors += miss; 660 stats->rx_errors += rxcrc + rxfram + rxoflow; 661 662 stats->rx_over_errors += rxoflow; 663 stats->rx_frame_errors += rxfram; 664 stats->rx_crc_errors += rxcrc; 665 stats->rx_missed_errors += miss; 666 667 return stats; 668 } 669 670 /** 671 * arc_emac_tx - Starts the data transmission. 672 * @skb: sk_buff pointer that contains data to be Transmitted. 673 * @ndev: Pointer to net_device structure. 674 * 675 * returns: NETDEV_TX_OK, on success 676 * NETDEV_TX_BUSY, if any of the descriptors are not free. 677 * 678 * This function is invoked from upper layers to initiate transmission. 679 */ 680 static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev) 681 { 682 struct arc_emac_priv *priv = netdev_priv(ndev); 683 unsigned int len, *txbd_curr = &priv->txbd_curr; 684 struct net_device_stats *stats = &ndev->stats; 685 __le32 *info = &priv->txbd[*txbd_curr].info; 686 dma_addr_t addr; 687 688 if (skb_padto(skb, ETH_ZLEN)) 689 return NETDEV_TX_OK; 690 691 len = max_t(unsigned int, ETH_ZLEN, skb->len); 692 693 if (unlikely(!arc_emac_tx_avail(priv))) { 694 netif_stop_queue(ndev); 695 netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n"); 696 return NETDEV_TX_BUSY; 697 } 698 699 addr = dma_map_single(&ndev->dev, (void *)skb->data, len, 700 DMA_TO_DEVICE); 701 702 if (unlikely(dma_mapping_error(&ndev->dev, addr))) { 703 stats->tx_dropped++; 704 stats->tx_errors++; 705 dev_kfree_skb_any(skb); 706 return NETDEV_TX_OK; 707 } 708 dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr); 709 dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len); 710 711 priv->txbd[*txbd_curr].data = cpu_to_le32(addr); 712 713 /* Make sure pointer to data buffer is set */ 714 wmb(); 715 716 skb_tx_timestamp(skb); 717 718 *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len); 719 720 /* Make sure info word is set */ 721 wmb(); 722 723 priv->tx_buff[*txbd_curr].skb = skb; 724 725 /* Increment index to point to the next BD */ 726 *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM; 727 728 /* Ensure that tx_clean() sees the new txbd_curr before 729 * checking the queue status. This prevents an unneeded wake 730 * of the queue in tx_clean(). 731 */ 732 smp_mb(); 733 734 if (!arc_emac_tx_avail(priv)) { 735 netif_stop_queue(ndev); 736 /* Refresh tx_dirty */ 737 smp_mb(); 738 if (arc_emac_tx_avail(priv)) 739 netif_start_queue(ndev); 740 } 741 742 arc_reg_set(priv, R_STATUS, TXPL_MASK); 743 744 return NETDEV_TX_OK; 745 } 746 747 static void arc_emac_set_address_internal(struct net_device *ndev) 748 { 749 struct arc_emac_priv *priv = netdev_priv(ndev); 750 unsigned int addr_low, addr_hi; 751 752 addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]); 753 addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]); 754 755 arc_reg_set(priv, R_ADDRL, addr_low); 756 arc_reg_set(priv, R_ADDRH, addr_hi); 757 } 758 759 /** 760 * arc_emac_set_address - Set the MAC address for this device. 761 * @ndev: Pointer to net_device structure. 762 * @p: 6 byte Address to be written as MAC address. 763 * 764 * This function copies the HW address from the sockaddr structure to the 765 * net_device structure and updates the address in HW. 766 * 767 * returns: -EBUSY if the net device is busy or 0 if the address is set 768 * successfully. 769 */ 770 static int arc_emac_set_address(struct net_device *ndev, void *p) 771 { 772 struct sockaddr *addr = p; 773 774 if (netif_running(ndev)) 775 return -EBUSY; 776 777 if (!is_valid_ether_addr(addr->sa_data)) 778 return -EADDRNOTAVAIL; 779 780 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len); 781 782 arc_emac_set_address_internal(ndev); 783 784 return 0; 785 } 786 787 static int arc_emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 788 { 789 if (!netif_running(dev)) 790 return -EINVAL; 791 792 if (!dev->phydev) 793 return -ENODEV; 794 795 return phy_mii_ioctl(dev->phydev, rq, cmd); 796 } 797 798 799 /** 800 * arc_emac_restart - Restart EMAC 801 * @ndev: Pointer to net_device structure. 802 * 803 * This function do hardware reset of EMAC in order to restore 804 * network packets reception. 805 */ 806 static void arc_emac_restart(struct net_device *ndev) 807 { 808 struct arc_emac_priv *priv = netdev_priv(ndev); 809 struct net_device_stats *stats = &ndev->stats; 810 int i; 811 812 if (net_ratelimit()) 813 netdev_warn(ndev, "restarting stalled EMAC\n"); 814 815 netif_stop_queue(ndev); 816 817 /* Disable interrupts */ 818 arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); 819 820 /* Disable EMAC */ 821 arc_reg_clr(priv, R_CTRL, EN_MASK); 822 823 /* Return the sk_buff to system */ 824 arc_free_tx_queue(ndev); 825 826 /* Clean Tx BD's */ 827 priv->txbd_curr = 0; 828 priv->txbd_dirty = 0; 829 memset(priv->txbd, 0, TX_RING_SZ); 830 831 for (i = 0; i < RX_BD_NUM; i++) { 832 struct arc_emac_bd *rxbd = &priv->rxbd[i]; 833 unsigned int info = le32_to_cpu(rxbd->info); 834 835 if (!(info & FOR_EMAC)) { 836 stats->rx_errors++; 837 stats->rx_dropped++; 838 } 839 /* Return ownership to EMAC */ 840 rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE); 841 } 842 priv->last_rx_bd = 0; 843 844 /* Make sure info is visible to EMAC before enable */ 845 wmb(); 846 847 /* Enable interrupts */ 848 arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK); 849 850 /* Enable EMAC */ 851 arc_reg_or(priv, R_CTRL, EN_MASK); 852 853 netif_start_queue(ndev); 854 } 855 856 static const struct net_device_ops arc_emac_netdev_ops = { 857 .ndo_open = arc_emac_open, 858 .ndo_stop = arc_emac_stop, 859 .ndo_start_xmit = arc_emac_tx, 860 .ndo_set_mac_address = arc_emac_set_address, 861 .ndo_get_stats = arc_emac_stats, 862 .ndo_set_rx_mode = arc_emac_set_rx_mode, 863 .ndo_do_ioctl = arc_emac_ioctl, 864 #ifdef CONFIG_NET_POLL_CONTROLLER 865 .ndo_poll_controller = arc_emac_poll_controller, 866 #endif 867 }; 868 869 int arc_emac_probe(struct net_device *ndev, int interface) 870 { 871 struct device *dev = ndev->dev.parent; 872 struct resource res_regs; 873 struct device_node *phy_node; 874 struct phy_device *phydev = NULL; 875 struct arc_emac_priv *priv; 876 const char *mac_addr; 877 unsigned int id, clock_frequency, irq; 878 int err; 879 880 /* Get PHY from device tree */ 881 phy_node = of_parse_phandle(dev->of_node, "phy", 0); 882 if (!phy_node) { 883 dev_err(dev, "failed to retrieve phy description from device tree\n"); 884 return -ENODEV; 885 } 886 887 /* Get EMAC registers base address from device tree */ 888 err = of_address_to_resource(dev->of_node, 0, &res_regs); 889 if (err) { 890 dev_err(dev, "failed to retrieve registers base from device tree\n"); 891 err = -ENODEV; 892 goto out_put_node; 893 } 894 895 /* Get IRQ from device tree */ 896 irq = irq_of_parse_and_map(dev->of_node, 0); 897 if (!irq) { 898 dev_err(dev, "failed to retrieve <irq> value from device tree\n"); 899 err = -ENODEV; 900 goto out_put_node; 901 } 902 903 ndev->netdev_ops = &arc_emac_netdev_ops; 904 ndev->ethtool_ops = &arc_emac_ethtool_ops; 905 ndev->watchdog_timeo = TX_TIMEOUT; 906 907 priv = netdev_priv(ndev); 908 priv->dev = dev; 909 910 priv->regs = devm_ioremap_resource(dev, &res_regs); 911 if (IS_ERR(priv->regs)) { 912 err = PTR_ERR(priv->regs); 913 goto out_put_node; 914 } 915 916 dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs); 917 918 if (priv->clk) { 919 err = clk_prepare_enable(priv->clk); 920 if (err) { 921 dev_err(dev, "failed to enable clock\n"); 922 goto out_put_node; 923 } 924 925 clock_frequency = clk_get_rate(priv->clk); 926 } else { 927 /* Get CPU clock frequency from device tree */ 928 if (of_property_read_u32(dev->of_node, "clock-frequency", 929 &clock_frequency)) { 930 dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n"); 931 err = -EINVAL; 932 goto out_put_node; 933 } 934 } 935 936 id = arc_reg_get(priv, R_ID); 937 938 /* Check for EMAC revision 5 or 7, magic number */ 939 if (!(id == 0x0005fd02 || id == 0x0007fd02)) { 940 dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id); 941 err = -ENODEV; 942 goto out_clken; 943 } 944 dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id); 945 946 /* Set poll rate so that it polls every 1 ms */ 947 arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000); 948 949 ndev->irq = irq; 950 dev_info(dev, "IRQ is %d\n", ndev->irq); 951 952 /* Register interrupt handler for device */ 953 err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0, 954 ndev->name, ndev); 955 if (err) { 956 dev_err(dev, "could not allocate IRQ\n"); 957 goto out_clken; 958 } 959 960 /* Get MAC address from device tree */ 961 mac_addr = of_get_mac_address(dev->of_node); 962 963 if (!IS_ERR(mac_addr)) 964 ether_addr_copy(ndev->dev_addr, mac_addr); 965 else 966 eth_hw_addr_random(ndev); 967 968 arc_emac_set_address_internal(ndev); 969 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr); 970 971 /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */ 972 priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ, 973 &priv->rxbd_dma, GFP_KERNEL); 974 975 if (!priv->rxbd) { 976 dev_err(dev, "failed to allocate data buffers\n"); 977 err = -ENOMEM; 978 goto out_clken; 979 } 980 981 priv->txbd = priv->rxbd + RX_BD_NUM; 982 983 priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ; 984 dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n", 985 (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma); 986 987 err = arc_mdio_probe(priv); 988 if (err) { 989 dev_err(dev, "failed to probe MII bus\n"); 990 goto out_clken; 991 } 992 993 phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0, 994 interface); 995 if (!phydev) { 996 dev_err(dev, "of_phy_connect() failed\n"); 997 err = -ENODEV; 998 goto out_mdio; 999 } 1000 1001 dev_info(dev, "connected to %s phy with id 0x%x\n", 1002 phydev->drv->name, phydev->phy_id); 1003 1004 netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT); 1005 1006 err = register_netdev(ndev); 1007 if (err) { 1008 dev_err(dev, "failed to register network device\n"); 1009 goto out_netif_api; 1010 } 1011 1012 of_node_put(phy_node); 1013 return 0; 1014 1015 out_netif_api: 1016 netif_napi_del(&priv->napi); 1017 phy_disconnect(phydev); 1018 out_mdio: 1019 arc_mdio_remove(priv); 1020 out_clken: 1021 if (priv->clk) 1022 clk_disable_unprepare(priv->clk); 1023 out_put_node: 1024 of_node_put(phy_node); 1025 1026 return err; 1027 } 1028 EXPORT_SYMBOL_GPL(arc_emac_probe); 1029 1030 int arc_emac_remove(struct net_device *ndev) 1031 { 1032 struct arc_emac_priv *priv = netdev_priv(ndev); 1033 1034 phy_disconnect(ndev->phydev); 1035 arc_mdio_remove(priv); 1036 unregister_netdev(ndev); 1037 netif_napi_del(&priv->napi); 1038 1039 if (!IS_ERR(priv->clk)) 1040 clk_disable_unprepare(priv->clk); 1041 1042 return 0; 1043 } 1044 EXPORT_SYMBOL_GPL(arc_emac_remove); 1045 1046 MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>"); 1047 MODULE_DESCRIPTION("ARC EMAC driver"); 1048 MODULE_LICENSE("GPL"); 1049