1 /* 2 * aQuantia Corporation Network Driver 3 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 */ 9 10 /* File aq_ring.c: Definition of functions for Rx/Tx rings. */ 11 12 #include "aq_ring.h" 13 #include "aq_nic.h" 14 #include "aq_hw.h" 15 #include "aq_hw_utils.h" 16 17 #include <linux/netdevice.h> 18 #include <linux/etherdevice.h> 19 20 static inline void aq_free_rxpage(struct aq_rxpage *rxpage, struct device *dev) 21 { 22 unsigned int len = PAGE_SIZE << rxpage->order; 23 24 dma_unmap_page(dev, rxpage->daddr, len, DMA_FROM_DEVICE); 25 26 /* Drop the ref for being in the ring. */ 27 __free_pages(rxpage->page, rxpage->order); 28 rxpage->page = NULL; 29 } 30 31 static int aq_get_rxpage(struct aq_rxpage *rxpage, unsigned int order, 32 struct device *dev) 33 { 34 struct page *page; 35 dma_addr_t daddr; 36 int ret = -ENOMEM; 37 38 page = dev_alloc_pages(order); 39 if (unlikely(!page)) 40 goto err_exit; 41 42 daddr = dma_map_page(dev, page, 0, PAGE_SIZE << order, 43 DMA_FROM_DEVICE); 44 45 if (unlikely(dma_mapping_error(dev, daddr))) 46 goto free_page; 47 48 rxpage->page = page; 49 rxpage->daddr = daddr; 50 rxpage->order = order; 51 rxpage->pg_off = 0; 52 53 return 0; 54 55 free_page: 56 __free_pages(page, order); 57 58 err_exit: 59 return ret; 60 } 61 62 static int aq_get_rxpages(struct aq_ring_s *self, struct aq_ring_buff_s *rxbuf, 63 int order) 64 { 65 int ret; 66 67 if (rxbuf->rxdata.page) { 68 /* One means ring is the only user and can reuse */ 69 if (page_ref_count(rxbuf->rxdata.page) > 1) { 70 /* Try reuse buffer */ 71 rxbuf->rxdata.pg_off += AQ_CFG_RX_FRAME_MAX; 72 if (rxbuf->rxdata.pg_off + AQ_CFG_RX_FRAME_MAX <= 73 (PAGE_SIZE << order)) { 74 self->stats.rx.pg_flips++; 75 } else { 76 /* Buffer exhausted. We have other users and 77 * should release this page and realloc 78 */ 79 aq_free_rxpage(&rxbuf->rxdata, 80 aq_nic_get_dev(self->aq_nic)); 81 self->stats.rx.pg_losts++; 82 } 83 } else { 84 rxbuf->rxdata.pg_off = 0; 85 self->stats.rx.pg_reuses++; 86 } 87 } 88 89 if (!rxbuf->rxdata.page) { 90 ret = aq_get_rxpage(&rxbuf->rxdata, order, 91 aq_nic_get_dev(self->aq_nic)); 92 return ret; 93 } 94 95 return 0; 96 } 97 98 static struct aq_ring_s *aq_ring_alloc(struct aq_ring_s *self, 99 struct aq_nic_s *aq_nic) 100 { 101 int err = 0; 102 103 self->buff_ring = 104 kcalloc(self->size, sizeof(struct aq_ring_buff_s), GFP_KERNEL); 105 106 if (!self->buff_ring) { 107 err = -ENOMEM; 108 goto err_exit; 109 } 110 self->dx_ring = dma_alloc_coherent(aq_nic_get_dev(aq_nic), 111 self->size * self->dx_size, 112 &self->dx_ring_pa, GFP_KERNEL); 113 if (!self->dx_ring) { 114 err = -ENOMEM; 115 goto err_exit; 116 } 117 118 err_exit: 119 if (err < 0) { 120 aq_ring_free(self); 121 self = NULL; 122 } 123 return self; 124 } 125 126 struct aq_ring_s *aq_ring_tx_alloc(struct aq_ring_s *self, 127 struct aq_nic_s *aq_nic, 128 unsigned int idx, 129 struct aq_nic_cfg_s *aq_nic_cfg) 130 { 131 int err = 0; 132 133 self->aq_nic = aq_nic; 134 self->idx = idx; 135 self->size = aq_nic_cfg->txds; 136 self->dx_size = aq_nic_cfg->aq_hw_caps->txd_size; 137 138 self = aq_ring_alloc(self, aq_nic); 139 if (!self) { 140 err = -ENOMEM; 141 goto err_exit; 142 } 143 144 err_exit: 145 if (err < 0) { 146 aq_ring_free(self); 147 self = NULL; 148 } 149 return self; 150 } 151 152 struct aq_ring_s *aq_ring_rx_alloc(struct aq_ring_s *self, 153 struct aq_nic_s *aq_nic, 154 unsigned int idx, 155 struct aq_nic_cfg_s *aq_nic_cfg) 156 { 157 int err = 0; 158 159 self->aq_nic = aq_nic; 160 self->idx = idx; 161 self->size = aq_nic_cfg->rxds; 162 self->dx_size = aq_nic_cfg->aq_hw_caps->rxd_size; 163 self->page_order = fls(AQ_CFG_RX_FRAME_MAX / PAGE_SIZE + 164 (AQ_CFG_RX_FRAME_MAX % PAGE_SIZE ? 1 : 0)) - 1; 165 166 if (aq_nic_cfg->rxpageorder > self->page_order) 167 self->page_order = aq_nic_cfg->rxpageorder; 168 169 self = aq_ring_alloc(self, aq_nic); 170 if (!self) { 171 err = -ENOMEM; 172 goto err_exit; 173 } 174 175 err_exit: 176 if (err < 0) { 177 aq_ring_free(self); 178 self = NULL; 179 } 180 return self; 181 } 182 183 int aq_ring_init(struct aq_ring_s *self) 184 { 185 self->hw_head = 0; 186 self->sw_head = 0; 187 self->sw_tail = 0; 188 return 0; 189 } 190 191 static inline bool aq_ring_dx_in_range(unsigned int h, unsigned int i, 192 unsigned int t) 193 { 194 return (h < t) ? ((h < i) && (i < t)) : ((h < i) || (i < t)); 195 } 196 197 void aq_ring_update_queue_state(struct aq_ring_s *ring) 198 { 199 if (aq_ring_avail_dx(ring) <= AQ_CFG_SKB_FRAGS_MAX) 200 aq_ring_queue_stop(ring); 201 else if (aq_ring_avail_dx(ring) > AQ_CFG_RESTART_DESC_THRES) 202 aq_ring_queue_wake(ring); 203 } 204 205 void aq_ring_queue_wake(struct aq_ring_s *ring) 206 { 207 struct net_device *ndev = aq_nic_get_ndev(ring->aq_nic); 208 209 if (__netif_subqueue_stopped(ndev, ring->idx)) { 210 netif_wake_subqueue(ndev, ring->idx); 211 ring->stats.tx.queue_restarts++; 212 } 213 } 214 215 void aq_ring_queue_stop(struct aq_ring_s *ring) 216 { 217 struct net_device *ndev = aq_nic_get_ndev(ring->aq_nic); 218 219 if (!__netif_subqueue_stopped(ndev, ring->idx)) 220 netif_stop_subqueue(ndev, ring->idx); 221 } 222 223 bool aq_ring_tx_clean(struct aq_ring_s *self) 224 { 225 struct device *dev = aq_nic_get_dev(self->aq_nic); 226 unsigned int budget = AQ_CFG_TX_CLEAN_BUDGET; 227 228 for (; self->sw_head != self->hw_head && budget--; 229 self->sw_head = aq_ring_next_dx(self, self->sw_head)) { 230 struct aq_ring_buff_s *buff = &self->buff_ring[self->sw_head]; 231 232 if (likely(buff->is_mapped)) { 233 if (unlikely(buff->is_sop)) { 234 if (!buff->is_eop && 235 buff->eop_index != 0xffffU && 236 (!aq_ring_dx_in_range(self->sw_head, 237 buff->eop_index, 238 self->hw_head))) 239 break; 240 241 dma_unmap_single(dev, buff->pa, buff->len, 242 DMA_TO_DEVICE); 243 } else { 244 dma_unmap_page(dev, buff->pa, buff->len, 245 DMA_TO_DEVICE); 246 } 247 } 248 249 if (unlikely(buff->is_eop)) 250 dev_kfree_skb_any(buff->skb); 251 252 buff->pa = 0U; 253 buff->eop_index = 0xffffU; 254 } 255 256 return !!budget; 257 } 258 259 static void aq_rx_checksum(struct aq_ring_s *self, 260 struct aq_ring_buff_s *buff, 261 struct sk_buff *skb) 262 { 263 if (!(self->aq_nic->ndev->features & NETIF_F_RXCSUM)) 264 return; 265 266 if (unlikely(buff->is_cso_err)) { 267 ++self->stats.rx.errors; 268 skb->ip_summed = CHECKSUM_NONE; 269 return; 270 } 271 if (buff->is_ip_cso) { 272 __skb_incr_checksum_unnecessary(skb); 273 } else { 274 skb->ip_summed = CHECKSUM_NONE; 275 } 276 277 if (buff->is_udp_cso || buff->is_tcp_cso) 278 __skb_incr_checksum_unnecessary(skb); 279 } 280 281 #define AQ_SKB_ALIGN SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) 282 int aq_ring_rx_clean(struct aq_ring_s *self, 283 struct napi_struct *napi, 284 int *work_done, 285 int budget) 286 { 287 struct net_device *ndev = aq_nic_get_ndev(self->aq_nic); 288 bool is_rsc_completed = true; 289 int err = 0; 290 291 for (; (self->sw_head != self->hw_head) && budget; 292 self->sw_head = aq_ring_next_dx(self, self->sw_head), 293 --budget, ++(*work_done)) { 294 struct aq_ring_buff_s *buff = &self->buff_ring[self->sw_head]; 295 struct aq_ring_buff_s *buff_ = NULL; 296 struct sk_buff *skb = NULL; 297 unsigned int next_ = 0U; 298 unsigned int i = 0U; 299 u16 hdr_len; 300 301 if (buff->is_error) 302 continue; 303 304 if (buff->is_cleaned) 305 continue; 306 307 if (!buff->is_eop) { 308 for (next_ = buff->next, 309 buff_ = &self->buff_ring[next_]; true; 310 next_ = buff_->next, 311 buff_ = &self->buff_ring[next_]) { 312 is_rsc_completed = 313 aq_ring_dx_in_range(self->sw_head, 314 next_, 315 self->hw_head); 316 317 if (unlikely(!is_rsc_completed)) { 318 is_rsc_completed = false; 319 break; 320 } 321 322 if (buff_->is_eop) 323 break; 324 } 325 326 if (!is_rsc_completed) { 327 err = 0; 328 goto err_exit; 329 } 330 } 331 332 dma_sync_single_range_for_cpu(aq_nic_get_dev(self->aq_nic), 333 buff->rxdata.daddr, 334 buff->rxdata.pg_off, 335 buff->len, DMA_FROM_DEVICE); 336 337 /* for single fragment packets use build_skb() */ 338 if (buff->is_eop && 339 buff->len <= AQ_CFG_RX_FRAME_MAX - AQ_SKB_ALIGN) { 340 skb = build_skb(aq_buf_vaddr(&buff->rxdata), 341 AQ_CFG_RX_FRAME_MAX); 342 if (unlikely(!skb)) { 343 err = -ENOMEM; 344 goto err_exit; 345 } 346 skb_put(skb, buff->len); 347 page_ref_inc(buff->rxdata.page); 348 } else { 349 skb = napi_alloc_skb(napi, AQ_CFG_RX_HDR_SIZE); 350 if (unlikely(!skb)) { 351 err = -ENOMEM; 352 goto err_exit; 353 } 354 355 hdr_len = buff->len; 356 if (hdr_len > AQ_CFG_RX_HDR_SIZE) 357 hdr_len = eth_get_headlen(skb->dev, 358 aq_buf_vaddr(&buff->rxdata), 359 AQ_CFG_RX_HDR_SIZE); 360 361 memcpy(__skb_put(skb, hdr_len), aq_buf_vaddr(&buff->rxdata), 362 ALIGN(hdr_len, sizeof(long))); 363 364 if (buff->len - hdr_len > 0) { 365 skb_add_rx_frag(skb, 0, buff->rxdata.page, 366 buff->rxdata.pg_off + hdr_len, 367 buff->len - hdr_len, 368 AQ_CFG_RX_FRAME_MAX); 369 page_ref_inc(buff->rxdata.page); 370 } 371 372 if (!buff->is_eop) { 373 buff_ = buff; 374 i = 1U; 375 do { 376 next_ = buff_->next, 377 buff_ = &self->buff_ring[next_]; 378 379 dma_sync_single_range_for_cpu( 380 aq_nic_get_dev(self->aq_nic), 381 buff_->rxdata.daddr, 382 buff_->rxdata.pg_off, 383 buff_->len, 384 DMA_FROM_DEVICE); 385 skb_add_rx_frag(skb, i++, 386 buff_->rxdata.page, 387 buff_->rxdata.pg_off, 388 buff_->len, 389 AQ_CFG_RX_FRAME_MAX); 390 page_ref_inc(buff_->rxdata.page); 391 buff_->is_cleaned = 1; 392 } while (!buff_->is_eop); 393 } 394 } 395 396 skb->protocol = eth_type_trans(skb, ndev); 397 398 aq_rx_checksum(self, buff, skb); 399 400 skb_set_hash(skb, buff->rss_hash, 401 buff->is_hash_l4 ? PKT_HASH_TYPE_L4 : 402 PKT_HASH_TYPE_NONE); 403 404 skb_record_rx_queue(skb, self->idx); 405 406 ++self->stats.rx.packets; 407 self->stats.rx.bytes += skb->len; 408 409 napi_gro_receive(napi, skb); 410 } 411 412 err_exit: 413 return err; 414 } 415 416 int aq_ring_rx_fill(struct aq_ring_s *self) 417 { 418 unsigned int page_order = self->page_order; 419 struct aq_ring_buff_s *buff = NULL; 420 int err = 0; 421 int i = 0; 422 423 if (aq_ring_avail_dx(self) < min_t(unsigned int, AQ_CFG_RX_REFILL_THRES, 424 self->size / 2)) 425 return err; 426 427 for (i = aq_ring_avail_dx(self); i--; 428 self->sw_tail = aq_ring_next_dx(self, self->sw_tail)) { 429 buff = &self->buff_ring[self->sw_tail]; 430 431 buff->flags = 0U; 432 buff->len = AQ_CFG_RX_FRAME_MAX; 433 434 err = aq_get_rxpages(self, buff, page_order); 435 if (err) 436 goto err_exit; 437 438 buff->pa = aq_buf_daddr(&buff->rxdata); 439 buff = NULL; 440 } 441 442 err_exit: 443 return err; 444 } 445 446 void aq_ring_rx_deinit(struct aq_ring_s *self) 447 { 448 if (!self) 449 goto err_exit; 450 451 for (; self->sw_head != self->sw_tail; 452 self->sw_head = aq_ring_next_dx(self, self->sw_head)) { 453 struct aq_ring_buff_s *buff = &self->buff_ring[self->sw_head]; 454 455 aq_free_rxpage(&buff->rxdata, aq_nic_get_dev(self->aq_nic)); 456 } 457 458 err_exit:; 459 } 460 461 void aq_ring_free(struct aq_ring_s *self) 462 { 463 if (!self) 464 goto err_exit; 465 466 kfree(self->buff_ring); 467 468 if (self->dx_ring) 469 dma_free_coherent(aq_nic_get_dev(self->aq_nic), 470 self->size * self->dx_size, self->dx_ring, 471 self->dx_ring_pa); 472 473 err_exit:; 474 } 475