1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Atlantic Network Driver 3 * 4 * Copyright (C) 2014-2019 aQuantia Corporation 5 * Copyright (C) 2019-2020 Marvell International Ltd. 6 */ 7 8 /* File aq_nic.c: Definition of common code for NIC. */ 9 10 #include "aq_nic.h" 11 #include "aq_ring.h" 12 #include "aq_vec.h" 13 #include "aq_hw.h" 14 #include "aq_pci_func.h" 15 #include "aq_macsec.h" 16 #include "aq_main.h" 17 #include "aq_phy.h" 18 #include "aq_ptp.h" 19 #include "aq_filters.h" 20 21 #include <linux/moduleparam.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/timer.h> 25 #include <linux/cpu.h> 26 #include <linux/ip.h> 27 #include <linux/tcp.h> 28 #include <net/ip.h> 29 #include <net/pkt_cls.h> 30 31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO; 32 module_param_named(aq_itr, aq_itr, uint, 0644); 33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode"); 34 35 static unsigned int aq_itr_tx; 36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644); 37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate"); 38 39 static unsigned int aq_itr_rx; 40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644); 41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate"); 42 43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self); 44 45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues) 46 { 47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = { 48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d, 49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18, 50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8, 51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70, 52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c 53 }; 54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 55 struct aq_rss_parameters *rss_params; 56 int i = 0; 57 58 rss_params = &cfg->aq_rss; 59 60 rss_params->hash_secret_key_size = sizeof(rss_key); 61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key)); 62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX; 63 64 for (i = rss_params->indirection_table_size; i--;) 65 rss_params->indirection_table[i] = i & (num_rss_queues - 1); 66 } 67 68 /* Recalculate the number of vectors */ 69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self) 70 { 71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 72 73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF); 74 cfg->vecs = min(cfg->vecs, num_online_cpus()); 75 if (self->irqvecs > AQ_HW_SERVICE_IRQS) 76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS); 77 /* cfg->vecs should be power of 2 for RSS */ 78 cfg->vecs = rounddown_pow_of_two(cfg->vecs); 79 80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) { 81 if (cfg->tcs > 2) 82 cfg->vecs = min(cfg->vecs, 4U); 83 } 84 85 if (cfg->vecs <= 4) 86 cfg->tc_mode = AQ_TC_MODE_8TCS; 87 else 88 cfg->tc_mode = AQ_TC_MODE_4TCS; 89 90 /*rss rings */ 91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF); 92 aq_nic_rss_init(self, cfg->num_rss_queues); 93 } 94 95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */ 96 void aq_nic_cfg_start(struct aq_nic_s *self) 97 { 98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 99 int i; 100 101 cfg->tcs = AQ_CFG_TCS_DEF; 102 103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF; 104 105 cfg->itr = aq_itr; 106 cfg->tx_itr = aq_itr_tx; 107 cfg->rx_itr = aq_itr_rx; 108 109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER; 110 cfg->is_rss = AQ_CFG_IS_RSS_DEF; 111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF; 112 cfg->fc.req = AQ_CFG_FC_MODE; 113 cfg->wol = AQ_CFG_WOL_MODES; 114 115 cfg->mtu = AQ_CFG_MTU_DEF; 116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK; 117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF; 118 119 cfg->is_lro = AQ_CFG_IS_LRO_DEF; 120 cfg->is_ptp = true; 121 122 /*descriptors */ 123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF); 124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF); 125 126 aq_nic_cfg_update_num_vecs(self); 127 128 cfg->irq_type = aq_pci_func_get_irq_type(self); 129 130 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) || 131 (cfg->aq_hw_caps->vecs == 1U) || 132 (cfg->vecs == 1U)) { 133 cfg->is_rss = 0U; 134 cfg->vecs = 1U; 135 } 136 137 /* Check if we have enough vectors allocated for 138 * link status IRQ. If no - we'll know link state from 139 * slower service task. 140 */ 141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs) 142 cfg->link_irq_vec = cfg->vecs; 143 else 144 cfg->link_irq_vec = 0; 145 146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk; 147 cfg->features = cfg->aq_hw_caps->hw_features; 148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX); 149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX); 150 cfg->is_vlan_force_promisc = true; 151 152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 153 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 154 } 155 156 static int aq_nic_update_link_status(struct aq_nic_s *self) 157 { 158 int err = self->aq_fw_ops->update_link_status(self->aq_hw); 159 u32 fc = 0; 160 161 if (err) 162 return err; 163 164 if (self->aq_fw_ops->get_flow_control) 165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc); 166 self->aq_nic_cfg.fc.cur = fc; 167 168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) { 169 netdev_info(self->ndev, "%s: link change old %d new %d\n", 170 AQ_CFG_DRV_NAME, self->link_status.mbps, 171 self->aq_hw->aq_link_status.mbps); 172 aq_nic_update_interrupt_moderation_settings(self); 173 174 if (self->aq_ptp) { 175 aq_ptp_clock_init(self); 176 aq_ptp_tm_offset_set(self, 177 self->aq_hw->aq_link_status.mbps); 178 aq_ptp_link_change(self); 179 } 180 181 /* Driver has to update flow control settings on RX block 182 * on any link event. 183 * We should query FW whether it negotiated FC. 184 */ 185 if (self->aq_hw_ops->hw_set_fc) 186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0); 187 } 188 189 self->link_status = self->aq_hw->aq_link_status; 190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) { 191 aq_utils_obj_set(&self->flags, 192 AQ_NIC_FLAG_STARTED); 193 aq_utils_obj_clear(&self->flags, 194 AQ_NIC_LINK_DOWN); 195 netif_carrier_on(self->ndev); 196 #if IS_ENABLED(CONFIG_MACSEC) 197 aq_macsec_enable(self); 198 #endif 199 if (self->aq_hw_ops->hw_tc_rate_limit_set) 200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw); 201 202 netif_tx_wake_all_queues(self->ndev); 203 } 204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) { 205 netif_carrier_off(self->ndev); 206 netif_tx_disable(self->ndev); 207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN); 208 } 209 210 return 0; 211 } 212 213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private) 214 { 215 struct aq_nic_s *self = private; 216 217 if (!self) 218 return IRQ_NONE; 219 220 aq_nic_update_link_status(self); 221 222 self->aq_hw_ops->hw_irq_enable(self->aq_hw, 223 BIT(self->aq_nic_cfg.link_irq_vec)); 224 225 return IRQ_HANDLED; 226 } 227 228 static void aq_nic_service_task(struct work_struct *work) 229 { 230 struct aq_nic_s *self = container_of(work, struct aq_nic_s, 231 service_task); 232 int err; 233 234 aq_ptp_service_task(self); 235 236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY)) 237 return; 238 239 err = aq_nic_update_link_status(self); 240 if (err) 241 return; 242 243 #if IS_ENABLED(CONFIG_MACSEC) 244 aq_macsec_work(self); 245 #endif 246 247 mutex_lock(&self->fwreq_mutex); 248 if (self->aq_fw_ops->update_stats) 249 self->aq_fw_ops->update_stats(self->aq_hw); 250 mutex_unlock(&self->fwreq_mutex); 251 252 aq_nic_update_ndev_stats(self); 253 } 254 255 static void aq_nic_service_timer_cb(struct timer_list *t) 256 { 257 struct aq_nic_s *self = from_timer(self, t, service_timer); 258 259 mod_timer(&self->service_timer, 260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL); 261 262 aq_ndev_schedule_work(&self->service_task); 263 } 264 265 static void aq_nic_polling_timer_cb(struct timer_list *t) 266 { 267 struct aq_nic_s *self = from_timer(self, t, polling_timer); 268 struct aq_vec_s *aq_vec = NULL; 269 unsigned int i = 0U; 270 271 for (i = 0U, aq_vec = self->aq_vec[0]; 272 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 273 aq_vec_isr(i, (void *)aq_vec); 274 275 mod_timer(&self->polling_timer, jiffies + 276 AQ_CFG_POLLING_TIMER_INTERVAL); 277 } 278 279 static int aq_nic_hw_prepare(struct aq_nic_s *self) 280 { 281 int err = 0; 282 283 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw); 284 if (err) 285 goto exit; 286 287 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops); 288 289 exit: 290 return err; 291 } 292 293 static bool aq_nic_is_valid_ether_addr(const u8 *addr) 294 { 295 /* Some engineering samples of Aquantia NICs are provisioned with a 296 * partially populated MAC, which is still invalid. 297 */ 298 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0); 299 } 300 301 int aq_nic_ndev_register(struct aq_nic_s *self) 302 { 303 int err = 0; 304 305 if (!self->ndev) { 306 err = -EINVAL; 307 goto err_exit; 308 } 309 310 err = aq_nic_hw_prepare(self); 311 if (err) 312 goto err_exit; 313 314 #if IS_ENABLED(CONFIG_MACSEC) 315 aq_macsec_init(self); 316 #endif 317 318 mutex_lock(&self->fwreq_mutex); 319 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, 320 self->ndev->dev_addr); 321 mutex_unlock(&self->fwreq_mutex); 322 if (err) 323 goto err_exit; 324 325 if (!is_valid_ether_addr(self->ndev->dev_addr) || 326 !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) { 327 netdev_warn(self->ndev, "MAC is invalid, will use random."); 328 eth_hw_addr_random(self->ndev); 329 } 330 331 #if defined(AQ_CFG_MAC_ADDR_PERMANENT) 332 { 333 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT; 334 335 ether_addr_copy(self->ndev->dev_addr, mac_addr_permanent); 336 } 337 #endif 338 339 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs; 340 self->aq_vecs++) { 341 self->aq_vec[self->aq_vecs] = 342 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self)); 343 if (!self->aq_vec[self->aq_vecs]) { 344 err = -ENOMEM; 345 goto err_exit; 346 } 347 } 348 349 netif_carrier_off(self->ndev); 350 351 netif_tx_disable(self->ndev); 352 353 err = register_netdev(self->ndev); 354 if (err) 355 goto err_exit; 356 357 err_exit: 358 #if IS_ENABLED(CONFIG_MACSEC) 359 if (err) 360 aq_macsec_free(self); 361 #endif 362 return err; 363 } 364 365 void aq_nic_ndev_init(struct aq_nic_s *self) 366 { 367 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps; 368 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg; 369 370 self->ndev->hw_features |= aq_hw_caps->hw_features; 371 self->ndev->features = aq_hw_caps->hw_features; 372 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM | 373 NETIF_F_RXHASH | NETIF_F_SG | 374 NETIF_F_LRO | NETIF_F_TSO; 375 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4; 376 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags; 377 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE; 378 379 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK; 380 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN; 381 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN; 382 383 } 384 385 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx, 386 struct aq_ring_s *ring) 387 { 388 self->aq_ring_tx[idx] = ring; 389 } 390 391 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self) 392 { 393 return self->ndev; 394 } 395 396 int aq_nic_init(struct aq_nic_s *self) 397 { 398 struct aq_vec_s *aq_vec = NULL; 399 unsigned int i = 0U; 400 int err = 0; 401 402 self->power_state = AQ_HW_POWER_STATE_D0; 403 mutex_lock(&self->fwreq_mutex); 404 err = self->aq_hw_ops->hw_reset(self->aq_hw); 405 mutex_unlock(&self->fwreq_mutex); 406 if (err < 0) 407 goto err_exit; 408 409 err = self->aq_hw_ops->hw_init(self->aq_hw, 410 aq_nic_get_ndev(self)->dev_addr); 411 if (err < 0) 412 goto err_exit; 413 414 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) && 415 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) { 416 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX; 417 err = aq_phy_init(self->aq_hw); 418 419 /* Disable the PTP on NICs where it's known to cause datapath 420 * problems. 421 * Ideally this should have been done by PHY provisioning, but 422 * many units have been shipped with enabled PTP block already. 423 */ 424 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP) 425 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX) 426 aq_phy_disable_ptp(self->aq_hw); 427 } 428 429 for (i = 0U; i < self->aq_vecs; i++) { 430 aq_vec = self->aq_vec[i]; 431 err = aq_vec_ring_alloc(aq_vec, self, i, 432 aq_nic_get_cfg(self)); 433 if (err) 434 goto err_exit; 435 436 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw); 437 } 438 439 if (aq_nic_get_cfg(self)->is_ptp) { 440 err = aq_ptp_init(self, self->irqvecs - 1); 441 if (err < 0) 442 goto err_exit; 443 444 err = aq_ptp_ring_alloc(self); 445 if (err < 0) 446 goto err_exit; 447 448 err = aq_ptp_ring_init(self); 449 if (err < 0) 450 goto err_exit; 451 } 452 453 netif_carrier_off(self->ndev); 454 455 err_exit: 456 return err; 457 } 458 459 int aq_nic_start(struct aq_nic_s *self) 460 { 461 struct aq_vec_s *aq_vec = NULL; 462 struct aq_nic_cfg_s *cfg; 463 unsigned int i = 0U; 464 int err = 0; 465 466 cfg = aq_nic_get_cfg(self); 467 468 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, 469 self->mc_list.ar, 470 self->mc_list.count); 471 if (err < 0) 472 goto err_exit; 473 474 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, 475 self->packet_filter); 476 if (err < 0) 477 goto err_exit; 478 479 for (i = 0U, aq_vec = self->aq_vec[0]; 480 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 481 err = aq_vec_start(aq_vec); 482 if (err < 0) 483 goto err_exit; 484 } 485 486 err = aq_ptp_ring_start(self); 487 if (err < 0) 488 goto err_exit; 489 490 aq_nic_set_loopback(self); 491 492 err = self->aq_hw_ops->hw_start(self->aq_hw); 493 if (err < 0) 494 goto err_exit; 495 496 err = aq_nic_update_interrupt_moderation_settings(self); 497 if (err) 498 goto err_exit; 499 500 INIT_WORK(&self->service_task, aq_nic_service_task); 501 502 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); 503 aq_nic_service_timer_cb(&self->service_timer); 504 505 if (cfg->is_polling) { 506 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0); 507 mod_timer(&self->polling_timer, jiffies + 508 AQ_CFG_POLLING_TIMER_INTERVAL); 509 } else { 510 for (i = 0U, aq_vec = self->aq_vec[0]; 511 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 512 err = aq_pci_func_alloc_irq(self, i, self->ndev->name, 513 aq_vec_isr, aq_vec, 514 aq_vec_get_affinity_mask(aq_vec)); 515 if (err < 0) 516 goto err_exit; 517 } 518 519 err = aq_ptp_irq_alloc(self); 520 if (err < 0) 521 goto err_exit; 522 523 if (cfg->link_irq_vec) { 524 int irqvec = pci_irq_vector(self->pdev, 525 cfg->link_irq_vec); 526 err = request_threaded_irq(irqvec, NULL, 527 aq_linkstate_threaded_isr, 528 IRQF_SHARED | IRQF_ONESHOT, 529 self->ndev->name, self); 530 if (err < 0) 531 goto err_exit; 532 self->msix_entry_mask |= (1 << cfg->link_irq_vec); 533 } 534 535 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw, 536 AQ_CFG_IRQ_MASK); 537 if (err < 0) 538 goto err_exit; 539 } 540 541 err = netif_set_real_num_tx_queues(self->ndev, 542 self->aq_vecs * cfg->tcs); 543 if (err < 0) 544 goto err_exit; 545 546 err = netif_set_real_num_rx_queues(self->ndev, 547 self->aq_vecs * cfg->tcs); 548 if (err < 0) 549 goto err_exit; 550 551 for (i = 0; i < cfg->tcs; i++) { 552 u16 offset = self->aq_vecs * i; 553 554 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset); 555 } 556 netif_tx_start_all_queues(self->ndev); 557 558 err_exit: 559 return err; 560 } 561 562 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb, 563 struct aq_ring_s *ring) 564 { 565 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 566 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 567 struct device *dev = aq_nic_get_dev(self); 568 struct aq_ring_buff_s *first = NULL; 569 u8 ipver = ip_hdr(skb)->version; 570 struct aq_ring_buff_s *dx_buff; 571 bool need_context_tag = false; 572 unsigned int frag_count = 0U; 573 unsigned int ret = 0U; 574 unsigned int dx; 575 u8 l4proto = 0; 576 577 if (ipver == 4) 578 l4proto = ip_hdr(skb)->protocol; 579 else if (ipver == 6) 580 l4proto = ipv6_hdr(skb)->nexthdr; 581 582 dx = ring->sw_tail; 583 dx_buff = &ring->buff_ring[dx]; 584 dx_buff->flags = 0U; 585 586 if (unlikely(skb_is_gso(skb))) { 587 dx_buff->mss = skb_shinfo(skb)->gso_size; 588 if (l4proto == IPPROTO_TCP) { 589 dx_buff->is_gso_tcp = 1U; 590 dx_buff->len_l4 = tcp_hdrlen(skb); 591 } else if (l4proto == IPPROTO_UDP) { 592 dx_buff->is_gso_udp = 1U; 593 dx_buff->len_l4 = sizeof(struct udphdr); 594 /* UDP GSO Hardware does not replace packet length. */ 595 udp_hdr(skb)->len = htons(dx_buff->mss + 596 dx_buff->len_l4); 597 } else { 598 WARN_ONCE(true, "Bad GSO mode"); 599 goto exit; 600 } 601 dx_buff->len_pkt = skb->len; 602 dx_buff->len_l2 = ETH_HLEN; 603 dx_buff->len_l3 = skb_network_header_len(skb); 604 dx_buff->eop_index = 0xffffU; 605 dx_buff->is_ipv6 = (ipver == 6); 606 need_context_tag = true; 607 } 608 609 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) { 610 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb); 611 dx_buff->len_pkt = skb->len; 612 dx_buff->is_vlan = 1U; 613 need_context_tag = true; 614 } 615 616 if (need_context_tag) { 617 dx = aq_ring_next_dx(ring, dx); 618 dx_buff = &ring->buff_ring[dx]; 619 dx_buff->flags = 0U; 620 ++ret; 621 } 622 623 dx_buff->len = skb_headlen(skb); 624 dx_buff->pa = dma_map_single(dev, 625 skb->data, 626 dx_buff->len, 627 DMA_TO_DEVICE); 628 629 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) { 630 ret = 0; 631 goto exit; 632 } 633 634 first = dx_buff; 635 dx_buff->len_pkt = skb->len; 636 dx_buff->is_sop = 1U; 637 dx_buff->is_mapped = 1U; 638 ++ret; 639 640 if (skb->ip_summed == CHECKSUM_PARTIAL) { 641 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol); 642 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP); 643 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP); 644 } 645 646 for (; nr_frags--; ++frag_count) { 647 unsigned int frag_len = 0U; 648 unsigned int buff_offset = 0U; 649 unsigned int buff_size = 0U; 650 dma_addr_t frag_pa; 651 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count]; 652 653 frag_len = skb_frag_size(frag); 654 655 while (frag_len) { 656 if (frag_len > AQ_CFG_TX_FRAME_MAX) 657 buff_size = AQ_CFG_TX_FRAME_MAX; 658 else 659 buff_size = frag_len; 660 661 frag_pa = skb_frag_dma_map(dev, 662 frag, 663 buff_offset, 664 buff_size, 665 DMA_TO_DEVICE); 666 667 if (unlikely(dma_mapping_error(dev, 668 frag_pa))) 669 goto mapping_error; 670 671 dx = aq_ring_next_dx(ring, dx); 672 dx_buff = &ring->buff_ring[dx]; 673 674 dx_buff->flags = 0U; 675 dx_buff->len = buff_size; 676 dx_buff->pa = frag_pa; 677 dx_buff->is_mapped = 1U; 678 dx_buff->eop_index = 0xffffU; 679 680 frag_len -= buff_size; 681 buff_offset += buff_size; 682 683 ++ret; 684 } 685 } 686 687 first->eop_index = dx; 688 dx_buff->is_eop = 1U; 689 dx_buff->skb = skb; 690 goto exit; 691 692 mapping_error: 693 for (dx = ring->sw_tail; 694 ret > 0; 695 --ret, dx = aq_ring_next_dx(ring, dx)) { 696 dx_buff = &ring->buff_ring[dx]; 697 698 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) && 699 !dx_buff->is_vlan && dx_buff->pa) { 700 if (unlikely(dx_buff->is_sop)) { 701 dma_unmap_single(dev, 702 dx_buff->pa, 703 dx_buff->len, 704 DMA_TO_DEVICE); 705 } else { 706 dma_unmap_page(dev, 707 dx_buff->pa, 708 dx_buff->len, 709 DMA_TO_DEVICE); 710 } 711 } 712 } 713 714 exit: 715 return ret; 716 } 717 718 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb) 719 { 720 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 721 unsigned int vec = skb->queue_mapping % cfg->vecs; 722 unsigned int tc = skb->queue_mapping / cfg->vecs; 723 struct aq_ring_s *ring = NULL; 724 unsigned int frags = 0U; 725 int err = NETDEV_TX_OK; 726 727 frags = skb_shinfo(skb)->nr_frags + 1; 728 729 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)]; 730 731 if (frags > AQ_CFG_SKB_FRAGS_MAX) { 732 dev_kfree_skb_any(skb); 733 goto err_exit; 734 } 735 736 aq_ring_update_queue_state(ring); 737 738 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) { 739 err = NETDEV_TX_BUSY; 740 goto err_exit; 741 } 742 743 /* Above status update may stop the queue. Check this. */ 744 if (__netif_subqueue_stopped(self->ndev, 745 AQ_NIC_RING2QMAP(self, ring->idx))) { 746 err = NETDEV_TX_BUSY; 747 goto err_exit; 748 } 749 750 frags = aq_nic_map_skb(self, skb, ring); 751 752 if (likely(frags)) { 753 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw, 754 ring, frags); 755 } else { 756 err = NETDEV_TX_BUSY; 757 } 758 759 err_exit: 760 return err; 761 } 762 763 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self) 764 { 765 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw); 766 } 767 768 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags) 769 { 770 int err = 0; 771 772 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags); 773 if (err < 0) 774 goto err_exit; 775 776 self->packet_filter = flags; 777 778 err_exit: 779 return err; 780 } 781 782 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) 783 { 784 const struct aq_hw_ops *hw_ops = self->aq_hw_ops; 785 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 786 unsigned int packet_filter = ndev->flags; 787 struct netdev_hw_addr *ha = NULL; 788 unsigned int i = 0U; 789 int err = 0; 790 791 self->mc_list.count = 0; 792 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 793 packet_filter |= IFF_PROMISC; 794 } else { 795 netdev_for_each_uc_addr(ha, ndev) { 796 ether_addr_copy(self->mc_list.ar[i++], ha->addr); 797 } 798 } 799 800 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST); 801 if (cfg->is_mc_list_enabled) { 802 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 803 packet_filter |= IFF_ALLMULTI; 804 } else { 805 netdev_for_each_mc_addr(ha, ndev) { 806 ether_addr_copy(self->mc_list.ar[i++], 807 ha->addr); 808 } 809 } 810 } 811 812 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { 813 self->mc_list.count = i; 814 err = hw_ops->hw_multicast_list_set(self->aq_hw, 815 self->mc_list.ar, 816 self->mc_list.count); 817 if (err < 0) 818 return err; 819 } 820 821 return aq_nic_set_packet_filter(self, packet_filter); 822 } 823 824 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu) 825 { 826 self->aq_nic_cfg.mtu = new_mtu; 827 828 return 0; 829 } 830 831 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev) 832 { 833 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr); 834 } 835 836 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self) 837 { 838 return self->link_status.mbps; 839 } 840 841 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p) 842 { 843 u32 *regs_buff = p; 844 int err = 0; 845 846 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 847 return -EOPNOTSUPP; 848 849 regs->version = 1; 850 851 err = self->aq_hw_ops->hw_get_regs(self->aq_hw, 852 self->aq_nic_cfg.aq_hw_caps, 853 regs_buff); 854 if (err < 0) 855 goto err_exit; 856 857 err_exit: 858 return err; 859 } 860 861 int aq_nic_get_regs_count(struct aq_nic_s *self) 862 { 863 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 864 return 0; 865 866 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count; 867 } 868 869 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data) 870 { 871 struct aq_vec_s *aq_vec = NULL; 872 struct aq_stats_s *stats; 873 unsigned int count = 0U; 874 unsigned int i = 0U; 875 unsigned int tc; 876 877 if (self->aq_fw_ops->update_stats) { 878 mutex_lock(&self->fwreq_mutex); 879 self->aq_fw_ops->update_stats(self->aq_hw); 880 mutex_unlock(&self->fwreq_mutex); 881 } 882 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 883 884 if (!stats) 885 goto err_exit; 886 887 data[i] = stats->uprc + stats->mprc + stats->bprc; 888 data[++i] = stats->uprc; 889 data[++i] = stats->mprc; 890 data[++i] = stats->bprc; 891 data[++i] = stats->erpt; 892 data[++i] = stats->uptc + stats->mptc + stats->bptc; 893 data[++i] = stats->uptc; 894 data[++i] = stats->mptc; 895 data[++i] = stats->bptc; 896 data[++i] = stats->ubrc; 897 data[++i] = stats->ubtc; 898 data[++i] = stats->mbrc; 899 data[++i] = stats->mbtc; 900 data[++i] = stats->bbrc; 901 data[++i] = stats->bbtc; 902 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc; 903 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc; 904 data[++i] = stats->dma_pkt_rc; 905 data[++i] = stats->dma_pkt_tc; 906 data[++i] = stats->dma_oct_rc; 907 data[++i] = stats->dma_oct_tc; 908 data[++i] = stats->dpc; 909 910 i++; 911 912 data += i; 913 914 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { 915 for (i = 0U, aq_vec = self->aq_vec[0]; 916 aq_vec && self->aq_vecs > i; 917 ++i, aq_vec = self->aq_vec[i]) { 918 data += count; 919 aq_vec_get_sw_stats(aq_vec, tc, data, &count); 920 } 921 } 922 923 data += count; 924 925 err_exit:; 926 return data; 927 } 928 929 static void aq_nic_update_ndev_stats(struct aq_nic_s *self) 930 { 931 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 932 struct net_device *ndev = self->ndev; 933 934 ndev->stats.rx_packets = stats->dma_pkt_rc; 935 ndev->stats.rx_bytes = stats->dma_oct_rc; 936 ndev->stats.rx_errors = stats->erpr; 937 ndev->stats.rx_dropped = stats->dpc; 938 ndev->stats.tx_packets = stats->dma_pkt_tc; 939 ndev->stats.tx_bytes = stats->dma_oct_tc; 940 ndev->stats.tx_errors = stats->erpt; 941 ndev->stats.multicast = stats->mprc; 942 } 943 944 void aq_nic_get_link_ksettings(struct aq_nic_s *self, 945 struct ethtool_link_ksettings *cmd) 946 { 947 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 948 cmd->base.port = PORT_FIBRE; 949 else 950 cmd->base.port = PORT_TP; 951 /* This driver supports only 10G capable adapters, so DUPLEX_FULL */ 952 cmd->base.duplex = DUPLEX_FULL; 953 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg; 954 955 ethtool_link_ksettings_zero_link_mode(cmd, supported); 956 957 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G) 958 ethtool_link_ksettings_add_link_mode(cmd, supported, 959 10000baseT_Full); 960 961 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G) 962 ethtool_link_ksettings_add_link_mode(cmd, supported, 963 5000baseT_Full); 964 965 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5) 966 ethtool_link_ksettings_add_link_mode(cmd, supported, 967 2500baseT_Full); 968 969 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G) 970 ethtool_link_ksettings_add_link_mode(cmd, supported, 971 1000baseT_Full); 972 973 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M) 974 ethtool_link_ksettings_add_link_mode(cmd, supported, 975 100baseT_Full); 976 977 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M) 978 ethtool_link_ksettings_add_link_mode(cmd, supported, 979 10baseT_Full); 980 981 if (self->aq_nic_cfg.aq_hw_caps->flow_control) { 982 ethtool_link_ksettings_add_link_mode(cmd, supported, 983 Pause); 984 ethtool_link_ksettings_add_link_mode(cmd, supported, 985 Asym_Pause); 986 } 987 988 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 989 990 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 991 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 992 else 993 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 994 995 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 996 997 if (self->aq_nic_cfg.is_autoneg) 998 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 999 1000 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G) 1001 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1002 10000baseT_Full); 1003 1004 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G) 1005 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1006 5000baseT_Full); 1007 1008 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5) 1009 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1010 2500baseT_Full); 1011 1012 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G) 1013 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1014 1000baseT_Full); 1015 1016 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M) 1017 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1018 100baseT_Full); 1019 1020 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M) 1021 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1022 10baseT_Full); 1023 1024 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX) 1025 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1026 Pause); 1027 1028 /* Asym is when either RX or TX, but not both */ 1029 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^ 1030 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)) 1031 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1032 Asym_Pause); 1033 1034 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 1035 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 1036 else 1037 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 1038 } 1039 1040 int aq_nic_set_link_ksettings(struct aq_nic_s *self, 1041 const struct ethtool_link_ksettings *cmd) 1042 { 1043 u32 speed = 0U; 1044 u32 rate = 0U; 1045 int err = 0; 1046 1047 if (cmd->base.autoneg == AUTONEG_ENABLE) { 1048 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk; 1049 self->aq_nic_cfg.is_autoneg = true; 1050 } else { 1051 speed = cmd->base.speed; 1052 1053 switch (speed) { 1054 case SPEED_10: 1055 rate = AQ_NIC_RATE_10M; 1056 break; 1057 1058 case SPEED_100: 1059 rate = AQ_NIC_RATE_100M; 1060 break; 1061 1062 case SPEED_1000: 1063 rate = AQ_NIC_RATE_1G; 1064 break; 1065 1066 case SPEED_2500: 1067 rate = AQ_NIC_RATE_2G5; 1068 break; 1069 1070 case SPEED_5000: 1071 rate = AQ_NIC_RATE_5G; 1072 break; 1073 1074 case SPEED_10000: 1075 rate = AQ_NIC_RATE_10G; 1076 break; 1077 1078 default: 1079 err = -1; 1080 goto err_exit; 1081 break; 1082 } 1083 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) { 1084 err = -1; 1085 goto err_exit; 1086 } 1087 1088 self->aq_nic_cfg.is_autoneg = false; 1089 } 1090 1091 mutex_lock(&self->fwreq_mutex); 1092 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate); 1093 mutex_unlock(&self->fwreq_mutex); 1094 if (err < 0) 1095 goto err_exit; 1096 1097 self->aq_nic_cfg.link_speed_msk = rate; 1098 1099 err_exit: 1100 return err; 1101 } 1102 1103 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self) 1104 { 1105 return &self->aq_nic_cfg; 1106 } 1107 1108 u32 aq_nic_get_fw_version(struct aq_nic_s *self) 1109 { 1110 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw); 1111 } 1112 1113 int aq_nic_set_loopback(struct aq_nic_s *self) 1114 { 1115 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1116 1117 if (!self->aq_hw_ops->hw_set_loopback || 1118 !self->aq_fw_ops->set_phyloopback) 1119 return -ENOTSUPP; 1120 1121 mutex_lock(&self->fwreq_mutex); 1122 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1123 AQ_HW_LOOPBACK_DMA_SYS, 1124 !!(cfg->priv_flags & 1125 BIT(AQ_HW_LOOPBACK_DMA_SYS))); 1126 1127 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1128 AQ_HW_LOOPBACK_PKT_SYS, 1129 !!(cfg->priv_flags & 1130 BIT(AQ_HW_LOOPBACK_PKT_SYS))); 1131 1132 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1133 AQ_HW_LOOPBACK_DMA_NET, 1134 !!(cfg->priv_flags & 1135 BIT(AQ_HW_LOOPBACK_DMA_NET))); 1136 1137 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1138 AQ_HW_LOOPBACK_PHYINT_SYS, 1139 !!(cfg->priv_flags & 1140 BIT(AQ_HW_LOOPBACK_PHYINT_SYS))); 1141 1142 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1143 AQ_HW_LOOPBACK_PHYEXT_SYS, 1144 !!(cfg->priv_flags & 1145 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))); 1146 mutex_unlock(&self->fwreq_mutex); 1147 1148 return 0; 1149 } 1150 1151 int aq_nic_stop(struct aq_nic_s *self) 1152 { 1153 struct aq_vec_s *aq_vec = NULL; 1154 unsigned int i = 0U; 1155 1156 netif_tx_disable(self->ndev); 1157 netif_carrier_off(self->ndev); 1158 1159 del_timer_sync(&self->service_timer); 1160 cancel_work_sync(&self->service_task); 1161 1162 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK); 1163 1164 if (self->aq_nic_cfg.is_polling) 1165 del_timer_sync(&self->polling_timer); 1166 else 1167 aq_pci_func_free_irqs(self); 1168 1169 aq_ptp_irq_free(self); 1170 1171 for (i = 0U, aq_vec = self->aq_vec[0]; 1172 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 1173 aq_vec_stop(aq_vec); 1174 1175 aq_ptp_ring_stop(self); 1176 1177 return self->aq_hw_ops->hw_stop(self->aq_hw); 1178 } 1179 1180 void aq_nic_set_power(struct aq_nic_s *self) 1181 { 1182 if (self->power_state != AQ_HW_POWER_STATE_D0 || 1183 self->aq_hw->aq_nic_cfg->wol) 1184 if (likely(self->aq_fw_ops->set_power)) { 1185 mutex_lock(&self->fwreq_mutex); 1186 self->aq_fw_ops->set_power(self->aq_hw, 1187 self->power_state, 1188 self->ndev->dev_addr); 1189 mutex_unlock(&self->fwreq_mutex); 1190 } 1191 } 1192 1193 void aq_nic_deinit(struct aq_nic_s *self, bool link_down) 1194 { 1195 struct aq_vec_s *aq_vec = NULL; 1196 unsigned int i = 0U; 1197 1198 if (!self) 1199 goto err_exit; 1200 1201 for (i = 0U; i < self->aq_vecs; i++) { 1202 aq_vec = self->aq_vec[i]; 1203 aq_vec_deinit(aq_vec); 1204 aq_vec_ring_free(aq_vec); 1205 } 1206 1207 aq_ptp_unregister(self); 1208 aq_ptp_ring_deinit(self); 1209 aq_ptp_ring_free(self); 1210 aq_ptp_free(self); 1211 1212 if (likely(self->aq_fw_ops->deinit) && link_down) { 1213 mutex_lock(&self->fwreq_mutex); 1214 self->aq_fw_ops->deinit(self->aq_hw); 1215 mutex_unlock(&self->fwreq_mutex); 1216 } 1217 1218 err_exit:; 1219 } 1220 1221 void aq_nic_free_vectors(struct aq_nic_s *self) 1222 { 1223 unsigned int i = 0U; 1224 1225 if (!self) 1226 goto err_exit; 1227 1228 for (i = ARRAY_SIZE(self->aq_vec); i--;) { 1229 if (self->aq_vec[i]) { 1230 aq_vec_free(self->aq_vec[i]); 1231 self->aq_vec[i] = NULL; 1232 } 1233 } 1234 1235 err_exit:; 1236 } 1237 1238 int aq_nic_realloc_vectors(struct aq_nic_s *self) 1239 { 1240 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 1241 1242 aq_nic_free_vectors(self); 1243 1244 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) { 1245 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs, 1246 cfg); 1247 if (unlikely(!self->aq_vec[self->aq_vecs])) 1248 return -ENOMEM; 1249 } 1250 1251 return 0; 1252 } 1253 1254 void aq_nic_shutdown(struct aq_nic_s *self) 1255 { 1256 int err = 0; 1257 1258 if (!self->ndev) 1259 return; 1260 1261 rtnl_lock(); 1262 1263 netif_device_detach(self->ndev); 1264 1265 if (netif_running(self->ndev)) { 1266 err = aq_nic_stop(self); 1267 if (err < 0) 1268 goto err_exit; 1269 } 1270 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol); 1271 aq_nic_set_power(self); 1272 1273 err_exit: 1274 rtnl_unlock(); 1275 } 1276 1277 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type) 1278 { 1279 u8 location = 0xFF; 1280 u32 fltr_cnt; 1281 u32 n_bit; 1282 1283 switch (type) { 1284 case aq_rx_filter_ethertype: 1285 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT - 1286 self->aq_hw_rx_fltrs.fet_reserved_count; 1287 self->aq_hw_rx_fltrs.fet_reserved_count++; 1288 break; 1289 case aq_rx_filter_l3l4: 1290 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4; 1291 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count; 1292 1293 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit); 1294 self->aq_hw_rx_fltrs.fl3l4.reserved_count++; 1295 location = n_bit; 1296 break; 1297 default: 1298 break; 1299 } 1300 1301 return location; 1302 } 1303 1304 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type, 1305 u32 location) 1306 { 1307 switch (type) { 1308 case aq_rx_filter_ethertype: 1309 self->aq_hw_rx_fltrs.fet_reserved_count--; 1310 break; 1311 case aq_rx_filter_l3l4: 1312 self->aq_hw_rx_fltrs.fl3l4.reserved_count--; 1313 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location); 1314 break; 1315 default: 1316 break; 1317 } 1318 } 1319 1320 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) 1321 { 1322 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1323 const unsigned int prev_vecs = cfg->vecs; 1324 bool ndev_running; 1325 int err = 0; 1326 int i; 1327 1328 /* if already the same configuration or 1329 * disable request (tcs is 0) and we already is disabled 1330 */ 1331 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) 1332 return 0; 1333 1334 ndev_running = netif_running(self->ndev); 1335 if (ndev_running) 1336 dev_close(self->ndev); 1337 1338 cfg->tcs = tcs; 1339 if (cfg->tcs == 0) 1340 cfg->tcs = 1; 1341 if (prio_tc_map) 1342 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map)); 1343 else 1344 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 1345 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 1346 1347 cfg->is_qos = (tcs != 0 ? true : false); 1348 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC); 1349 if (!cfg->is_ptp) 1350 netdev_warn(self->ndev, "%s\n", 1351 "PTP is auto disabled due to requested TC count."); 1352 1353 netdev_set_num_tc(self->ndev, cfg->tcs); 1354 1355 /* Changing the number of TCs might change the number of vectors */ 1356 aq_nic_cfg_update_num_vecs(self); 1357 if (prev_vecs != cfg->vecs) { 1358 err = aq_nic_realloc_vectors(self); 1359 if (err) 1360 goto err_exit; 1361 } 1362 1363 if (ndev_running) 1364 err = dev_open(self->ndev, NULL); 1365 1366 err_exit: 1367 return err; 1368 } 1369 1370 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc, 1371 const u32 max_rate) 1372 { 1373 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1374 1375 if (tc >= AQ_CFG_TCS_MAX) 1376 return -EINVAL; 1377 1378 if (max_rate && max_rate < 10) { 1379 netdev_warn(self->ndev, 1380 "Setting %s to the minimum usable value of %dMbps.\n", 1381 "max rate", 10); 1382 cfg->tc_max_rate[tc] = 10; 1383 } else { 1384 cfg->tc_max_rate[tc] = max_rate; 1385 } 1386 1387 return 0; 1388 } 1389 1390 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc, 1391 const u32 min_rate) 1392 { 1393 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1394 1395 if (tc >= AQ_CFG_TCS_MAX) 1396 return -EINVAL; 1397 1398 if (min_rate) 1399 set_bit(tc, &cfg->tc_min_rate_msk); 1400 else 1401 clear_bit(tc, &cfg->tc_min_rate_msk); 1402 1403 if (min_rate && min_rate < 20) { 1404 netdev_warn(self->ndev, 1405 "Setting %s to the minimum usable value of %dMbps.\n", 1406 "min rate", 20); 1407 cfg->tc_min_rate[tc] = 20; 1408 } else { 1409 cfg->tc_min_rate[tc] = min_rate; 1410 } 1411 1412 return 0; 1413 } 1414