1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Atlantic Network Driver
3  *
4  * Copyright (C) 2014-2019 aQuantia Corporation
5  * Copyright (C) 2019-2020 Marvell International Ltd.
6  */
7 
8 /* File aq_nic.c: Definition of common code for NIC. */
9 
10 #include "aq_nic.h"
11 #include "aq_ring.h"
12 #include "aq_vec.h"
13 #include "aq_hw.h"
14 #include "aq_pci_func.h"
15 #include "aq_macsec.h"
16 #include "aq_main.h"
17 #include "aq_phy.h"
18 #include "aq_ptp.h"
19 #include "aq_filters.h"
20 
21 #include <linux/moduleparam.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/timer.h>
25 #include <linux/cpu.h>
26 #include <linux/ip.h>
27 #include <linux/tcp.h>
28 #include <net/ip.h>
29 #include <net/pkt_cls.h>
30 
31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;
32 module_param_named(aq_itr, aq_itr, uint, 0644);
33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");
34 
35 static unsigned int aq_itr_tx;
36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);
37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");
38 
39 static unsigned int aq_itr_rx;
40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
42 
43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self);
44 
45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
46 {
47 	static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = {
48 		0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,
49 		0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,
50 		0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
51 		0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,
52 		0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c
53 	};
54 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
55 	struct aq_rss_parameters *rss_params;
56 	int i = 0;
57 
58 	rss_params = &cfg->aq_rss;
59 
60 	rss_params->hash_secret_key_size = sizeof(rss_key);
61 	memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key));
62 	rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX;
63 
64 	for (i = rss_params->indirection_table_size; i--;)
65 		rss_params->indirection_table[i] = i & (num_rss_queues - 1);
66 }
67 
68 /* Recalculate the number of vectors */
69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self)
70 {
71 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
72 
73 	cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF);
74 	cfg->vecs = min(cfg->vecs, num_online_cpus());
75 	if (self->irqvecs > AQ_HW_SERVICE_IRQS)
76 		cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS);
77 	/* cfg->vecs should be power of 2 for RSS */
78 	cfg->vecs = rounddown_pow_of_two(cfg->vecs);
79 
80 	if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) {
81 		if (cfg->tcs > 2)
82 			cfg->vecs = min(cfg->vecs, 4U);
83 	}
84 
85 	if (cfg->vecs <= 4)
86 		cfg->tc_mode = AQ_TC_MODE_8TCS;
87 	else
88 		cfg->tc_mode = AQ_TC_MODE_4TCS;
89 
90 	/*rss rings */
91 	cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);
92 	aq_nic_rss_init(self, cfg->num_rss_queues);
93 }
94 
95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */
96 void aq_nic_cfg_start(struct aq_nic_s *self)
97 {
98 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
99 	int i;
100 
101 	cfg->tcs = AQ_CFG_TCS_DEF;
102 
103 	cfg->is_polling = AQ_CFG_IS_POLLING_DEF;
104 
105 	cfg->itr = aq_itr;
106 	cfg->tx_itr = aq_itr_tx;
107 	cfg->rx_itr = aq_itr_rx;
108 
109 	cfg->rxpageorder = AQ_CFG_RX_PAGEORDER;
110 	cfg->is_rss = AQ_CFG_IS_RSS_DEF;
111 	cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF;
112 	cfg->fc.req = AQ_CFG_FC_MODE;
113 	cfg->wol = AQ_CFG_WOL_MODES;
114 
115 	cfg->mtu = AQ_CFG_MTU_DEF;
116 	cfg->link_speed_msk = AQ_CFG_SPEED_MSK;
117 	cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF;
118 
119 	cfg->is_lro = AQ_CFG_IS_LRO_DEF;
120 	cfg->is_ptp = true;
121 
122 	/*descriptors */
123 	cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF);
124 	cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF);
125 
126 	aq_nic_cfg_update_num_vecs(self);
127 
128 	cfg->irq_type = aq_pci_func_get_irq_type(self);
129 
130 	if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) ||
131 	    (cfg->aq_hw_caps->vecs == 1U) ||
132 	    (cfg->vecs == 1U)) {
133 		cfg->is_rss = 0U;
134 		cfg->vecs = 1U;
135 	}
136 
137 	/* Check if we have enough vectors allocated for
138 	 * link status IRQ. If no - we'll know link state from
139 	 * slower service task.
140 	 */
141 	if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs)
142 		cfg->link_irq_vec = cfg->vecs;
143 	else
144 		cfg->link_irq_vec = 0;
145 
146 	cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk;
147 	cfg->features = cfg->aq_hw_caps->hw_features;
148 	cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX);
149 	cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX);
150 	cfg->is_vlan_force_promisc = true;
151 
152 	for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
153 		cfg->prio_tc_map[i] = cfg->tcs * i / 8;
154 }
155 
156 static int aq_nic_update_link_status(struct aq_nic_s *self)
157 {
158 	int err = self->aq_fw_ops->update_link_status(self->aq_hw);
159 	u32 fc = 0;
160 
161 	if (err)
162 		return err;
163 
164 	if (self->aq_fw_ops->get_flow_control)
165 		self->aq_fw_ops->get_flow_control(self->aq_hw, &fc);
166 	self->aq_nic_cfg.fc.cur = fc;
167 
168 	if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) {
169 		netdev_info(self->ndev, "%s: link change old %d new %d\n",
170 			    AQ_CFG_DRV_NAME, self->link_status.mbps,
171 			    self->aq_hw->aq_link_status.mbps);
172 		aq_nic_update_interrupt_moderation_settings(self);
173 
174 		if (self->aq_ptp) {
175 			aq_ptp_clock_init(self);
176 			aq_ptp_tm_offset_set(self,
177 					     self->aq_hw->aq_link_status.mbps);
178 			aq_ptp_link_change(self);
179 		}
180 
181 		/* Driver has to update flow control settings on RX block
182 		 * on any link event.
183 		 * We should query FW whether it negotiated FC.
184 		 */
185 		if (self->aq_hw_ops->hw_set_fc)
186 			self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0);
187 	}
188 
189 	self->link_status = self->aq_hw->aq_link_status;
190 	if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
191 		aq_utils_obj_set(&self->flags,
192 				 AQ_NIC_FLAG_STARTED);
193 		aq_utils_obj_clear(&self->flags,
194 				   AQ_NIC_LINK_DOWN);
195 		netif_carrier_on(self->ndev);
196 #if IS_ENABLED(CONFIG_MACSEC)
197 		aq_macsec_enable(self);
198 #endif
199 		if (self->aq_hw_ops->hw_tc_rate_limit_set)
200 			self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw);
201 
202 		netif_tx_wake_all_queues(self->ndev);
203 	}
204 	if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) {
205 		netif_carrier_off(self->ndev);
206 		netif_tx_disable(self->ndev);
207 		aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN);
208 	}
209 
210 	return 0;
211 }
212 
213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private)
214 {
215 	struct aq_nic_s *self = private;
216 
217 	if (!self)
218 		return IRQ_NONE;
219 
220 	aq_nic_update_link_status(self);
221 
222 	self->aq_hw_ops->hw_irq_enable(self->aq_hw,
223 				       BIT(self->aq_nic_cfg.link_irq_vec));
224 
225 	return IRQ_HANDLED;
226 }
227 
228 static void aq_nic_service_task(struct work_struct *work)
229 {
230 	struct aq_nic_s *self = container_of(work, struct aq_nic_s,
231 					     service_task);
232 	int err;
233 
234 	aq_ptp_service_task(self);
235 
236 	if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY))
237 		return;
238 
239 	err = aq_nic_update_link_status(self);
240 	if (err)
241 		return;
242 
243 #if IS_ENABLED(CONFIG_MACSEC)
244 	aq_macsec_work(self);
245 #endif
246 
247 	mutex_lock(&self->fwreq_mutex);
248 	if (self->aq_fw_ops->update_stats)
249 		self->aq_fw_ops->update_stats(self->aq_hw);
250 	mutex_unlock(&self->fwreq_mutex);
251 
252 	aq_nic_update_ndev_stats(self);
253 }
254 
255 static void aq_nic_service_timer_cb(struct timer_list *t)
256 {
257 	struct aq_nic_s *self = from_timer(self, t, service_timer);
258 
259 	mod_timer(&self->service_timer,
260 		  jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);
261 
262 	aq_ndev_schedule_work(&self->service_task);
263 }
264 
265 static void aq_nic_polling_timer_cb(struct timer_list *t)
266 {
267 	struct aq_nic_s *self = from_timer(self, t, polling_timer);
268 	struct aq_vec_s *aq_vec = NULL;
269 	unsigned int i = 0U;
270 
271 	for (i = 0U, aq_vec = self->aq_vec[0];
272 		self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
273 		aq_vec_isr(i, (void *)aq_vec);
274 
275 	mod_timer(&self->polling_timer, jiffies +
276 		  AQ_CFG_POLLING_TIMER_INTERVAL);
277 }
278 
279 static int aq_nic_hw_prepare(struct aq_nic_s *self)
280 {
281 	int err = 0;
282 
283 	err = self->aq_hw_ops->hw_soft_reset(self->aq_hw);
284 	if (err)
285 		goto exit;
286 
287 	err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops);
288 
289 exit:
290 	return err;
291 }
292 
293 static bool aq_nic_is_valid_ether_addr(const u8 *addr)
294 {
295 	/* Some engineering samples of Aquantia NICs are provisioned with a
296 	 * partially populated MAC, which is still invalid.
297 	 */
298 	return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0);
299 }
300 
301 int aq_nic_ndev_register(struct aq_nic_s *self)
302 {
303 	int err = 0;
304 
305 	if (!self->ndev) {
306 		err = -EINVAL;
307 		goto err_exit;
308 	}
309 
310 	err = aq_nic_hw_prepare(self);
311 	if (err)
312 		goto err_exit;
313 
314 #if IS_ENABLED(CONFIG_MACSEC)
315 	aq_macsec_init(self);
316 #endif
317 
318 	mutex_lock(&self->fwreq_mutex);
319 	err = self->aq_fw_ops->get_mac_permanent(self->aq_hw,
320 			    self->ndev->dev_addr);
321 	mutex_unlock(&self->fwreq_mutex);
322 	if (err)
323 		goto err_exit;
324 
325 	if (!is_valid_ether_addr(self->ndev->dev_addr) ||
326 	    !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) {
327 		netdev_warn(self->ndev, "MAC is invalid, will use random.");
328 		eth_hw_addr_random(self->ndev);
329 	}
330 
331 #if defined(AQ_CFG_MAC_ADDR_PERMANENT)
332 	{
333 		static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT;
334 
335 		ether_addr_copy(self->ndev->dev_addr, mac_addr_permanent);
336 	}
337 #endif
338 
339 	for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs;
340 	     self->aq_vecs++) {
341 		self->aq_vec[self->aq_vecs] =
342 		    aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self));
343 		if (!self->aq_vec[self->aq_vecs]) {
344 			err = -ENOMEM;
345 			goto err_exit;
346 		}
347 	}
348 
349 	netif_carrier_off(self->ndev);
350 
351 	netif_tx_disable(self->ndev);
352 
353 	err = register_netdev(self->ndev);
354 	if (err)
355 		goto err_exit;
356 
357 err_exit:
358 #if IS_ENABLED(CONFIG_MACSEC)
359 	if (err)
360 		aq_macsec_free(self);
361 #endif
362 	return err;
363 }
364 
365 void aq_nic_ndev_init(struct aq_nic_s *self)
366 {
367 	const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps;
368 	struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg;
369 
370 	self->ndev->hw_features |= aq_hw_caps->hw_features;
371 	self->ndev->features = aq_hw_caps->hw_features;
372 	self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
373 				     NETIF_F_RXHASH | NETIF_F_SG |
374 				     NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6;
375 	self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4;
376 	self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
377 	self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
378 
379 	self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK;
380 	self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN;
381 	self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN;
382 
383 }
384 
385 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,
386 			struct aq_ring_s *ring)
387 {
388 	self->aq_ring_tx[idx] = ring;
389 }
390 
391 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)
392 {
393 	return self->ndev;
394 }
395 
396 int aq_nic_init(struct aq_nic_s *self)
397 {
398 	struct aq_vec_s *aq_vec = NULL;
399 	unsigned int i = 0U;
400 	int err = 0;
401 
402 	self->power_state = AQ_HW_POWER_STATE_D0;
403 	mutex_lock(&self->fwreq_mutex);
404 	err = self->aq_hw_ops->hw_reset(self->aq_hw);
405 	mutex_unlock(&self->fwreq_mutex);
406 	if (err < 0)
407 		goto err_exit;
408 
409 	err = self->aq_hw_ops->hw_init(self->aq_hw,
410 				       aq_nic_get_ndev(self)->dev_addr);
411 	if (err < 0)
412 		goto err_exit;
413 
414 	if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) &&
415 	    self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {
416 		self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;
417 		err = aq_phy_init(self->aq_hw);
418 
419 		/* Disable the PTP on NICs where it's known to cause datapath
420 		 * problems.
421 		 * Ideally this should have been done by PHY provisioning, but
422 		 * many units have been shipped with enabled PTP block already.
423 		 */
424 		if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)
425 			if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)
426 				aq_phy_disable_ptp(self->aq_hw);
427 	}
428 
429 	for (i = 0U; i < self->aq_vecs; i++) {
430 		aq_vec = self->aq_vec[i];
431 		err = aq_vec_ring_alloc(aq_vec, self, i,
432 					aq_nic_get_cfg(self));
433 		if (err)
434 			goto err_exit;
435 
436 		aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw);
437 	}
438 
439 	if (aq_nic_get_cfg(self)->is_ptp) {
440 		err = aq_ptp_init(self, self->irqvecs - 1);
441 		if (err < 0)
442 			goto err_exit;
443 
444 		err = aq_ptp_ring_alloc(self);
445 		if (err < 0)
446 			goto err_exit;
447 
448 		err = aq_ptp_ring_init(self);
449 		if (err < 0)
450 			goto err_exit;
451 	}
452 
453 	netif_carrier_off(self->ndev);
454 
455 err_exit:
456 	return err;
457 }
458 
459 int aq_nic_start(struct aq_nic_s *self)
460 {
461 	struct aq_vec_s *aq_vec = NULL;
462 	struct aq_nic_cfg_s *cfg;
463 	unsigned int i = 0U;
464 	int err = 0;
465 
466 	cfg = aq_nic_get_cfg(self);
467 
468 	err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
469 						     self->mc_list.ar,
470 						     self->mc_list.count);
471 	if (err < 0)
472 		goto err_exit;
473 
474 	err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
475 						    self->packet_filter);
476 	if (err < 0)
477 		goto err_exit;
478 
479 	for (i = 0U, aq_vec = self->aq_vec[0];
480 		self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
481 		err = aq_vec_start(aq_vec);
482 		if (err < 0)
483 			goto err_exit;
484 	}
485 
486 	err = aq_ptp_ring_start(self);
487 	if (err < 0)
488 		goto err_exit;
489 
490 	aq_nic_set_loopback(self);
491 
492 	err = self->aq_hw_ops->hw_start(self->aq_hw);
493 	if (err < 0)
494 		goto err_exit;
495 
496 	err = aq_nic_update_interrupt_moderation_settings(self);
497 	if (err)
498 		goto err_exit;
499 
500 	INIT_WORK(&self->service_task, aq_nic_service_task);
501 
502 	timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0);
503 	aq_nic_service_timer_cb(&self->service_timer);
504 
505 	if (cfg->is_polling) {
506 		timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0);
507 		mod_timer(&self->polling_timer, jiffies +
508 			  AQ_CFG_POLLING_TIMER_INTERVAL);
509 	} else {
510 		for (i = 0U, aq_vec = self->aq_vec[0];
511 			self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) {
512 			err = aq_pci_func_alloc_irq(self, i, self->ndev->name,
513 						    aq_vec_isr, aq_vec,
514 						    aq_vec_get_affinity_mask(aq_vec));
515 			if (err < 0)
516 				goto err_exit;
517 		}
518 
519 		err = aq_ptp_irq_alloc(self);
520 		if (err < 0)
521 			goto err_exit;
522 
523 		if (cfg->link_irq_vec) {
524 			int irqvec = pci_irq_vector(self->pdev,
525 						    cfg->link_irq_vec);
526 			err = request_threaded_irq(irqvec, NULL,
527 						   aq_linkstate_threaded_isr,
528 						   IRQF_SHARED | IRQF_ONESHOT,
529 						   self->ndev->name, self);
530 			if (err < 0)
531 				goto err_exit;
532 			self->msix_entry_mask |= (1 << cfg->link_irq_vec);
533 		}
534 
535 		err = self->aq_hw_ops->hw_irq_enable(self->aq_hw,
536 						     AQ_CFG_IRQ_MASK);
537 		if (err < 0)
538 			goto err_exit;
539 	}
540 
541 	err = netif_set_real_num_tx_queues(self->ndev,
542 					   self->aq_vecs * cfg->tcs);
543 	if (err < 0)
544 		goto err_exit;
545 
546 	err = netif_set_real_num_rx_queues(self->ndev,
547 					   self->aq_vecs * cfg->tcs);
548 	if (err < 0)
549 		goto err_exit;
550 
551 	for (i = 0; i < cfg->tcs; i++) {
552 		u16 offset = self->aq_vecs * i;
553 
554 		netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset);
555 	}
556 	netif_tx_start_all_queues(self->ndev);
557 
558 err_exit:
559 	return err;
560 }
561 
562 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,
563 			    struct aq_ring_s *ring)
564 {
565 	unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
566 	struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
567 	struct device *dev = aq_nic_get_dev(self);
568 	struct aq_ring_buff_s *first = NULL;
569 	u8 ipver = ip_hdr(skb)->version;
570 	struct aq_ring_buff_s *dx_buff;
571 	bool need_context_tag = false;
572 	unsigned int frag_count = 0U;
573 	unsigned int ret = 0U;
574 	unsigned int dx;
575 	u8 l4proto = 0;
576 
577 	if (ipver == 4)
578 		l4proto = ip_hdr(skb)->protocol;
579 	else if (ipver == 6)
580 		l4proto = ipv6_hdr(skb)->nexthdr;
581 
582 	dx = ring->sw_tail;
583 	dx_buff = &ring->buff_ring[dx];
584 	dx_buff->flags = 0U;
585 
586 	if (unlikely(skb_is_gso(skb))) {
587 		dx_buff->mss = skb_shinfo(skb)->gso_size;
588 		if (l4proto == IPPROTO_TCP) {
589 			dx_buff->is_gso_tcp = 1U;
590 			dx_buff->len_l4 = tcp_hdrlen(skb);
591 		} else if (l4proto == IPPROTO_UDP) {
592 			dx_buff->is_gso_udp = 1U;
593 			dx_buff->len_l4 = sizeof(struct udphdr);
594 			/* UDP GSO Hardware does not replace packet length. */
595 			udp_hdr(skb)->len = htons(dx_buff->mss +
596 						  dx_buff->len_l4);
597 		} else {
598 			WARN_ONCE(true, "Bad GSO mode");
599 			goto exit;
600 		}
601 		dx_buff->len_pkt = skb->len;
602 		dx_buff->len_l2 = ETH_HLEN;
603 		dx_buff->len_l3 = skb_network_header_len(skb);
604 		dx_buff->eop_index = 0xffffU;
605 		dx_buff->is_ipv6 = (ipver == 6);
606 		need_context_tag = true;
607 	}
608 
609 	if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) {
610 		dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb);
611 		dx_buff->len_pkt = skb->len;
612 		dx_buff->is_vlan = 1U;
613 		need_context_tag = true;
614 	}
615 
616 	if (need_context_tag) {
617 		dx = aq_ring_next_dx(ring, dx);
618 		dx_buff = &ring->buff_ring[dx];
619 		dx_buff->flags = 0U;
620 		++ret;
621 	}
622 
623 	dx_buff->len = skb_headlen(skb);
624 	dx_buff->pa = dma_map_single(dev,
625 				     skb->data,
626 				     dx_buff->len,
627 				     DMA_TO_DEVICE);
628 
629 	if (unlikely(dma_mapping_error(dev, dx_buff->pa))) {
630 		ret = 0;
631 		goto exit;
632 	}
633 
634 	first = dx_buff;
635 	dx_buff->len_pkt = skb->len;
636 	dx_buff->is_sop = 1U;
637 	dx_buff->is_mapped = 1U;
638 	++ret;
639 
640 	if (skb->ip_summed == CHECKSUM_PARTIAL) {
641 		dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol);
642 		dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP);
643 		dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP);
644 	}
645 
646 	for (; nr_frags--; ++frag_count) {
647 		unsigned int frag_len = 0U;
648 		unsigned int buff_offset = 0U;
649 		unsigned int buff_size = 0U;
650 		dma_addr_t frag_pa;
651 		skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count];
652 
653 		frag_len = skb_frag_size(frag);
654 
655 		while (frag_len) {
656 			if (frag_len > AQ_CFG_TX_FRAME_MAX)
657 				buff_size = AQ_CFG_TX_FRAME_MAX;
658 			else
659 				buff_size = frag_len;
660 
661 			frag_pa = skb_frag_dma_map(dev,
662 						   frag,
663 						   buff_offset,
664 						   buff_size,
665 						   DMA_TO_DEVICE);
666 
667 			if (unlikely(dma_mapping_error(dev,
668 						       frag_pa)))
669 				goto mapping_error;
670 
671 			dx = aq_ring_next_dx(ring, dx);
672 			dx_buff = &ring->buff_ring[dx];
673 
674 			dx_buff->flags = 0U;
675 			dx_buff->len = buff_size;
676 			dx_buff->pa = frag_pa;
677 			dx_buff->is_mapped = 1U;
678 			dx_buff->eop_index = 0xffffU;
679 
680 			frag_len -= buff_size;
681 			buff_offset += buff_size;
682 
683 			++ret;
684 		}
685 	}
686 
687 	first->eop_index = dx;
688 	dx_buff->is_eop = 1U;
689 	dx_buff->skb = skb;
690 	goto exit;
691 
692 mapping_error:
693 	for (dx = ring->sw_tail;
694 	     ret > 0;
695 	     --ret, dx = aq_ring_next_dx(ring, dx)) {
696 		dx_buff = &ring->buff_ring[dx];
697 
698 		if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) &&
699 		    !dx_buff->is_vlan && dx_buff->pa) {
700 			if (unlikely(dx_buff->is_sop)) {
701 				dma_unmap_single(dev,
702 						 dx_buff->pa,
703 						 dx_buff->len,
704 						 DMA_TO_DEVICE);
705 			} else {
706 				dma_unmap_page(dev,
707 					       dx_buff->pa,
708 					       dx_buff->len,
709 					       DMA_TO_DEVICE);
710 			}
711 		}
712 	}
713 
714 exit:
715 	return ret;
716 }
717 
718 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
719 {
720 	struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
721 	unsigned int vec = skb->queue_mapping % cfg->vecs;
722 	unsigned int tc = skb->queue_mapping / cfg->vecs;
723 	struct aq_ring_s *ring = NULL;
724 	unsigned int frags = 0U;
725 	int err = NETDEV_TX_OK;
726 
727 	frags = skb_shinfo(skb)->nr_frags + 1;
728 
729 	ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)];
730 
731 	if (frags > AQ_CFG_SKB_FRAGS_MAX) {
732 		dev_kfree_skb_any(skb);
733 		goto err_exit;
734 	}
735 
736 	aq_ring_update_queue_state(ring);
737 
738 	if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) {
739 		err = NETDEV_TX_BUSY;
740 		goto err_exit;
741 	}
742 
743 	/* Above status update may stop the queue. Check this. */
744 	if (__netif_subqueue_stopped(self->ndev,
745 				     AQ_NIC_RING2QMAP(self, ring->idx))) {
746 		err = NETDEV_TX_BUSY;
747 		goto err_exit;
748 	}
749 
750 	frags = aq_nic_map_skb(self, skb, ring);
751 
752 	if (likely(frags)) {
753 		err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw,
754 						       ring, frags);
755 	} else {
756 		err = NETDEV_TX_BUSY;
757 	}
758 
759 err_exit:
760 	return err;
761 }
762 
763 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)
764 {
765 	return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw);
766 }
767 
768 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)
769 {
770 	int err = 0;
771 
772 	err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags);
773 	if (err < 0)
774 		goto err_exit;
775 
776 	self->packet_filter = flags;
777 
778 err_exit:
779 	return err;
780 }
781 
782 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev)
783 {
784 	const struct aq_hw_ops *hw_ops = self->aq_hw_ops;
785 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
786 	unsigned int packet_filter = ndev->flags;
787 	struct netdev_hw_addr *ha = NULL;
788 	unsigned int i = 0U;
789 	int err = 0;
790 
791 	self->mc_list.count = 0;
792 	if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
793 		packet_filter |= IFF_PROMISC;
794 	} else {
795 		netdev_for_each_uc_addr(ha, ndev) {
796 			ether_addr_copy(self->mc_list.ar[i++], ha->addr);
797 		}
798 	}
799 
800 	cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST);
801 	if (cfg->is_mc_list_enabled) {
802 		if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
803 			packet_filter |= IFF_ALLMULTI;
804 		} else {
805 			netdev_for_each_mc_addr(ha, ndev) {
806 				ether_addr_copy(self->mc_list.ar[i++],
807 						ha->addr);
808 			}
809 		}
810 	}
811 
812 	if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) {
813 		self->mc_list.count = i;
814 		err = hw_ops->hw_multicast_list_set(self->aq_hw,
815 						    self->mc_list.ar,
816 						    self->mc_list.count);
817 		if (err < 0)
818 			return err;
819 	}
820 
821 	return aq_nic_set_packet_filter(self, packet_filter);
822 }
823 
824 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu)
825 {
826 	self->aq_nic_cfg.mtu = new_mtu;
827 
828 	return 0;
829 }
830 
831 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev)
832 {
833 	return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr);
834 }
835 
836 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self)
837 {
838 	return self->link_status.mbps;
839 }
840 
841 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p)
842 {
843 	u32 *regs_buff = p;
844 	int err = 0;
845 
846 	if (unlikely(!self->aq_hw_ops->hw_get_regs))
847 		return -EOPNOTSUPP;
848 
849 	regs->version = 1;
850 
851 	err = self->aq_hw_ops->hw_get_regs(self->aq_hw,
852 					   self->aq_nic_cfg.aq_hw_caps,
853 					   regs_buff);
854 	if (err < 0)
855 		goto err_exit;
856 
857 err_exit:
858 	return err;
859 }
860 
861 int aq_nic_get_regs_count(struct aq_nic_s *self)
862 {
863 	if (unlikely(!self->aq_hw_ops->hw_get_regs))
864 		return 0;
865 
866 	return self->aq_nic_cfg.aq_hw_caps->mac_regs_count;
867 }
868 
869 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
870 {
871 	struct aq_vec_s *aq_vec = NULL;
872 	struct aq_stats_s *stats;
873 	unsigned int count = 0U;
874 	unsigned int i = 0U;
875 	unsigned int tc;
876 
877 	if (self->aq_fw_ops->update_stats) {
878 		mutex_lock(&self->fwreq_mutex);
879 		self->aq_fw_ops->update_stats(self->aq_hw);
880 		mutex_unlock(&self->fwreq_mutex);
881 	}
882 	stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
883 
884 	if (!stats)
885 		goto err_exit;
886 
887 	data[i] = stats->uprc + stats->mprc + stats->bprc;
888 	data[++i] = stats->uprc;
889 	data[++i] = stats->mprc;
890 	data[++i] = stats->bprc;
891 	data[++i] = stats->erpt;
892 	data[++i] = stats->uptc + stats->mptc + stats->bptc;
893 	data[++i] = stats->uptc;
894 	data[++i] = stats->mptc;
895 	data[++i] = stats->bptc;
896 	data[++i] = stats->ubrc;
897 	data[++i] = stats->ubtc;
898 	data[++i] = stats->mbrc;
899 	data[++i] = stats->mbtc;
900 	data[++i] = stats->bbrc;
901 	data[++i] = stats->bbtc;
902 	data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
903 	data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
904 	data[++i] = stats->dma_pkt_rc;
905 	data[++i] = stats->dma_pkt_tc;
906 	data[++i] = stats->dma_oct_rc;
907 	data[++i] = stats->dma_oct_tc;
908 	data[++i] = stats->dpc;
909 
910 	i++;
911 
912 	data += i;
913 
914 	for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) {
915 		for (i = 0U, aq_vec = self->aq_vec[0];
916 		     aq_vec && self->aq_vecs > i;
917 		     ++i, aq_vec = self->aq_vec[i]) {
918 			data += count;
919 			count = aq_vec_get_sw_stats(aq_vec, tc, data);
920 		}
921 	}
922 
923 	data += count;
924 
925 err_exit:
926 	return data;
927 }
928 
929 static void aq_nic_update_ndev_stats(struct aq_nic_s *self)
930 {
931 	struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
932 	struct net_device *ndev = self->ndev;
933 
934 	ndev->stats.rx_packets = stats->dma_pkt_rc;
935 	ndev->stats.rx_bytes = stats->dma_oct_rc;
936 	ndev->stats.rx_errors = stats->erpr;
937 	ndev->stats.rx_dropped = stats->dpc;
938 	ndev->stats.tx_packets = stats->dma_pkt_tc;
939 	ndev->stats.tx_bytes = stats->dma_oct_tc;
940 	ndev->stats.tx_errors = stats->erpt;
941 	ndev->stats.multicast = stats->mprc;
942 }
943 
944 void aq_nic_get_link_ksettings(struct aq_nic_s *self,
945 			       struct ethtool_link_ksettings *cmd)
946 {
947 	u32 lp_link_speed_msk;
948 
949 	if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
950 		cmd->base.port = PORT_FIBRE;
951 	else
952 		cmd->base.port = PORT_TP;
953 
954 	cmd->base.duplex = DUPLEX_UNKNOWN;
955 	if (self->link_status.mbps)
956 		cmd->base.duplex = self->link_status.full_duplex ?
957 				   DUPLEX_FULL : DUPLEX_HALF;
958 	cmd->base.autoneg = self->aq_nic_cfg.is_autoneg;
959 
960 	ethtool_link_ksettings_zero_link_mode(cmd, supported);
961 
962 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G)
963 		ethtool_link_ksettings_add_link_mode(cmd, supported,
964 						     10000baseT_Full);
965 
966 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G)
967 		ethtool_link_ksettings_add_link_mode(cmd, supported,
968 						     5000baseT_Full);
969 
970 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5)
971 		ethtool_link_ksettings_add_link_mode(cmd, supported,
972 						     2500baseT_Full);
973 
974 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G)
975 		ethtool_link_ksettings_add_link_mode(cmd, supported,
976 						     1000baseT_Full);
977 
978 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF)
979 		ethtool_link_ksettings_add_link_mode(cmd, supported,
980 						     1000baseT_Half);
981 
982 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M)
983 		ethtool_link_ksettings_add_link_mode(cmd, supported,
984 						     100baseT_Full);
985 
986 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF)
987 		ethtool_link_ksettings_add_link_mode(cmd, supported,
988 						     100baseT_Half);
989 
990 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M)
991 		ethtool_link_ksettings_add_link_mode(cmd, supported,
992 						     10baseT_Full);
993 
994 	if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF)
995 		ethtool_link_ksettings_add_link_mode(cmd, supported,
996 						     10baseT_Half);
997 
998 	if (self->aq_nic_cfg.aq_hw_caps->flow_control) {
999 		ethtool_link_ksettings_add_link_mode(cmd, supported,
1000 						     Pause);
1001 		ethtool_link_ksettings_add_link_mode(cmd, supported,
1002 						     Asym_Pause);
1003 	}
1004 
1005 	ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1006 
1007 	if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1008 		ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
1009 	else
1010 		ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
1011 
1012 	ethtool_link_ksettings_zero_link_mode(cmd, advertising);
1013 
1014 	if (self->aq_nic_cfg.is_autoneg)
1015 		ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1016 
1017 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G)
1018 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1019 						     10000baseT_Full);
1020 
1021 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G)
1022 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1023 						     5000baseT_Full);
1024 
1025 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5)
1026 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1027 						     2500baseT_Full);
1028 
1029 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G)
1030 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1031 						     1000baseT_Full);
1032 
1033 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF)
1034 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1035 						     1000baseT_Half);
1036 
1037 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M)
1038 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1039 						     100baseT_Full);
1040 
1041 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF)
1042 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1043 						     100baseT_Half);
1044 
1045 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M)
1046 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1047 						     10baseT_Full);
1048 
1049 	if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF)
1050 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1051 						     10baseT_Half);
1052 
1053 	if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)
1054 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1055 						     Pause);
1056 
1057 	/* Asym is when either RX or TX, but not both */
1058 	if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^
1059 	    !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX))
1060 		ethtool_link_ksettings_add_link_mode(cmd, advertising,
1061 						     Asym_Pause);
1062 
1063 	if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1064 		ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
1065 	else
1066 		ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
1067 
1068 	ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
1069 	lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk;
1070 
1071 	if (lp_link_speed_msk & AQ_NIC_RATE_10G)
1072 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1073 						     10000baseT_Full);
1074 
1075 	if (lp_link_speed_msk & AQ_NIC_RATE_5G)
1076 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1077 						     5000baseT_Full);
1078 
1079 	if (lp_link_speed_msk & AQ_NIC_RATE_2G5)
1080 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1081 						     2500baseT_Full);
1082 
1083 	if (lp_link_speed_msk & AQ_NIC_RATE_1G)
1084 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1085 						     1000baseT_Full);
1086 
1087 	if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF)
1088 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1089 						     1000baseT_Half);
1090 
1091 	if (lp_link_speed_msk & AQ_NIC_RATE_100M)
1092 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1093 						     100baseT_Full);
1094 
1095 	if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF)
1096 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1097 						     100baseT_Half);
1098 
1099 	if (lp_link_speed_msk & AQ_NIC_RATE_10M)
1100 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1101 						     10baseT_Full);
1102 
1103 	if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF)
1104 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1105 						     10baseT_Half);
1106 
1107 	if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)
1108 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1109 						     Pause);
1110 	if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^
1111 	    !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX))
1112 		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1113 						     Asym_Pause);
1114 }
1115 
1116 int aq_nic_set_link_ksettings(struct aq_nic_s *self,
1117 			      const struct ethtool_link_ksettings *cmd)
1118 {
1119 	int fduplex = (cmd->base.duplex == DUPLEX_FULL);
1120 	u32 speed = cmd->base.speed;
1121 	u32 rate = 0U;
1122 	int err = 0;
1123 
1124 	if (!fduplex && speed > SPEED_1000) {
1125 		err = -EINVAL;
1126 		goto err_exit;
1127 	}
1128 
1129 	if (cmd->base.autoneg == AUTONEG_ENABLE) {
1130 		rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk;
1131 		self->aq_nic_cfg.is_autoneg = true;
1132 	} else {
1133 		switch (speed) {
1134 		case SPEED_10:
1135 			rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF;
1136 			break;
1137 
1138 		case SPEED_100:
1139 			rate = fduplex ? AQ_NIC_RATE_100M
1140 				       : AQ_NIC_RATE_100M_HALF;
1141 			break;
1142 
1143 		case SPEED_1000:
1144 			rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF;
1145 			break;
1146 
1147 		case SPEED_2500:
1148 			rate = AQ_NIC_RATE_2G5;
1149 			break;
1150 
1151 		case SPEED_5000:
1152 			rate = AQ_NIC_RATE_5G;
1153 			break;
1154 
1155 		case SPEED_10000:
1156 			rate = AQ_NIC_RATE_10G;
1157 			break;
1158 
1159 		default:
1160 			err = -1;
1161 			goto err_exit;
1162 		break;
1163 		}
1164 		if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) {
1165 			err = -1;
1166 			goto err_exit;
1167 		}
1168 
1169 		self->aq_nic_cfg.is_autoneg = false;
1170 	}
1171 
1172 	mutex_lock(&self->fwreq_mutex);
1173 	err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate);
1174 	mutex_unlock(&self->fwreq_mutex);
1175 	if (err < 0)
1176 		goto err_exit;
1177 
1178 	self->aq_nic_cfg.link_speed_msk = rate;
1179 
1180 err_exit:
1181 	return err;
1182 }
1183 
1184 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self)
1185 {
1186 	return &self->aq_nic_cfg;
1187 }
1188 
1189 u32 aq_nic_get_fw_version(struct aq_nic_s *self)
1190 {
1191 	return self->aq_hw_ops->hw_get_fw_version(self->aq_hw);
1192 }
1193 
1194 int aq_nic_set_loopback(struct aq_nic_s *self)
1195 {
1196 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1197 
1198 	if (!self->aq_hw_ops->hw_set_loopback ||
1199 	    !self->aq_fw_ops->set_phyloopback)
1200 		return -EOPNOTSUPP;
1201 
1202 	mutex_lock(&self->fwreq_mutex);
1203 	self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1204 					 AQ_HW_LOOPBACK_DMA_SYS,
1205 					 !!(cfg->priv_flags &
1206 					    BIT(AQ_HW_LOOPBACK_DMA_SYS)));
1207 
1208 	self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1209 					 AQ_HW_LOOPBACK_PKT_SYS,
1210 					 !!(cfg->priv_flags &
1211 					    BIT(AQ_HW_LOOPBACK_PKT_SYS)));
1212 
1213 	self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1214 					 AQ_HW_LOOPBACK_DMA_NET,
1215 					 !!(cfg->priv_flags &
1216 					    BIT(AQ_HW_LOOPBACK_DMA_NET)));
1217 
1218 	self->aq_fw_ops->set_phyloopback(self->aq_hw,
1219 					 AQ_HW_LOOPBACK_PHYINT_SYS,
1220 					 !!(cfg->priv_flags &
1221 					    BIT(AQ_HW_LOOPBACK_PHYINT_SYS)));
1222 
1223 	self->aq_fw_ops->set_phyloopback(self->aq_hw,
1224 					 AQ_HW_LOOPBACK_PHYEXT_SYS,
1225 					 !!(cfg->priv_flags &
1226 					    BIT(AQ_HW_LOOPBACK_PHYEXT_SYS)));
1227 	mutex_unlock(&self->fwreq_mutex);
1228 
1229 	return 0;
1230 }
1231 
1232 int aq_nic_stop(struct aq_nic_s *self)
1233 {
1234 	struct aq_vec_s *aq_vec = NULL;
1235 	unsigned int i = 0U;
1236 
1237 	netif_tx_disable(self->ndev);
1238 	netif_carrier_off(self->ndev);
1239 
1240 	del_timer_sync(&self->service_timer);
1241 	cancel_work_sync(&self->service_task);
1242 
1243 	self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK);
1244 
1245 	if (self->aq_nic_cfg.is_polling)
1246 		del_timer_sync(&self->polling_timer);
1247 	else
1248 		aq_pci_func_free_irqs(self);
1249 
1250 	aq_ptp_irq_free(self);
1251 
1252 	for (i = 0U, aq_vec = self->aq_vec[0];
1253 		self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i])
1254 		aq_vec_stop(aq_vec);
1255 
1256 	aq_ptp_ring_stop(self);
1257 
1258 	return self->aq_hw_ops->hw_stop(self->aq_hw);
1259 }
1260 
1261 void aq_nic_set_power(struct aq_nic_s *self)
1262 {
1263 	if (self->power_state != AQ_HW_POWER_STATE_D0 ||
1264 	    self->aq_hw->aq_nic_cfg->wol)
1265 		if (likely(self->aq_fw_ops->set_power)) {
1266 			mutex_lock(&self->fwreq_mutex);
1267 			self->aq_fw_ops->set_power(self->aq_hw,
1268 						   self->power_state,
1269 						   self->ndev->dev_addr);
1270 			mutex_unlock(&self->fwreq_mutex);
1271 		}
1272 }
1273 
1274 void aq_nic_deinit(struct aq_nic_s *self, bool link_down)
1275 {
1276 	struct aq_vec_s *aq_vec = NULL;
1277 	unsigned int i = 0U;
1278 
1279 	if (!self)
1280 		goto err_exit;
1281 
1282 	for (i = 0U; i < self->aq_vecs; i++) {
1283 		aq_vec = self->aq_vec[i];
1284 		aq_vec_deinit(aq_vec);
1285 		aq_vec_ring_free(aq_vec);
1286 	}
1287 
1288 	aq_ptp_unregister(self);
1289 	aq_ptp_ring_deinit(self);
1290 	aq_ptp_ring_free(self);
1291 	aq_ptp_free(self);
1292 
1293 	if (likely(self->aq_fw_ops->deinit) && link_down) {
1294 		mutex_lock(&self->fwreq_mutex);
1295 		self->aq_fw_ops->deinit(self->aq_hw);
1296 		mutex_unlock(&self->fwreq_mutex);
1297 	}
1298 
1299 err_exit:;
1300 }
1301 
1302 void aq_nic_free_vectors(struct aq_nic_s *self)
1303 {
1304 	unsigned int i = 0U;
1305 
1306 	if (!self)
1307 		goto err_exit;
1308 
1309 	for (i = ARRAY_SIZE(self->aq_vec); i--;) {
1310 		if (self->aq_vec[i]) {
1311 			aq_vec_free(self->aq_vec[i]);
1312 			self->aq_vec[i] = NULL;
1313 		}
1314 	}
1315 
1316 err_exit:;
1317 }
1318 
1319 int aq_nic_realloc_vectors(struct aq_nic_s *self)
1320 {
1321 	struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
1322 
1323 	aq_nic_free_vectors(self);
1324 
1325 	for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) {
1326 		self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs,
1327 							   cfg);
1328 		if (unlikely(!self->aq_vec[self->aq_vecs]))
1329 			return -ENOMEM;
1330 	}
1331 
1332 	return 0;
1333 }
1334 
1335 void aq_nic_shutdown(struct aq_nic_s *self)
1336 {
1337 	int err = 0;
1338 
1339 	if (!self->ndev)
1340 		return;
1341 
1342 	rtnl_lock();
1343 
1344 	netif_device_detach(self->ndev);
1345 
1346 	if (netif_running(self->ndev)) {
1347 		err = aq_nic_stop(self);
1348 		if (err < 0)
1349 			goto err_exit;
1350 	}
1351 	aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol);
1352 	aq_nic_set_power(self);
1353 
1354 err_exit:
1355 	rtnl_unlock();
1356 }
1357 
1358 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type)
1359 {
1360 	u8 location = 0xFF;
1361 	u32 fltr_cnt;
1362 	u32 n_bit;
1363 
1364 	switch (type) {
1365 	case aq_rx_filter_ethertype:
1366 		location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT -
1367 			   self->aq_hw_rx_fltrs.fet_reserved_count;
1368 		self->aq_hw_rx_fltrs.fet_reserved_count++;
1369 		break;
1370 	case aq_rx_filter_l3l4:
1371 		fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4;
1372 		n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count;
1373 
1374 		self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit);
1375 		self->aq_hw_rx_fltrs.fl3l4.reserved_count++;
1376 		location = n_bit;
1377 		break;
1378 	default:
1379 		break;
1380 	}
1381 
1382 	return location;
1383 }
1384 
1385 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type,
1386 			   u32 location)
1387 {
1388 	switch (type) {
1389 	case aq_rx_filter_ethertype:
1390 		self->aq_hw_rx_fltrs.fet_reserved_count--;
1391 		break;
1392 	case aq_rx_filter_l3l4:
1393 		self->aq_hw_rx_fltrs.fl3l4.reserved_count--;
1394 		self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location);
1395 		break;
1396 	default:
1397 		break;
1398 	}
1399 }
1400 
1401 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map)
1402 {
1403 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1404 	const unsigned int prev_vecs = cfg->vecs;
1405 	bool ndev_running;
1406 	int err = 0;
1407 	int i;
1408 
1409 	/* if already the same configuration or
1410 	 * disable request (tcs is 0) and we already is disabled
1411 	 */
1412 	if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos))
1413 		return 0;
1414 
1415 	ndev_running = netif_running(self->ndev);
1416 	if (ndev_running)
1417 		dev_close(self->ndev);
1418 
1419 	cfg->tcs = tcs;
1420 	if (cfg->tcs == 0)
1421 		cfg->tcs = 1;
1422 	if (prio_tc_map)
1423 		memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map));
1424 	else
1425 		for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
1426 			cfg->prio_tc_map[i] = cfg->tcs * i / 8;
1427 
1428 	cfg->is_qos = (tcs != 0 ? true : false);
1429 	cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC);
1430 	if (!cfg->is_ptp)
1431 		netdev_warn(self->ndev, "%s\n",
1432 			    "PTP is auto disabled due to requested TC count.");
1433 
1434 	netdev_set_num_tc(self->ndev, cfg->tcs);
1435 
1436 	/* Changing the number of TCs might change the number of vectors */
1437 	aq_nic_cfg_update_num_vecs(self);
1438 	if (prev_vecs != cfg->vecs) {
1439 		err = aq_nic_realloc_vectors(self);
1440 		if (err)
1441 			goto err_exit;
1442 	}
1443 
1444 	if (ndev_running)
1445 		err = dev_open(self->ndev, NULL);
1446 
1447 err_exit:
1448 	return err;
1449 }
1450 
1451 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc,
1452 			     const u32 max_rate)
1453 {
1454 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1455 
1456 	if (tc >= AQ_CFG_TCS_MAX)
1457 		return -EINVAL;
1458 
1459 	if (max_rate && max_rate < 10) {
1460 		netdev_warn(self->ndev,
1461 			"Setting %s to the minimum usable value of %dMbps.\n",
1462 			"max rate", 10);
1463 		cfg->tc_max_rate[tc] = 10;
1464 	} else {
1465 		cfg->tc_max_rate[tc] = max_rate;
1466 	}
1467 
1468 	return 0;
1469 }
1470 
1471 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc,
1472 			     const u32 min_rate)
1473 {
1474 	struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1475 
1476 	if (tc >= AQ_CFG_TCS_MAX)
1477 		return -EINVAL;
1478 
1479 	if (min_rate)
1480 		set_bit(tc, &cfg->tc_min_rate_msk);
1481 	else
1482 		clear_bit(tc, &cfg->tc_min_rate_msk);
1483 
1484 	if (min_rate && min_rate < 20) {
1485 		netdev_warn(self->ndev,
1486 			"Setting %s to the minimum usable value of %dMbps.\n",
1487 			"min rate", 20);
1488 		cfg->tc_min_rate[tc] = 20;
1489 	} else {
1490 		cfg->tc_min_rate[tc] = min_rate;
1491 	}
1492 
1493 	return 0;
1494 }
1495