1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Atlantic Network Driver 3 * 4 * Copyright (C) 2014-2019 aQuantia Corporation 5 * Copyright (C) 2019-2020 Marvell International Ltd. 6 */ 7 8 /* File aq_nic.c: Definition of common code for NIC. */ 9 10 #include "aq_nic.h" 11 #include "aq_ring.h" 12 #include "aq_vec.h" 13 #include "aq_hw.h" 14 #include "aq_pci_func.h" 15 #include "aq_macsec.h" 16 #include "aq_main.h" 17 #include "aq_phy.h" 18 #include "aq_ptp.h" 19 #include "aq_filters.h" 20 21 #include <linux/moduleparam.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/timer.h> 25 #include <linux/cpu.h> 26 #include <linux/ip.h> 27 #include <linux/tcp.h> 28 #include <net/ip.h> 29 #include <net/pkt_cls.h> 30 31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO; 32 module_param_named(aq_itr, aq_itr, uint, 0644); 33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode"); 34 35 static unsigned int aq_itr_tx; 36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644); 37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate"); 38 39 static unsigned int aq_itr_rx; 40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644); 41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate"); 42 43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self); 44 45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues) 46 { 47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = { 48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d, 49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18, 50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8, 51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70, 52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c 53 }; 54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 55 struct aq_rss_parameters *rss_params; 56 int i = 0; 57 58 rss_params = &cfg->aq_rss; 59 60 rss_params->hash_secret_key_size = sizeof(rss_key); 61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key)); 62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX; 63 64 for (i = rss_params->indirection_table_size; i--;) 65 rss_params->indirection_table[i] = i & (num_rss_queues - 1); 66 } 67 68 /* Recalculate the number of vectors */ 69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self) 70 { 71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 72 73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF); 74 cfg->vecs = min(cfg->vecs, num_online_cpus()); 75 if (self->irqvecs > AQ_HW_SERVICE_IRQS) 76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS); 77 /* cfg->vecs should be power of 2 for RSS */ 78 cfg->vecs = rounddown_pow_of_two(cfg->vecs); 79 80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) { 81 if (cfg->tcs > 2) 82 cfg->vecs = min(cfg->vecs, 4U); 83 } 84 85 if (cfg->vecs <= 4) 86 cfg->tc_mode = AQ_TC_MODE_8TCS; 87 else 88 cfg->tc_mode = AQ_TC_MODE_4TCS; 89 90 /*rss rings */ 91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF); 92 aq_nic_rss_init(self, cfg->num_rss_queues); 93 } 94 95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */ 96 void aq_nic_cfg_start(struct aq_nic_s *self) 97 { 98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 99 int i; 100 101 cfg->tcs = AQ_CFG_TCS_DEF; 102 103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF; 104 105 cfg->itr = aq_itr; 106 cfg->tx_itr = aq_itr_tx; 107 cfg->rx_itr = aq_itr_rx; 108 109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER; 110 cfg->is_rss = AQ_CFG_IS_RSS_DEF; 111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF; 112 cfg->fc.req = AQ_CFG_FC_MODE; 113 cfg->wol = AQ_CFG_WOL_MODES; 114 115 cfg->mtu = AQ_CFG_MTU_DEF; 116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK; 117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF; 118 119 cfg->is_lro = AQ_CFG_IS_LRO_DEF; 120 cfg->is_ptp = true; 121 122 /*descriptors */ 123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF); 124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF); 125 126 aq_nic_cfg_update_num_vecs(self); 127 128 cfg->irq_type = aq_pci_func_get_irq_type(self); 129 130 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) || 131 (cfg->aq_hw_caps->vecs == 1U) || 132 (cfg->vecs == 1U)) { 133 cfg->is_rss = 0U; 134 cfg->vecs = 1U; 135 } 136 137 /* Check if we have enough vectors allocated for 138 * link status IRQ. If no - we'll know link state from 139 * slower service task. 140 */ 141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs) 142 cfg->link_irq_vec = cfg->vecs; 143 else 144 cfg->link_irq_vec = 0; 145 146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk; 147 cfg->features = cfg->aq_hw_caps->hw_features; 148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX); 149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX); 150 cfg->is_vlan_force_promisc = true; 151 152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 153 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 154 } 155 156 static int aq_nic_update_link_status(struct aq_nic_s *self) 157 { 158 int err = self->aq_fw_ops->update_link_status(self->aq_hw); 159 u32 fc = 0; 160 161 if (err) 162 return err; 163 164 if (self->aq_fw_ops->get_flow_control) 165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc); 166 self->aq_nic_cfg.fc.cur = fc; 167 168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) { 169 netdev_info(self->ndev, "%s: link change old %d new %d\n", 170 AQ_CFG_DRV_NAME, self->link_status.mbps, 171 self->aq_hw->aq_link_status.mbps); 172 aq_nic_update_interrupt_moderation_settings(self); 173 174 if (self->aq_ptp) { 175 aq_ptp_clock_init(self); 176 aq_ptp_tm_offset_set(self, 177 self->aq_hw->aq_link_status.mbps); 178 aq_ptp_link_change(self); 179 } 180 181 /* Driver has to update flow control settings on RX block 182 * on any link event. 183 * We should query FW whether it negotiated FC. 184 */ 185 if (self->aq_hw_ops->hw_set_fc) 186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0); 187 } 188 189 self->link_status = self->aq_hw->aq_link_status; 190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) { 191 aq_utils_obj_set(&self->flags, 192 AQ_NIC_FLAG_STARTED); 193 aq_utils_obj_clear(&self->flags, 194 AQ_NIC_LINK_DOWN); 195 netif_carrier_on(self->ndev); 196 #if IS_ENABLED(CONFIG_MACSEC) 197 aq_macsec_enable(self); 198 #endif 199 if (self->aq_hw_ops->hw_tc_rate_limit_set) 200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw); 201 202 netif_tx_wake_all_queues(self->ndev); 203 } 204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) { 205 netif_carrier_off(self->ndev); 206 netif_tx_disable(self->ndev); 207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN); 208 } 209 210 return 0; 211 } 212 213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private) 214 { 215 struct aq_nic_s *self = private; 216 217 if (!self) 218 return IRQ_NONE; 219 220 aq_nic_update_link_status(self); 221 222 self->aq_hw_ops->hw_irq_enable(self->aq_hw, 223 BIT(self->aq_nic_cfg.link_irq_vec)); 224 225 return IRQ_HANDLED; 226 } 227 228 static void aq_nic_service_task(struct work_struct *work) 229 { 230 struct aq_nic_s *self = container_of(work, struct aq_nic_s, 231 service_task); 232 int err; 233 234 aq_ptp_service_task(self); 235 236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY)) 237 return; 238 239 err = aq_nic_update_link_status(self); 240 if (err) 241 return; 242 243 #if IS_ENABLED(CONFIG_MACSEC) 244 aq_macsec_work(self); 245 #endif 246 247 mutex_lock(&self->fwreq_mutex); 248 if (self->aq_fw_ops->update_stats) 249 self->aq_fw_ops->update_stats(self->aq_hw); 250 mutex_unlock(&self->fwreq_mutex); 251 252 aq_nic_update_ndev_stats(self); 253 } 254 255 static void aq_nic_service_timer_cb(struct timer_list *t) 256 { 257 struct aq_nic_s *self = from_timer(self, t, service_timer); 258 259 mod_timer(&self->service_timer, 260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL); 261 262 aq_ndev_schedule_work(&self->service_task); 263 } 264 265 static void aq_nic_polling_timer_cb(struct timer_list *t) 266 { 267 struct aq_nic_s *self = from_timer(self, t, polling_timer); 268 struct aq_vec_s *aq_vec = NULL; 269 unsigned int i = 0U; 270 271 for (i = 0U, aq_vec = self->aq_vec[0]; 272 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 273 aq_vec_isr(i, (void *)aq_vec); 274 275 mod_timer(&self->polling_timer, jiffies + 276 AQ_CFG_POLLING_TIMER_INTERVAL); 277 } 278 279 static int aq_nic_hw_prepare(struct aq_nic_s *self) 280 { 281 int err = 0; 282 283 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw); 284 if (err) 285 goto exit; 286 287 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops); 288 289 exit: 290 return err; 291 } 292 293 static bool aq_nic_is_valid_ether_addr(const u8 *addr) 294 { 295 /* Some engineering samples of Aquantia NICs are provisioned with a 296 * partially populated MAC, which is still invalid. 297 */ 298 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0); 299 } 300 301 int aq_nic_ndev_register(struct aq_nic_s *self) 302 { 303 u8 addr[ETH_ALEN]; 304 int err = 0; 305 306 if (!self->ndev) { 307 err = -EINVAL; 308 goto err_exit; 309 } 310 311 err = aq_nic_hw_prepare(self); 312 if (err) 313 goto err_exit; 314 315 #if IS_ENABLED(CONFIG_MACSEC) 316 aq_macsec_init(self); 317 #endif 318 319 mutex_lock(&self->fwreq_mutex); 320 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, addr); 321 mutex_unlock(&self->fwreq_mutex); 322 if (err) 323 goto err_exit; 324 325 eth_hw_addr_set(self->ndev, addr); 326 327 if (!is_valid_ether_addr(self->ndev->dev_addr) || 328 !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) { 329 netdev_warn(self->ndev, "MAC is invalid, will use random."); 330 eth_hw_addr_random(self->ndev); 331 } 332 333 #if defined(AQ_CFG_MAC_ADDR_PERMANENT) 334 { 335 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT; 336 337 eth_hw_addr_set(self->ndev, mac_addr_permanent); 338 } 339 #endif 340 341 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs; 342 self->aq_vecs++) { 343 self->aq_vec[self->aq_vecs] = 344 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self)); 345 if (!self->aq_vec[self->aq_vecs]) { 346 err = -ENOMEM; 347 goto err_exit; 348 } 349 } 350 351 netif_carrier_off(self->ndev); 352 353 netif_tx_disable(self->ndev); 354 355 err = register_netdev(self->ndev); 356 if (err) 357 goto err_exit; 358 359 err_exit: 360 #if IS_ENABLED(CONFIG_MACSEC) 361 if (err) 362 aq_macsec_free(self); 363 #endif 364 return err; 365 } 366 367 void aq_nic_ndev_init(struct aq_nic_s *self) 368 { 369 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps; 370 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg; 371 372 self->ndev->hw_features |= aq_hw_caps->hw_features; 373 self->ndev->features = aq_hw_caps->hw_features; 374 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM | 375 NETIF_F_RXHASH | NETIF_F_SG | 376 NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6; 377 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4; 378 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags; 379 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE; 380 381 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK; 382 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN; 383 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN; 384 385 } 386 387 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx, 388 struct aq_ring_s *ring) 389 { 390 self->aq_ring_tx[idx] = ring; 391 } 392 393 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self) 394 { 395 return self->ndev; 396 } 397 398 int aq_nic_init(struct aq_nic_s *self) 399 { 400 struct aq_vec_s *aq_vec = NULL; 401 unsigned int i = 0U; 402 int err = 0; 403 404 self->power_state = AQ_HW_POWER_STATE_D0; 405 mutex_lock(&self->fwreq_mutex); 406 err = self->aq_hw_ops->hw_reset(self->aq_hw); 407 mutex_unlock(&self->fwreq_mutex); 408 if (err < 0) 409 goto err_exit; 410 /* Restore default settings */ 411 aq_nic_set_downshift(self, self->aq_nic_cfg.downshift_counter); 412 aq_nic_set_media_detect(self, self->aq_nic_cfg.is_media_detect ? 413 AQ_HW_MEDIA_DETECT_CNT : 0); 414 415 err = self->aq_hw_ops->hw_init(self->aq_hw, 416 aq_nic_get_ndev(self)->dev_addr); 417 if (err < 0) 418 goto err_exit; 419 420 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) && 421 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) { 422 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX; 423 err = aq_phy_init(self->aq_hw); 424 425 /* Disable the PTP on NICs where it's known to cause datapath 426 * problems. 427 * Ideally this should have been done by PHY provisioning, but 428 * many units have been shipped with enabled PTP block already. 429 */ 430 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP) 431 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX) 432 aq_phy_disable_ptp(self->aq_hw); 433 } 434 435 for (i = 0U; i < self->aq_vecs; i++) { 436 aq_vec = self->aq_vec[i]; 437 err = aq_vec_ring_alloc(aq_vec, self, i, 438 aq_nic_get_cfg(self)); 439 if (err) 440 goto err_exit; 441 442 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw); 443 } 444 445 if (aq_nic_get_cfg(self)->is_ptp) { 446 err = aq_ptp_init(self, self->irqvecs - 1); 447 if (err < 0) 448 goto err_exit; 449 450 err = aq_ptp_ring_alloc(self); 451 if (err < 0) 452 goto err_exit; 453 454 err = aq_ptp_ring_init(self); 455 if (err < 0) 456 goto err_exit; 457 } 458 459 netif_carrier_off(self->ndev); 460 461 err_exit: 462 return err; 463 } 464 465 int aq_nic_start(struct aq_nic_s *self) 466 { 467 struct aq_vec_s *aq_vec = NULL; 468 struct aq_nic_cfg_s *cfg; 469 unsigned int i = 0U; 470 int err = 0; 471 472 cfg = aq_nic_get_cfg(self); 473 474 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, 475 self->mc_list.ar, 476 self->mc_list.count); 477 if (err < 0) 478 goto err_exit; 479 480 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, 481 self->packet_filter); 482 if (err < 0) 483 goto err_exit; 484 485 for (i = 0U, aq_vec = self->aq_vec[0]; 486 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 487 err = aq_vec_start(aq_vec); 488 if (err < 0) 489 goto err_exit; 490 } 491 492 err = aq_ptp_ring_start(self); 493 if (err < 0) 494 goto err_exit; 495 496 aq_nic_set_loopback(self); 497 498 err = self->aq_hw_ops->hw_start(self->aq_hw); 499 if (err < 0) 500 goto err_exit; 501 502 err = aq_nic_update_interrupt_moderation_settings(self); 503 if (err) 504 goto err_exit; 505 506 INIT_WORK(&self->service_task, aq_nic_service_task); 507 508 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); 509 aq_nic_service_timer_cb(&self->service_timer); 510 511 if (cfg->is_polling) { 512 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0); 513 mod_timer(&self->polling_timer, jiffies + 514 AQ_CFG_POLLING_TIMER_INTERVAL); 515 } else { 516 for (i = 0U, aq_vec = self->aq_vec[0]; 517 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 518 err = aq_pci_func_alloc_irq(self, i, self->ndev->name, 519 aq_vec_isr, aq_vec, 520 aq_vec_get_affinity_mask(aq_vec)); 521 if (err < 0) 522 goto err_exit; 523 } 524 525 err = aq_ptp_irq_alloc(self); 526 if (err < 0) 527 goto err_exit; 528 529 if (cfg->link_irq_vec) { 530 int irqvec = pci_irq_vector(self->pdev, 531 cfg->link_irq_vec); 532 err = request_threaded_irq(irqvec, NULL, 533 aq_linkstate_threaded_isr, 534 IRQF_SHARED | IRQF_ONESHOT, 535 self->ndev->name, self); 536 if (err < 0) 537 goto err_exit; 538 self->msix_entry_mask |= (1 << cfg->link_irq_vec); 539 } 540 541 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw, 542 AQ_CFG_IRQ_MASK); 543 if (err < 0) 544 goto err_exit; 545 } 546 547 err = netif_set_real_num_tx_queues(self->ndev, 548 self->aq_vecs * cfg->tcs); 549 if (err < 0) 550 goto err_exit; 551 552 err = netif_set_real_num_rx_queues(self->ndev, 553 self->aq_vecs * cfg->tcs); 554 if (err < 0) 555 goto err_exit; 556 557 for (i = 0; i < cfg->tcs; i++) { 558 u16 offset = self->aq_vecs * i; 559 560 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset); 561 } 562 netif_tx_start_all_queues(self->ndev); 563 564 err_exit: 565 return err; 566 } 567 568 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb, 569 struct aq_ring_s *ring) 570 { 571 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 572 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 573 struct device *dev = aq_nic_get_dev(self); 574 struct aq_ring_buff_s *first = NULL; 575 u8 ipver = ip_hdr(skb)->version; 576 struct aq_ring_buff_s *dx_buff; 577 bool need_context_tag = false; 578 unsigned int frag_count = 0U; 579 unsigned int ret = 0U; 580 unsigned int dx; 581 u8 l4proto = 0; 582 583 if (ipver == 4) 584 l4proto = ip_hdr(skb)->protocol; 585 else if (ipver == 6) 586 l4proto = ipv6_hdr(skb)->nexthdr; 587 588 dx = ring->sw_tail; 589 dx_buff = &ring->buff_ring[dx]; 590 dx_buff->flags = 0U; 591 592 if (unlikely(skb_is_gso(skb))) { 593 dx_buff->mss = skb_shinfo(skb)->gso_size; 594 if (l4proto == IPPROTO_TCP) { 595 dx_buff->is_gso_tcp = 1U; 596 dx_buff->len_l4 = tcp_hdrlen(skb); 597 } else if (l4proto == IPPROTO_UDP) { 598 dx_buff->is_gso_udp = 1U; 599 dx_buff->len_l4 = sizeof(struct udphdr); 600 /* UDP GSO Hardware does not replace packet length. */ 601 udp_hdr(skb)->len = htons(dx_buff->mss + 602 dx_buff->len_l4); 603 } else { 604 WARN_ONCE(true, "Bad GSO mode"); 605 goto exit; 606 } 607 dx_buff->len_pkt = skb->len; 608 dx_buff->len_l2 = ETH_HLEN; 609 dx_buff->len_l3 = skb_network_header_len(skb); 610 dx_buff->eop_index = 0xffffU; 611 dx_buff->is_ipv6 = (ipver == 6); 612 need_context_tag = true; 613 } 614 615 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) { 616 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb); 617 dx_buff->len_pkt = skb->len; 618 dx_buff->is_vlan = 1U; 619 need_context_tag = true; 620 } 621 622 if (need_context_tag) { 623 dx = aq_ring_next_dx(ring, dx); 624 dx_buff = &ring->buff_ring[dx]; 625 dx_buff->flags = 0U; 626 ++ret; 627 } 628 629 dx_buff->len = skb_headlen(skb); 630 dx_buff->pa = dma_map_single(dev, 631 skb->data, 632 dx_buff->len, 633 DMA_TO_DEVICE); 634 635 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) { 636 ret = 0; 637 goto exit; 638 } 639 640 first = dx_buff; 641 dx_buff->len_pkt = skb->len; 642 dx_buff->is_sop = 1U; 643 dx_buff->is_mapped = 1U; 644 ++ret; 645 646 if (skb->ip_summed == CHECKSUM_PARTIAL) { 647 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol); 648 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP); 649 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP); 650 } 651 652 for (; nr_frags--; ++frag_count) { 653 unsigned int frag_len = 0U; 654 unsigned int buff_offset = 0U; 655 unsigned int buff_size = 0U; 656 dma_addr_t frag_pa; 657 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count]; 658 659 frag_len = skb_frag_size(frag); 660 661 while (frag_len) { 662 if (frag_len > AQ_CFG_TX_FRAME_MAX) 663 buff_size = AQ_CFG_TX_FRAME_MAX; 664 else 665 buff_size = frag_len; 666 667 frag_pa = skb_frag_dma_map(dev, 668 frag, 669 buff_offset, 670 buff_size, 671 DMA_TO_DEVICE); 672 673 if (unlikely(dma_mapping_error(dev, 674 frag_pa))) 675 goto mapping_error; 676 677 dx = aq_ring_next_dx(ring, dx); 678 dx_buff = &ring->buff_ring[dx]; 679 680 dx_buff->flags = 0U; 681 dx_buff->len = buff_size; 682 dx_buff->pa = frag_pa; 683 dx_buff->is_mapped = 1U; 684 dx_buff->eop_index = 0xffffU; 685 686 frag_len -= buff_size; 687 buff_offset += buff_size; 688 689 ++ret; 690 } 691 } 692 693 first->eop_index = dx; 694 dx_buff->is_eop = 1U; 695 dx_buff->skb = skb; 696 goto exit; 697 698 mapping_error: 699 for (dx = ring->sw_tail; 700 ret > 0; 701 --ret, dx = aq_ring_next_dx(ring, dx)) { 702 dx_buff = &ring->buff_ring[dx]; 703 704 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) && 705 !dx_buff->is_vlan && dx_buff->pa) { 706 if (unlikely(dx_buff->is_sop)) { 707 dma_unmap_single(dev, 708 dx_buff->pa, 709 dx_buff->len, 710 DMA_TO_DEVICE); 711 } else { 712 dma_unmap_page(dev, 713 dx_buff->pa, 714 dx_buff->len, 715 DMA_TO_DEVICE); 716 } 717 } 718 } 719 720 exit: 721 return ret; 722 } 723 724 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb) 725 { 726 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 727 unsigned int vec = skb->queue_mapping % cfg->vecs; 728 unsigned int tc = skb->queue_mapping / cfg->vecs; 729 struct aq_ring_s *ring = NULL; 730 unsigned int frags = 0U; 731 int err = NETDEV_TX_OK; 732 733 frags = skb_shinfo(skb)->nr_frags + 1; 734 735 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)]; 736 737 if (frags > AQ_CFG_SKB_FRAGS_MAX) { 738 dev_kfree_skb_any(skb); 739 goto err_exit; 740 } 741 742 aq_ring_update_queue_state(ring); 743 744 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) { 745 err = NETDEV_TX_BUSY; 746 goto err_exit; 747 } 748 749 /* Above status update may stop the queue. Check this. */ 750 if (__netif_subqueue_stopped(self->ndev, 751 AQ_NIC_RING2QMAP(self, ring->idx))) { 752 err = NETDEV_TX_BUSY; 753 goto err_exit; 754 } 755 756 frags = aq_nic_map_skb(self, skb, ring); 757 758 if (likely(frags)) { 759 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw, 760 ring, frags); 761 } else { 762 err = NETDEV_TX_BUSY; 763 } 764 765 err_exit: 766 return err; 767 } 768 769 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self) 770 { 771 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw); 772 } 773 774 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags) 775 { 776 int err = 0; 777 778 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags); 779 if (err < 0) 780 goto err_exit; 781 782 self->packet_filter = flags; 783 784 err_exit: 785 return err; 786 } 787 788 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) 789 { 790 const struct aq_hw_ops *hw_ops = self->aq_hw_ops; 791 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 792 unsigned int packet_filter = ndev->flags; 793 struct netdev_hw_addr *ha = NULL; 794 unsigned int i = 0U; 795 int err = 0; 796 797 self->mc_list.count = 0; 798 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 799 packet_filter |= IFF_PROMISC; 800 } else { 801 netdev_for_each_uc_addr(ha, ndev) { 802 ether_addr_copy(self->mc_list.ar[i++], ha->addr); 803 } 804 } 805 806 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST); 807 if (cfg->is_mc_list_enabled) { 808 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 809 packet_filter |= IFF_ALLMULTI; 810 } else { 811 netdev_for_each_mc_addr(ha, ndev) { 812 ether_addr_copy(self->mc_list.ar[i++], 813 ha->addr); 814 } 815 } 816 } 817 818 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { 819 self->mc_list.count = i; 820 err = hw_ops->hw_multicast_list_set(self->aq_hw, 821 self->mc_list.ar, 822 self->mc_list.count); 823 if (err < 0) 824 return err; 825 } 826 827 return aq_nic_set_packet_filter(self, packet_filter); 828 } 829 830 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu) 831 { 832 self->aq_nic_cfg.mtu = new_mtu; 833 834 return 0; 835 } 836 837 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev) 838 { 839 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr); 840 } 841 842 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self) 843 { 844 return self->link_status.mbps; 845 } 846 847 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p) 848 { 849 u32 *regs_buff = p; 850 int err = 0; 851 852 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 853 return -EOPNOTSUPP; 854 855 regs->version = 1; 856 857 err = self->aq_hw_ops->hw_get_regs(self->aq_hw, 858 self->aq_nic_cfg.aq_hw_caps, 859 regs_buff); 860 if (err < 0) 861 goto err_exit; 862 863 err_exit: 864 return err; 865 } 866 867 int aq_nic_get_regs_count(struct aq_nic_s *self) 868 { 869 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 870 return 0; 871 872 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count; 873 } 874 875 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data) 876 { 877 struct aq_vec_s *aq_vec = NULL; 878 struct aq_stats_s *stats; 879 unsigned int count = 0U; 880 unsigned int i = 0U; 881 unsigned int tc; 882 883 if (self->aq_fw_ops->update_stats) { 884 mutex_lock(&self->fwreq_mutex); 885 self->aq_fw_ops->update_stats(self->aq_hw); 886 mutex_unlock(&self->fwreq_mutex); 887 } 888 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 889 890 if (!stats) 891 goto err_exit; 892 893 data[i] = stats->uprc + stats->mprc + stats->bprc; 894 data[++i] = stats->uprc; 895 data[++i] = stats->mprc; 896 data[++i] = stats->bprc; 897 data[++i] = stats->erpt; 898 data[++i] = stats->uptc + stats->mptc + stats->bptc; 899 data[++i] = stats->uptc; 900 data[++i] = stats->mptc; 901 data[++i] = stats->bptc; 902 data[++i] = stats->ubrc; 903 data[++i] = stats->ubtc; 904 data[++i] = stats->mbrc; 905 data[++i] = stats->mbtc; 906 data[++i] = stats->bbrc; 907 data[++i] = stats->bbtc; 908 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc; 909 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc; 910 data[++i] = stats->dma_pkt_rc; 911 data[++i] = stats->dma_pkt_tc; 912 data[++i] = stats->dma_oct_rc; 913 data[++i] = stats->dma_oct_tc; 914 data[++i] = stats->dpc; 915 916 i++; 917 918 data += i; 919 920 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { 921 for (i = 0U, aq_vec = self->aq_vec[0]; 922 aq_vec && self->aq_vecs > i; 923 ++i, aq_vec = self->aq_vec[i]) { 924 data += count; 925 count = aq_vec_get_sw_stats(aq_vec, tc, data); 926 } 927 } 928 929 data += count; 930 931 err_exit: 932 return data; 933 } 934 935 static void aq_nic_update_ndev_stats(struct aq_nic_s *self) 936 { 937 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 938 struct net_device *ndev = self->ndev; 939 940 ndev->stats.rx_packets = stats->dma_pkt_rc; 941 ndev->stats.rx_bytes = stats->dma_oct_rc; 942 ndev->stats.rx_errors = stats->erpr; 943 ndev->stats.rx_dropped = stats->dpc; 944 ndev->stats.tx_packets = stats->dma_pkt_tc; 945 ndev->stats.tx_bytes = stats->dma_oct_tc; 946 ndev->stats.tx_errors = stats->erpt; 947 ndev->stats.multicast = stats->mprc; 948 } 949 950 void aq_nic_get_link_ksettings(struct aq_nic_s *self, 951 struct ethtool_link_ksettings *cmd) 952 { 953 u32 lp_link_speed_msk; 954 955 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 956 cmd->base.port = PORT_FIBRE; 957 else 958 cmd->base.port = PORT_TP; 959 960 cmd->base.duplex = DUPLEX_UNKNOWN; 961 if (self->link_status.mbps) 962 cmd->base.duplex = self->link_status.full_duplex ? 963 DUPLEX_FULL : DUPLEX_HALF; 964 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg; 965 966 ethtool_link_ksettings_zero_link_mode(cmd, supported); 967 968 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G) 969 ethtool_link_ksettings_add_link_mode(cmd, supported, 970 10000baseT_Full); 971 972 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G) 973 ethtool_link_ksettings_add_link_mode(cmd, supported, 974 5000baseT_Full); 975 976 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5) 977 ethtool_link_ksettings_add_link_mode(cmd, supported, 978 2500baseT_Full); 979 980 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G) 981 ethtool_link_ksettings_add_link_mode(cmd, supported, 982 1000baseT_Full); 983 984 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF) 985 ethtool_link_ksettings_add_link_mode(cmd, supported, 986 1000baseT_Half); 987 988 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M) 989 ethtool_link_ksettings_add_link_mode(cmd, supported, 990 100baseT_Full); 991 992 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF) 993 ethtool_link_ksettings_add_link_mode(cmd, supported, 994 100baseT_Half); 995 996 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M) 997 ethtool_link_ksettings_add_link_mode(cmd, supported, 998 10baseT_Full); 999 1000 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF) 1001 ethtool_link_ksettings_add_link_mode(cmd, supported, 1002 10baseT_Half); 1003 1004 if (self->aq_nic_cfg.aq_hw_caps->flow_control) { 1005 ethtool_link_ksettings_add_link_mode(cmd, supported, 1006 Pause); 1007 ethtool_link_ksettings_add_link_mode(cmd, supported, 1008 Asym_Pause); 1009 } 1010 1011 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 1012 1013 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 1014 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 1015 else 1016 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 1017 1018 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 1019 1020 if (self->aq_nic_cfg.is_autoneg) 1021 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 1022 1023 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G) 1024 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1025 10000baseT_Full); 1026 1027 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G) 1028 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1029 5000baseT_Full); 1030 1031 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5) 1032 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1033 2500baseT_Full); 1034 1035 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G) 1036 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1037 1000baseT_Full); 1038 1039 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF) 1040 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1041 1000baseT_Half); 1042 1043 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M) 1044 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1045 100baseT_Full); 1046 1047 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF) 1048 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1049 100baseT_Half); 1050 1051 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M) 1052 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1053 10baseT_Full); 1054 1055 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF) 1056 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1057 10baseT_Half); 1058 1059 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX) 1060 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1061 Pause); 1062 1063 /* Asym is when either RX or TX, but not both */ 1064 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^ 1065 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)) 1066 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1067 Asym_Pause); 1068 1069 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 1070 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 1071 else 1072 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 1073 1074 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 1075 lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk; 1076 1077 if (lp_link_speed_msk & AQ_NIC_RATE_10G) 1078 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1079 10000baseT_Full); 1080 1081 if (lp_link_speed_msk & AQ_NIC_RATE_5G) 1082 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1083 5000baseT_Full); 1084 1085 if (lp_link_speed_msk & AQ_NIC_RATE_2G5) 1086 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1087 2500baseT_Full); 1088 1089 if (lp_link_speed_msk & AQ_NIC_RATE_1G) 1090 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1091 1000baseT_Full); 1092 1093 if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF) 1094 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1095 1000baseT_Half); 1096 1097 if (lp_link_speed_msk & AQ_NIC_RATE_100M) 1098 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1099 100baseT_Full); 1100 1101 if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF) 1102 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1103 100baseT_Half); 1104 1105 if (lp_link_speed_msk & AQ_NIC_RATE_10M) 1106 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1107 10baseT_Full); 1108 1109 if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF) 1110 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1111 10baseT_Half); 1112 1113 if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX) 1114 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1115 Pause); 1116 if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^ 1117 !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)) 1118 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, 1119 Asym_Pause); 1120 } 1121 1122 int aq_nic_set_link_ksettings(struct aq_nic_s *self, 1123 const struct ethtool_link_ksettings *cmd) 1124 { 1125 int fduplex = (cmd->base.duplex == DUPLEX_FULL); 1126 u32 speed = cmd->base.speed; 1127 u32 rate = 0U; 1128 int err = 0; 1129 1130 if (!fduplex && speed > SPEED_1000) { 1131 err = -EINVAL; 1132 goto err_exit; 1133 } 1134 1135 if (cmd->base.autoneg == AUTONEG_ENABLE) { 1136 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk; 1137 self->aq_nic_cfg.is_autoneg = true; 1138 } else { 1139 switch (speed) { 1140 case SPEED_10: 1141 rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF; 1142 break; 1143 1144 case SPEED_100: 1145 rate = fduplex ? AQ_NIC_RATE_100M 1146 : AQ_NIC_RATE_100M_HALF; 1147 break; 1148 1149 case SPEED_1000: 1150 rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF; 1151 break; 1152 1153 case SPEED_2500: 1154 rate = AQ_NIC_RATE_2G5; 1155 break; 1156 1157 case SPEED_5000: 1158 rate = AQ_NIC_RATE_5G; 1159 break; 1160 1161 case SPEED_10000: 1162 rate = AQ_NIC_RATE_10G; 1163 break; 1164 1165 default: 1166 err = -1; 1167 goto err_exit; 1168 } 1169 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) { 1170 err = -1; 1171 goto err_exit; 1172 } 1173 1174 self->aq_nic_cfg.is_autoneg = false; 1175 } 1176 1177 mutex_lock(&self->fwreq_mutex); 1178 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate); 1179 mutex_unlock(&self->fwreq_mutex); 1180 if (err < 0) 1181 goto err_exit; 1182 1183 self->aq_nic_cfg.link_speed_msk = rate; 1184 1185 err_exit: 1186 return err; 1187 } 1188 1189 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self) 1190 { 1191 return &self->aq_nic_cfg; 1192 } 1193 1194 u32 aq_nic_get_fw_version(struct aq_nic_s *self) 1195 { 1196 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw); 1197 } 1198 1199 int aq_nic_set_loopback(struct aq_nic_s *self) 1200 { 1201 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1202 1203 if (!self->aq_hw_ops->hw_set_loopback || 1204 !self->aq_fw_ops->set_phyloopback) 1205 return -EOPNOTSUPP; 1206 1207 mutex_lock(&self->fwreq_mutex); 1208 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1209 AQ_HW_LOOPBACK_DMA_SYS, 1210 !!(cfg->priv_flags & 1211 BIT(AQ_HW_LOOPBACK_DMA_SYS))); 1212 1213 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1214 AQ_HW_LOOPBACK_PKT_SYS, 1215 !!(cfg->priv_flags & 1216 BIT(AQ_HW_LOOPBACK_PKT_SYS))); 1217 1218 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1219 AQ_HW_LOOPBACK_DMA_NET, 1220 !!(cfg->priv_flags & 1221 BIT(AQ_HW_LOOPBACK_DMA_NET))); 1222 1223 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1224 AQ_HW_LOOPBACK_PHYINT_SYS, 1225 !!(cfg->priv_flags & 1226 BIT(AQ_HW_LOOPBACK_PHYINT_SYS))); 1227 1228 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1229 AQ_HW_LOOPBACK_PHYEXT_SYS, 1230 !!(cfg->priv_flags & 1231 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))); 1232 mutex_unlock(&self->fwreq_mutex); 1233 1234 return 0; 1235 } 1236 1237 int aq_nic_stop(struct aq_nic_s *self) 1238 { 1239 struct aq_vec_s *aq_vec = NULL; 1240 unsigned int i = 0U; 1241 1242 netif_tx_disable(self->ndev); 1243 netif_carrier_off(self->ndev); 1244 1245 del_timer_sync(&self->service_timer); 1246 cancel_work_sync(&self->service_task); 1247 1248 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK); 1249 1250 if (self->aq_nic_cfg.is_polling) 1251 del_timer_sync(&self->polling_timer); 1252 else 1253 aq_pci_func_free_irqs(self); 1254 1255 aq_ptp_irq_free(self); 1256 1257 for (i = 0U, aq_vec = self->aq_vec[0]; 1258 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 1259 aq_vec_stop(aq_vec); 1260 1261 aq_ptp_ring_stop(self); 1262 1263 return self->aq_hw_ops->hw_stop(self->aq_hw); 1264 } 1265 1266 void aq_nic_set_power(struct aq_nic_s *self) 1267 { 1268 if (self->power_state != AQ_HW_POWER_STATE_D0 || 1269 self->aq_hw->aq_nic_cfg->wol) 1270 if (likely(self->aq_fw_ops->set_power)) { 1271 mutex_lock(&self->fwreq_mutex); 1272 self->aq_fw_ops->set_power(self->aq_hw, 1273 self->power_state, 1274 self->ndev->dev_addr); 1275 mutex_unlock(&self->fwreq_mutex); 1276 } 1277 } 1278 1279 void aq_nic_deinit(struct aq_nic_s *self, bool link_down) 1280 { 1281 struct aq_vec_s *aq_vec = NULL; 1282 unsigned int i = 0U; 1283 1284 if (!self) 1285 goto err_exit; 1286 1287 for (i = 0U; i < self->aq_vecs; i++) { 1288 aq_vec = self->aq_vec[i]; 1289 aq_vec_deinit(aq_vec); 1290 aq_vec_ring_free(aq_vec); 1291 } 1292 1293 aq_ptp_unregister(self); 1294 aq_ptp_ring_deinit(self); 1295 aq_ptp_ring_free(self); 1296 aq_ptp_free(self); 1297 1298 if (likely(self->aq_fw_ops->deinit) && link_down) { 1299 mutex_lock(&self->fwreq_mutex); 1300 self->aq_fw_ops->deinit(self->aq_hw); 1301 mutex_unlock(&self->fwreq_mutex); 1302 } 1303 1304 err_exit:; 1305 } 1306 1307 void aq_nic_free_vectors(struct aq_nic_s *self) 1308 { 1309 unsigned int i = 0U; 1310 1311 if (!self) 1312 goto err_exit; 1313 1314 for (i = ARRAY_SIZE(self->aq_vec); i--;) { 1315 if (self->aq_vec[i]) { 1316 aq_vec_free(self->aq_vec[i]); 1317 self->aq_vec[i] = NULL; 1318 } 1319 } 1320 1321 err_exit:; 1322 } 1323 1324 int aq_nic_realloc_vectors(struct aq_nic_s *self) 1325 { 1326 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 1327 1328 aq_nic_free_vectors(self); 1329 1330 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) { 1331 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs, 1332 cfg); 1333 if (unlikely(!self->aq_vec[self->aq_vecs])) 1334 return -ENOMEM; 1335 } 1336 1337 return 0; 1338 } 1339 1340 void aq_nic_shutdown(struct aq_nic_s *self) 1341 { 1342 int err = 0; 1343 1344 if (!self->ndev) 1345 return; 1346 1347 rtnl_lock(); 1348 1349 netif_device_detach(self->ndev); 1350 1351 if (netif_running(self->ndev)) { 1352 err = aq_nic_stop(self); 1353 if (err < 0) 1354 goto err_exit; 1355 } 1356 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol); 1357 aq_nic_set_power(self); 1358 1359 err_exit: 1360 rtnl_unlock(); 1361 } 1362 1363 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type) 1364 { 1365 u8 location = 0xFF; 1366 u32 fltr_cnt; 1367 u32 n_bit; 1368 1369 switch (type) { 1370 case aq_rx_filter_ethertype: 1371 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT - 1372 self->aq_hw_rx_fltrs.fet_reserved_count; 1373 self->aq_hw_rx_fltrs.fet_reserved_count++; 1374 break; 1375 case aq_rx_filter_l3l4: 1376 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4; 1377 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count; 1378 1379 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit); 1380 self->aq_hw_rx_fltrs.fl3l4.reserved_count++; 1381 location = n_bit; 1382 break; 1383 default: 1384 break; 1385 } 1386 1387 return location; 1388 } 1389 1390 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type, 1391 u32 location) 1392 { 1393 switch (type) { 1394 case aq_rx_filter_ethertype: 1395 self->aq_hw_rx_fltrs.fet_reserved_count--; 1396 break; 1397 case aq_rx_filter_l3l4: 1398 self->aq_hw_rx_fltrs.fl3l4.reserved_count--; 1399 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location); 1400 break; 1401 default: 1402 break; 1403 } 1404 } 1405 1406 int aq_nic_set_downshift(struct aq_nic_s *self, int val) 1407 { 1408 int err = 0; 1409 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1410 1411 if (!self->aq_fw_ops->set_downshift) 1412 return -EOPNOTSUPP; 1413 1414 if (val > 15) { 1415 netdev_err(self->ndev, "downshift counter should be <= 15\n"); 1416 return -EINVAL; 1417 } 1418 cfg->downshift_counter = val; 1419 1420 mutex_lock(&self->fwreq_mutex); 1421 err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter); 1422 mutex_unlock(&self->fwreq_mutex); 1423 1424 return err; 1425 } 1426 1427 int aq_nic_set_media_detect(struct aq_nic_s *self, int val) 1428 { 1429 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1430 int err = 0; 1431 1432 if (!self->aq_fw_ops->set_media_detect) 1433 return -EOPNOTSUPP; 1434 1435 if (val > 0 && val != AQ_HW_MEDIA_DETECT_CNT) { 1436 netdev_err(self->ndev, "EDPD on this device could have only fixed value of %d\n", 1437 AQ_HW_MEDIA_DETECT_CNT); 1438 return -EINVAL; 1439 } 1440 1441 mutex_lock(&self->fwreq_mutex); 1442 err = self->aq_fw_ops->set_media_detect(self->aq_hw, !!val); 1443 mutex_unlock(&self->fwreq_mutex); 1444 1445 /* msecs plays no role - configuration is always fixed in PHY */ 1446 if (!err) 1447 cfg->is_media_detect = !!val; 1448 1449 return err; 1450 } 1451 1452 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) 1453 { 1454 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1455 const unsigned int prev_vecs = cfg->vecs; 1456 bool ndev_running; 1457 int err = 0; 1458 int i; 1459 1460 /* if already the same configuration or 1461 * disable request (tcs is 0) and we already is disabled 1462 */ 1463 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) 1464 return 0; 1465 1466 ndev_running = netif_running(self->ndev); 1467 if (ndev_running) 1468 dev_close(self->ndev); 1469 1470 cfg->tcs = tcs; 1471 if (cfg->tcs == 0) 1472 cfg->tcs = 1; 1473 if (prio_tc_map) 1474 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map)); 1475 else 1476 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 1477 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 1478 1479 cfg->is_qos = !!tcs; 1480 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC); 1481 if (!cfg->is_ptp) 1482 netdev_warn(self->ndev, "%s\n", 1483 "PTP is auto disabled due to requested TC count."); 1484 1485 netdev_set_num_tc(self->ndev, cfg->tcs); 1486 1487 /* Changing the number of TCs might change the number of vectors */ 1488 aq_nic_cfg_update_num_vecs(self); 1489 if (prev_vecs != cfg->vecs) { 1490 err = aq_nic_realloc_vectors(self); 1491 if (err) 1492 goto err_exit; 1493 } 1494 1495 if (ndev_running) 1496 err = dev_open(self->ndev, NULL); 1497 1498 err_exit: 1499 return err; 1500 } 1501 1502 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc, 1503 const u32 max_rate) 1504 { 1505 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1506 1507 if (tc >= AQ_CFG_TCS_MAX) 1508 return -EINVAL; 1509 1510 if (max_rate && max_rate < 10) { 1511 netdev_warn(self->ndev, 1512 "Setting %s to the minimum usable value of %dMbps.\n", 1513 "max rate", 10); 1514 cfg->tc_max_rate[tc] = 10; 1515 } else { 1516 cfg->tc_max_rate[tc] = max_rate; 1517 } 1518 1519 return 0; 1520 } 1521 1522 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc, 1523 const u32 min_rate) 1524 { 1525 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1526 1527 if (tc >= AQ_CFG_TCS_MAX) 1528 return -EINVAL; 1529 1530 if (min_rate) 1531 set_bit(tc, &cfg->tc_min_rate_msk); 1532 else 1533 clear_bit(tc, &cfg->tc_min_rate_msk); 1534 1535 if (min_rate && min_rate < 20) { 1536 netdev_warn(self->ndev, 1537 "Setting %s to the minimum usable value of %dMbps.\n", 1538 "min rate", 20); 1539 cfg->tc_min_rate[tc] = 20; 1540 } else { 1541 cfg->tc_min_rate[tc] = min_rate; 1542 } 1543 1544 return 0; 1545 } 1546