1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Atlantic Network Driver 3 * 4 * Copyright (C) 2014-2019 aQuantia Corporation 5 * Copyright (C) 2019-2020 Marvell International Ltd. 6 */ 7 8 /* File aq_nic.c: Definition of common code for NIC. */ 9 10 #include "aq_nic.h" 11 #include "aq_ring.h" 12 #include "aq_vec.h" 13 #include "aq_hw.h" 14 #include "aq_pci_func.h" 15 #include "aq_macsec.h" 16 #include "aq_main.h" 17 #include "aq_phy.h" 18 #include "aq_ptp.h" 19 #include "aq_filters.h" 20 21 #include <linux/moduleparam.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/timer.h> 25 #include <linux/cpu.h> 26 #include <linux/ip.h> 27 #include <linux/tcp.h> 28 #include <net/ip.h> 29 #include <net/pkt_cls.h> 30 31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO; 32 module_param_named(aq_itr, aq_itr, uint, 0644); 33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode"); 34 35 static unsigned int aq_itr_tx; 36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644); 37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate"); 38 39 static unsigned int aq_itr_rx; 40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644); 41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate"); 42 43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self); 44 45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues) 46 { 47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = { 48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d, 49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18, 50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8, 51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70, 52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c 53 }; 54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 55 struct aq_rss_parameters *rss_params; 56 int i = 0; 57 58 rss_params = &cfg->aq_rss; 59 60 rss_params->hash_secret_key_size = sizeof(rss_key); 61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key)); 62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX; 63 64 for (i = rss_params->indirection_table_size; i--;) 65 rss_params->indirection_table[i] = i & (num_rss_queues - 1); 66 } 67 68 /* Recalculate the number of vectors */ 69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self) 70 { 71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 72 73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF); 74 cfg->vecs = min(cfg->vecs, num_online_cpus()); 75 if (self->irqvecs > AQ_HW_SERVICE_IRQS) 76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS); 77 /* cfg->vecs should be power of 2 for RSS */ 78 cfg->vecs = rounddown_pow_of_two(cfg->vecs); 79 80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) { 81 if (cfg->tcs > 2) 82 cfg->vecs = min(cfg->vecs, 4U); 83 } 84 85 if (cfg->vecs <= 4) 86 cfg->tc_mode = AQ_TC_MODE_8TCS; 87 else 88 cfg->tc_mode = AQ_TC_MODE_4TCS; 89 90 /*rss rings */ 91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF); 92 aq_nic_rss_init(self, cfg->num_rss_queues); 93 } 94 95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */ 96 void aq_nic_cfg_start(struct aq_nic_s *self) 97 { 98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 99 int i; 100 101 cfg->tcs = AQ_CFG_TCS_DEF; 102 103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF; 104 105 cfg->itr = aq_itr; 106 cfg->tx_itr = aq_itr_tx; 107 cfg->rx_itr = aq_itr_rx; 108 109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER; 110 cfg->is_rss = AQ_CFG_IS_RSS_DEF; 111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF; 112 cfg->fc.req = AQ_CFG_FC_MODE; 113 cfg->wol = AQ_CFG_WOL_MODES; 114 115 cfg->mtu = AQ_CFG_MTU_DEF; 116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK; 117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF; 118 119 cfg->is_lro = AQ_CFG_IS_LRO_DEF; 120 cfg->is_ptp = true; 121 122 /*descriptors */ 123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF); 124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF); 125 126 aq_nic_cfg_update_num_vecs(self); 127 128 cfg->irq_type = aq_pci_func_get_irq_type(self); 129 130 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) || 131 (cfg->aq_hw_caps->vecs == 1U) || 132 (cfg->vecs == 1U)) { 133 cfg->is_rss = 0U; 134 cfg->vecs = 1U; 135 } 136 137 /* Check if we have enough vectors allocated for 138 * link status IRQ. If no - we'll know link state from 139 * slower service task. 140 */ 141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs) 142 cfg->link_irq_vec = cfg->vecs; 143 else 144 cfg->link_irq_vec = 0; 145 146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk; 147 cfg->features = cfg->aq_hw_caps->hw_features; 148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX); 149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX); 150 cfg->is_vlan_force_promisc = true; 151 152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 153 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 154 } 155 156 static int aq_nic_update_link_status(struct aq_nic_s *self) 157 { 158 int err = self->aq_fw_ops->update_link_status(self->aq_hw); 159 u32 fc = 0; 160 161 if (err) 162 return err; 163 164 if (self->aq_fw_ops->get_flow_control) 165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc); 166 self->aq_nic_cfg.fc.cur = fc; 167 168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) { 169 netdev_info(self->ndev, "%s: link change old %d new %d\n", 170 AQ_CFG_DRV_NAME, self->link_status.mbps, 171 self->aq_hw->aq_link_status.mbps); 172 aq_nic_update_interrupt_moderation_settings(self); 173 174 if (self->aq_ptp) { 175 aq_ptp_clock_init(self); 176 aq_ptp_tm_offset_set(self, 177 self->aq_hw->aq_link_status.mbps); 178 aq_ptp_link_change(self); 179 } 180 181 /* Driver has to update flow control settings on RX block 182 * on any link event. 183 * We should query FW whether it negotiated FC. 184 */ 185 if (self->aq_hw_ops->hw_set_fc) 186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0); 187 } 188 189 self->link_status = self->aq_hw->aq_link_status; 190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) { 191 aq_utils_obj_set(&self->flags, 192 AQ_NIC_FLAG_STARTED); 193 aq_utils_obj_clear(&self->flags, 194 AQ_NIC_LINK_DOWN); 195 netif_carrier_on(self->ndev); 196 #if IS_ENABLED(CONFIG_MACSEC) 197 aq_macsec_enable(self); 198 #endif 199 if (self->aq_hw_ops->hw_tc_rate_limit_set) 200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw); 201 202 netif_tx_wake_all_queues(self->ndev); 203 } 204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) { 205 netif_carrier_off(self->ndev); 206 netif_tx_disable(self->ndev); 207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN); 208 } 209 210 return 0; 211 } 212 213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private) 214 { 215 struct aq_nic_s *self = private; 216 217 if (!self) 218 return IRQ_NONE; 219 220 aq_nic_update_link_status(self); 221 222 self->aq_hw_ops->hw_irq_enable(self->aq_hw, 223 BIT(self->aq_nic_cfg.link_irq_vec)); 224 225 return IRQ_HANDLED; 226 } 227 228 static void aq_nic_service_task(struct work_struct *work) 229 { 230 struct aq_nic_s *self = container_of(work, struct aq_nic_s, 231 service_task); 232 int err; 233 234 aq_ptp_service_task(self); 235 236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY)) 237 return; 238 239 err = aq_nic_update_link_status(self); 240 if (err) 241 return; 242 243 #if IS_ENABLED(CONFIG_MACSEC) 244 aq_macsec_work(self); 245 #endif 246 247 mutex_lock(&self->fwreq_mutex); 248 if (self->aq_fw_ops->update_stats) 249 self->aq_fw_ops->update_stats(self->aq_hw); 250 mutex_unlock(&self->fwreq_mutex); 251 252 aq_nic_update_ndev_stats(self); 253 } 254 255 static void aq_nic_service_timer_cb(struct timer_list *t) 256 { 257 struct aq_nic_s *self = from_timer(self, t, service_timer); 258 259 mod_timer(&self->service_timer, 260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL); 261 262 aq_ndev_schedule_work(&self->service_task); 263 } 264 265 static void aq_nic_polling_timer_cb(struct timer_list *t) 266 { 267 struct aq_nic_s *self = from_timer(self, t, polling_timer); 268 struct aq_vec_s *aq_vec = NULL; 269 unsigned int i = 0U; 270 271 for (i = 0U, aq_vec = self->aq_vec[0]; 272 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 273 aq_vec_isr(i, (void *)aq_vec); 274 275 mod_timer(&self->polling_timer, jiffies + 276 AQ_CFG_POLLING_TIMER_INTERVAL); 277 } 278 279 static int aq_nic_hw_prepare(struct aq_nic_s *self) 280 { 281 int err = 0; 282 283 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw); 284 if (err) 285 goto exit; 286 287 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops); 288 289 exit: 290 return err; 291 } 292 293 static bool aq_nic_is_valid_ether_addr(const u8 *addr) 294 { 295 /* Some engineering samples of Aquantia NICs are provisioned with a 296 * partially populated MAC, which is still invalid. 297 */ 298 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0); 299 } 300 301 int aq_nic_ndev_register(struct aq_nic_s *self) 302 { 303 int err = 0; 304 305 if (!self->ndev) { 306 err = -EINVAL; 307 goto err_exit; 308 } 309 310 err = aq_nic_hw_prepare(self); 311 if (err) 312 goto err_exit; 313 314 #if IS_ENABLED(CONFIG_MACSEC) 315 aq_macsec_init(self); 316 #endif 317 318 mutex_lock(&self->fwreq_mutex); 319 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw, 320 self->ndev->dev_addr); 321 mutex_unlock(&self->fwreq_mutex); 322 if (err) 323 goto err_exit; 324 325 if (!is_valid_ether_addr(self->ndev->dev_addr) || 326 !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) { 327 netdev_warn(self->ndev, "MAC is invalid, will use random."); 328 eth_hw_addr_random(self->ndev); 329 } 330 331 #if defined(AQ_CFG_MAC_ADDR_PERMANENT) 332 { 333 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT; 334 335 ether_addr_copy(self->ndev->dev_addr, mac_addr_permanent); 336 } 337 #endif 338 339 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs; 340 self->aq_vecs++) { 341 self->aq_vec[self->aq_vecs] = 342 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self)); 343 if (!self->aq_vec[self->aq_vecs]) { 344 err = -ENOMEM; 345 goto err_exit; 346 } 347 } 348 349 netif_carrier_off(self->ndev); 350 351 netif_tx_disable(self->ndev); 352 353 err = register_netdev(self->ndev); 354 if (err) 355 goto err_exit; 356 357 err_exit: 358 #if IS_ENABLED(CONFIG_MACSEC) 359 if (err) 360 aq_macsec_free(self); 361 #endif 362 return err; 363 } 364 365 void aq_nic_ndev_init(struct aq_nic_s *self) 366 { 367 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps; 368 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg; 369 370 self->ndev->hw_features |= aq_hw_caps->hw_features; 371 self->ndev->features = aq_hw_caps->hw_features; 372 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM | 373 NETIF_F_RXHASH | NETIF_F_SG | 374 NETIF_F_LRO | NETIF_F_TSO; 375 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4; 376 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags; 377 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE; 378 379 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK; 380 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN; 381 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN; 382 383 } 384 385 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx, 386 struct aq_ring_s *ring) 387 { 388 self->aq_ring_tx[idx] = ring; 389 } 390 391 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self) 392 { 393 return self->ndev; 394 } 395 396 int aq_nic_init(struct aq_nic_s *self) 397 { 398 struct aq_vec_s *aq_vec = NULL; 399 unsigned int i = 0U; 400 int err = 0; 401 402 self->power_state = AQ_HW_POWER_STATE_D0; 403 mutex_lock(&self->fwreq_mutex); 404 err = self->aq_hw_ops->hw_reset(self->aq_hw); 405 mutex_unlock(&self->fwreq_mutex); 406 if (err < 0) 407 goto err_exit; 408 409 err = self->aq_hw_ops->hw_init(self->aq_hw, 410 aq_nic_get_ndev(self)->dev_addr); 411 if (err < 0) 412 goto err_exit; 413 414 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) && 415 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) { 416 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX; 417 err = aq_phy_init(self->aq_hw); 418 } 419 420 for (i = 0U; i < self->aq_vecs; i++) { 421 aq_vec = self->aq_vec[i]; 422 err = aq_vec_ring_alloc(aq_vec, self, i, 423 aq_nic_get_cfg(self)); 424 if (err) 425 goto err_exit; 426 427 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw); 428 } 429 430 if (aq_nic_get_cfg(self)->is_ptp) { 431 err = aq_ptp_init(self, self->irqvecs - 1); 432 if (err < 0) 433 goto err_exit; 434 435 err = aq_ptp_ring_alloc(self); 436 if (err < 0) 437 goto err_exit; 438 439 err = aq_ptp_ring_init(self); 440 if (err < 0) 441 goto err_exit; 442 } 443 444 netif_carrier_off(self->ndev); 445 446 err_exit: 447 return err; 448 } 449 450 int aq_nic_start(struct aq_nic_s *self) 451 { 452 struct aq_vec_s *aq_vec = NULL; 453 struct aq_nic_cfg_s *cfg; 454 unsigned int i = 0U; 455 int err = 0; 456 457 cfg = aq_nic_get_cfg(self); 458 459 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, 460 self->mc_list.ar, 461 self->mc_list.count); 462 if (err < 0) 463 goto err_exit; 464 465 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, 466 self->packet_filter); 467 if (err < 0) 468 goto err_exit; 469 470 for (i = 0U, aq_vec = self->aq_vec[0]; 471 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 472 err = aq_vec_start(aq_vec); 473 if (err < 0) 474 goto err_exit; 475 } 476 477 err = aq_ptp_ring_start(self); 478 if (err < 0) 479 goto err_exit; 480 481 aq_nic_set_loopback(self); 482 483 err = self->aq_hw_ops->hw_start(self->aq_hw); 484 if (err < 0) 485 goto err_exit; 486 487 err = aq_nic_update_interrupt_moderation_settings(self); 488 if (err) 489 goto err_exit; 490 491 INIT_WORK(&self->service_task, aq_nic_service_task); 492 493 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); 494 aq_nic_service_timer_cb(&self->service_timer); 495 496 if (cfg->is_polling) { 497 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0); 498 mod_timer(&self->polling_timer, jiffies + 499 AQ_CFG_POLLING_TIMER_INTERVAL); 500 } else { 501 for (i = 0U, aq_vec = self->aq_vec[0]; 502 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) { 503 err = aq_pci_func_alloc_irq(self, i, self->ndev->name, 504 aq_vec_isr, aq_vec, 505 aq_vec_get_affinity_mask(aq_vec)); 506 if (err < 0) 507 goto err_exit; 508 } 509 510 err = aq_ptp_irq_alloc(self); 511 if (err < 0) 512 goto err_exit; 513 514 if (cfg->link_irq_vec) { 515 int irqvec = pci_irq_vector(self->pdev, 516 cfg->link_irq_vec); 517 err = request_threaded_irq(irqvec, NULL, 518 aq_linkstate_threaded_isr, 519 IRQF_SHARED | IRQF_ONESHOT, 520 self->ndev->name, self); 521 if (err < 0) 522 goto err_exit; 523 self->msix_entry_mask |= (1 << cfg->link_irq_vec); 524 } 525 526 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw, 527 AQ_CFG_IRQ_MASK); 528 if (err < 0) 529 goto err_exit; 530 } 531 532 err = netif_set_real_num_tx_queues(self->ndev, 533 self->aq_vecs * cfg->tcs); 534 if (err < 0) 535 goto err_exit; 536 537 err = netif_set_real_num_rx_queues(self->ndev, 538 self->aq_vecs * cfg->tcs); 539 if (err < 0) 540 goto err_exit; 541 542 for (i = 0; i < cfg->tcs; i++) { 543 u16 offset = self->aq_vecs * i; 544 545 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset); 546 } 547 netif_tx_start_all_queues(self->ndev); 548 549 err_exit: 550 return err; 551 } 552 553 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb, 554 struct aq_ring_s *ring) 555 { 556 unsigned int nr_frags = skb_shinfo(skb)->nr_frags; 557 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 558 struct device *dev = aq_nic_get_dev(self); 559 struct aq_ring_buff_s *first = NULL; 560 u8 ipver = ip_hdr(skb)->version; 561 struct aq_ring_buff_s *dx_buff; 562 bool need_context_tag = false; 563 unsigned int frag_count = 0U; 564 unsigned int ret = 0U; 565 unsigned int dx; 566 u8 l4proto = 0; 567 568 if (ipver == 4) 569 l4proto = ip_hdr(skb)->protocol; 570 else if (ipver == 6) 571 l4proto = ipv6_hdr(skb)->nexthdr; 572 573 dx = ring->sw_tail; 574 dx_buff = &ring->buff_ring[dx]; 575 dx_buff->flags = 0U; 576 577 if (unlikely(skb_is_gso(skb))) { 578 dx_buff->mss = skb_shinfo(skb)->gso_size; 579 if (l4proto == IPPROTO_TCP) { 580 dx_buff->is_gso_tcp = 1U; 581 dx_buff->len_l4 = tcp_hdrlen(skb); 582 } else if (l4proto == IPPROTO_UDP) { 583 dx_buff->is_gso_udp = 1U; 584 dx_buff->len_l4 = sizeof(struct udphdr); 585 /* UDP GSO Hardware does not replace packet length. */ 586 udp_hdr(skb)->len = htons(dx_buff->mss + 587 dx_buff->len_l4); 588 } else { 589 WARN_ONCE(true, "Bad GSO mode"); 590 goto exit; 591 } 592 dx_buff->len_pkt = skb->len; 593 dx_buff->len_l2 = ETH_HLEN; 594 dx_buff->len_l3 = skb_network_header_len(skb); 595 dx_buff->eop_index = 0xffffU; 596 dx_buff->is_ipv6 = (ipver == 6); 597 need_context_tag = true; 598 } 599 600 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) { 601 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb); 602 dx_buff->len_pkt = skb->len; 603 dx_buff->is_vlan = 1U; 604 need_context_tag = true; 605 } 606 607 if (need_context_tag) { 608 dx = aq_ring_next_dx(ring, dx); 609 dx_buff = &ring->buff_ring[dx]; 610 dx_buff->flags = 0U; 611 ++ret; 612 } 613 614 dx_buff->len = skb_headlen(skb); 615 dx_buff->pa = dma_map_single(dev, 616 skb->data, 617 dx_buff->len, 618 DMA_TO_DEVICE); 619 620 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) { 621 ret = 0; 622 goto exit; 623 } 624 625 first = dx_buff; 626 dx_buff->len_pkt = skb->len; 627 dx_buff->is_sop = 1U; 628 dx_buff->is_mapped = 1U; 629 ++ret; 630 631 if (skb->ip_summed == CHECKSUM_PARTIAL) { 632 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol); 633 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP); 634 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP); 635 } 636 637 for (; nr_frags--; ++frag_count) { 638 unsigned int frag_len = 0U; 639 unsigned int buff_offset = 0U; 640 unsigned int buff_size = 0U; 641 dma_addr_t frag_pa; 642 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count]; 643 644 frag_len = skb_frag_size(frag); 645 646 while (frag_len) { 647 if (frag_len > AQ_CFG_TX_FRAME_MAX) 648 buff_size = AQ_CFG_TX_FRAME_MAX; 649 else 650 buff_size = frag_len; 651 652 frag_pa = skb_frag_dma_map(dev, 653 frag, 654 buff_offset, 655 buff_size, 656 DMA_TO_DEVICE); 657 658 if (unlikely(dma_mapping_error(dev, 659 frag_pa))) 660 goto mapping_error; 661 662 dx = aq_ring_next_dx(ring, dx); 663 dx_buff = &ring->buff_ring[dx]; 664 665 dx_buff->flags = 0U; 666 dx_buff->len = buff_size; 667 dx_buff->pa = frag_pa; 668 dx_buff->is_mapped = 1U; 669 dx_buff->eop_index = 0xffffU; 670 671 frag_len -= buff_size; 672 buff_offset += buff_size; 673 674 ++ret; 675 } 676 } 677 678 first->eop_index = dx; 679 dx_buff->is_eop = 1U; 680 dx_buff->skb = skb; 681 goto exit; 682 683 mapping_error: 684 for (dx = ring->sw_tail; 685 ret > 0; 686 --ret, dx = aq_ring_next_dx(ring, dx)) { 687 dx_buff = &ring->buff_ring[dx]; 688 689 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) && 690 !dx_buff->is_vlan && dx_buff->pa) { 691 if (unlikely(dx_buff->is_sop)) { 692 dma_unmap_single(dev, 693 dx_buff->pa, 694 dx_buff->len, 695 DMA_TO_DEVICE); 696 } else { 697 dma_unmap_page(dev, 698 dx_buff->pa, 699 dx_buff->len, 700 DMA_TO_DEVICE); 701 } 702 } 703 } 704 705 exit: 706 return ret; 707 } 708 709 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb) 710 { 711 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 712 unsigned int vec = skb->queue_mapping % cfg->vecs; 713 unsigned int tc = skb->queue_mapping / cfg->vecs; 714 struct aq_ring_s *ring = NULL; 715 unsigned int frags = 0U; 716 int err = NETDEV_TX_OK; 717 718 frags = skb_shinfo(skb)->nr_frags + 1; 719 720 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)]; 721 722 if (frags > AQ_CFG_SKB_FRAGS_MAX) { 723 dev_kfree_skb_any(skb); 724 goto err_exit; 725 } 726 727 aq_ring_update_queue_state(ring); 728 729 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) { 730 err = NETDEV_TX_BUSY; 731 goto err_exit; 732 } 733 734 /* Above status update may stop the queue. Check this. */ 735 if (__netif_subqueue_stopped(self->ndev, 736 AQ_NIC_RING2QMAP(self, ring->idx))) { 737 err = NETDEV_TX_BUSY; 738 goto err_exit; 739 } 740 741 frags = aq_nic_map_skb(self, skb, ring); 742 743 if (likely(frags)) { 744 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw, 745 ring, frags); 746 } else { 747 err = NETDEV_TX_BUSY; 748 } 749 750 err_exit: 751 return err; 752 } 753 754 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self) 755 { 756 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw); 757 } 758 759 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags) 760 { 761 int err = 0; 762 763 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags); 764 if (err < 0) 765 goto err_exit; 766 767 self->packet_filter = flags; 768 769 err_exit: 770 return err; 771 } 772 773 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) 774 { 775 const struct aq_hw_ops *hw_ops = self->aq_hw_ops; 776 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 777 unsigned int packet_filter = ndev->flags; 778 struct netdev_hw_addr *ha = NULL; 779 unsigned int i = 0U; 780 int err = 0; 781 782 self->mc_list.count = 0; 783 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 784 packet_filter |= IFF_PROMISC; 785 } else { 786 netdev_for_each_uc_addr(ha, ndev) { 787 ether_addr_copy(self->mc_list.ar[i++], ha->addr); 788 } 789 } 790 791 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST); 792 if (cfg->is_mc_list_enabled) { 793 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { 794 packet_filter |= IFF_ALLMULTI; 795 } else { 796 netdev_for_each_mc_addr(ha, ndev) { 797 ether_addr_copy(self->mc_list.ar[i++], 798 ha->addr); 799 } 800 } 801 } 802 803 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { 804 self->mc_list.count = i; 805 err = hw_ops->hw_multicast_list_set(self->aq_hw, 806 self->mc_list.ar, 807 self->mc_list.count); 808 if (err < 0) 809 return err; 810 } 811 812 return aq_nic_set_packet_filter(self, packet_filter); 813 } 814 815 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu) 816 { 817 self->aq_nic_cfg.mtu = new_mtu; 818 819 return 0; 820 } 821 822 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev) 823 { 824 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr); 825 } 826 827 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self) 828 { 829 return self->link_status.mbps; 830 } 831 832 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p) 833 { 834 u32 *regs_buff = p; 835 int err = 0; 836 837 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 838 return -EOPNOTSUPP; 839 840 regs->version = 1; 841 842 err = self->aq_hw_ops->hw_get_regs(self->aq_hw, 843 self->aq_nic_cfg.aq_hw_caps, 844 regs_buff); 845 if (err < 0) 846 goto err_exit; 847 848 err_exit: 849 return err; 850 } 851 852 int aq_nic_get_regs_count(struct aq_nic_s *self) 853 { 854 if (unlikely(!self->aq_hw_ops->hw_get_regs)) 855 return 0; 856 857 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count; 858 } 859 860 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data) 861 { 862 struct aq_vec_s *aq_vec = NULL; 863 struct aq_stats_s *stats; 864 unsigned int count = 0U; 865 unsigned int i = 0U; 866 unsigned int tc; 867 868 if (self->aq_fw_ops->update_stats) { 869 mutex_lock(&self->fwreq_mutex); 870 self->aq_fw_ops->update_stats(self->aq_hw); 871 mutex_unlock(&self->fwreq_mutex); 872 } 873 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 874 875 if (!stats) 876 goto err_exit; 877 878 data[i] = stats->uprc + stats->mprc + stats->bprc; 879 data[++i] = stats->uprc; 880 data[++i] = stats->mprc; 881 data[++i] = stats->bprc; 882 data[++i] = stats->erpt; 883 data[++i] = stats->uptc + stats->mptc + stats->bptc; 884 data[++i] = stats->uptc; 885 data[++i] = stats->mptc; 886 data[++i] = stats->bptc; 887 data[++i] = stats->ubrc; 888 data[++i] = stats->ubtc; 889 data[++i] = stats->mbrc; 890 data[++i] = stats->mbtc; 891 data[++i] = stats->bbrc; 892 data[++i] = stats->bbtc; 893 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc; 894 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc; 895 data[++i] = stats->dma_pkt_rc; 896 data[++i] = stats->dma_pkt_tc; 897 data[++i] = stats->dma_oct_rc; 898 data[++i] = stats->dma_oct_tc; 899 data[++i] = stats->dpc; 900 901 i++; 902 903 data += i; 904 905 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { 906 for (i = 0U, aq_vec = self->aq_vec[0]; 907 aq_vec && self->aq_vecs > i; 908 ++i, aq_vec = self->aq_vec[i]) { 909 data += count; 910 aq_vec_get_sw_stats(aq_vec, tc, data, &count); 911 } 912 } 913 914 data += count; 915 916 err_exit:; 917 return data; 918 } 919 920 static void aq_nic_update_ndev_stats(struct aq_nic_s *self) 921 { 922 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw); 923 struct net_device *ndev = self->ndev; 924 925 ndev->stats.rx_packets = stats->dma_pkt_rc; 926 ndev->stats.rx_bytes = stats->dma_oct_rc; 927 ndev->stats.rx_errors = stats->erpr; 928 ndev->stats.rx_dropped = stats->dpc; 929 ndev->stats.tx_packets = stats->dma_pkt_tc; 930 ndev->stats.tx_bytes = stats->dma_oct_tc; 931 ndev->stats.tx_errors = stats->erpt; 932 ndev->stats.multicast = stats->mprc; 933 } 934 935 void aq_nic_get_link_ksettings(struct aq_nic_s *self, 936 struct ethtool_link_ksettings *cmd) 937 { 938 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 939 cmd->base.port = PORT_FIBRE; 940 else 941 cmd->base.port = PORT_TP; 942 /* This driver supports only 10G capable adapters, so DUPLEX_FULL */ 943 cmd->base.duplex = DUPLEX_FULL; 944 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg; 945 946 ethtool_link_ksettings_zero_link_mode(cmd, supported); 947 948 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G) 949 ethtool_link_ksettings_add_link_mode(cmd, supported, 950 10000baseT_Full); 951 952 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G) 953 ethtool_link_ksettings_add_link_mode(cmd, supported, 954 5000baseT_Full); 955 956 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5) 957 ethtool_link_ksettings_add_link_mode(cmd, supported, 958 2500baseT_Full); 959 960 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G) 961 ethtool_link_ksettings_add_link_mode(cmd, supported, 962 1000baseT_Full); 963 964 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M) 965 ethtool_link_ksettings_add_link_mode(cmd, supported, 966 100baseT_Full); 967 968 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M) 969 ethtool_link_ksettings_add_link_mode(cmd, supported, 970 10baseT_Full); 971 972 if (self->aq_nic_cfg.aq_hw_caps->flow_control) { 973 ethtool_link_ksettings_add_link_mode(cmd, supported, 974 Pause); 975 ethtool_link_ksettings_add_link_mode(cmd, supported, 976 Asym_Pause); 977 } 978 979 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 980 981 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 982 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 983 else 984 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 985 986 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 987 988 if (self->aq_nic_cfg.is_autoneg) 989 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 990 991 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G) 992 ethtool_link_ksettings_add_link_mode(cmd, advertising, 993 10000baseT_Full); 994 995 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G) 996 ethtool_link_ksettings_add_link_mode(cmd, advertising, 997 5000baseT_Full); 998 999 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5) 1000 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1001 2500baseT_Full); 1002 1003 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G) 1004 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1005 1000baseT_Full); 1006 1007 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M) 1008 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1009 100baseT_Full); 1010 1011 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M) 1012 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1013 10baseT_Full); 1014 1015 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX) 1016 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1017 Pause); 1018 1019 /* Asym is when either RX or TX, but not both */ 1020 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^ 1021 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)) 1022 ethtool_link_ksettings_add_link_mode(cmd, advertising, 1023 Asym_Pause); 1024 1025 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE) 1026 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 1027 else 1028 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 1029 } 1030 1031 int aq_nic_set_link_ksettings(struct aq_nic_s *self, 1032 const struct ethtool_link_ksettings *cmd) 1033 { 1034 u32 speed = 0U; 1035 u32 rate = 0U; 1036 int err = 0; 1037 1038 if (cmd->base.autoneg == AUTONEG_ENABLE) { 1039 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk; 1040 self->aq_nic_cfg.is_autoneg = true; 1041 } else { 1042 speed = cmd->base.speed; 1043 1044 switch (speed) { 1045 case SPEED_10: 1046 rate = AQ_NIC_RATE_10M; 1047 break; 1048 1049 case SPEED_100: 1050 rate = AQ_NIC_RATE_100M; 1051 break; 1052 1053 case SPEED_1000: 1054 rate = AQ_NIC_RATE_1G; 1055 break; 1056 1057 case SPEED_2500: 1058 rate = AQ_NIC_RATE_2G5; 1059 break; 1060 1061 case SPEED_5000: 1062 rate = AQ_NIC_RATE_5G; 1063 break; 1064 1065 case SPEED_10000: 1066 rate = AQ_NIC_RATE_10G; 1067 break; 1068 1069 default: 1070 err = -1; 1071 goto err_exit; 1072 break; 1073 } 1074 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) { 1075 err = -1; 1076 goto err_exit; 1077 } 1078 1079 self->aq_nic_cfg.is_autoneg = false; 1080 } 1081 1082 mutex_lock(&self->fwreq_mutex); 1083 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate); 1084 mutex_unlock(&self->fwreq_mutex); 1085 if (err < 0) 1086 goto err_exit; 1087 1088 self->aq_nic_cfg.link_speed_msk = rate; 1089 1090 err_exit: 1091 return err; 1092 } 1093 1094 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self) 1095 { 1096 return &self->aq_nic_cfg; 1097 } 1098 1099 u32 aq_nic_get_fw_version(struct aq_nic_s *self) 1100 { 1101 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw); 1102 } 1103 1104 int aq_nic_set_loopback(struct aq_nic_s *self) 1105 { 1106 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1107 1108 if (!self->aq_hw_ops->hw_set_loopback || 1109 !self->aq_fw_ops->set_phyloopback) 1110 return -ENOTSUPP; 1111 1112 mutex_lock(&self->fwreq_mutex); 1113 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1114 AQ_HW_LOOPBACK_DMA_SYS, 1115 !!(cfg->priv_flags & 1116 BIT(AQ_HW_LOOPBACK_DMA_SYS))); 1117 1118 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1119 AQ_HW_LOOPBACK_PKT_SYS, 1120 !!(cfg->priv_flags & 1121 BIT(AQ_HW_LOOPBACK_PKT_SYS))); 1122 1123 self->aq_hw_ops->hw_set_loopback(self->aq_hw, 1124 AQ_HW_LOOPBACK_DMA_NET, 1125 !!(cfg->priv_flags & 1126 BIT(AQ_HW_LOOPBACK_DMA_NET))); 1127 1128 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1129 AQ_HW_LOOPBACK_PHYINT_SYS, 1130 !!(cfg->priv_flags & 1131 BIT(AQ_HW_LOOPBACK_PHYINT_SYS))); 1132 1133 self->aq_fw_ops->set_phyloopback(self->aq_hw, 1134 AQ_HW_LOOPBACK_PHYEXT_SYS, 1135 !!(cfg->priv_flags & 1136 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))); 1137 mutex_unlock(&self->fwreq_mutex); 1138 1139 return 0; 1140 } 1141 1142 int aq_nic_stop(struct aq_nic_s *self) 1143 { 1144 struct aq_vec_s *aq_vec = NULL; 1145 unsigned int i = 0U; 1146 1147 netif_tx_disable(self->ndev); 1148 netif_carrier_off(self->ndev); 1149 1150 del_timer_sync(&self->service_timer); 1151 cancel_work_sync(&self->service_task); 1152 1153 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK); 1154 1155 if (self->aq_nic_cfg.is_polling) 1156 del_timer_sync(&self->polling_timer); 1157 else 1158 aq_pci_func_free_irqs(self); 1159 1160 aq_ptp_irq_free(self); 1161 1162 for (i = 0U, aq_vec = self->aq_vec[0]; 1163 self->aq_vecs > i; ++i, aq_vec = self->aq_vec[i]) 1164 aq_vec_stop(aq_vec); 1165 1166 aq_ptp_ring_stop(self); 1167 1168 return self->aq_hw_ops->hw_stop(self->aq_hw); 1169 } 1170 1171 void aq_nic_set_power(struct aq_nic_s *self) 1172 { 1173 if (self->power_state != AQ_HW_POWER_STATE_D0 || 1174 self->aq_hw->aq_nic_cfg->wol) 1175 if (likely(self->aq_fw_ops->set_power)) { 1176 mutex_lock(&self->fwreq_mutex); 1177 self->aq_fw_ops->set_power(self->aq_hw, 1178 self->power_state, 1179 self->ndev->dev_addr); 1180 mutex_unlock(&self->fwreq_mutex); 1181 } 1182 } 1183 1184 void aq_nic_deinit(struct aq_nic_s *self, bool link_down) 1185 { 1186 struct aq_vec_s *aq_vec = NULL; 1187 unsigned int i = 0U; 1188 1189 if (!self) 1190 goto err_exit; 1191 1192 for (i = 0U; i < self->aq_vecs; i++) { 1193 aq_vec = self->aq_vec[i]; 1194 aq_vec_deinit(aq_vec); 1195 aq_vec_ring_free(aq_vec); 1196 } 1197 1198 aq_ptp_unregister(self); 1199 aq_ptp_ring_deinit(self); 1200 aq_ptp_ring_free(self); 1201 aq_ptp_free(self); 1202 1203 if (likely(self->aq_fw_ops->deinit) && link_down) { 1204 mutex_lock(&self->fwreq_mutex); 1205 self->aq_fw_ops->deinit(self->aq_hw); 1206 mutex_unlock(&self->fwreq_mutex); 1207 } 1208 1209 err_exit:; 1210 } 1211 1212 void aq_nic_free_vectors(struct aq_nic_s *self) 1213 { 1214 unsigned int i = 0U; 1215 1216 if (!self) 1217 goto err_exit; 1218 1219 for (i = ARRAY_SIZE(self->aq_vec); i--;) { 1220 if (self->aq_vec[i]) { 1221 aq_vec_free(self->aq_vec[i]); 1222 self->aq_vec[i] = NULL; 1223 } 1224 } 1225 1226 err_exit:; 1227 } 1228 1229 int aq_nic_realloc_vectors(struct aq_nic_s *self) 1230 { 1231 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self); 1232 1233 aq_nic_free_vectors(self); 1234 1235 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) { 1236 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs, 1237 cfg); 1238 if (unlikely(!self->aq_vec[self->aq_vecs])) 1239 return -ENOMEM; 1240 } 1241 1242 return 0; 1243 } 1244 1245 void aq_nic_shutdown(struct aq_nic_s *self) 1246 { 1247 int err = 0; 1248 1249 if (!self->ndev) 1250 return; 1251 1252 rtnl_lock(); 1253 1254 netif_device_detach(self->ndev); 1255 1256 if (netif_running(self->ndev)) { 1257 err = aq_nic_stop(self); 1258 if (err < 0) 1259 goto err_exit; 1260 } 1261 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol); 1262 aq_nic_set_power(self); 1263 1264 err_exit: 1265 rtnl_unlock(); 1266 } 1267 1268 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type) 1269 { 1270 u8 location = 0xFF; 1271 u32 fltr_cnt; 1272 u32 n_bit; 1273 1274 switch (type) { 1275 case aq_rx_filter_ethertype: 1276 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT - 1277 self->aq_hw_rx_fltrs.fet_reserved_count; 1278 self->aq_hw_rx_fltrs.fet_reserved_count++; 1279 break; 1280 case aq_rx_filter_l3l4: 1281 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4; 1282 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count; 1283 1284 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit); 1285 self->aq_hw_rx_fltrs.fl3l4.reserved_count++; 1286 location = n_bit; 1287 break; 1288 default: 1289 break; 1290 } 1291 1292 return location; 1293 } 1294 1295 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type, 1296 u32 location) 1297 { 1298 switch (type) { 1299 case aq_rx_filter_ethertype: 1300 self->aq_hw_rx_fltrs.fet_reserved_count--; 1301 break; 1302 case aq_rx_filter_l3l4: 1303 self->aq_hw_rx_fltrs.fl3l4.reserved_count--; 1304 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location); 1305 break; 1306 default: 1307 break; 1308 } 1309 } 1310 1311 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) 1312 { 1313 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1314 const unsigned int prev_vecs = cfg->vecs; 1315 bool ndev_running; 1316 int err = 0; 1317 int i; 1318 1319 /* if already the same configuration or 1320 * disable request (tcs is 0) and we already is disabled 1321 */ 1322 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) 1323 return 0; 1324 1325 ndev_running = netif_running(self->ndev); 1326 if (ndev_running) 1327 dev_close(self->ndev); 1328 1329 cfg->tcs = tcs; 1330 if (cfg->tcs == 0) 1331 cfg->tcs = 1; 1332 if (prio_tc_map) 1333 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map)); 1334 else 1335 for (i = 0; i < sizeof(cfg->prio_tc_map); i++) 1336 cfg->prio_tc_map[i] = cfg->tcs * i / 8; 1337 1338 cfg->is_qos = (tcs != 0 ? true : false); 1339 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC); 1340 if (!cfg->is_ptp) 1341 netdev_warn(self->ndev, "%s\n", 1342 "PTP is auto disabled due to requested TC count."); 1343 1344 netdev_set_num_tc(self->ndev, cfg->tcs); 1345 1346 /* Changing the number of TCs might change the number of vectors */ 1347 aq_nic_cfg_update_num_vecs(self); 1348 if (prev_vecs != cfg->vecs) { 1349 err = aq_nic_realloc_vectors(self); 1350 if (err) 1351 goto err_exit; 1352 } 1353 1354 if (ndev_running) 1355 err = dev_open(self->ndev, NULL); 1356 1357 err_exit: 1358 return err; 1359 } 1360 1361 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc, 1362 const u32 max_rate) 1363 { 1364 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1365 1366 if (tc >= AQ_CFG_TCS_MAX) 1367 return -EINVAL; 1368 1369 if (max_rate && max_rate < 10) { 1370 netdev_warn(self->ndev, 1371 "Setting %s to the minimum usable value of %dMbps.\n", 1372 "max rate", 10); 1373 cfg->tc_max_rate[tc] = 10; 1374 } else { 1375 cfg->tc_max_rate[tc] = max_rate; 1376 } 1377 1378 return 0; 1379 } 1380 1381 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc, 1382 const u32 min_rate) 1383 { 1384 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; 1385 1386 if (tc >= AQ_CFG_TCS_MAX) 1387 return -EINVAL; 1388 1389 if (min_rate) 1390 set_bit(tc, &cfg->tc_min_rate_msk); 1391 else 1392 clear_bit(tc, &cfg->tc_min_rate_msk); 1393 1394 if (min_rate && min_rate < 20) { 1395 netdev_warn(self->ndev, 1396 "Setting %s to the minimum usable value of %dMbps.\n", 1397 "min rate", 20); 1398 cfg->tc_min_rate[tc] = 20; 1399 } else { 1400 cfg->tc_min_rate[tc] = min_rate; 1401 } 1402 1403 return 0; 1404 } 1405