1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * aQuantia Corporation Network Driver 4 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved 5 */ 6 7 /* File aq_hw.h: Declaration of abstract interface for NIC hardware specific 8 * functions. 9 */ 10 11 #ifndef AQ_HW_H 12 #define AQ_HW_H 13 14 #include "aq_common.h" 15 #include "aq_rss.h" 16 #include "hw_atl/hw_atl_utils.h" 17 18 #define AQ_RX_FIRST_LOC_FVLANID 0U 19 #define AQ_RX_LAST_LOC_FVLANID 15U 20 #define AQ_RX_FIRST_LOC_FETHERT 16U 21 #define AQ_RX_LAST_LOC_FETHERT 31U 22 #define AQ_RX_FIRST_LOC_FL3L4 32U 23 #define AQ_RX_LAST_LOC_FL3L4 39U 24 #define AQ_RX_MAX_RXNFC_LOC AQ_RX_LAST_LOC_FL3L4 25 #define AQ_VLAN_MAX_FILTERS \ 26 (AQ_RX_LAST_LOC_FVLANID - AQ_RX_FIRST_LOC_FVLANID + 1U) 27 #define AQ_RX_QUEUE_NOT_ASSIGNED 0xFFU 28 29 /* NIC H/W capabilities */ 30 struct aq_hw_caps_s { 31 u64 hw_features; 32 u64 link_speed_msk; 33 unsigned int hw_priv_flags; 34 u32 media_type; 35 u32 rxds_max; 36 u32 txds_max; 37 u32 rxds_min; 38 u32 txds_min; 39 u32 txhwb_alignment; 40 u32 irq_mask; 41 u32 vecs; 42 u32 mtu; 43 u32 mac_regs_count; 44 u32 hw_alive_check_addr; 45 u8 msix_irqs; 46 u8 tcs; 47 u8 rxd_alignment; 48 u8 rxd_size; 49 u8 txd_alignment; 50 u8 txd_size; 51 u8 tx_rings; 52 u8 rx_rings; 53 bool flow_control; 54 bool is_64_dma; 55 }; 56 57 struct aq_hw_link_status_s { 58 unsigned int mbps; 59 }; 60 61 struct aq_stats_s { 62 u64 uprc; 63 u64 mprc; 64 u64 bprc; 65 u64 erpt; 66 u64 uptc; 67 u64 mptc; 68 u64 bptc; 69 u64 erpr; 70 u64 mbtc; 71 u64 bbtc; 72 u64 mbrc; 73 u64 bbrc; 74 u64 ubrc; 75 u64 ubtc; 76 u64 dpc; 77 u64 dma_pkt_rc; 78 u64 dma_pkt_tc; 79 u64 dma_oct_rc; 80 u64 dma_oct_tc; 81 }; 82 83 #define AQ_HW_IRQ_INVALID 0U 84 #define AQ_HW_IRQ_LEGACY 1U 85 #define AQ_HW_IRQ_MSI 2U 86 #define AQ_HW_IRQ_MSIX 3U 87 88 #define AQ_HW_SERVICE_IRQS 1U 89 90 #define AQ_HW_POWER_STATE_D0 0U 91 #define AQ_HW_POWER_STATE_D3 3U 92 93 #define AQ_HW_FLAG_STARTED 0x00000004U 94 #define AQ_HW_FLAG_STOPPING 0x00000008U 95 #define AQ_HW_FLAG_RESETTING 0x00000010U 96 #define AQ_HW_FLAG_CLOSING 0x00000020U 97 #define AQ_HW_LINK_DOWN 0x04000000U 98 #define AQ_HW_FLAG_ERR_UNPLUG 0x40000000U 99 #define AQ_HW_FLAG_ERR_HW 0x80000000U 100 101 #define AQ_HW_FLAG_ERRORS (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG) 102 103 #define AQ_NIC_FLAGS_IS_NOT_READY (AQ_NIC_FLAG_STOPPING | \ 104 AQ_NIC_FLAG_RESETTING | AQ_NIC_FLAG_CLOSING | \ 105 AQ_NIC_FLAG_ERR_UNPLUG | AQ_NIC_FLAG_ERR_HW) 106 107 #define AQ_NIC_FLAGS_IS_NOT_TX_READY (AQ_NIC_FLAGS_IS_NOT_READY | \ 108 AQ_NIC_LINK_DOWN) 109 110 #define AQ_HW_MEDIA_TYPE_TP 1U 111 #define AQ_HW_MEDIA_TYPE_FIBRE 2U 112 113 #define AQ_HW_TXD_MULTIPLE 8U 114 #define AQ_HW_RXD_MULTIPLE 8U 115 116 #define AQ_HW_MULTICAST_ADDRESS_MAX 32U 117 118 struct aq_hw_s { 119 atomic_t flags; 120 u8 rbl_enabled:1; 121 struct aq_nic_cfg_s *aq_nic_cfg; 122 const struct aq_fw_ops *aq_fw_ops; 123 void __iomem *mmio; 124 struct aq_hw_link_status_s aq_link_status; 125 struct hw_atl_utils_mbox mbox; 126 struct hw_atl_stats_s last_stats; 127 struct aq_stats_s curr_stats; 128 u64 speed; 129 u32 itr_tx; 130 u32 itr_rx; 131 unsigned int chip_features; 132 u32 fw_ver_actual; 133 atomic_t dpc; 134 u32 mbox_addr; 135 u32 rpc_addr; 136 u32 rpc_tid; 137 struct hw_atl_utils_fw_rpc rpc; 138 }; 139 140 struct aq_ring_s; 141 struct aq_ring_param_s; 142 struct sk_buff; 143 struct aq_rx_filter_l3l4; 144 145 struct aq_hw_ops { 146 147 int (*hw_ring_tx_xmit)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 148 unsigned int frags); 149 150 int (*hw_ring_rx_receive)(struct aq_hw_s *self, 151 struct aq_ring_s *aq_ring); 152 153 int (*hw_ring_rx_fill)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 154 unsigned int sw_tail_old); 155 156 int (*hw_ring_tx_head_update)(struct aq_hw_s *self, 157 struct aq_ring_s *aq_ring); 158 159 int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr); 160 161 int (*hw_reset)(struct aq_hw_s *self); 162 163 int (*hw_init)(struct aq_hw_s *self, u8 *mac_addr); 164 165 int (*hw_start)(struct aq_hw_s *self); 166 167 int (*hw_stop)(struct aq_hw_s *self); 168 169 int (*hw_ring_tx_init)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 170 struct aq_ring_param_s *aq_ring_param); 171 172 int (*hw_ring_tx_start)(struct aq_hw_s *self, 173 struct aq_ring_s *aq_ring); 174 175 int (*hw_ring_tx_stop)(struct aq_hw_s *self, 176 struct aq_ring_s *aq_ring); 177 178 int (*hw_ring_rx_init)(struct aq_hw_s *self, 179 struct aq_ring_s *aq_ring, 180 struct aq_ring_param_s *aq_ring_param); 181 182 int (*hw_ring_rx_start)(struct aq_hw_s *self, 183 struct aq_ring_s *aq_ring); 184 185 int (*hw_ring_rx_stop)(struct aq_hw_s *self, 186 struct aq_ring_s *aq_ring); 187 188 int (*hw_irq_enable)(struct aq_hw_s *self, u64 mask); 189 190 int (*hw_irq_disable)(struct aq_hw_s *self, u64 mask); 191 192 int (*hw_irq_read)(struct aq_hw_s *self, u64 *mask); 193 194 int (*hw_packet_filter_set)(struct aq_hw_s *self, 195 unsigned int packet_filter); 196 197 int (*hw_filter_l3l4_set)(struct aq_hw_s *self, 198 struct aq_rx_filter_l3l4 *data); 199 200 int (*hw_filter_l3l4_clear)(struct aq_hw_s *self, 201 struct aq_rx_filter_l3l4 *data); 202 203 int (*hw_filter_l2_set)(struct aq_hw_s *self, 204 struct aq_rx_filter_l2 *data); 205 206 int (*hw_filter_l2_clear)(struct aq_hw_s *self, 207 struct aq_rx_filter_l2 *data); 208 209 int (*hw_filter_vlan_set)(struct aq_hw_s *self, 210 struct aq_rx_filter_vlan *aq_vlans); 211 212 int (*hw_filter_vlan_ctrl)(struct aq_hw_s *self, bool enable); 213 214 int (*hw_multicast_list_set)(struct aq_hw_s *self, 215 u8 ar_mac[AQ_HW_MULTICAST_ADDRESS_MAX] 216 [ETH_ALEN], 217 u32 count); 218 219 int (*hw_interrupt_moderation_set)(struct aq_hw_s *self); 220 221 int (*hw_rss_set)(struct aq_hw_s *self, 222 struct aq_rss_parameters *rss_params); 223 224 int (*hw_rss_hash_set)(struct aq_hw_s *self, 225 struct aq_rss_parameters *rss_params); 226 227 int (*hw_get_regs)(struct aq_hw_s *self, 228 const struct aq_hw_caps_s *aq_hw_caps, 229 u32 *regs_buff); 230 231 struct aq_stats_s *(*hw_get_hw_stats)(struct aq_hw_s *self); 232 233 int (*hw_get_fw_version)(struct aq_hw_s *self, u32 *fw_version); 234 235 int (*hw_set_offload)(struct aq_hw_s *self, 236 struct aq_nic_cfg_s *aq_nic_cfg); 237 238 int (*hw_set_fc)(struct aq_hw_s *self, u32 fc, u32 tc); 239 }; 240 241 struct aq_fw_ops { 242 int (*init)(struct aq_hw_s *self); 243 244 int (*deinit)(struct aq_hw_s *self); 245 246 int (*reset)(struct aq_hw_s *self); 247 248 int (*renegotiate)(struct aq_hw_s *self); 249 250 int (*get_mac_permanent)(struct aq_hw_s *self, u8 *mac); 251 252 int (*set_link_speed)(struct aq_hw_s *self, u32 speed); 253 254 int (*set_state)(struct aq_hw_s *self, 255 enum hal_atl_utils_fw_state_e state); 256 257 int (*update_link_status)(struct aq_hw_s *self); 258 259 int (*update_stats)(struct aq_hw_s *self); 260 261 int (*get_phy_temp)(struct aq_hw_s *self, int *temp); 262 263 u32 (*get_flow_control)(struct aq_hw_s *self, u32 *fcmode); 264 265 int (*set_flow_control)(struct aq_hw_s *self); 266 267 int (*set_power)(struct aq_hw_s *self, unsigned int power_state, 268 u8 *mac); 269 270 int (*set_eee_rate)(struct aq_hw_s *self, u32 speed); 271 272 int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate, 273 u32 *supported_rates); 274 }; 275 276 #endif /* AQ_HW_H */ 277