1 /* 2 * aQuantia Corporation Network Driver 3 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 */ 9 10 /* File aq_hw.h: Declaration of abstract interface for NIC hardware specific 11 * functions. 12 */ 13 14 #ifndef AQ_HW_H 15 #define AQ_HW_H 16 17 #include "aq_common.h" 18 #include "aq_rss.h" 19 #include "hw_atl/hw_atl_utils.h" 20 21 /* NIC H/W capabilities */ 22 struct aq_hw_caps_s { 23 u64 hw_features; 24 u64 link_speed_msk; 25 unsigned int hw_priv_flags; 26 u32 media_type; 27 u32 rxds; 28 u32 txds; 29 u32 txhwb_alignment; 30 u32 irq_mask; 31 u32 vecs; 32 u32 mtu; 33 u32 mac_regs_count; 34 u32 hw_alive_check_addr; 35 u8 msix_irqs; 36 u8 tcs; 37 u8 rxd_alignment; 38 u8 rxd_size; 39 u8 txd_alignment; 40 u8 txd_size; 41 u8 tx_rings; 42 u8 rx_rings; 43 bool flow_control; 44 bool is_64_dma; 45 }; 46 47 struct aq_hw_link_status_s { 48 unsigned int mbps; 49 }; 50 51 struct aq_stats_s { 52 u64 uprc; 53 u64 mprc; 54 u64 bprc; 55 u64 erpt; 56 u64 uptc; 57 u64 mptc; 58 u64 bptc; 59 u64 erpr; 60 u64 mbtc; 61 u64 bbtc; 62 u64 mbrc; 63 u64 bbrc; 64 u64 ubrc; 65 u64 ubtc; 66 u64 dpc; 67 u64 dma_pkt_rc; 68 u64 dma_pkt_tc; 69 u64 dma_oct_rc; 70 u64 dma_oct_tc; 71 }; 72 73 #define AQ_HW_IRQ_INVALID 0U 74 #define AQ_HW_IRQ_LEGACY 1U 75 #define AQ_HW_IRQ_MSI 2U 76 #define AQ_HW_IRQ_MSIX 3U 77 78 #define AQ_HW_POWER_STATE_D0 0U 79 #define AQ_HW_POWER_STATE_D3 3U 80 81 #define AQ_HW_FLAG_STARTED 0x00000004U 82 #define AQ_HW_FLAG_STOPPING 0x00000008U 83 #define AQ_HW_FLAG_RESETTING 0x00000010U 84 #define AQ_HW_FLAG_CLOSING 0x00000020U 85 #define AQ_HW_LINK_DOWN 0x04000000U 86 #define AQ_HW_FLAG_ERR_UNPLUG 0x40000000U 87 #define AQ_HW_FLAG_ERR_HW 0x80000000U 88 89 #define AQ_HW_FLAG_ERRORS (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG) 90 91 #define AQ_NIC_FLAGS_IS_NOT_READY (AQ_NIC_FLAG_STOPPING | \ 92 AQ_NIC_FLAG_RESETTING | AQ_NIC_FLAG_CLOSING | \ 93 AQ_NIC_FLAG_ERR_UNPLUG | AQ_NIC_FLAG_ERR_HW) 94 95 #define AQ_NIC_FLAGS_IS_NOT_TX_READY (AQ_NIC_FLAGS_IS_NOT_READY | \ 96 AQ_NIC_LINK_DOWN) 97 98 #define AQ_HW_MEDIA_TYPE_TP 1U 99 #define AQ_HW_MEDIA_TYPE_FIBRE 2U 100 101 struct aq_hw_s { 102 atomic_t flags; 103 u8 rbl_enabled:1; 104 struct aq_nic_cfg_s *aq_nic_cfg; 105 const struct aq_fw_ops *aq_fw_ops; 106 void __iomem *mmio; 107 struct aq_hw_link_status_s aq_link_status; 108 struct hw_aq_atl_utils_mbox mbox; 109 struct hw_atl_stats_s last_stats; 110 struct aq_stats_s curr_stats; 111 u64 speed; 112 u32 itr_tx; 113 u32 itr_rx; 114 unsigned int chip_features; 115 u32 fw_ver_actual; 116 atomic_t dpc; 117 u32 mbox_addr; 118 u32 rpc_addr; 119 u32 rpc_tid; 120 struct hw_aq_atl_utils_fw_rpc rpc; 121 }; 122 123 struct aq_ring_s; 124 struct aq_ring_param_s; 125 struct sk_buff; 126 127 struct aq_hw_ops { 128 129 int (*hw_ring_tx_xmit)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 130 unsigned int frags); 131 132 int (*hw_ring_rx_receive)(struct aq_hw_s *self, 133 struct aq_ring_s *aq_ring); 134 135 int (*hw_ring_rx_fill)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 136 unsigned int sw_tail_old); 137 138 int (*hw_ring_tx_head_update)(struct aq_hw_s *self, 139 struct aq_ring_s *aq_ring); 140 141 int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr); 142 143 int (*hw_reset)(struct aq_hw_s *self); 144 145 int (*hw_init)(struct aq_hw_s *self, u8 *mac_addr); 146 147 int (*hw_start)(struct aq_hw_s *self); 148 149 int (*hw_stop)(struct aq_hw_s *self); 150 151 int (*hw_ring_tx_init)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 152 struct aq_ring_param_s *aq_ring_param); 153 154 int (*hw_ring_tx_start)(struct aq_hw_s *self, 155 struct aq_ring_s *aq_ring); 156 157 int (*hw_ring_tx_stop)(struct aq_hw_s *self, 158 struct aq_ring_s *aq_ring); 159 160 int (*hw_ring_rx_init)(struct aq_hw_s *self, 161 struct aq_ring_s *aq_ring, 162 struct aq_ring_param_s *aq_ring_param); 163 164 int (*hw_ring_rx_start)(struct aq_hw_s *self, 165 struct aq_ring_s *aq_ring); 166 167 int (*hw_ring_rx_stop)(struct aq_hw_s *self, 168 struct aq_ring_s *aq_ring); 169 170 int (*hw_irq_enable)(struct aq_hw_s *self, u64 mask); 171 172 int (*hw_irq_disable)(struct aq_hw_s *self, u64 mask); 173 174 int (*hw_irq_read)(struct aq_hw_s *self, u64 *mask); 175 176 int (*hw_packet_filter_set)(struct aq_hw_s *self, 177 unsigned int packet_filter); 178 179 int (*hw_multicast_list_set)(struct aq_hw_s *self, 180 u8 ar_mac[AQ_CFG_MULTICAST_ADDRESS_MAX] 181 [ETH_ALEN], 182 u32 count); 183 184 int (*hw_interrupt_moderation_set)(struct aq_hw_s *self); 185 186 int (*hw_rss_set)(struct aq_hw_s *self, 187 struct aq_rss_parameters *rss_params); 188 189 int (*hw_rss_hash_set)(struct aq_hw_s *self, 190 struct aq_rss_parameters *rss_params); 191 192 int (*hw_get_regs)(struct aq_hw_s *self, 193 const struct aq_hw_caps_s *aq_hw_caps, 194 u32 *regs_buff); 195 196 struct aq_stats_s *(*hw_get_hw_stats)(struct aq_hw_s *self); 197 198 int (*hw_get_fw_version)(struct aq_hw_s *self, u32 *fw_version); 199 200 int (*hw_deinit)(struct aq_hw_s *self); 201 202 int (*hw_set_power)(struct aq_hw_s *self, unsigned int power_state); 203 }; 204 205 struct aq_fw_ops { 206 int (*init)(struct aq_hw_s *self); 207 208 int (*reset)(struct aq_hw_s *self); 209 210 int (*get_mac_permanent)(struct aq_hw_s *self, u8 *mac); 211 212 int (*set_link_speed)(struct aq_hw_s *self, u32 speed); 213 214 int (*set_state)(struct aq_hw_s *self, enum hal_atl_utils_fw_state_e state); 215 216 int (*update_link_status)(struct aq_hw_s *self); 217 218 int (*update_stats)(struct aq_hw_s *self); 219 }; 220 221 #endif /* AQ_HW_H */ 222