1 /* 2 * aQuantia Corporation Network Driver 3 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 */ 9 10 /* File aq_hw.h: Declaration of abstract interface for NIC hardware specific 11 * functions. 12 */ 13 14 #ifndef AQ_HW_H 15 #define AQ_HW_H 16 17 #include "aq_common.h" 18 #include "aq_rss.h" 19 #include "hw_atl/hw_atl_utils.h" 20 21 /* NIC H/W capabilities */ 22 struct aq_hw_caps_s { 23 u64 hw_features; 24 u64 link_speed_msk; 25 unsigned int hw_priv_flags; 26 u32 media_type; 27 u32 rxds_max; 28 u32 txds_max; 29 u32 rxds_min; 30 u32 txds_min; 31 u32 txhwb_alignment; 32 u32 irq_mask; 33 u32 vecs; 34 u32 mtu; 35 u32 mac_regs_count; 36 u32 hw_alive_check_addr; 37 u8 msix_irqs; 38 u8 tcs; 39 u8 rxd_alignment; 40 u8 rxd_size; 41 u8 txd_alignment; 42 u8 txd_size; 43 u8 tx_rings; 44 u8 rx_rings; 45 bool flow_control; 46 bool is_64_dma; 47 }; 48 49 struct aq_hw_link_status_s { 50 unsigned int mbps; 51 }; 52 53 struct aq_stats_s { 54 u64 uprc; 55 u64 mprc; 56 u64 bprc; 57 u64 erpt; 58 u64 uptc; 59 u64 mptc; 60 u64 bptc; 61 u64 erpr; 62 u64 mbtc; 63 u64 bbtc; 64 u64 mbrc; 65 u64 bbrc; 66 u64 ubrc; 67 u64 ubtc; 68 u64 dpc; 69 u64 dma_pkt_rc; 70 u64 dma_pkt_tc; 71 u64 dma_oct_rc; 72 u64 dma_oct_tc; 73 }; 74 75 #define AQ_HW_IRQ_INVALID 0U 76 #define AQ_HW_IRQ_LEGACY 1U 77 #define AQ_HW_IRQ_MSI 2U 78 #define AQ_HW_IRQ_MSIX 3U 79 80 #define AQ_HW_POWER_STATE_D0 0U 81 #define AQ_HW_POWER_STATE_D3 3U 82 83 #define AQ_HW_FLAG_STARTED 0x00000004U 84 #define AQ_HW_FLAG_STOPPING 0x00000008U 85 #define AQ_HW_FLAG_RESETTING 0x00000010U 86 #define AQ_HW_FLAG_CLOSING 0x00000020U 87 #define AQ_HW_LINK_DOWN 0x04000000U 88 #define AQ_HW_FLAG_ERR_UNPLUG 0x40000000U 89 #define AQ_HW_FLAG_ERR_HW 0x80000000U 90 91 #define AQ_HW_FLAG_ERRORS (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG) 92 93 #define AQ_NIC_FLAGS_IS_NOT_READY (AQ_NIC_FLAG_STOPPING | \ 94 AQ_NIC_FLAG_RESETTING | AQ_NIC_FLAG_CLOSING | \ 95 AQ_NIC_FLAG_ERR_UNPLUG | AQ_NIC_FLAG_ERR_HW) 96 97 #define AQ_NIC_FLAGS_IS_NOT_TX_READY (AQ_NIC_FLAGS_IS_NOT_READY | \ 98 AQ_NIC_LINK_DOWN) 99 100 #define AQ_HW_MEDIA_TYPE_TP 1U 101 #define AQ_HW_MEDIA_TYPE_FIBRE 2U 102 103 #define AQ_HW_TXD_MULTIPLE 8U 104 #define AQ_HW_RXD_MULTIPLE 8U 105 106 #define AQ_HW_MULTICAST_ADDRESS_MAX 32U 107 108 struct aq_hw_s { 109 atomic_t flags; 110 u8 rbl_enabled:1; 111 struct aq_nic_cfg_s *aq_nic_cfg; 112 const struct aq_fw_ops *aq_fw_ops; 113 void __iomem *mmio; 114 struct aq_hw_link_status_s aq_link_status; 115 struct hw_atl_utils_mbox mbox; 116 struct hw_atl_stats_s last_stats; 117 struct aq_stats_s curr_stats; 118 u64 speed; 119 u32 itr_tx; 120 u32 itr_rx; 121 unsigned int chip_features; 122 u32 fw_ver_actual; 123 atomic_t dpc; 124 u32 mbox_addr; 125 u32 rpc_addr; 126 u32 rpc_tid; 127 struct hw_atl_utils_fw_rpc rpc; 128 }; 129 130 struct aq_ring_s; 131 struct aq_ring_param_s; 132 struct sk_buff; 133 134 struct aq_hw_ops { 135 136 int (*hw_ring_tx_xmit)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 137 unsigned int frags); 138 139 int (*hw_ring_rx_receive)(struct aq_hw_s *self, 140 struct aq_ring_s *aq_ring); 141 142 int (*hw_ring_rx_fill)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 143 unsigned int sw_tail_old); 144 145 int (*hw_ring_tx_head_update)(struct aq_hw_s *self, 146 struct aq_ring_s *aq_ring); 147 148 int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr); 149 150 int (*hw_reset)(struct aq_hw_s *self); 151 152 int (*hw_init)(struct aq_hw_s *self, u8 *mac_addr); 153 154 int (*hw_start)(struct aq_hw_s *self); 155 156 int (*hw_stop)(struct aq_hw_s *self); 157 158 int (*hw_ring_tx_init)(struct aq_hw_s *self, struct aq_ring_s *aq_ring, 159 struct aq_ring_param_s *aq_ring_param); 160 161 int (*hw_ring_tx_start)(struct aq_hw_s *self, 162 struct aq_ring_s *aq_ring); 163 164 int (*hw_ring_tx_stop)(struct aq_hw_s *self, 165 struct aq_ring_s *aq_ring); 166 167 int (*hw_ring_rx_init)(struct aq_hw_s *self, 168 struct aq_ring_s *aq_ring, 169 struct aq_ring_param_s *aq_ring_param); 170 171 int (*hw_ring_rx_start)(struct aq_hw_s *self, 172 struct aq_ring_s *aq_ring); 173 174 int (*hw_ring_rx_stop)(struct aq_hw_s *self, 175 struct aq_ring_s *aq_ring); 176 177 int (*hw_irq_enable)(struct aq_hw_s *self, u64 mask); 178 179 int (*hw_irq_disable)(struct aq_hw_s *self, u64 mask); 180 181 int (*hw_irq_read)(struct aq_hw_s *self, u64 *mask); 182 183 int (*hw_packet_filter_set)(struct aq_hw_s *self, 184 unsigned int packet_filter); 185 186 int (*hw_multicast_list_set)(struct aq_hw_s *self, 187 u8 ar_mac[AQ_HW_MULTICAST_ADDRESS_MAX] 188 [ETH_ALEN], 189 u32 count); 190 191 int (*hw_interrupt_moderation_set)(struct aq_hw_s *self); 192 193 int (*hw_rss_set)(struct aq_hw_s *self, 194 struct aq_rss_parameters *rss_params); 195 196 int (*hw_rss_hash_set)(struct aq_hw_s *self, 197 struct aq_rss_parameters *rss_params); 198 199 int (*hw_get_regs)(struct aq_hw_s *self, 200 const struct aq_hw_caps_s *aq_hw_caps, 201 u32 *regs_buff); 202 203 struct aq_stats_s *(*hw_get_hw_stats)(struct aq_hw_s *self); 204 205 int (*hw_get_fw_version)(struct aq_hw_s *self, u32 *fw_version); 206 207 int (*hw_set_offload)(struct aq_hw_s *self, 208 struct aq_nic_cfg_s *aq_nic_cfg); 209 210 int (*hw_set_fc)(struct aq_hw_s *self, u32 fc, u32 tc); 211 }; 212 213 struct aq_fw_ops { 214 int (*init)(struct aq_hw_s *self); 215 216 int (*deinit)(struct aq_hw_s *self); 217 218 int (*reset)(struct aq_hw_s *self); 219 220 int (*renegotiate)(struct aq_hw_s *self); 221 222 int (*get_mac_permanent)(struct aq_hw_s *self, u8 *mac); 223 224 int (*set_link_speed)(struct aq_hw_s *self, u32 speed); 225 226 int (*set_state)(struct aq_hw_s *self, 227 enum hal_atl_utils_fw_state_e state); 228 229 int (*update_link_status)(struct aq_hw_s *self); 230 231 int (*update_stats)(struct aq_hw_s *self); 232 233 u32 (*get_flow_control)(struct aq_hw_s *self, u32 *fcmode); 234 235 int (*set_flow_control)(struct aq_hw_s *self); 236 237 int (*set_power)(struct aq_hw_s *self, unsigned int power_state, 238 u8 *mac); 239 240 int (*set_eee_rate)(struct aq_hw_s *self, u32 speed); 241 242 int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate, 243 u32 *supported_rates); 244 }; 245 246 #endif /* AQ_HW_H */ 247