1 /* 2 * AMD 10Gb Ethernet driver 3 * 4 * This file is available to you under your choice of the following two 5 * licenses: 6 * 7 * License 1: GPLv2 8 * 9 * Copyright (c) 2014 Advanced Micro Devices, Inc. 10 * 11 * This file is free software; you may copy, redistribute and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see <http://www.gnu.org/licenses/>. 23 * 24 * This file incorporates work covered by the following copyright and 25 * permission notice: 26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 28 * Inc. unless otherwise expressly agreed to in writing between Synopsys 29 * and you. 30 * 31 * The Software IS NOT an item of Licensed Software or Licensed Product 32 * under any End User Software License Agreement or Agreement for Licensed 33 * Product with Synopsys or any supplement thereto. Permission is hereby 34 * granted, free of charge, to any person obtaining a copy of this software 35 * annotated with this license and the Software, to deal in the Software 36 * without restriction, including without limitation the rights to use, 37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 38 * of the Software, and to permit persons to whom the Software is furnished 39 * to do so, subject to the following conditions: 40 * 41 * The above copyright notice and this permission notice shall be included 42 * in all copies or substantial portions of the Software. 43 * 44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 54 * THE POSSIBILITY OF SUCH DAMAGE. 55 * 56 * 57 * License 2: Modified BSD 58 * 59 * Copyright (c) 2014 Advanced Micro Devices, Inc. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions are met: 64 * * Redistributions of source code must retain the above copyright 65 * notice, this list of conditions and the following disclaimer. 66 * * Redistributions in binary form must reproduce the above copyright 67 * notice, this list of conditions and the following disclaimer in the 68 * documentation and/or other materials provided with the distribution. 69 * * Neither the name of Advanced Micro Devices, Inc. nor the 70 * names of its contributors may be used to endorse or promote products 71 * derived from this software without specific prior written permission. 72 * 73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY 77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 83 * 84 * This file incorporates work covered by the following copyright and 85 * permission notice: 86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 88 * Inc. unless otherwise expressly agreed to in writing between Synopsys 89 * and you. 90 * 91 * The Software IS NOT an item of Licensed Software or Licensed Product 92 * under any End User Software License Agreement or Agreement for Licensed 93 * Product with Synopsys or any supplement thereto. Permission is hereby 94 * granted, free of charge, to any person obtaining a copy of this software 95 * annotated with this license and the Software, to deal in the Software 96 * without restriction, including without limitation the rights to use, 97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 98 * of the Software, and to permit persons to whom the Software is furnished 99 * to do so, subject to the following conditions: 100 * 101 * The above copyright notice and this permission notice shall be included 102 * in all copies or substantial portions of the Software. 103 * 104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 114 * THE POSSIBILITY OF SUCH DAMAGE. 115 */ 116 117 #ifndef __XGBE_H__ 118 #define __XGBE_H__ 119 120 #include <linux/dma-mapping.h> 121 #include <linux/netdevice.h> 122 #include <linux/workqueue.h> 123 #include <linux/phy.h> 124 125 126 #define XGBE_DRV_NAME "amd-xgbe" 127 #define XGBE_DRV_VERSION "1.0.0-a" 128 #define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver" 129 130 /* Descriptor related defines */ 131 #define TX_DESC_CNT 512 132 #define TX_DESC_MIN_FREE (TX_DESC_CNT >> 3) 133 #define TX_DESC_MAX_PROC (TX_DESC_CNT >> 1) 134 #define RX_DESC_CNT 512 135 136 #define TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1)) 137 138 #define RX_MIN_BUF_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN) 139 #define RX_BUF_ALIGN 64 140 141 #define XGBE_MAX_DMA_CHANNELS 16 142 #define DMA_ARDOMAIN_SETTING 0x2 143 #define DMA_ARCACHE_SETTING 0xb 144 #define DMA_AWDOMAIN_SETTING 0x2 145 #define DMA_AWCACHE_SETTING 0x7 146 #define DMA_INTERRUPT_MASK 0x31c7 147 148 #define XGMAC_MIN_PACKET 60 149 #define XGMAC_STD_PACKET_MTU 1500 150 #define XGMAC_MAX_STD_PACKET 1518 151 #define XGMAC_JUMBO_PACKET_MTU 9000 152 #define XGMAC_MAX_JUMBO_PACKET 9018 153 154 #define MAX_MULTICAST_LIST 14 155 #define TX_FLAGS_IP_PKT 0x00000001 156 #define TX_FLAGS_TCP_PKT 0x00000002 157 158 /* MDIO bus phy name */ 159 #define XGBE_PHY_NAME "amd_xgbe_phy" 160 #define XGBE_PRTAD 0 161 162 /* Driver PMT macros */ 163 #define XGMAC_DRIVER_CONTEXT 1 164 #define XGMAC_IOCTL_CONTEXT 2 165 166 #define FIFO_SIZE_B(x) (x) 167 #define FIFO_SIZE_KB(x) (x * 1024) 168 169 #define XGBE_TC_CNT 2 170 171 /* Helper macro for descriptor handling 172 * Always use GET_DESC_DATA to access the descriptor data 173 * since the index is free-running and needs to be and-ed 174 * with the descriptor count value of the ring to index to 175 * the proper descriptor data. 176 */ 177 #define GET_DESC_DATA(_ring, _idx) \ 178 ((_ring)->rdata + \ 179 ((_idx) & ((_ring)->rdesc_count - 1))) 180 181 182 /* Default coalescing parameters */ 183 #define XGMAC_INIT_DMA_TX_USECS 100 184 #define XGMAC_INIT_DMA_TX_FRAMES 16 185 186 #define XGMAC_MAX_DMA_RIWT 0xff 187 #define XGMAC_INIT_DMA_RX_USECS 100 188 #define XGMAC_INIT_DMA_RX_FRAMES 16 189 190 /* Flow control queue count */ 191 #define XGMAC_MAX_FLOW_CONTROL_QUEUES 8 192 193 194 struct xgbe_prv_data; 195 196 struct xgbe_packet_data { 197 unsigned int attributes; 198 199 unsigned int errors; 200 201 unsigned int rdesc_count; 202 unsigned int length; 203 204 unsigned int header_len; 205 unsigned int tcp_header_len; 206 unsigned int tcp_payload_len; 207 unsigned short mss; 208 209 unsigned short vlan_ctag; 210 }; 211 212 /* Common Rx and Tx descriptor mapping */ 213 struct xgbe_ring_desc { 214 unsigned int desc0; 215 unsigned int desc1; 216 unsigned int desc2; 217 unsigned int desc3; 218 }; 219 220 /* Structure used to hold information related to the descriptor 221 * and the packet associated with the descriptor (always use 222 * use the GET_DESC_DATA macro to access this data from the ring) 223 */ 224 struct xgbe_ring_data { 225 struct xgbe_ring_desc *rdesc; /* Virtual address of descriptor */ 226 dma_addr_t rdesc_dma; /* DMA address of descriptor */ 227 228 struct sk_buff *skb; /* Virtual address of SKB */ 229 dma_addr_t skb_dma; /* DMA address of SKB data */ 230 unsigned int skb_dma_len; /* Length of SKB DMA area */ 231 unsigned int tso_header; /* TSO header indicator */ 232 233 unsigned short len; /* Length of received Rx packet */ 234 235 unsigned int interrupt; /* Interrupt indicator */ 236 237 unsigned int mapped_as_page; 238 }; 239 240 struct xgbe_ring { 241 /* Ring lock - used just for TX rings at the moment */ 242 spinlock_t lock; 243 244 /* Per packet related information */ 245 struct xgbe_packet_data packet_data; 246 247 /* Virtual/DMA addresses and count of allocated descriptor memory */ 248 struct xgbe_ring_desc *rdesc; 249 dma_addr_t rdesc_dma; 250 unsigned int rdesc_count; 251 252 /* Array of descriptor data corresponding the descriptor memory 253 * (always use the GET_DESC_DATA macro to access this data) 254 */ 255 struct xgbe_ring_data *rdata; 256 257 /* Ring index values 258 * cur - Tx: index of descriptor to be used for current transfer 259 * Rx: index of descriptor to check for packet availability 260 * dirty - Tx: index of descriptor to check for transfer complete 261 * Rx: count of descriptors in which a packet has been received 262 * (used with skb_realloc_index to refresh the ring) 263 */ 264 unsigned int cur; 265 unsigned int dirty; 266 267 /* Coalesce frame count used for interrupt bit setting */ 268 unsigned int coalesce_count; 269 270 union { 271 struct { 272 unsigned int queue_stopped; 273 unsigned short cur_mss; 274 unsigned short cur_vlan_ctag; 275 } tx; 276 277 struct { 278 unsigned int realloc_index; 279 unsigned int realloc_threshold; 280 } rx; 281 }; 282 } ____cacheline_aligned; 283 284 /* Structure used to describe the descriptor rings associated with 285 * a DMA channel. 286 */ 287 struct xgbe_channel { 288 char name[16]; 289 290 /* Address of private data area for device */ 291 struct xgbe_prv_data *pdata; 292 293 /* Queue index and base address of queue's DMA registers */ 294 unsigned int queue_index; 295 void __iomem *dma_regs; 296 297 unsigned int saved_ier; 298 299 unsigned int tx_timer_active; 300 struct hrtimer tx_timer; 301 302 struct xgbe_ring *tx_ring; 303 struct xgbe_ring *rx_ring; 304 } ____cacheline_aligned; 305 306 enum xgbe_int { 307 XGMAC_INT_DMA_ISR_DC0IS, 308 XGMAC_INT_DMA_CH_SR_TI, 309 XGMAC_INT_DMA_CH_SR_TPS, 310 XGMAC_INT_DMA_CH_SR_TBU, 311 XGMAC_INT_DMA_CH_SR_RI, 312 XGMAC_INT_DMA_CH_SR_RBU, 313 XGMAC_INT_DMA_CH_SR_RPS, 314 XGMAC_INT_DMA_CH_SR_FBE, 315 XGMAC_INT_DMA_ALL, 316 }; 317 318 enum xgbe_int_state { 319 XGMAC_INT_STATE_SAVE, 320 XGMAC_INT_STATE_RESTORE, 321 }; 322 323 enum xgbe_mtl_fifo_size { 324 XGMAC_MTL_FIFO_SIZE_256 = 0x00, 325 XGMAC_MTL_FIFO_SIZE_512 = 0x01, 326 XGMAC_MTL_FIFO_SIZE_1K = 0x03, 327 XGMAC_MTL_FIFO_SIZE_2K = 0x07, 328 XGMAC_MTL_FIFO_SIZE_4K = 0x0f, 329 XGMAC_MTL_FIFO_SIZE_8K = 0x1f, 330 XGMAC_MTL_FIFO_SIZE_16K = 0x3f, 331 XGMAC_MTL_FIFO_SIZE_32K = 0x7f, 332 XGMAC_MTL_FIFO_SIZE_64K = 0xff, 333 XGMAC_MTL_FIFO_SIZE_128K = 0x1ff, 334 XGMAC_MTL_FIFO_SIZE_256K = 0x3ff, 335 }; 336 337 struct xgbe_mmc_stats { 338 /* Tx Stats */ 339 u64 txoctetcount_gb; 340 u64 txframecount_gb; 341 u64 txbroadcastframes_g; 342 u64 txmulticastframes_g; 343 u64 tx64octets_gb; 344 u64 tx65to127octets_gb; 345 u64 tx128to255octets_gb; 346 u64 tx256to511octets_gb; 347 u64 tx512to1023octets_gb; 348 u64 tx1024tomaxoctets_gb; 349 u64 txunicastframes_gb; 350 u64 txmulticastframes_gb; 351 u64 txbroadcastframes_gb; 352 u64 txunderflowerror; 353 u64 txoctetcount_g; 354 u64 txframecount_g; 355 u64 txpauseframes; 356 u64 txvlanframes_g; 357 358 /* Rx Stats */ 359 u64 rxframecount_gb; 360 u64 rxoctetcount_gb; 361 u64 rxoctetcount_g; 362 u64 rxbroadcastframes_g; 363 u64 rxmulticastframes_g; 364 u64 rxcrcerror; 365 u64 rxrunterror; 366 u64 rxjabbererror; 367 u64 rxundersize_g; 368 u64 rxoversize_g; 369 u64 rx64octets_gb; 370 u64 rx65to127octets_gb; 371 u64 rx128to255octets_gb; 372 u64 rx256to511octets_gb; 373 u64 rx512to1023octets_gb; 374 u64 rx1024tomaxoctets_gb; 375 u64 rxunicastframes_g; 376 u64 rxlengtherror; 377 u64 rxoutofrangetype; 378 u64 rxpauseframes; 379 u64 rxfifooverflow; 380 u64 rxvlanframes_gb; 381 u64 rxwatchdogerror; 382 }; 383 384 struct xgbe_hw_if { 385 int (*tx_complete)(struct xgbe_ring_desc *); 386 387 int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int); 388 int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int); 389 int (*set_addn_mac_addrs)(struct xgbe_prv_data *, unsigned int); 390 int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr); 391 392 int (*enable_rx_csum)(struct xgbe_prv_data *); 393 int (*disable_rx_csum)(struct xgbe_prv_data *); 394 395 int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *); 396 int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *); 397 398 int (*read_mmd_regs)(struct xgbe_prv_data *, int, int); 399 void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int); 400 int (*set_gmii_speed)(struct xgbe_prv_data *); 401 int (*set_gmii_2500_speed)(struct xgbe_prv_data *); 402 int (*set_xgmii_speed)(struct xgbe_prv_data *); 403 404 void (*enable_tx)(struct xgbe_prv_data *); 405 void (*disable_tx)(struct xgbe_prv_data *); 406 void (*enable_rx)(struct xgbe_prv_data *); 407 void (*disable_rx)(struct xgbe_prv_data *); 408 409 void (*powerup_tx)(struct xgbe_prv_data *); 410 void (*powerdown_tx)(struct xgbe_prv_data *); 411 void (*powerup_rx)(struct xgbe_prv_data *); 412 void (*powerdown_rx)(struct xgbe_prv_data *); 413 414 int (*init)(struct xgbe_prv_data *); 415 int (*exit)(struct xgbe_prv_data *); 416 417 int (*enable_int)(struct xgbe_channel *, enum xgbe_int); 418 int (*disable_int)(struct xgbe_channel *, enum xgbe_int); 419 void (*pre_xmit)(struct xgbe_channel *); 420 int (*dev_read)(struct xgbe_channel *); 421 void (*tx_desc_init)(struct xgbe_channel *); 422 void (*rx_desc_init)(struct xgbe_channel *); 423 void (*rx_desc_reset)(struct xgbe_ring_data *); 424 void (*tx_desc_reset)(struct xgbe_ring_data *); 425 int (*is_last_desc)(struct xgbe_ring_desc *); 426 int (*is_context_desc)(struct xgbe_ring_desc *); 427 428 /* For FLOW ctrl */ 429 int (*config_tx_flow_control)(struct xgbe_prv_data *); 430 int (*config_rx_flow_control)(struct xgbe_prv_data *); 431 432 /* For RX coalescing */ 433 int (*config_rx_coalesce)(struct xgbe_prv_data *); 434 int (*config_tx_coalesce)(struct xgbe_prv_data *); 435 unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int); 436 unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int); 437 438 /* For RX and TX threshold config */ 439 int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int); 440 int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int); 441 442 /* For RX and TX Store and Forward Mode config */ 443 int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int); 444 int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int); 445 446 /* For TX DMA Operate on Second Frame config */ 447 int (*config_osp_mode)(struct xgbe_prv_data *); 448 449 /* For RX and TX PBL config */ 450 int (*config_rx_pbl_val)(struct xgbe_prv_data *); 451 int (*get_rx_pbl_val)(struct xgbe_prv_data *); 452 int (*config_tx_pbl_val)(struct xgbe_prv_data *); 453 int (*get_tx_pbl_val)(struct xgbe_prv_data *); 454 int (*config_pblx8)(struct xgbe_prv_data *); 455 456 /* For MMC statistics */ 457 void (*rx_mmc_int)(struct xgbe_prv_data *); 458 void (*tx_mmc_int)(struct xgbe_prv_data *); 459 void (*read_mmc_stats)(struct xgbe_prv_data *); 460 }; 461 462 struct xgbe_desc_if { 463 int (*alloc_ring_resources)(struct xgbe_prv_data *); 464 void (*free_ring_resources)(struct xgbe_prv_data *); 465 int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *); 466 void (*realloc_skb)(struct xgbe_channel *); 467 void (*unmap_skb)(struct xgbe_prv_data *, struct xgbe_ring_data *); 468 void (*wrapper_tx_desc_init)(struct xgbe_prv_data *); 469 void (*wrapper_rx_desc_init)(struct xgbe_prv_data *); 470 }; 471 472 /* This structure contains flags that indicate what hardware features 473 * or configurations are present in the device. 474 */ 475 struct xgbe_hw_features { 476 /* HW Feature Register0 */ 477 unsigned int gmii; /* 1000 Mbps support */ 478 unsigned int vlhash; /* VLAN Hash Filter */ 479 unsigned int sma; /* SMA(MDIO) Interface */ 480 unsigned int rwk; /* PMT remote wake-up packet */ 481 unsigned int mgk; /* PMT magic packet */ 482 unsigned int mmc; /* RMON module */ 483 unsigned int aoe; /* ARP Offload */ 484 unsigned int ts; /* IEEE 1588-2008 Adavanced Timestamp */ 485 unsigned int eee; /* Energy Efficient Ethernet */ 486 unsigned int tx_coe; /* Tx Checksum Offload */ 487 unsigned int rx_coe; /* Rx Checksum Offload */ 488 unsigned int addn_mac; /* Additional MAC Addresses */ 489 unsigned int ts_src; /* Timestamp Source */ 490 unsigned int sa_vlan_ins; /* Source Address or VLAN Insertion */ 491 492 /* HW Feature Register1 */ 493 unsigned int rx_fifo_size; /* MTL Receive FIFO Size */ 494 unsigned int tx_fifo_size; /* MTL Transmit FIFO Size */ 495 unsigned int adv_ts_hi; /* Advance Timestamping High Word */ 496 unsigned int dcb; /* DCB Feature */ 497 unsigned int sph; /* Split Header Feature */ 498 unsigned int tso; /* TCP Segmentation Offload */ 499 unsigned int dma_debug; /* DMA Debug Registers */ 500 unsigned int rss; /* Receive Side Scaling */ 501 unsigned int hash_table_size; /* Hash Table Size */ 502 unsigned int l3l4_filter_num; /* Number of L3-L4 Filters */ 503 504 /* HW Feature Register2 */ 505 unsigned int rx_q_cnt; /* Number of MTL Receive Queues */ 506 unsigned int tx_q_cnt; /* Number of MTL Transmit Queues */ 507 unsigned int rx_ch_cnt; /* Number of DMA Receive Channels */ 508 unsigned int tx_ch_cnt; /* Number of DMA Transmit Channels */ 509 unsigned int pps_out_num; /* Number of PPS outputs */ 510 unsigned int aux_snap_num; /* Number of Aux snapshot inputs */ 511 }; 512 513 struct xgbe_prv_data { 514 struct net_device *netdev; 515 struct platform_device *pdev; 516 struct device *dev; 517 518 /* XGMAC/XPCS related mmio registers */ 519 void __iomem *xgmac_regs; /* XGMAC CSRs */ 520 void __iomem *xpcs_regs; /* XPCS MMD registers */ 521 522 /* Overall device lock */ 523 spinlock_t lock; 524 525 /* XPCS indirect addressing mutex */ 526 struct mutex xpcs_mutex; 527 528 int irq_number; 529 530 struct xgbe_hw_if hw_if; 531 struct xgbe_desc_if desc_if; 532 533 /* Rings for Tx/Rx on a DMA channel */ 534 struct xgbe_channel *channel; 535 unsigned int channel_count; 536 unsigned int tx_ring_count; 537 unsigned int tx_desc_count; 538 unsigned int rx_ring_count; 539 unsigned int rx_desc_count; 540 541 /* Tx/Rx common settings */ 542 unsigned int pblx8; 543 544 /* Tx settings */ 545 unsigned int tx_sf_mode; 546 unsigned int tx_threshold; 547 unsigned int tx_pbl; 548 unsigned int tx_osp_mode; 549 550 /* Rx settings */ 551 unsigned int rx_sf_mode; 552 unsigned int rx_threshold; 553 unsigned int rx_pbl; 554 555 /* Tx coalescing settings */ 556 unsigned int tx_usecs; 557 unsigned int tx_frames; 558 559 /* Rx coalescing settings */ 560 unsigned int rx_riwt; 561 unsigned int rx_frames; 562 563 /* Current MTU */ 564 unsigned int rx_buf_size; 565 566 /* Flow control settings */ 567 unsigned int pause_autoneg; 568 unsigned int tx_pause; 569 unsigned int rx_pause; 570 571 /* MDIO settings */ 572 struct module *phy_module; 573 char *mii_bus_id; 574 struct mii_bus *mii; 575 int mdio_mmd; 576 struct phy_device *phydev; 577 int default_autoneg; 578 int default_speed; 579 580 /* Current PHY settings */ 581 phy_interface_t phy_mode; 582 int phy_link; 583 int phy_speed; 584 unsigned int phy_tx_pause; 585 unsigned int phy_rx_pause; 586 587 /* Netdev related settings */ 588 netdev_features_t netdev_features; 589 struct napi_struct napi; 590 struct xgbe_mmc_stats mmc_stats; 591 592 /* System clock value used for Rx watchdog */ 593 struct clk *sysclock; 594 595 /* Hardware features of the device */ 596 struct xgbe_hw_features hw_feat; 597 598 /* Device restart work structure */ 599 struct work_struct restart_work; 600 601 /* Keeps track of power mode */ 602 unsigned int power_down; 603 604 #ifdef CONFIG_DEBUG_FS 605 struct dentry *xgbe_debugfs; 606 607 unsigned int debugfs_xgmac_reg; 608 609 unsigned int debugfs_xpcs_mmd; 610 unsigned int debugfs_xpcs_reg; 611 #endif 612 }; 613 614 /* Function prototypes*/ 615 616 void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *); 617 void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *); 618 struct net_device_ops *xgbe_get_netdev_ops(void); 619 struct ethtool_ops *xgbe_get_ethtool_ops(void); 620 621 int xgbe_mdio_register(struct xgbe_prv_data *); 622 void xgbe_mdio_unregister(struct xgbe_prv_data *); 623 void xgbe_dump_phy_registers(struct xgbe_prv_data *); 624 void xgbe_dump_tx_desc(struct xgbe_ring *, unsigned int, unsigned int, 625 unsigned int); 626 void xgbe_dump_rx_desc(struct xgbe_ring *, struct xgbe_ring_desc *, 627 unsigned int); 628 void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool); 629 void xgbe_get_all_hw_features(struct xgbe_prv_data *); 630 int xgbe_powerup(struct net_device *, unsigned int); 631 int xgbe_powerdown(struct net_device *, unsigned int); 632 void xgbe_init_rx_coalesce(struct xgbe_prv_data *); 633 void xgbe_init_tx_coalesce(struct xgbe_prv_data *); 634 635 #ifdef CONFIG_DEBUG_FS 636 void xgbe_debugfs_init(struct xgbe_prv_data *); 637 void xgbe_debugfs_exit(struct xgbe_prv_data *); 638 #else 639 static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {} 640 static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {} 641 #endif /* CONFIG_DEBUG_FS */ 642 643 /* NOTE: Uncomment for TX and RX DESCRIPTOR DUMP in KERNEL LOG */ 644 #if 0 645 #define XGMAC_ENABLE_TX_DESC_DUMP 646 #define XGMAC_ENABLE_RX_DESC_DUMP 647 #endif 648 649 /* NOTE: Uncomment for TX and RX PACKET DUMP in KERNEL LOG */ 650 #if 0 651 #define XGMAC_ENABLE_TX_PKT_DUMP 652 #define XGMAC_ENABLE_RX_PKT_DUMP 653 #endif 654 655 /* NOTE: Uncomment for function trace log messages in KERNEL LOG */ 656 #if 0 657 #define YDEBUG 658 #define YDEBUG_MDIO 659 #endif 660 661 /* For debug prints */ 662 #ifdef YDEBUG 663 #define DBGPR(x...) pr_alert(x) 664 #define DBGPHY_REGS(x...) xgbe_dump_phy_registers(x) 665 #else 666 #define DBGPR(x...) do { } while (0) 667 #define DBGPHY_REGS(x...) do { } while (0) 668 #endif 669 670 #ifdef YDEBUG_MDIO 671 #define DBGPR_MDIO(x...) pr_alert(x) 672 #else 673 #define DBGPR_MDIO(x...) do { } while (0) 674 #endif 675 676 #endif 677