1 /*
2  * AMD 10Gb Ethernet driver
3  *
4  * This file is available to you under your choice of the following two
5  * licenses:
6  *
7  * License 1: GPLv2
8  *
9  * Copyright (c) 2014 Advanced Micro Devices, Inc.
10  *
11  * This file is free software; you may copy, redistribute and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation, either version 2 of the License, or (at
14  * your option) any later version.
15  *
16  * This file is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
23  *
24  * This file incorporates work covered by the following copyright and
25  * permission notice:
26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
29  *     and you.
30  *
31  *     The Software IS NOT an item of Licensed Software or Licensed Product
32  *     under any End User Software License Agreement or Agreement for Licensed
33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
34  *     granted, free of charge, to any person obtaining a copy of this software
35  *     annotated with this license and the Software, to deal in the Software
36  *     without restriction, including without limitation the rights to use,
37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38  *     of the Software, and to permit persons to whom the Software is furnished
39  *     to do so, subject to the following conditions:
40  *
41  *     The above copyright notice and this permission notice shall be included
42  *     in all copies or substantial portions of the Software.
43  *
44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54  *     THE POSSIBILITY OF SUCH DAMAGE.
55  *
56  *
57  * License 2: Modified BSD
58  *
59  * Copyright (c) 2014 Advanced Micro Devices, Inc.
60  * All rights reserved.
61  *
62  * Redistribution and use in source and binary forms, with or without
63  * modification, are permitted provided that the following conditions are met:
64  *     * Redistributions of source code must retain the above copyright
65  *       notice, this list of conditions and the following disclaimer.
66  *     * Redistributions in binary form must reproduce the above copyright
67  *       notice, this list of conditions and the following disclaimer in the
68  *       documentation and/or other materials provided with the distribution.
69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
70  *       names of its contributors may be used to endorse or promote products
71  *       derived from this software without specific prior written permission.
72  *
73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83  *
84  * This file incorporates work covered by the following copyright and
85  * permission notice:
86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
89  *     and you.
90  *
91  *     The Software IS NOT an item of Licensed Software or Licensed Product
92  *     under any End User Software License Agreement or Agreement for Licensed
93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
94  *     granted, free of charge, to any person obtaining a copy of this software
95  *     annotated with this license and the Software, to deal in the Software
96  *     without restriction, including without limitation the rights to use,
97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98  *     of the Software, and to permit persons to whom the Software is furnished
99  *     to do so, subject to the following conditions:
100  *
101  *     The above copyright notice and this permission notice shall be included
102  *     in all copies or substantial portions of the Software.
103  *
104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114  *     THE POSSIBILITY OF SUCH DAMAGE.
115  */
116 
117 #include <linux/module.h>
118 #include <linux/kmod.h>
119 #include <linux/mdio.h>
120 #include <linux/phy.h>
121 #include <linux/of.h>
122 
123 #include "xgbe.h"
124 #include "xgbe-common.h"
125 
126 static int xgbe_mdio_read(struct mii_bus *mii, int prtad, int mmd_reg)
127 {
128 	struct xgbe_prv_data *pdata = mii->priv;
129 	struct xgbe_hw_if *hw_if = &pdata->hw_if;
130 	int mmd_data;
131 
132 	DBGPR_MDIO("-->xgbe_mdio_read: prtad=%#x mmd_reg=%#x\n",
133 		   prtad, mmd_reg);
134 
135 	mmd_data = hw_if->read_mmd_regs(pdata, prtad, mmd_reg);
136 
137 	DBGPR_MDIO("<--xgbe_mdio_read: mmd_data=%#x\n", mmd_data);
138 
139 	return mmd_data;
140 }
141 
142 static int xgbe_mdio_write(struct mii_bus *mii, int prtad, int mmd_reg,
143 			   u16 mmd_val)
144 {
145 	struct xgbe_prv_data *pdata = mii->priv;
146 	struct xgbe_hw_if *hw_if = &pdata->hw_if;
147 	int mmd_data = mmd_val;
148 
149 	DBGPR_MDIO("-->xgbe_mdio_write: prtad=%#x mmd_reg=%#x mmd_data=%#x\n",
150 		   prtad, mmd_reg, mmd_data);
151 
152 	hw_if->write_mmd_regs(pdata, prtad, mmd_reg, mmd_data);
153 
154 	DBGPR_MDIO("<--xgbe_mdio_write\n");
155 
156 	return 0;
157 }
158 
159 void xgbe_dump_phy_registers(struct xgbe_prv_data *pdata)
160 {
161 	struct device *dev = pdata->dev;
162 	struct phy_device *phydev = pdata->mii->phy_map[XGBE_PRTAD];
163 	int i;
164 
165 	dev_alert(dev, "\n************* PHY Reg dump **********************\n");
166 
167 	dev_alert(dev, "PCS Control Reg (%#04x) = %#04x\n", MDIO_CTRL1,
168 		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1));
169 	dev_alert(dev, "PCS Status Reg (%#04x) = %#04x\n", MDIO_STAT1,
170 		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1));
171 	dev_alert(dev, "Phy Id (PHYS ID 1 %#04x)= %#04x\n", MDIO_DEVID1,
172 		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID1));
173 	dev_alert(dev, "Phy Id (PHYS ID 2 %#04x)= %#04x\n", MDIO_DEVID2,
174 		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID2));
175 	dev_alert(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS1,
176 		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS1));
177 	dev_alert(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS2,
178 		  XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS2));
179 
180 	dev_alert(dev, "Auto-Neg Control Reg (%#04x) = %#04x\n", MDIO_CTRL1,
181 		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1));
182 	dev_alert(dev, "Auto-Neg Status Reg (%#04x) = %#04x\n", MDIO_STAT1,
183 		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_STAT1));
184 	dev_alert(dev, "Auto-Neg Ad Reg 1 (%#04x) = %#04x\n",
185 		  MDIO_AN_ADVERTISE,
186 		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE));
187 	dev_alert(dev, "Auto-Neg Ad Reg 2 (%#04x) = %#04x\n",
188 		  MDIO_AN_ADVERTISE + 1,
189 		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1));
190 	dev_alert(dev, "Auto-Neg Ad Reg 3 (%#04x) = %#04x\n",
191 		  MDIO_AN_ADVERTISE + 2,
192 		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2));
193 	dev_alert(dev, "Auto-Neg Completion Reg (%#04x) = %#04x\n",
194 		  MDIO_AN_COMP_STAT,
195 		  XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_COMP_STAT));
196 
197 	dev_alert(dev, "MMD Device Mask = %#x\n",
198 		  phydev->c45_ids.devices_in_package);
199 	for (i = 0; i < ARRAY_SIZE(phydev->c45_ids.device_ids); i++)
200 		dev_alert(dev, "  MMD %d: ID = %#08x\n", i,
201 			  phydev->c45_ids.device_ids[i]);
202 
203 	dev_alert(dev, "\n*************************************************\n");
204 }
205 
206 int xgbe_mdio_register(struct xgbe_prv_data *pdata)
207 {
208 	struct mii_bus *mii;
209 	struct phy_device *phydev;
210 	int ret = 0;
211 
212 	DBGPR("-->xgbe_mdio_register\n");
213 
214 	mii = mdiobus_alloc();
215 	if (!mii) {
216 		dev_err(pdata->dev, "mdiobus_alloc failed\n");
217 		return -ENOMEM;
218 	}
219 
220 	/* Register on the MDIO bus (don't probe any PHYs) */
221 	mii->name = XGBE_PHY_NAME;
222 	mii->read = xgbe_mdio_read;
223 	mii->write = xgbe_mdio_write;
224 	snprintf(mii->id, sizeof(mii->id), "%s", pdata->mii_bus_id);
225 	mii->priv = pdata;
226 	mii->phy_mask = ~0;
227 	mii->parent = pdata->dev;
228 	ret = mdiobus_register(mii);
229 	if (ret) {
230 		dev_err(pdata->dev, "mdiobus_register failed\n");
231 		goto err_mdiobus_alloc;
232 	}
233 	DBGPR("  mdiobus_register succeeded for %s\n", pdata->mii_bus_id);
234 
235 	/* Probe the PCS using Clause 45 */
236 	phydev = get_phy_device(mii, XGBE_PRTAD, true);
237 	if (IS_ERR(phydev) || !phydev ||
238 	    !phydev->c45_ids.device_ids[MDIO_MMD_PCS]) {
239 		dev_err(pdata->dev, "get_phy_device failed\n");
240 		ret = phydev ? PTR_ERR(phydev) : -ENOLINK;
241 		goto err_mdiobus_register;
242 	}
243 	request_module(MDIO_MODULE_PREFIX MDIO_ID_FMT,
244 		       MDIO_ID_ARGS(phydev->c45_ids.device_ids[MDIO_MMD_PCS]));
245 
246 	ret = phy_device_register(phydev);
247 	if (ret) {
248 		dev_err(pdata->dev, "phy_device_register failed\n");
249 		goto err_phy_device;
250 	}
251 	if (!phydev->dev.driver) {
252 		dev_err(pdata->dev, "phy driver probe failed\n");
253 		ret = -EIO;
254 		goto err_phy_device;
255 	}
256 
257 	/* Add a reference to the PHY driver so it can't be unloaded */
258 	pdata->phy_module = phydev->dev.driver->owner;
259 	if (!try_module_get(pdata->phy_module)) {
260 		dev_err(pdata->dev, "try_module_get failed\n");
261 		ret = -EIO;
262 		goto err_phy_device;
263 	}
264 
265 	pdata->mii = mii;
266 	pdata->mdio_mmd = MDIO_MMD_PCS;
267 
268 	phydev->autoneg = pdata->default_autoneg;
269 	if (phydev->autoneg == AUTONEG_DISABLE) {
270 		phydev->speed = pdata->default_speed;
271 		phydev->duplex = DUPLEX_FULL;
272 
273 		phydev->advertising &= ~ADVERTISED_Autoneg;
274 	}
275 
276 	pdata->phydev = phydev;
277 
278 	DBGPHY_REGS(pdata);
279 
280 	DBGPR("<--xgbe_mdio_register\n");
281 
282 	return 0;
283 
284 err_phy_device:
285 	phy_device_free(phydev);
286 
287 err_mdiobus_register:
288 	mdiobus_unregister(mii);
289 
290 err_mdiobus_alloc:
291 	mdiobus_free(mii);
292 
293 	return ret;
294 }
295 
296 void xgbe_mdio_unregister(struct xgbe_prv_data *pdata)
297 {
298 	DBGPR("-->xgbe_mdio_unregister\n");
299 
300 	pdata->phydev = NULL;
301 
302 	module_put(pdata->phy_module);
303 	pdata->phy_module = NULL;
304 
305 	mdiobus_unregister(pdata->mii);
306 	pdata->mii->priv = NULL;
307 
308 	mdiobus_free(pdata->mii);
309 	pdata->mii = NULL;
310 
311 	DBGPR("<--xgbe_mdio_unregister\n");
312 }
313