1 /* 2 * AMD 10Gb Ethernet driver 3 * 4 * This file is available to you under your choice of the following two 5 * licenses: 6 * 7 * License 1: GPLv2 8 * 9 * Copyright (c) 2014 Advanced Micro Devices, Inc. 10 * 11 * This file is free software; you may copy, redistribute and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see <http://www.gnu.org/licenses/>. 23 * 24 * This file incorporates work covered by the following copyright and 25 * permission notice: 26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 28 * Inc. unless otherwise expressly agreed to in writing between Synopsys 29 * and you. 30 * 31 * The Software IS NOT an item of Licensed Software or Licensed Product 32 * under any End User Software License Agreement or Agreement for Licensed 33 * Product with Synopsys or any supplement thereto. Permission is hereby 34 * granted, free of charge, to any person obtaining a copy of this software 35 * annotated with this license and the Software, to deal in the Software 36 * without restriction, including without limitation the rights to use, 37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 38 * of the Software, and to permit persons to whom the Software is furnished 39 * to do so, subject to the following conditions: 40 * 41 * The above copyright notice and this permission notice shall be included 42 * in all copies or substantial portions of the Software. 43 * 44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 54 * THE POSSIBILITY OF SUCH DAMAGE. 55 * 56 * 57 * License 2: Modified BSD 58 * 59 * Copyright (c) 2014 Advanced Micro Devices, Inc. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions are met: 64 * * Redistributions of source code must retain the above copyright 65 * notice, this list of conditions and the following disclaimer. 66 * * Redistributions in binary form must reproduce the above copyright 67 * notice, this list of conditions and the following disclaimer in the 68 * documentation and/or other materials provided with the distribution. 69 * * Neither the name of Advanced Micro Devices, Inc. nor the 70 * names of its contributors may be used to endorse or promote products 71 * derived from this software without specific prior written permission. 72 * 73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY 77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 83 * 84 * This file incorporates work covered by the following copyright and 85 * permission notice: 86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 88 * Inc. unless otherwise expressly agreed to in writing between Synopsys 89 * and you. 90 * 91 * The Software IS NOT an item of Licensed Software or Licensed Product 92 * under any End User Software License Agreement or Agreement for Licensed 93 * Product with Synopsys or any supplement thereto. Permission is hereby 94 * granted, free of charge, to any person obtaining a copy of this software 95 * annotated with this license and the Software, to deal in the Software 96 * without restriction, including without limitation the rights to use, 97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 98 * of the Software, and to permit persons to whom the Software is furnished 99 * to do so, subject to the following conditions: 100 * 101 * The above copyright notice and this permission notice shall be included 102 * in all copies or substantial portions of the Software. 103 * 104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 114 * THE POSSIBILITY OF SUCH DAMAGE. 115 */ 116 117 #include <linux/module.h> 118 #include <linux/device.h> 119 #include <linux/platform_device.h> 120 #include <linux/spinlock.h> 121 #include <linux/netdevice.h> 122 #include <linux/etherdevice.h> 123 #include <linux/io.h> 124 #include <linux/of.h> 125 #include <linux/of_net.h> 126 #include <linux/clk.h> 127 128 #include "xgbe.h" 129 #include "xgbe-common.h" 130 131 MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>"); 132 MODULE_LICENSE("Dual BSD/GPL"); 133 MODULE_VERSION(XGBE_DRV_VERSION); 134 MODULE_DESCRIPTION(XGBE_DRV_DESC); 135 136 static struct xgbe_channel *xgbe_alloc_rings(struct xgbe_prv_data *pdata) 137 { 138 struct xgbe_channel *channel_mem, *channel; 139 struct xgbe_ring *tx_ring, *rx_ring; 140 unsigned int count, i; 141 142 DBGPR("-->xgbe_alloc_rings\n"); 143 144 count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count); 145 146 channel_mem = devm_kcalloc(pdata->dev, count, 147 sizeof(struct xgbe_channel), GFP_KERNEL); 148 if (!channel_mem) 149 return NULL; 150 151 tx_ring = devm_kcalloc(pdata->dev, pdata->tx_ring_count, 152 sizeof(struct xgbe_ring), GFP_KERNEL); 153 if (!tx_ring) 154 return NULL; 155 156 rx_ring = devm_kcalloc(pdata->dev, pdata->rx_ring_count, 157 sizeof(struct xgbe_ring), GFP_KERNEL); 158 if (!rx_ring) 159 return NULL; 160 161 for (i = 0, channel = channel_mem; i < count; i++, channel++) { 162 snprintf(channel->name, sizeof(channel->name), "channel-%d", i); 163 channel->pdata = pdata; 164 channel->queue_index = i; 165 channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE + 166 (DMA_CH_INC * i); 167 168 if (i < pdata->tx_ring_count) { 169 spin_lock_init(&tx_ring->lock); 170 channel->tx_ring = tx_ring++; 171 } 172 173 if (i < pdata->rx_ring_count) { 174 spin_lock_init(&rx_ring->lock); 175 channel->rx_ring = rx_ring++; 176 } 177 178 DBGPR(" %s - queue_index=%u, dma_regs=%p, tx=%p, rx=%p\n", 179 channel->name, channel->queue_index, channel->dma_regs, 180 channel->tx_ring, channel->rx_ring); 181 } 182 183 pdata->channel_count = count; 184 185 DBGPR("<--xgbe_alloc_rings\n"); 186 187 return channel_mem; 188 } 189 190 static void xgbe_default_config(struct xgbe_prv_data *pdata) 191 { 192 DBGPR("-->xgbe_default_config\n"); 193 194 pdata->pblx8 = DMA_PBL_X8_ENABLE; 195 pdata->tx_sf_mode = MTL_TSF_ENABLE; 196 pdata->tx_threshold = MTL_TX_THRESHOLD_64; 197 pdata->tx_pbl = DMA_PBL_16; 198 pdata->tx_osp_mode = DMA_OSP_ENABLE; 199 pdata->rx_sf_mode = MTL_RSF_DISABLE; 200 pdata->rx_threshold = MTL_RX_THRESHOLD_64; 201 pdata->rx_pbl = DMA_PBL_16; 202 pdata->pause_autoneg = 1; 203 pdata->tx_pause = 1; 204 pdata->rx_pause = 1; 205 pdata->power_down = 0; 206 pdata->default_autoneg = AUTONEG_ENABLE; 207 pdata->default_speed = SPEED_10000; 208 209 DBGPR("<--xgbe_default_config\n"); 210 } 211 212 static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata) 213 { 214 xgbe_init_function_ptrs_dev(&pdata->hw_if); 215 xgbe_init_function_ptrs_desc(&pdata->desc_if); 216 } 217 218 static int xgbe_probe(struct platform_device *pdev) 219 { 220 struct xgbe_prv_data *pdata; 221 struct xgbe_hw_if *hw_if; 222 struct xgbe_desc_if *desc_if; 223 struct net_device *netdev; 224 struct device *dev = &pdev->dev; 225 struct resource *res; 226 const u8 *mac_addr; 227 int ret; 228 229 DBGPR("--> xgbe_probe\n"); 230 231 netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data), 232 XGBE_MAX_DMA_CHANNELS); 233 if (!netdev) { 234 dev_err(dev, "alloc_etherdev failed\n"); 235 ret = -ENOMEM; 236 goto err_alloc; 237 } 238 SET_NETDEV_DEV(netdev, dev); 239 pdata = netdev_priv(netdev); 240 pdata->netdev = netdev; 241 pdata->pdev = pdev; 242 pdata->dev = dev; 243 platform_set_drvdata(pdev, netdev); 244 245 spin_lock_init(&pdata->lock); 246 mutex_init(&pdata->xpcs_mutex); 247 spin_lock_init(&pdata->tstamp_lock); 248 249 /* Set and validate the number of descriptors for a ring */ 250 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT); 251 pdata->tx_desc_count = XGBE_TX_DESC_CNT; 252 if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) { 253 dev_err(dev, "tx descriptor count (%d) is not valid\n", 254 pdata->tx_desc_count); 255 ret = -EINVAL; 256 goto err_io; 257 } 258 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT); 259 pdata->rx_desc_count = XGBE_RX_DESC_CNT; 260 if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) { 261 dev_err(dev, "rx descriptor count (%d) is not valid\n", 262 pdata->rx_desc_count); 263 ret = -EINVAL; 264 goto err_io; 265 } 266 267 /* Obtain the system clock setting */ 268 pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK); 269 if (IS_ERR(pdata->sysclk)) { 270 dev_err(dev, "dma devm_clk_get failed\n"); 271 ret = PTR_ERR(pdata->sysclk); 272 goto err_io; 273 } 274 275 /* Obtain the PTP clock setting */ 276 pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK); 277 if (IS_ERR(pdata->ptpclk)) { 278 dev_err(dev, "ptp devm_clk_get failed\n"); 279 ret = PTR_ERR(pdata->ptpclk); 280 goto err_io; 281 } 282 283 /* Obtain the mmio areas for the device */ 284 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 285 pdata->xgmac_regs = devm_ioremap_resource(dev, res); 286 if (IS_ERR(pdata->xgmac_regs)) { 287 dev_err(dev, "xgmac ioremap failed\n"); 288 ret = PTR_ERR(pdata->xgmac_regs); 289 goto err_io; 290 } 291 DBGPR(" xgmac_regs = %p\n", pdata->xgmac_regs); 292 293 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 294 pdata->xpcs_regs = devm_ioremap_resource(dev, res); 295 if (IS_ERR(pdata->xpcs_regs)) { 296 dev_err(dev, "xpcs ioremap failed\n"); 297 ret = PTR_ERR(pdata->xpcs_regs); 298 goto err_io; 299 } 300 DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs); 301 302 /* Set the DMA mask */ 303 if (!dev->dma_mask) 304 dev->dma_mask = &dev->coherent_dma_mask; 305 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40)); 306 if (ret) { 307 dev_err(dev, "dma_set_mask_and_coherent failed\n"); 308 goto err_io; 309 } 310 311 if (of_property_read_bool(dev->of_node, "dma-coherent")) { 312 pdata->axdomain = XGBE_DMA_OS_AXDOMAIN; 313 pdata->arcache = XGBE_DMA_OS_ARCACHE; 314 pdata->awcache = XGBE_DMA_OS_AWCACHE; 315 } else { 316 pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN; 317 pdata->arcache = XGBE_DMA_SYS_ARCACHE; 318 pdata->awcache = XGBE_DMA_SYS_AWCACHE; 319 } 320 321 ret = platform_get_irq(pdev, 0); 322 if (ret < 0) { 323 dev_err(dev, "platform_get_irq failed\n"); 324 goto err_io; 325 } 326 netdev->irq = ret; 327 netdev->base_addr = (unsigned long)pdata->xgmac_regs; 328 329 /* Set all the function pointers */ 330 xgbe_init_all_fptrs(pdata); 331 hw_if = &pdata->hw_if; 332 desc_if = &pdata->desc_if; 333 334 /* Issue software reset to device */ 335 hw_if->exit(pdata); 336 337 /* Populate the hardware features */ 338 xgbe_get_all_hw_features(pdata); 339 340 /* Retrieve the MAC address */ 341 mac_addr = of_get_mac_address(dev->of_node); 342 if (!mac_addr) { 343 dev_err(dev, "invalid mac address for this device\n"); 344 ret = -EINVAL; 345 goto err_io; 346 } 347 memcpy(netdev->dev_addr, mac_addr, netdev->addr_len); 348 349 /* Retrieve the PHY mode - it must be "xgmii" */ 350 pdata->phy_mode = of_get_phy_mode(dev->of_node); 351 if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) { 352 dev_err(dev, "invalid phy-mode specified for this device\n"); 353 ret = -EINVAL; 354 goto err_io; 355 } 356 357 /* Set default configuration data */ 358 xgbe_default_config(pdata); 359 360 /* Calculate the number of Tx and Rx rings to be created 361 * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set 362 * the number of Tx queues to the number of Tx channels 363 * enabled 364 * -Rx (DMA) Channels do not map 1-to-1 so use the actual 365 * number of Rx queues 366 */ 367 pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(), 368 pdata->hw_feat.tx_ch_cnt); 369 pdata->tx_q_count = pdata->tx_ring_count; 370 ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count); 371 if (ret) { 372 dev_err(dev, "error setting real tx queue count\n"); 373 goto err_io; 374 } 375 376 pdata->rx_ring_count = min_t(unsigned int, 377 netif_get_num_default_rss_queues(), 378 pdata->hw_feat.rx_ch_cnt); 379 pdata->rx_q_count = pdata->hw_feat.rx_q_cnt; 380 ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count); 381 if (ret) { 382 dev_err(dev, "error setting real rx queue count\n"); 383 goto err_io; 384 } 385 386 /* Allocate the rings for the DMA channels */ 387 pdata->channel = xgbe_alloc_rings(pdata); 388 if (!pdata->channel) { 389 dev_err(dev, "ring allocation failed\n"); 390 ret = -ENOMEM; 391 goto err_io; 392 } 393 394 /* Prepare to regsiter with MDIO */ 395 pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name); 396 if (!pdata->mii_bus_id) { 397 dev_err(dev, "failed to allocate mii bus id\n"); 398 ret = -ENOMEM; 399 goto err_io; 400 } 401 ret = xgbe_mdio_register(pdata); 402 if (ret) 403 goto err_bus_id; 404 405 /* Set device operations */ 406 netdev->netdev_ops = xgbe_get_netdev_ops(); 407 netdev->ethtool_ops = xgbe_get_ethtool_ops(); 408 #ifdef CONFIG_AMD_XGBE_DCB 409 netdev->dcbnl_ops = xgbe_get_dcbnl_ops(); 410 #endif 411 412 /* Set device features */ 413 netdev->hw_features = NETIF_F_SG | 414 NETIF_F_IP_CSUM | 415 NETIF_F_IPV6_CSUM | 416 NETIF_F_RXCSUM | 417 NETIF_F_TSO | 418 NETIF_F_TSO6 | 419 NETIF_F_GRO | 420 NETIF_F_HW_VLAN_CTAG_RX | 421 NETIF_F_HW_VLAN_CTAG_TX | 422 NETIF_F_HW_VLAN_CTAG_FILTER; 423 424 netdev->vlan_features |= NETIF_F_SG | 425 NETIF_F_IP_CSUM | 426 NETIF_F_IPV6_CSUM | 427 NETIF_F_TSO | 428 NETIF_F_TSO6; 429 430 netdev->features |= netdev->hw_features; 431 pdata->netdev_features = netdev->features; 432 433 netdev->priv_flags |= IFF_UNICAST_FLT; 434 435 xgbe_init_rx_coalesce(pdata); 436 xgbe_init_tx_coalesce(pdata); 437 438 netif_carrier_off(netdev); 439 ret = register_netdev(netdev); 440 if (ret) { 441 dev_err(dev, "net device registration failed\n"); 442 goto err_reg_netdev; 443 } 444 445 xgbe_ptp_register(pdata); 446 447 xgbe_debugfs_init(pdata); 448 449 netdev_notice(netdev, "net device enabled\n"); 450 451 DBGPR("<-- xgbe_probe\n"); 452 453 return 0; 454 455 err_reg_netdev: 456 xgbe_mdio_unregister(pdata); 457 458 err_bus_id: 459 kfree(pdata->mii_bus_id); 460 461 err_io: 462 free_netdev(netdev); 463 464 err_alloc: 465 dev_notice(dev, "net device not enabled\n"); 466 467 return ret; 468 } 469 470 static int xgbe_remove(struct platform_device *pdev) 471 { 472 struct net_device *netdev = platform_get_drvdata(pdev); 473 struct xgbe_prv_data *pdata = netdev_priv(netdev); 474 475 DBGPR("-->xgbe_remove\n"); 476 477 xgbe_debugfs_exit(pdata); 478 479 xgbe_ptp_unregister(pdata); 480 481 unregister_netdev(netdev); 482 483 xgbe_mdio_unregister(pdata); 484 485 kfree(pdata->mii_bus_id); 486 487 free_netdev(netdev); 488 489 DBGPR("<--xgbe_remove\n"); 490 491 return 0; 492 } 493 494 #ifdef CONFIG_PM 495 static int xgbe_suspend(struct device *dev) 496 { 497 struct net_device *netdev = dev_get_drvdata(dev); 498 int ret; 499 500 DBGPR("-->xgbe_suspend\n"); 501 502 if (!netif_running(netdev)) { 503 DBGPR("<--xgbe_dev_suspend\n"); 504 return -EINVAL; 505 } 506 507 ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT); 508 509 DBGPR("<--xgbe_suspend\n"); 510 511 return ret; 512 } 513 514 static int xgbe_resume(struct device *dev) 515 { 516 struct net_device *netdev = dev_get_drvdata(dev); 517 int ret; 518 519 DBGPR("-->xgbe_resume\n"); 520 521 if (!netif_running(netdev)) { 522 DBGPR("<--xgbe_dev_resume\n"); 523 return -EINVAL; 524 } 525 526 ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT); 527 528 DBGPR("<--xgbe_resume\n"); 529 530 return ret; 531 } 532 #endif /* CONFIG_PM */ 533 534 static const struct of_device_id xgbe_of_match[] = { 535 { .compatible = "amd,xgbe-seattle-v1a", }, 536 {}, 537 }; 538 539 MODULE_DEVICE_TABLE(of, xgbe_of_match); 540 static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume); 541 542 static struct platform_driver xgbe_driver = { 543 .driver = { 544 .name = "amd-xgbe", 545 .of_match_table = xgbe_of_match, 546 .pm = &xgbe_pm_ops, 547 }, 548 .probe = xgbe_probe, 549 .remove = xgbe_remove, 550 }; 551 552 module_platform_driver(xgbe_driver); 553