1 /* 2 * AMD 10Gb Ethernet driver 3 * 4 * This file is available to you under your choice of the following two 5 * licenses: 6 * 7 * License 1: GPLv2 8 * 9 * Copyright (c) 2014 Advanced Micro Devices, Inc. 10 * 11 * This file is free software; you may copy, redistribute and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This file is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see <http://www.gnu.org/licenses/>. 23 * 24 * This file incorporates work covered by the following copyright and 25 * permission notice: 26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 28 * Inc. unless otherwise expressly agreed to in writing between Synopsys 29 * and you. 30 * 31 * The Software IS NOT an item of Licensed Software or Licensed Product 32 * under any End User Software License Agreement or Agreement for Licensed 33 * Product with Synopsys or any supplement thereto. Permission is hereby 34 * granted, free of charge, to any person obtaining a copy of this software 35 * annotated with this license and the Software, to deal in the Software 36 * without restriction, including without limitation the rights to use, 37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 38 * of the Software, and to permit persons to whom the Software is furnished 39 * to do so, subject to the following conditions: 40 * 41 * The above copyright notice and this permission notice shall be included 42 * in all copies or substantial portions of the Software. 43 * 44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 54 * THE POSSIBILITY OF SUCH DAMAGE. 55 * 56 * 57 * License 2: Modified BSD 58 * 59 * Copyright (c) 2014 Advanced Micro Devices, Inc. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions are met: 64 * * Redistributions of source code must retain the above copyright 65 * notice, this list of conditions and the following disclaimer. 66 * * Redistributions in binary form must reproduce the above copyright 67 * notice, this list of conditions and the following disclaimer in the 68 * documentation and/or other materials provided with the distribution. 69 * * Neither the name of Advanced Micro Devices, Inc. nor the 70 * names of its contributors may be used to endorse or promote products 71 * derived from this software without specific prior written permission. 72 * 73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY 77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 83 * 84 * This file incorporates work covered by the following copyright and 85 * permission notice: 86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation 87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys, 88 * Inc. unless otherwise expressly agreed to in writing between Synopsys 89 * and you. 90 * 91 * The Software IS NOT an item of Licensed Software or Licensed Product 92 * under any End User Software License Agreement or Agreement for Licensed 93 * Product with Synopsys or any supplement thereto. Permission is hereby 94 * granted, free of charge, to any person obtaining a copy of this software 95 * annotated with this license and the Software, to deal in the Software 96 * without restriction, including without limitation the rights to use, 97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies 98 * of the Software, and to permit persons to whom the Software is furnished 99 * to do so, subject to the following conditions: 100 * 101 * The above copyright notice and this permission notice shall be included 102 * in all copies or substantial portions of the Software. 103 * 104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" 105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS 108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 114 * THE POSSIBILITY OF SUCH DAMAGE. 115 */ 116 117 #include <linux/module.h> 118 #include <linux/device.h> 119 #include <linux/platform_device.h> 120 #include <linux/spinlock.h> 121 #include <linux/netdevice.h> 122 #include <linux/etherdevice.h> 123 #include <linux/io.h> 124 #include <linux/of.h> 125 #include <linux/of_net.h> 126 #include <linux/clk.h> 127 128 #include "xgbe.h" 129 #include "xgbe-common.h" 130 131 132 MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>"); 133 MODULE_LICENSE("Dual BSD/GPL"); 134 MODULE_VERSION(XGBE_DRV_VERSION); 135 MODULE_DESCRIPTION(XGBE_DRV_DESC); 136 137 static struct xgbe_channel *xgbe_alloc_rings(struct xgbe_prv_data *pdata) 138 { 139 struct xgbe_channel *channel_mem, *channel; 140 struct xgbe_ring *tx_ring, *rx_ring; 141 unsigned int count, i; 142 143 DBGPR("-->xgbe_alloc_rings\n"); 144 145 count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count); 146 147 channel_mem = devm_kcalloc(pdata->dev, count, 148 sizeof(struct xgbe_channel), GFP_KERNEL); 149 if (!channel_mem) 150 return NULL; 151 152 tx_ring = devm_kcalloc(pdata->dev, pdata->tx_ring_count, 153 sizeof(struct xgbe_ring), GFP_KERNEL); 154 if (!tx_ring) 155 return NULL; 156 157 rx_ring = devm_kcalloc(pdata->dev, pdata->rx_ring_count, 158 sizeof(struct xgbe_ring), GFP_KERNEL); 159 if (!rx_ring) 160 return NULL; 161 162 for (i = 0, channel = channel_mem; i < count; i++, channel++) { 163 snprintf(channel->name, sizeof(channel->name), "channel-%d", i); 164 channel->pdata = pdata; 165 channel->queue_index = i; 166 channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE + 167 (DMA_CH_INC * i); 168 169 if (i < pdata->tx_ring_count) { 170 spin_lock_init(&tx_ring->lock); 171 channel->tx_ring = tx_ring++; 172 } 173 174 if (i < pdata->rx_ring_count) { 175 spin_lock_init(&rx_ring->lock); 176 channel->rx_ring = rx_ring++; 177 } 178 179 DBGPR(" %s - queue_index=%u, dma_regs=%p, tx=%p, rx=%p\n", 180 channel->name, channel->queue_index, channel->dma_regs, 181 channel->tx_ring, channel->rx_ring); 182 } 183 184 pdata->channel_count = count; 185 186 DBGPR("<--xgbe_alloc_rings\n"); 187 188 return channel_mem; 189 } 190 191 static void xgbe_default_config(struct xgbe_prv_data *pdata) 192 { 193 DBGPR("-->xgbe_default_config\n"); 194 195 pdata->pblx8 = DMA_PBL_X8_ENABLE; 196 pdata->tx_sf_mode = MTL_TSF_ENABLE; 197 pdata->tx_threshold = MTL_TX_THRESHOLD_64; 198 pdata->tx_pbl = DMA_PBL_16; 199 pdata->tx_osp_mode = DMA_OSP_ENABLE; 200 pdata->rx_sf_mode = MTL_RSF_DISABLE; 201 pdata->rx_threshold = MTL_RX_THRESHOLD_64; 202 pdata->rx_pbl = DMA_PBL_16; 203 pdata->pause_autoneg = 1; 204 pdata->tx_pause = 1; 205 pdata->rx_pause = 1; 206 pdata->power_down = 0; 207 pdata->default_autoneg = AUTONEG_ENABLE; 208 pdata->default_speed = SPEED_10000; 209 210 DBGPR("<--xgbe_default_config\n"); 211 } 212 213 static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata) 214 { 215 xgbe_init_function_ptrs_dev(&pdata->hw_if); 216 xgbe_init_function_ptrs_desc(&pdata->desc_if); 217 } 218 219 static int xgbe_probe(struct platform_device *pdev) 220 { 221 struct xgbe_prv_data *pdata; 222 struct xgbe_hw_if *hw_if; 223 struct xgbe_desc_if *desc_if; 224 struct net_device *netdev; 225 struct device *dev = &pdev->dev; 226 struct resource *res; 227 const u8 *mac_addr; 228 int ret; 229 230 DBGPR("--> xgbe_probe\n"); 231 232 netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data), 233 XGBE_MAX_DMA_CHANNELS); 234 if (!netdev) { 235 dev_err(dev, "alloc_etherdev failed\n"); 236 ret = -ENOMEM; 237 goto err_alloc; 238 } 239 SET_NETDEV_DEV(netdev, dev); 240 pdata = netdev_priv(netdev); 241 pdata->netdev = netdev; 242 pdata->pdev = pdev; 243 pdata->dev = dev; 244 platform_set_drvdata(pdev, netdev); 245 246 spin_lock_init(&pdata->lock); 247 mutex_init(&pdata->xpcs_mutex); 248 spin_lock_init(&pdata->tstamp_lock); 249 250 /* Set and validate the number of descriptors for a ring */ 251 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT); 252 pdata->tx_desc_count = XGBE_TX_DESC_CNT; 253 if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) { 254 dev_err(dev, "tx descriptor count (%d) is not valid\n", 255 pdata->tx_desc_count); 256 ret = -EINVAL; 257 goto err_io; 258 } 259 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT); 260 pdata->rx_desc_count = XGBE_RX_DESC_CNT; 261 if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) { 262 dev_err(dev, "rx descriptor count (%d) is not valid\n", 263 pdata->rx_desc_count); 264 ret = -EINVAL; 265 goto err_io; 266 } 267 268 /* Obtain the system clock setting */ 269 pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK); 270 if (IS_ERR(pdata->sysclk)) { 271 dev_err(dev, "dma devm_clk_get failed\n"); 272 ret = PTR_ERR(pdata->sysclk); 273 goto err_io; 274 } 275 276 /* Obtain the PTP clock setting */ 277 pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK); 278 if (IS_ERR(pdata->ptpclk)) { 279 dev_err(dev, "ptp devm_clk_get failed\n"); 280 ret = PTR_ERR(pdata->ptpclk); 281 goto err_io; 282 } 283 284 /* Obtain the mmio areas for the device */ 285 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 286 pdata->xgmac_regs = devm_ioremap_resource(dev, res); 287 if (IS_ERR(pdata->xgmac_regs)) { 288 dev_err(dev, "xgmac ioremap failed\n"); 289 ret = PTR_ERR(pdata->xgmac_regs); 290 goto err_io; 291 } 292 DBGPR(" xgmac_regs = %p\n", pdata->xgmac_regs); 293 294 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 295 pdata->xpcs_regs = devm_ioremap_resource(dev, res); 296 if (IS_ERR(pdata->xpcs_regs)) { 297 dev_err(dev, "xpcs ioremap failed\n"); 298 ret = PTR_ERR(pdata->xpcs_regs); 299 goto err_io; 300 } 301 DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs); 302 303 /* Set the DMA mask */ 304 if (!dev->dma_mask) 305 dev->dma_mask = &dev->coherent_dma_mask; 306 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40)); 307 if (ret) { 308 dev_err(dev, "dma_set_mask_and_coherent failed\n"); 309 goto err_io; 310 } 311 312 if (of_property_read_bool(dev->of_node, "dma-coherent")) { 313 pdata->axdomain = XGBE_DMA_OS_AXDOMAIN; 314 pdata->arcache = XGBE_DMA_OS_ARCACHE; 315 pdata->awcache = XGBE_DMA_OS_AWCACHE; 316 } else { 317 pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN; 318 pdata->arcache = XGBE_DMA_SYS_ARCACHE; 319 pdata->awcache = XGBE_DMA_SYS_AWCACHE; 320 } 321 322 ret = platform_get_irq(pdev, 0); 323 if (ret < 0) { 324 dev_err(dev, "platform_get_irq failed\n"); 325 goto err_io; 326 } 327 netdev->irq = ret; 328 netdev->base_addr = (unsigned long)pdata->xgmac_regs; 329 330 /* Set all the function pointers */ 331 xgbe_init_all_fptrs(pdata); 332 hw_if = &pdata->hw_if; 333 desc_if = &pdata->desc_if; 334 335 /* Issue software reset to device */ 336 hw_if->exit(pdata); 337 338 /* Populate the hardware features */ 339 xgbe_get_all_hw_features(pdata); 340 341 /* Retrieve the MAC address */ 342 mac_addr = of_get_mac_address(dev->of_node); 343 if (!mac_addr) { 344 dev_err(dev, "invalid mac address for this device\n"); 345 ret = -EINVAL; 346 goto err_io; 347 } 348 memcpy(netdev->dev_addr, mac_addr, netdev->addr_len); 349 350 /* Retrieve the PHY mode - it must be "xgmii" */ 351 pdata->phy_mode = of_get_phy_mode(dev->of_node); 352 if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) { 353 dev_err(dev, "invalid phy-mode specified for this device\n"); 354 ret = -EINVAL; 355 goto err_io; 356 } 357 358 /* Set default configuration data */ 359 xgbe_default_config(pdata); 360 361 /* Calculate the number of Tx and Rx rings to be created 362 * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set 363 * the number of Tx queues to the number of Tx channels 364 * enabled 365 * -Rx (DMA) Channels do not map 1-to-1 so use the actual 366 * number of Rx queues 367 */ 368 pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(), 369 pdata->hw_feat.tx_ch_cnt); 370 pdata->tx_q_count = pdata->tx_ring_count; 371 ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count); 372 if (ret) { 373 dev_err(dev, "error setting real tx queue count\n"); 374 goto err_io; 375 } 376 377 pdata->rx_ring_count = min_t(unsigned int, 378 netif_get_num_default_rss_queues(), 379 pdata->hw_feat.rx_ch_cnt); 380 pdata->rx_q_count = pdata->hw_feat.rx_q_cnt; 381 ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count); 382 if (ret) { 383 dev_err(dev, "error setting real rx queue count\n"); 384 goto err_io; 385 } 386 387 /* Allocate the rings for the DMA channels */ 388 pdata->channel = xgbe_alloc_rings(pdata); 389 if (!pdata->channel) { 390 dev_err(dev, "ring allocation failed\n"); 391 ret = -ENOMEM; 392 goto err_io; 393 } 394 395 /* Prepare to regsiter with MDIO */ 396 pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name); 397 if (!pdata->mii_bus_id) { 398 dev_err(dev, "failed to allocate mii bus id\n"); 399 ret = -ENOMEM; 400 goto err_io; 401 } 402 ret = xgbe_mdio_register(pdata); 403 if (ret) 404 goto err_bus_id; 405 406 /* Set device operations */ 407 netdev->netdev_ops = xgbe_get_netdev_ops(); 408 netdev->ethtool_ops = xgbe_get_ethtool_ops(); 409 #ifdef CONFIG_AMD_XGBE_DCB 410 netdev->dcbnl_ops = xgbe_get_dcbnl_ops(); 411 #endif 412 413 /* Set device features */ 414 netdev->hw_features = NETIF_F_SG | 415 NETIF_F_IP_CSUM | 416 NETIF_F_IPV6_CSUM | 417 NETIF_F_RXCSUM | 418 NETIF_F_TSO | 419 NETIF_F_TSO6 | 420 NETIF_F_GRO | 421 NETIF_F_HW_VLAN_CTAG_RX | 422 NETIF_F_HW_VLAN_CTAG_TX | 423 NETIF_F_HW_VLAN_CTAG_FILTER; 424 425 netdev->vlan_features |= NETIF_F_SG | 426 NETIF_F_IP_CSUM | 427 NETIF_F_IPV6_CSUM | 428 NETIF_F_TSO | 429 NETIF_F_TSO6; 430 431 netdev->features |= netdev->hw_features; 432 pdata->netdev_features = netdev->features; 433 434 netdev->priv_flags |= IFF_UNICAST_FLT; 435 436 xgbe_init_rx_coalesce(pdata); 437 xgbe_init_tx_coalesce(pdata); 438 439 netif_carrier_off(netdev); 440 ret = register_netdev(netdev); 441 if (ret) { 442 dev_err(dev, "net device registration failed\n"); 443 goto err_reg_netdev; 444 } 445 446 xgbe_ptp_register(pdata); 447 448 xgbe_debugfs_init(pdata); 449 450 netdev_notice(netdev, "net device enabled\n"); 451 452 DBGPR("<-- xgbe_probe\n"); 453 454 return 0; 455 456 err_reg_netdev: 457 xgbe_mdio_unregister(pdata); 458 459 err_bus_id: 460 kfree(pdata->mii_bus_id); 461 462 err_io: 463 free_netdev(netdev); 464 465 err_alloc: 466 dev_notice(dev, "net device not enabled\n"); 467 468 return ret; 469 } 470 471 static int xgbe_remove(struct platform_device *pdev) 472 { 473 struct net_device *netdev = platform_get_drvdata(pdev); 474 struct xgbe_prv_data *pdata = netdev_priv(netdev); 475 476 DBGPR("-->xgbe_remove\n"); 477 478 xgbe_debugfs_exit(pdata); 479 480 xgbe_ptp_unregister(pdata); 481 482 unregister_netdev(netdev); 483 484 xgbe_mdio_unregister(pdata); 485 486 kfree(pdata->mii_bus_id); 487 488 free_netdev(netdev); 489 490 DBGPR("<--xgbe_remove\n"); 491 492 return 0; 493 } 494 495 #ifdef CONFIG_PM 496 static int xgbe_suspend(struct device *dev) 497 { 498 struct net_device *netdev = dev_get_drvdata(dev); 499 int ret; 500 501 DBGPR("-->xgbe_suspend\n"); 502 503 if (!netif_running(netdev)) { 504 DBGPR("<--xgbe_dev_suspend\n"); 505 return -EINVAL; 506 } 507 508 ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT); 509 510 DBGPR("<--xgbe_suspend\n"); 511 512 return ret; 513 } 514 515 static int xgbe_resume(struct device *dev) 516 { 517 struct net_device *netdev = dev_get_drvdata(dev); 518 int ret; 519 520 DBGPR("-->xgbe_resume\n"); 521 522 if (!netif_running(netdev)) { 523 DBGPR("<--xgbe_dev_resume\n"); 524 return -EINVAL; 525 } 526 527 ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT); 528 529 DBGPR("<--xgbe_resume\n"); 530 531 return ret; 532 } 533 #endif /* CONFIG_PM */ 534 535 static const struct of_device_id xgbe_of_match[] = { 536 { .compatible = "amd,xgbe-seattle-v1a", }, 537 {}, 538 }; 539 540 MODULE_DEVICE_TABLE(of, xgbe_of_match); 541 static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume); 542 543 static struct platform_driver xgbe_driver = { 544 .driver = { 545 .name = "amd-xgbe", 546 .of_match_table = xgbe_of_match, 547 .pm = &xgbe_pm_ops, 548 }, 549 .probe = xgbe_probe, 550 .remove = xgbe_remove, 551 }; 552 553 module_platform_driver(xgbe_driver); 554