1 /*
2  * AMD 10Gb Ethernet driver
3  *
4  * This file is available to you under your choice of the following two
5  * licenses:
6  *
7  * License 1: GPLv2
8  *
9  * Copyright (c) 2014 Advanced Micro Devices, Inc.
10  *
11  * This file is free software; you may copy, redistribute and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation, either version 2 of the License, or (at
14  * your option) any later version.
15  *
16  * This file is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
23  *
24  * This file incorporates work covered by the following copyright and
25  * permission notice:
26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
29  *     and you.
30  *
31  *     The Software IS NOT an item of Licensed Software or Licensed Product
32  *     under any End User Software License Agreement or Agreement for Licensed
33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
34  *     granted, free of charge, to any person obtaining a copy of this software
35  *     annotated with this license and the Software, to deal in the Software
36  *     without restriction, including without limitation the rights to use,
37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38  *     of the Software, and to permit persons to whom the Software is furnished
39  *     to do so, subject to the following conditions:
40  *
41  *     The above copyright notice and this permission notice shall be included
42  *     in all copies or substantial portions of the Software.
43  *
44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54  *     THE POSSIBILITY OF SUCH DAMAGE.
55  *
56  *
57  * License 2: Modified BSD
58  *
59  * Copyright (c) 2014 Advanced Micro Devices, Inc.
60  * All rights reserved.
61  *
62  * Redistribution and use in source and binary forms, with or without
63  * modification, are permitted provided that the following conditions are met:
64  *     * Redistributions of source code must retain the above copyright
65  *       notice, this list of conditions and the following disclaimer.
66  *     * Redistributions in binary form must reproduce the above copyright
67  *       notice, this list of conditions and the following disclaimer in the
68  *       documentation and/or other materials provided with the distribution.
69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
70  *       names of its contributors may be used to endorse or promote products
71  *       derived from this software without specific prior written permission.
72  *
73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83  *
84  * This file incorporates work covered by the following copyright and
85  * permission notice:
86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
89  *     and you.
90  *
91  *     The Software IS NOT an item of Licensed Software or Licensed Product
92  *     under any End User Software License Agreement or Agreement for Licensed
93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
94  *     granted, free of charge, to any person obtaining a copy of this software
95  *     annotated with this license and the Software, to deal in the Software
96  *     without restriction, including without limitation the rights to use,
97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98  *     of the Software, and to permit persons to whom the Software is furnished
99  *     to do so, subject to the following conditions:
100  *
101  *     The above copyright notice and this permission notice shall be included
102  *     in all copies or substantial portions of the Software.
103  *
104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114  *     THE POSSIBILITY OF SUCH DAMAGE.
115  */
116 
117 #include <linux/module.h>
118 #include <linux/device.h>
119 #include <linux/platform_device.h>
120 #include <linux/spinlock.h>
121 #include <linux/netdevice.h>
122 #include <linux/etherdevice.h>
123 #include <linux/io.h>
124 #include <linux/of.h>
125 #include <linux/of_net.h>
126 #include <linux/clk.h>
127 
128 #include "xgbe.h"
129 #include "xgbe-common.h"
130 
131 
132 MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
133 MODULE_LICENSE("Dual BSD/GPL");
134 MODULE_VERSION(XGBE_DRV_VERSION);
135 MODULE_DESCRIPTION(XGBE_DRV_DESC);
136 
137 static struct xgbe_channel *xgbe_alloc_rings(struct xgbe_prv_data *pdata)
138 {
139 	struct xgbe_channel *channel_mem, *channel;
140 	struct xgbe_ring *tx_ring, *rx_ring;
141 	unsigned int count, i;
142 
143 	DBGPR("-->xgbe_alloc_rings\n");
144 
145 	count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count);
146 
147 	channel_mem = devm_kcalloc(pdata->dev, count,
148 				   sizeof(struct xgbe_channel), GFP_KERNEL);
149 	if (!channel_mem)
150 		return NULL;
151 
152 	tx_ring = devm_kcalloc(pdata->dev, pdata->tx_ring_count,
153 			       sizeof(struct xgbe_ring), GFP_KERNEL);
154 	if (!tx_ring)
155 		return NULL;
156 
157 	rx_ring = devm_kcalloc(pdata->dev, pdata->rx_ring_count,
158 			       sizeof(struct xgbe_ring), GFP_KERNEL);
159 	if (!rx_ring)
160 		return NULL;
161 
162 	for (i = 0, channel = channel_mem; i < count; i++, channel++) {
163 		snprintf(channel->name, sizeof(channel->name), "channel-%d", i);
164 		channel->pdata = pdata;
165 		channel->queue_index = i;
166 		channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE +
167 				    (DMA_CH_INC * i);
168 
169 		if (i < pdata->tx_ring_count) {
170 			spin_lock_init(&tx_ring->lock);
171 			channel->tx_ring = tx_ring++;
172 		}
173 
174 		if (i < pdata->rx_ring_count) {
175 			spin_lock_init(&tx_ring->lock);
176 			channel->rx_ring = rx_ring++;
177 		}
178 
179 		DBGPR("  %s - queue_index=%u, dma_regs=%p, tx=%p, rx=%p\n",
180 		      channel->name, channel->queue_index, channel->dma_regs,
181 		      channel->tx_ring, channel->rx_ring);
182 	}
183 
184 	pdata->channel_count = count;
185 
186 	DBGPR("<--xgbe_alloc_rings\n");
187 
188 	return channel_mem;
189 }
190 
191 static void xgbe_default_config(struct xgbe_prv_data *pdata)
192 {
193 	DBGPR("-->xgbe_default_config\n");
194 
195 	pdata->pblx8 = DMA_PBL_X8_ENABLE;
196 	pdata->tx_sf_mode = MTL_TSF_ENABLE;
197 	pdata->tx_threshold = MTL_TX_THRESHOLD_64;
198 	pdata->tx_pbl = DMA_PBL_16;
199 	pdata->tx_osp_mode = DMA_OSP_ENABLE;
200 	pdata->rx_sf_mode = MTL_RSF_DISABLE;
201 	pdata->rx_threshold = MTL_RX_THRESHOLD_64;
202 	pdata->rx_pbl = DMA_PBL_16;
203 	pdata->pause_autoneg = 1;
204 	pdata->tx_pause = 1;
205 	pdata->rx_pause = 1;
206 	pdata->power_down = 0;
207 	pdata->default_autoneg = AUTONEG_ENABLE;
208 	pdata->default_speed = SPEED_10000;
209 
210 	DBGPR("<--xgbe_default_config\n");
211 }
212 
213 static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)
214 {
215 	xgbe_init_function_ptrs_dev(&pdata->hw_if);
216 	xgbe_init_function_ptrs_desc(&pdata->desc_if);
217 }
218 
219 static int xgbe_probe(struct platform_device *pdev)
220 {
221 	struct xgbe_prv_data *pdata;
222 	struct xgbe_hw_if *hw_if;
223 	struct xgbe_desc_if *desc_if;
224 	struct net_device *netdev;
225 	struct device *dev = &pdev->dev;
226 	struct resource *res;
227 	const u8 *mac_addr;
228 	int ret;
229 
230 	DBGPR("--> xgbe_probe\n");
231 
232 	netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data),
233 				   XGBE_MAX_DMA_CHANNELS);
234 	if (!netdev) {
235 		dev_err(dev, "alloc_etherdev failed\n");
236 		ret = -ENOMEM;
237 		goto err_alloc;
238 	}
239 	SET_NETDEV_DEV(netdev, dev);
240 	pdata = netdev_priv(netdev);
241 	pdata->netdev = netdev;
242 	pdata->pdev = pdev;
243 	pdata->dev = dev;
244 	platform_set_drvdata(pdev, netdev);
245 
246 	spin_lock_init(&pdata->lock);
247 	mutex_init(&pdata->xpcs_mutex);
248 
249 	/* Set and validate the number of descriptors for a ring */
250 	BUILD_BUG_ON_NOT_POWER_OF_2(TX_DESC_CNT);
251 	pdata->tx_desc_count = TX_DESC_CNT;
252 	if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) {
253 		dev_err(dev, "tx descriptor count (%d) is not valid\n",
254 			pdata->tx_desc_count);
255 		ret = -EINVAL;
256 		goto err_io;
257 	}
258 	BUILD_BUG_ON_NOT_POWER_OF_2(RX_DESC_CNT);
259 	pdata->rx_desc_count = RX_DESC_CNT;
260 	if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) {
261 		dev_err(dev, "rx descriptor count (%d) is not valid\n",
262 			pdata->rx_desc_count);
263 		ret = -EINVAL;
264 		goto err_io;
265 	}
266 
267 	/* Obtain the system clock setting */
268 	pdata->sysclock = devm_clk_get(dev, NULL);
269 	if (IS_ERR(pdata->sysclock)) {
270 		dev_err(dev, "devm_clk_get failed\n");
271 		ret = PTR_ERR(pdata->sysclock);
272 		goto err_io;
273 	}
274 
275 	/* Obtain the mmio areas for the device */
276 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
277 	pdata->xgmac_regs = devm_ioremap_resource(dev, res);
278 	if (IS_ERR(pdata->xgmac_regs)) {
279 		dev_err(dev, "xgmac ioremap failed\n");
280 		ret = PTR_ERR(pdata->xgmac_regs);
281 		goto err_io;
282 	}
283 	DBGPR("  xgmac_regs = %p\n", pdata->xgmac_regs);
284 
285 	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
286 	pdata->xpcs_regs = devm_ioremap_resource(dev, res);
287 	if (IS_ERR(pdata->xpcs_regs)) {
288 		dev_err(dev, "xpcs ioremap failed\n");
289 		ret = PTR_ERR(pdata->xpcs_regs);
290 		goto err_io;
291 	}
292 	DBGPR("  xpcs_regs  = %p\n", pdata->xpcs_regs);
293 
294 	/* Set the DMA mask */
295 	if (!dev->dma_mask)
296 		dev->dma_mask = &dev->coherent_dma_mask;
297 	*(dev->dma_mask) = DMA_BIT_MASK(40);
298 	dev->coherent_dma_mask = DMA_BIT_MASK(40);
299 
300 	ret = platform_get_irq(pdev, 0);
301 	if (ret < 0) {
302 		dev_err(dev, "platform_get_irq failed\n");
303 		goto err_io;
304 	}
305 	netdev->irq = ret;
306 	netdev->base_addr = (unsigned long)pdata->xgmac_regs;
307 
308 	/* Set all the function pointers */
309 	xgbe_init_all_fptrs(pdata);
310 	hw_if = &pdata->hw_if;
311 	desc_if = &pdata->desc_if;
312 
313 	/* Issue software reset to device */
314 	hw_if->exit(pdata);
315 
316 	/* Populate the hardware features */
317 	xgbe_get_all_hw_features(pdata);
318 
319 	/* Retrieve the MAC address */
320 	mac_addr = of_get_mac_address(dev->of_node);
321 	if (!mac_addr) {
322 		dev_err(dev, "invalid mac address for this device\n");
323 		ret = -EINVAL;
324 		goto err_io;
325 	}
326 	memcpy(netdev->dev_addr, mac_addr, netdev->addr_len);
327 
328 	/* Retrieve the PHY mode - it must be "xgmii" */
329 	pdata->phy_mode = of_get_phy_mode(dev->of_node);
330 	if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
331 		dev_err(dev, "invalid phy-mode specified for this device\n");
332 		ret = -EINVAL;
333 		goto err_io;
334 	}
335 
336 	/* Set default configuration data */
337 	xgbe_default_config(pdata);
338 
339 	/* Calculate the number of Tx and Rx rings to be created */
340 	pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(),
341 				     pdata->hw_feat.tx_ch_cnt);
342 	if (netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count)) {
343 		dev_err(dev, "error setting real tx queue count\n");
344 		goto err_io;
345 	}
346 
347 	pdata->rx_ring_count = min_t(unsigned int,
348 				     netif_get_num_default_rss_queues(),
349 				     pdata->hw_feat.rx_ch_cnt);
350 	ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count);
351 	if (ret) {
352 		dev_err(dev, "error setting real rx queue count\n");
353 		goto err_io;
354 	}
355 
356 	/* Allocate the rings for the DMA channels */
357 	pdata->channel = xgbe_alloc_rings(pdata);
358 	if (!pdata->channel) {
359 		dev_err(dev, "ring allocation failed\n");
360 		ret = -ENOMEM;
361 		goto err_io;
362 	}
363 
364 	/* Prepare to regsiter with MDIO */
365 	pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name);
366 	if (!pdata->mii_bus_id) {
367 		dev_err(dev, "failed to allocate mii bus id\n");
368 		ret = -ENOMEM;
369 		goto err_io;
370 	}
371 	ret = xgbe_mdio_register(pdata);
372 	if (ret)
373 		goto err_bus_id;
374 
375 	/* Set network and ethtool operations */
376 	netdev->netdev_ops = xgbe_get_netdev_ops();
377 	netdev->ethtool_ops = xgbe_get_ethtool_ops();
378 
379 	/* Set device features */
380 	netdev->hw_features = NETIF_F_SG |
381 			      NETIF_F_IP_CSUM |
382 			      NETIF_F_IPV6_CSUM |
383 			      NETIF_F_RXCSUM |
384 			      NETIF_F_TSO |
385 			      NETIF_F_TSO6 |
386 			      NETIF_F_GRO |
387 			      NETIF_F_HW_VLAN_CTAG_RX |
388 			      NETIF_F_HW_VLAN_CTAG_TX;
389 
390 	netdev->vlan_features |= NETIF_F_SG |
391 				 NETIF_F_IP_CSUM |
392 				 NETIF_F_IPV6_CSUM |
393 				 NETIF_F_TSO |
394 				 NETIF_F_TSO6;
395 
396 	netdev->features |= netdev->hw_features;
397 	pdata->netdev_features = netdev->features;
398 
399 	xgbe_init_rx_coalesce(pdata);
400 	xgbe_init_tx_coalesce(pdata);
401 
402 	netif_carrier_off(netdev);
403 	ret = register_netdev(netdev);
404 	if (ret) {
405 		dev_err(dev, "net device registration failed\n");
406 		goto err_reg_netdev;
407 	}
408 
409 	xgbe_debugfs_init(pdata);
410 
411 	netdev_notice(netdev, "net device enabled\n");
412 
413 	DBGPR("<-- xgbe_probe\n");
414 
415 	return 0;
416 
417 err_reg_netdev:
418 	xgbe_mdio_unregister(pdata);
419 
420 err_bus_id:
421 	kfree(pdata->mii_bus_id);
422 
423 err_io:
424 	free_netdev(netdev);
425 
426 err_alloc:
427 	dev_notice(dev, "net device not enabled\n");
428 
429 	return ret;
430 }
431 
432 static int xgbe_remove(struct platform_device *pdev)
433 {
434 	struct net_device *netdev = platform_get_drvdata(pdev);
435 	struct xgbe_prv_data *pdata = netdev_priv(netdev);
436 
437 	DBGPR("-->xgbe_remove\n");
438 
439 	xgbe_debugfs_exit(pdata);
440 
441 	unregister_netdev(netdev);
442 
443 	xgbe_mdio_unregister(pdata);
444 
445 	kfree(pdata->mii_bus_id);
446 
447 	free_netdev(netdev);
448 
449 	DBGPR("<--xgbe_remove\n");
450 
451 	return 0;
452 }
453 
454 #ifdef CONFIG_PM
455 static int xgbe_suspend(struct device *dev)
456 {
457 	struct net_device *netdev = dev_get_drvdata(dev);
458 	int ret;
459 
460 	DBGPR("-->xgbe_suspend\n");
461 
462 	if (!netif_running(netdev)) {
463 		DBGPR("<--xgbe_dev_suspend\n");
464 		return -EINVAL;
465 	}
466 
467 	ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
468 
469 	DBGPR("<--xgbe_suspend\n");
470 
471 	return ret;
472 }
473 
474 static int xgbe_resume(struct device *dev)
475 {
476 	struct net_device *netdev = dev_get_drvdata(dev);
477 	int ret;
478 
479 	DBGPR("-->xgbe_resume\n");
480 
481 	if (!netif_running(netdev)) {
482 		DBGPR("<--xgbe_dev_resume\n");
483 		return -EINVAL;
484 	}
485 
486 	ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);
487 
488 	DBGPR("<--xgbe_resume\n");
489 
490 	return ret;
491 }
492 #endif /* CONFIG_PM */
493 
494 static const struct of_device_id xgbe_of_match[] = {
495 	{ .compatible = "amd,xgbe-seattle-v1a", },
496 	{},
497 };
498 
499 MODULE_DEVICE_TABLE(of, xgbe_of_match);
500 static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);
501 
502 static struct platform_driver xgbe_driver = {
503 	.driver = {
504 		.name = "amd-xgbe",
505 		.of_match_table = xgbe_of_match,
506 		.pm = &xgbe_pm_ops,
507 	},
508 	.probe = xgbe_probe,
509 	.remove = xgbe_remove,
510 };
511 
512 module_platform_driver(xgbe_driver);
513