1 /*
2  * AMD 10Gb Ethernet driver
3  *
4  * This file is available to you under your choice of the following two
5  * licenses:
6  *
7  * License 1: GPLv2
8  *
9  * Copyright (c) 2014 Advanced Micro Devices, Inc.
10  *
11  * This file is free software; you may copy, redistribute and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation, either version 2 of the License, or (at
14  * your option) any later version.
15  *
16  * This file is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
23  *
24  * This file incorporates work covered by the following copyright and
25  * permission notice:
26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
29  *     and you.
30  *
31  *     The Software IS NOT an item of Licensed Software or Licensed Product
32  *     under any End User Software License Agreement or Agreement for Licensed
33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
34  *     granted, free of charge, to any person obtaining a copy of this software
35  *     annotated with this license and the Software, to deal in the Software
36  *     without restriction, including without limitation the rights to use,
37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38  *     of the Software, and to permit persons to whom the Software is furnished
39  *     to do so, subject to the following conditions:
40  *
41  *     The above copyright notice and this permission notice shall be included
42  *     in all copies or substantial portions of the Software.
43  *
44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54  *     THE POSSIBILITY OF SUCH DAMAGE.
55  *
56  *
57  * License 2: Modified BSD
58  *
59  * Copyright (c) 2014 Advanced Micro Devices, Inc.
60  * All rights reserved.
61  *
62  * Redistribution and use in source and binary forms, with or without
63  * modification, are permitted provided that the following conditions are met:
64  *     * Redistributions of source code must retain the above copyright
65  *       notice, this list of conditions and the following disclaimer.
66  *     * Redistributions in binary form must reproduce the above copyright
67  *       notice, this list of conditions and the following disclaimer in the
68  *       documentation and/or other materials provided with the distribution.
69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
70  *       names of its contributors may be used to endorse or promote products
71  *       derived from this software without specific prior written permission.
72  *
73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83  *
84  * This file incorporates work covered by the following copyright and
85  * permission notice:
86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
89  *     and you.
90  *
91  *     The Software IS NOT an item of Licensed Software or Licensed Product
92  *     under any End User Software License Agreement or Agreement for Licensed
93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
94  *     granted, free of charge, to any person obtaining a copy of this software
95  *     annotated with this license and the Software, to deal in the Software
96  *     without restriction, including without limitation the rights to use,
97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98  *     of the Software, and to permit persons to whom the Software is furnished
99  *     to do so, subject to the following conditions:
100  *
101  *     The above copyright notice and this permission notice shall be included
102  *     in all copies or substantial portions of the Software.
103  *
104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114  *     THE POSSIBILITY OF SUCH DAMAGE.
115  */
116 
117 #include "xgbe.h"
118 #include "xgbe-common.h"
119 
120 static void xgbe_unmap_skb(struct xgbe_prv_data *, struct xgbe_ring_data *);
121 
122 static void xgbe_free_ring(struct xgbe_prv_data *pdata,
123 			   struct xgbe_ring *ring)
124 {
125 	struct xgbe_ring_data *rdata;
126 	unsigned int i;
127 
128 	if (!ring)
129 		return;
130 
131 	if (ring->rdata) {
132 		for (i = 0; i < ring->rdesc_count; i++) {
133 			rdata = XGBE_GET_DESC_DATA(ring, i);
134 			xgbe_unmap_skb(pdata, rdata);
135 		}
136 
137 		kfree(ring->rdata);
138 		ring->rdata = NULL;
139 	}
140 
141 	if (ring->rdesc) {
142 		dma_free_coherent(pdata->dev,
143 				  (sizeof(struct xgbe_ring_desc) *
144 				   ring->rdesc_count),
145 				  ring->rdesc, ring->rdesc_dma);
146 		ring->rdesc = NULL;
147 	}
148 }
149 
150 static void xgbe_free_ring_resources(struct xgbe_prv_data *pdata)
151 {
152 	struct xgbe_channel *channel;
153 	unsigned int i;
154 
155 	DBGPR("-->xgbe_free_ring_resources\n");
156 
157 	channel = pdata->channel;
158 	for (i = 0; i < pdata->channel_count; i++, channel++) {
159 		xgbe_free_ring(pdata, channel->tx_ring);
160 		xgbe_free_ring(pdata, channel->rx_ring);
161 	}
162 
163 	DBGPR("<--xgbe_free_ring_resources\n");
164 }
165 
166 static int xgbe_init_ring(struct xgbe_prv_data *pdata,
167 			  struct xgbe_ring *ring, unsigned int rdesc_count)
168 {
169 	DBGPR("-->xgbe_init_ring\n");
170 
171 	if (!ring)
172 		return 0;
173 
174 	/* Descriptors */
175 	ring->rdesc_count = rdesc_count;
176 	ring->rdesc = dma_alloc_coherent(pdata->dev,
177 					 (sizeof(struct xgbe_ring_desc) *
178 					  rdesc_count), &ring->rdesc_dma,
179 					 GFP_KERNEL);
180 	if (!ring->rdesc)
181 		return -ENOMEM;
182 
183 	/* Descriptor information */
184 	ring->rdata = kcalloc(rdesc_count, sizeof(struct xgbe_ring_data),
185 			      GFP_KERNEL);
186 	if (!ring->rdata)
187 		return -ENOMEM;
188 
189 	DBGPR("    rdesc=0x%p, rdesc_dma=0x%llx, rdata=0x%p\n",
190 	      ring->rdesc, ring->rdesc_dma, ring->rdata);
191 
192 	DBGPR("<--xgbe_init_ring\n");
193 
194 	return 0;
195 }
196 
197 static int xgbe_alloc_ring_resources(struct xgbe_prv_data *pdata)
198 {
199 	struct xgbe_channel *channel;
200 	unsigned int i;
201 	int ret;
202 
203 	DBGPR("-->xgbe_alloc_ring_resources\n");
204 
205 	channel = pdata->channel;
206 	for (i = 0; i < pdata->channel_count; i++, channel++) {
207 		DBGPR("  %s - tx_ring:\n", channel->name);
208 		ret = xgbe_init_ring(pdata, channel->tx_ring,
209 				     pdata->tx_desc_count);
210 		if (ret) {
211 			netdev_alert(pdata->netdev,
212 				     "error initializing Tx ring\n");
213 			goto err_ring;
214 		}
215 
216 		DBGPR("  %s - rx_ring:\n", channel->name);
217 		ret = xgbe_init_ring(pdata, channel->rx_ring,
218 				     pdata->rx_desc_count);
219 		if (ret) {
220 			netdev_alert(pdata->netdev,
221 				     "error initializing Tx ring\n");
222 			goto err_ring;
223 		}
224 	}
225 
226 	DBGPR("<--xgbe_alloc_ring_resources\n");
227 
228 	return 0;
229 
230 err_ring:
231 	xgbe_free_ring_resources(pdata);
232 
233 	return ret;
234 }
235 
236 static void xgbe_wrapper_tx_descriptor_init(struct xgbe_prv_data *pdata)
237 {
238 	struct xgbe_hw_if *hw_if = &pdata->hw_if;
239 	struct xgbe_channel *channel;
240 	struct xgbe_ring *ring;
241 	struct xgbe_ring_data *rdata;
242 	struct xgbe_ring_desc *rdesc;
243 	dma_addr_t rdesc_dma;
244 	unsigned int i, j;
245 
246 	DBGPR("-->xgbe_wrapper_tx_descriptor_init\n");
247 
248 	channel = pdata->channel;
249 	for (i = 0; i < pdata->channel_count; i++, channel++) {
250 		ring = channel->tx_ring;
251 		if (!ring)
252 			break;
253 
254 		rdesc = ring->rdesc;
255 		rdesc_dma = ring->rdesc_dma;
256 
257 		for (j = 0; j < ring->rdesc_count; j++) {
258 			rdata = XGBE_GET_DESC_DATA(ring, j);
259 
260 			rdata->rdesc = rdesc;
261 			rdata->rdesc_dma = rdesc_dma;
262 
263 			rdesc++;
264 			rdesc_dma += sizeof(struct xgbe_ring_desc);
265 		}
266 
267 		ring->cur = 0;
268 		ring->dirty = 0;
269 		ring->tx.queue_stopped = 0;
270 
271 		hw_if->tx_desc_init(channel);
272 	}
273 
274 	DBGPR("<--xgbe_wrapper_tx_descriptor_init\n");
275 }
276 
277 static void xgbe_wrapper_rx_descriptor_init(struct xgbe_prv_data *pdata)
278 {
279 	struct xgbe_hw_if *hw_if = &pdata->hw_if;
280 	struct xgbe_channel *channel;
281 	struct xgbe_ring *ring;
282 	struct xgbe_ring_desc *rdesc;
283 	struct xgbe_ring_data *rdata;
284 	dma_addr_t rdesc_dma, skb_dma;
285 	struct sk_buff *skb = NULL;
286 	unsigned int i, j;
287 
288 	DBGPR("-->xgbe_wrapper_rx_descriptor_init\n");
289 
290 	channel = pdata->channel;
291 	for (i = 0; i < pdata->channel_count; i++, channel++) {
292 		ring = channel->rx_ring;
293 		if (!ring)
294 			break;
295 
296 		rdesc = ring->rdesc;
297 		rdesc_dma = ring->rdesc_dma;
298 
299 		for (j = 0; j < ring->rdesc_count; j++) {
300 			rdata = XGBE_GET_DESC_DATA(ring, j);
301 
302 			rdata->rdesc = rdesc;
303 			rdata->rdesc_dma = rdesc_dma;
304 
305 			/* Allocate skb & assign to each rdesc */
306 			skb = dev_alloc_skb(pdata->rx_buf_size);
307 			if (skb == NULL)
308 				break;
309 			skb_dma = dma_map_single(pdata->dev, skb->data,
310 						 pdata->rx_buf_size,
311 						 DMA_FROM_DEVICE);
312 			if (dma_mapping_error(pdata->dev, skb_dma)) {
313 				netdev_alert(pdata->netdev,
314 					     "failed to do the dma map\n");
315 				dev_kfree_skb_any(skb);
316 				break;
317 			}
318 			rdata->skb = skb;
319 			rdata->skb_dma = skb_dma;
320 			rdata->skb_dma_len = pdata->rx_buf_size;
321 
322 			rdesc++;
323 			rdesc_dma += sizeof(struct xgbe_ring_desc);
324 		}
325 
326 		ring->cur = 0;
327 		ring->dirty = 0;
328 		ring->rx.realloc_index = 0;
329 		ring->rx.realloc_threshold = 0;
330 
331 		hw_if->rx_desc_init(channel);
332 	}
333 
334 	DBGPR("<--xgbe_wrapper_rx_descriptor_init\n");
335 }
336 
337 static void xgbe_unmap_skb(struct xgbe_prv_data *pdata,
338 			   struct xgbe_ring_data *rdata)
339 {
340 	if (rdata->skb_dma) {
341 		if (rdata->mapped_as_page) {
342 			dma_unmap_page(pdata->dev, rdata->skb_dma,
343 				       rdata->skb_dma_len, DMA_TO_DEVICE);
344 		} else {
345 			dma_unmap_single(pdata->dev, rdata->skb_dma,
346 					 rdata->skb_dma_len, DMA_TO_DEVICE);
347 		}
348 		rdata->skb_dma = 0;
349 		rdata->skb_dma_len = 0;
350 	}
351 
352 	if (rdata->skb) {
353 		dev_kfree_skb_any(rdata->skb);
354 		rdata->skb = NULL;
355 	}
356 
357 	rdata->tso_header = 0;
358 	rdata->len = 0;
359 	rdata->interrupt = 0;
360 	rdata->mapped_as_page = 0;
361 
362 	if (rdata->state_saved) {
363 		rdata->state_saved = 0;
364 		rdata->state.incomplete = 0;
365 		rdata->state.context_next = 0;
366 		rdata->state.skb = NULL;
367 		rdata->state.len = 0;
368 		rdata->state.error = 0;
369 	}
370 }
371 
372 static int xgbe_map_tx_skb(struct xgbe_channel *channel, struct sk_buff *skb)
373 {
374 	struct xgbe_prv_data *pdata = channel->pdata;
375 	struct xgbe_ring *ring = channel->tx_ring;
376 	struct xgbe_ring_data *rdata;
377 	struct xgbe_packet_data *packet;
378 	struct skb_frag_struct *frag;
379 	dma_addr_t skb_dma;
380 	unsigned int start_index, cur_index;
381 	unsigned int offset, tso, vlan, datalen, len;
382 	unsigned int i;
383 
384 	DBGPR("-->xgbe_map_tx_skb: cur = %d\n", ring->cur);
385 
386 	offset = 0;
387 	start_index = ring->cur;
388 	cur_index = ring->cur;
389 
390 	packet = &ring->packet_data;
391 	packet->rdesc_count = 0;
392 	packet->length = 0;
393 
394 	tso = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
395 			     TSO_ENABLE);
396 	vlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
397 			      VLAN_CTAG);
398 
399 	/* Save space for a context descriptor if needed */
400 	if ((tso && (packet->mss != ring->tx.cur_mss)) ||
401 	    (vlan && (packet->vlan_ctag != ring->tx.cur_vlan_ctag)))
402 		cur_index++;
403 	rdata = XGBE_GET_DESC_DATA(ring, cur_index);
404 
405 	if (tso) {
406 		DBGPR("  TSO packet\n");
407 
408 		/* Map the TSO header */
409 		skb_dma = dma_map_single(pdata->dev, skb->data,
410 					 packet->header_len, DMA_TO_DEVICE);
411 		if (dma_mapping_error(pdata->dev, skb_dma)) {
412 			netdev_alert(pdata->netdev, "dma_map_single failed\n");
413 			goto err_out;
414 		}
415 		rdata->skb_dma = skb_dma;
416 		rdata->skb_dma_len = packet->header_len;
417 		rdata->tso_header = 1;
418 
419 		offset = packet->header_len;
420 
421 		packet->length += packet->header_len;
422 
423 		cur_index++;
424 		rdata = XGBE_GET_DESC_DATA(ring, cur_index);
425 	}
426 
427 	/* Map the (remainder of the) packet */
428 	for (datalen = skb_headlen(skb) - offset; datalen; ) {
429 		len = min_t(unsigned int, datalen, XGBE_TX_MAX_BUF_SIZE);
430 
431 		skb_dma = dma_map_single(pdata->dev, skb->data + offset, len,
432 					 DMA_TO_DEVICE);
433 		if (dma_mapping_error(pdata->dev, skb_dma)) {
434 			netdev_alert(pdata->netdev, "dma_map_single failed\n");
435 			goto err_out;
436 		}
437 		rdata->skb_dma = skb_dma;
438 		rdata->skb_dma_len = len;
439 		DBGPR("  skb data: index=%u, dma=0x%llx, len=%u\n",
440 		      cur_index, skb_dma, len);
441 
442 		datalen -= len;
443 		offset += len;
444 
445 		packet->length += len;
446 
447 		cur_index++;
448 		rdata = XGBE_GET_DESC_DATA(ring, cur_index);
449 	}
450 
451 	for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
452 		DBGPR("  mapping frag %u\n", i);
453 
454 		frag = &skb_shinfo(skb)->frags[i];
455 		offset = 0;
456 
457 		for (datalen = skb_frag_size(frag); datalen; ) {
458 			len = min_t(unsigned int, datalen,
459 				    XGBE_TX_MAX_BUF_SIZE);
460 
461 			skb_dma = skb_frag_dma_map(pdata->dev, frag, offset,
462 						   len, DMA_TO_DEVICE);
463 			if (dma_mapping_error(pdata->dev, skb_dma)) {
464 				netdev_alert(pdata->netdev,
465 					     "skb_frag_dma_map failed\n");
466 				goto err_out;
467 			}
468 			rdata->skb_dma = skb_dma;
469 			rdata->skb_dma_len = len;
470 			rdata->mapped_as_page = 1;
471 			DBGPR("  skb data: index=%u, dma=0x%llx, len=%u\n",
472 			      cur_index, skb_dma, len);
473 
474 			datalen -= len;
475 			offset += len;
476 
477 			packet->length += len;
478 
479 			cur_index++;
480 			rdata = XGBE_GET_DESC_DATA(ring, cur_index);
481 		}
482 	}
483 
484 	/* Save the skb address in the last entry */
485 	rdata->skb = skb;
486 
487 	/* Save the number of descriptor entries used */
488 	packet->rdesc_count = cur_index - start_index;
489 
490 	DBGPR("<--xgbe_map_tx_skb: count=%u\n", packet->rdesc_count);
491 
492 	return packet->rdesc_count;
493 
494 err_out:
495 	while (start_index < cur_index) {
496 		rdata = XGBE_GET_DESC_DATA(ring, start_index++);
497 		xgbe_unmap_skb(pdata, rdata);
498 	}
499 
500 	DBGPR("<--xgbe_map_tx_skb: count=0\n");
501 
502 	return 0;
503 }
504 
505 static void xgbe_realloc_skb(struct xgbe_channel *channel)
506 {
507 	struct xgbe_prv_data *pdata = channel->pdata;
508 	struct xgbe_hw_if *hw_if = &pdata->hw_if;
509 	struct xgbe_ring *ring = channel->rx_ring;
510 	struct xgbe_ring_data *rdata;
511 	struct sk_buff *skb = NULL;
512 	dma_addr_t skb_dma;
513 	int i;
514 
515 	DBGPR("-->xgbe_realloc_skb: rx_ring->rx.realloc_index = %u\n",
516 	      ring->rx.realloc_index);
517 
518 	for (i = 0; i < ring->dirty; i++) {
519 		rdata = XGBE_GET_DESC_DATA(ring, ring->rx.realloc_index);
520 
521 		/* Reset rdata values */
522 		xgbe_unmap_skb(pdata, rdata);
523 
524 		/* Allocate skb & assign to each rdesc */
525 		skb = dev_alloc_skb(pdata->rx_buf_size);
526 		if (skb == NULL)
527 			break;
528 		skb_dma = dma_map_single(pdata->dev, skb->data,
529 					 pdata->rx_buf_size, DMA_FROM_DEVICE);
530 		if (dma_mapping_error(pdata->dev, skb_dma)) {
531 			netdev_alert(pdata->netdev,
532 				     "failed to do the dma map\n");
533 			dev_kfree_skb_any(skb);
534 			break;
535 		}
536 		rdata->skb = skb;
537 		rdata->skb_dma = skb_dma;
538 		rdata->skb_dma_len = pdata->rx_buf_size;
539 
540 		hw_if->rx_desc_reset(rdata);
541 
542 		ring->rx.realloc_index++;
543 	}
544 	ring->dirty = 0;
545 
546 	DBGPR("<--xgbe_realloc_skb\n");
547 }
548 
549 void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *desc_if)
550 {
551 	DBGPR("-->xgbe_init_function_ptrs_desc\n");
552 
553 	desc_if->alloc_ring_resources = xgbe_alloc_ring_resources;
554 	desc_if->free_ring_resources = xgbe_free_ring_resources;
555 	desc_if->map_tx_skb = xgbe_map_tx_skb;
556 	desc_if->realloc_skb = xgbe_realloc_skb;
557 	desc_if->unmap_skb = xgbe_unmap_skb;
558 	desc_if->wrapper_tx_desc_init = xgbe_wrapper_tx_descriptor_init;
559 	desc_if->wrapper_rx_desc_init = xgbe_wrapper_rx_descriptor_init;
560 
561 	DBGPR("<--xgbe_init_function_ptrs_desc\n");
562 }
563