1 // SPDX-License-Identifier: GPL-2.0-only 2 /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $ 3 * lance.c: Linux/Sparc/Lance driver 4 * 5 * Written 1995, 1996 by Miguel de Icaza 6 * Sources: 7 * The Linux depca driver 8 * The Linux lance driver. 9 * The Linux skeleton driver. 10 * The NetBSD Sparc/Lance driver. 11 * Theo de Raadt (deraadt@openbsd.org) 12 * NCR92C990 Lan Controller manual 13 * 14 * 1.4: 15 * Added support to run with a ledma on the Sun4m 16 * 17 * 1.5: 18 * Added multiple card detection. 19 * 20 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost 21 * (ecd@skynet.be) 22 * 23 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost 24 * (ecd@skynet.be) 25 * 26 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller 27 * (davem@caip.rutgers.edu) 28 * 29 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as 30 * this disables auto carrier detection on sun4m. Eddie C. Dost 31 * (ecd@skynet.be) 32 * 33 * 1.7: 34 * 6/26/96: Bug fix for multiple ledmas, miguel. 35 * 36 * 1.8: 37 * Stole multicast code from depca.c, fixed lance_tx. 38 * 39 * 1.9: 40 * 8/21/96: Fixed the multicast code (Pedro Roque) 41 * 42 * 8/28/96: Send fake packet in lance_open() if auto_select is true, 43 * so we can detect the carrier loss condition in time. 44 * Eddie C. Dost (ecd@skynet.be) 45 * 46 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an 47 * MNA trap during chksum_partial_copy(). (ecd@skynet.be) 48 * 49 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be) 50 * 51 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets. 52 * This was the sun4c killer. Shit, stupid bug. 53 * (ecd@skynet.be) 54 * 55 * 1.10: 56 * 1/26/97: Modularize driver. (ecd@skynet.be) 57 * 58 * 1.11: 59 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz) 60 * 61 * 1.12: 62 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem. 63 * Anton Blanchard (anton@progsoc.uts.edu.au) 64 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces. 65 * David S. Miller (davem@redhat.com) 66 * 2.01: 67 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com) 68 * 69 */ 70 71 #undef DEBUG_DRIVER 72 73 static char lancestr[] = "LANCE"; 74 75 #include <linux/module.h> 76 #include <linux/kernel.h> 77 #include <linux/types.h> 78 #include <linux/fcntl.h> 79 #include <linux/interrupt.h> 80 #include <linux/ioport.h> 81 #include <linux/in.h> 82 #include <linux/string.h> 83 #include <linux/delay.h> 84 #include <linux/crc32.h> 85 #include <linux/errno.h> 86 #include <linux/socket.h> /* Used for the temporal inet entries and routing */ 87 #include <linux/route.h> 88 #include <linux/netdevice.h> 89 #include <linux/etherdevice.h> 90 #include <linux/skbuff.h> 91 #include <linux/ethtool.h> 92 #include <linux/bitops.h> 93 #include <linux/dma-mapping.h> 94 #include <linux/of.h> 95 #include <linux/of_device.h> 96 #include <linux/gfp.h> 97 98 #include <asm/io.h> 99 #include <asm/dma.h> 100 #include <asm/pgtable.h> 101 #include <asm/byteorder.h> /* Used by the checksum routines */ 102 #include <asm/idprom.h> 103 #include <asm/prom.h> 104 #include <asm/auxio.h> /* For tpe-link-test? setting */ 105 #include <asm/irq.h> 106 107 #define DRV_NAME "sunlance" 108 #define DRV_VERSION "2.02" 109 #define DRV_RELDATE "8/24/03" 110 #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)" 111 112 static char version[] = 113 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; 114 115 MODULE_VERSION(DRV_VERSION); 116 MODULE_AUTHOR(DRV_AUTHOR); 117 MODULE_DESCRIPTION("Sun Lance ethernet driver"); 118 MODULE_LICENSE("GPL"); 119 120 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 121 #ifndef LANCE_LOG_TX_BUFFERS 122 #define LANCE_LOG_TX_BUFFERS 4 123 #define LANCE_LOG_RX_BUFFERS 4 124 #endif 125 126 #define LE_CSR0 0 127 #define LE_CSR1 1 128 #define LE_CSR2 2 129 #define LE_CSR3 3 130 131 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 132 133 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 134 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 135 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 136 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 137 #define LE_C0_MERR 0x0800 /* ME: Memory error */ 138 #define LE_C0_RINT 0x0400 /* Received interrupt */ 139 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 140 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 141 #define LE_C0_INTR 0x0080 /* Interrupt or error */ 142 #define LE_C0_INEA 0x0040 /* Interrupt enable */ 143 #define LE_C0_RXON 0x0020 /* Receiver on */ 144 #define LE_C0_TXON 0x0010 /* Transmitter on */ 145 #define LE_C0_TDMD 0x0008 /* Transmitter demand */ 146 #define LE_C0_STOP 0x0004 /* Stop the card */ 147 #define LE_C0_STRT 0x0002 /* Start the card */ 148 #define LE_C0_INIT 0x0001 /* Init the card */ 149 150 #define LE_C3_BSWP 0x4 /* SWAP */ 151 #define LE_C3_ACON 0x2 /* ALE Control */ 152 #define LE_C3_BCON 0x1 /* Byte control */ 153 154 /* Receive message descriptor 1 */ 155 #define LE_R1_OWN 0x80 /* Who owns the entry */ 156 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */ 157 #define LE_R1_FRA 0x20 /* FRA: Frame error */ 158 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */ 159 #define LE_R1_CRC 0x08 /* CRC error */ 160 #define LE_R1_BUF 0x04 /* BUF: Buffer error */ 161 #define LE_R1_SOP 0x02 /* Start of packet */ 162 #define LE_R1_EOP 0x01 /* End of packet */ 163 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ 164 165 #define LE_T1_OWN 0x80 /* Lance owns the packet */ 166 #define LE_T1_ERR 0x40 /* Error summary */ 167 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */ 168 #define LE_T1_EONE 0x08 /* Error: one retry needed */ 169 #define LE_T1_EDEF 0x04 /* Error: deferred */ 170 #define LE_T1_SOP 0x02 /* Start of packet */ 171 #define LE_T1_EOP 0x01 /* End of packet */ 172 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ 173 174 #define LE_T3_BUF 0x8000 /* Buffer error */ 175 #define LE_T3_UFL 0x4000 /* Error underflow */ 176 #define LE_T3_LCOL 0x1000 /* Error late collision */ 177 #define LE_T3_CLOS 0x0800 /* Error carrier loss */ 178 #define LE_T3_RTY 0x0400 /* Error retry */ 179 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 180 181 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 182 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 183 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) 184 #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK) 185 186 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 187 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 188 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) 189 #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK) 190 191 #define PKT_BUF_SZ 1544 192 #define RX_BUFF_SIZE PKT_BUF_SZ 193 #define TX_BUFF_SIZE PKT_BUF_SZ 194 195 struct lance_rx_desc { 196 u16 rmd0; /* low address of packet */ 197 u8 rmd1_bits; /* descriptor bits */ 198 u8 rmd1_hadr; /* high address of packet */ 199 s16 length; /* This length is 2s complement (negative)! 200 * Buffer length 201 */ 202 u16 mblength; /* This is the actual number of bytes received */ 203 }; 204 205 struct lance_tx_desc { 206 u16 tmd0; /* low address of packet */ 207 u8 tmd1_bits; /* descriptor bits */ 208 u8 tmd1_hadr; /* high address of packet */ 209 s16 length; /* Length is 2s complement (negative)! */ 210 u16 misc; 211 }; 212 213 /* The LANCE initialization block, described in databook. */ 214 /* On the Sparc, this block should be on a DMA region */ 215 struct lance_init_block { 216 u16 mode; /* Pre-set mode (reg. 15) */ 217 u8 phys_addr[6]; /* Physical ethernet address */ 218 u32 filter[2]; /* Multicast filter. */ 219 220 /* Receive and transmit ring base, along with extra bits. */ 221 u16 rx_ptr; /* receive descriptor addr */ 222 u16 rx_len; /* receive len and high addr */ 223 u16 tx_ptr; /* transmit descriptor addr */ 224 u16 tx_len; /* transmit len and high addr */ 225 226 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */ 227 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 228 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 229 230 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE]; 231 u8 pad[2]; /* align rx_buf for copy_and_sum(). */ 232 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE]; 233 }; 234 235 #define libdesc_offset(rt, elem) \ 236 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem]))))) 237 238 #define libbuff_offset(rt, elem) \ 239 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0]))))) 240 241 struct lance_private { 242 void __iomem *lregs; /* Lance RAP/RDP regs. */ 243 void __iomem *dregs; /* DMA controller regs. */ 244 struct lance_init_block __iomem *init_block_iomem; 245 struct lance_init_block *init_block_mem; 246 247 spinlock_t lock; 248 249 int rx_new, tx_new; 250 int rx_old, tx_old; 251 252 struct platform_device *ledma; /* If set this points to ledma */ 253 char tpe; /* cable-selection is TPE */ 254 char auto_select; /* cable-selection by carrier */ 255 char burst_sizes; /* ledma SBus burst sizes */ 256 char pio_buffer; /* init block in PIO space? */ 257 258 unsigned short busmaster_regval; 259 260 void (*init_ring)(struct net_device *); 261 void (*rx)(struct net_device *); 262 void (*tx)(struct net_device *); 263 264 char *name; 265 dma_addr_t init_block_dvma; 266 struct net_device *dev; /* Backpointer */ 267 struct platform_device *op; 268 struct platform_device *lebuffer; 269 struct timer_list multicast_timer; 270 }; 271 272 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 273 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 274 lp->tx_old - lp->tx_new-1) 275 276 /* Lance registers. */ 277 #define RDP 0x00UL /* register data port */ 278 #define RAP 0x02UL /* register address port */ 279 #define LANCE_REG_SIZE 0x04UL 280 281 #define STOP_LANCE(__lp) \ 282 do { void __iomem *__base = (__lp)->lregs; \ 283 sbus_writew(LE_CSR0, __base + RAP); \ 284 sbus_writew(LE_C0_STOP, __base + RDP); \ 285 } while (0) 286 287 int sparc_lance_debug = 2; 288 289 /* The Lance uses 24 bit addresses */ 290 /* On the Sun4c the DVMA will provide the remaining bytes for us */ 291 /* On the Sun4m we have to instruct the ledma to provide them */ 292 /* Even worse, on scsi/ether SBUS cards, the init block and the 293 * transmit/receive buffers are addresses as offsets from absolute 294 * zero on the lebuffer PIO area. -DaveM 295 */ 296 297 #define LANCE_ADDR(x) ((long)(x) & ~0xff000000) 298 299 /* Load the CSR registers */ 300 static void load_csrs(struct lance_private *lp) 301 { 302 u32 leptr; 303 304 if (lp->pio_buffer) 305 leptr = 0; 306 else 307 leptr = LANCE_ADDR(lp->init_block_dvma); 308 309 sbus_writew(LE_CSR1, lp->lregs + RAP); 310 sbus_writew(leptr & 0xffff, lp->lregs + RDP); 311 sbus_writew(LE_CSR2, lp->lregs + RAP); 312 sbus_writew(leptr >> 16, lp->lregs + RDP); 313 sbus_writew(LE_CSR3, lp->lregs + RAP); 314 sbus_writew(lp->busmaster_regval, lp->lregs + RDP); 315 316 /* Point back to csr0 */ 317 sbus_writew(LE_CSR0, lp->lregs + RAP); 318 } 319 320 /* Setup the Lance Rx and Tx rings */ 321 static void lance_init_ring_dvma(struct net_device *dev) 322 { 323 struct lance_private *lp = netdev_priv(dev); 324 struct lance_init_block *ib = lp->init_block_mem; 325 dma_addr_t aib = lp->init_block_dvma; 326 __u32 leptr; 327 int i; 328 329 /* Lock out other processes while setting up hardware */ 330 netif_stop_queue(dev); 331 lp->rx_new = lp->tx_new = 0; 332 lp->rx_old = lp->tx_old = 0; 333 334 /* Copy the ethernet address to the lance init block 335 * Note that on the sparc you need to swap the ethernet address. 336 */ 337 ib->phys_addr [0] = dev->dev_addr [1]; 338 ib->phys_addr [1] = dev->dev_addr [0]; 339 ib->phys_addr [2] = dev->dev_addr [3]; 340 ib->phys_addr [3] = dev->dev_addr [2]; 341 ib->phys_addr [4] = dev->dev_addr [5]; 342 ib->phys_addr [5] = dev->dev_addr [4]; 343 344 /* Setup the Tx ring entries */ 345 for (i = 0; i < TX_RING_SIZE; i++) { 346 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i)); 347 ib->btx_ring [i].tmd0 = leptr; 348 ib->btx_ring [i].tmd1_hadr = leptr >> 16; 349 ib->btx_ring [i].tmd1_bits = 0; 350 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */ 351 ib->btx_ring [i].misc = 0; 352 } 353 354 /* Setup the Rx ring entries */ 355 for (i = 0; i < RX_RING_SIZE; i++) { 356 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i)); 357 358 ib->brx_ring [i].rmd0 = leptr; 359 ib->brx_ring [i].rmd1_hadr = leptr >> 16; 360 ib->brx_ring [i].rmd1_bits = LE_R1_OWN; 361 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000; 362 ib->brx_ring [i].mblength = 0; 363 } 364 365 /* Setup the initialization block */ 366 367 /* Setup rx descriptor pointer */ 368 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0)); 369 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); 370 ib->rx_ptr = leptr; 371 372 /* Setup tx descriptor pointer */ 373 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0)); 374 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); 375 ib->tx_ptr = leptr; 376 } 377 378 static void lance_init_ring_pio(struct net_device *dev) 379 { 380 struct lance_private *lp = netdev_priv(dev); 381 struct lance_init_block __iomem *ib = lp->init_block_iomem; 382 u32 leptr; 383 int i; 384 385 /* Lock out other processes while setting up hardware */ 386 netif_stop_queue(dev); 387 lp->rx_new = lp->tx_new = 0; 388 lp->rx_old = lp->tx_old = 0; 389 390 /* Copy the ethernet address to the lance init block 391 * Note that on the sparc you need to swap the ethernet address. 392 */ 393 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]); 394 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]); 395 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]); 396 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]); 397 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]); 398 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]); 399 400 /* Setup the Tx ring entries */ 401 for (i = 0; i < TX_RING_SIZE; i++) { 402 leptr = libbuff_offset(tx_buf, i); 403 sbus_writew(leptr, &ib->btx_ring [i].tmd0); 404 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr); 405 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits); 406 407 /* The ones required by tmd2 */ 408 sbus_writew(0xf000, &ib->btx_ring [i].length); 409 sbus_writew(0, &ib->btx_ring [i].misc); 410 } 411 412 /* Setup the Rx ring entries */ 413 for (i = 0; i < RX_RING_SIZE; i++) { 414 leptr = libbuff_offset(rx_buf, i); 415 416 sbus_writew(leptr, &ib->brx_ring [i].rmd0); 417 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr); 418 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits); 419 sbus_writew(-RX_BUFF_SIZE|0xf000, 420 &ib->brx_ring [i].length); 421 sbus_writew(0, &ib->brx_ring [i].mblength); 422 } 423 424 /* Setup the initialization block */ 425 426 /* Setup rx descriptor pointer */ 427 leptr = libdesc_offset(brx_ring, 0); 428 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16), 429 &ib->rx_len); 430 sbus_writew(leptr, &ib->rx_ptr); 431 432 /* Setup tx descriptor pointer */ 433 leptr = libdesc_offset(btx_ring, 0); 434 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16), 435 &ib->tx_len); 436 sbus_writew(leptr, &ib->tx_ptr); 437 } 438 439 static void init_restart_ledma(struct lance_private *lp) 440 { 441 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 442 443 if (!(csr & DMA_HNDL_ERROR)) { 444 /* E-Cache draining */ 445 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) 446 barrier(); 447 } 448 449 csr = sbus_readl(lp->dregs + DMA_CSR); 450 csr &= ~DMA_E_BURSTS; 451 if (lp->burst_sizes & DMA_BURST32) 452 csr |= DMA_E_BURST32; 453 else 454 csr |= DMA_E_BURST16; 455 456 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); 457 458 if (lp->tpe) 459 csr |= DMA_EN_ENETAUI; 460 else 461 csr &= ~DMA_EN_ENETAUI; 462 udelay(20); 463 sbus_writel(csr, lp->dregs + DMA_CSR); 464 udelay(200); 465 } 466 467 static int init_restart_lance(struct lance_private *lp) 468 { 469 u16 regval = 0; 470 int i; 471 472 if (lp->dregs) 473 init_restart_ledma(lp); 474 475 sbus_writew(LE_CSR0, lp->lregs + RAP); 476 sbus_writew(LE_C0_INIT, lp->lregs + RDP); 477 478 /* Wait for the lance to complete initialization */ 479 for (i = 0; i < 100; i++) { 480 regval = sbus_readw(lp->lregs + RDP); 481 482 if (regval & (LE_C0_ERR | LE_C0_IDON)) 483 break; 484 barrier(); 485 } 486 if (i == 100 || (regval & LE_C0_ERR)) { 487 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n", 488 i, regval); 489 if (lp->dregs) 490 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); 491 return -1; 492 } 493 494 /* Clear IDON by writing a "1", enable interrupts and start lance */ 495 sbus_writew(LE_C0_IDON, lp->lregs + RDP); 496 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP); 497 498 if (lp->dregs) { 499 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 500 501 csr |= DMA_INT_ENAB; 502 sbus_writel(csr, lp->dregs + DMA_CSR); 503 } 504 505 return 0; 506 } 507 508 static void lance_rx_dvma(struct net_device *dev) 509 { 510 struct lance_private *lp = netdev_priv(dev); 511 struct lance_init_block *ib = lp->init_block_mem; 512 struct lance_rx_desc *rd; 513 u8 bits; 514 int len, entry = lp->rx_new; 515 struct sk_buff *skb; 516 517 for (rd = &ib->brx_ring [entry]; 518 !((bits = rd->rmd1_bits) & LE_R1_OWN); 519 rd = &ib->brx_ring [entry]) { 520 521 /* We got an incomplete frame? */ 522 if ((bits & LE_R1_POK) != LE_R1_POK) { 523 dev->stats.rx_over_errors++; 524 dev->stats.rx_errors++; 525 } else if (bits & LE_R1_ERR) { 526 /* Count only the end frame as a rx error, 527 * not the beginning 528 */ 529 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; 530 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; 531 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; 532 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; 533 if (bits & LE_R1_EOP) dev->stats.rx_errors++; 534 } else { 535 len = (rd->mblength & 0xfff) - 4; 536 skb = netdev_alloc_skb(dev, len + 2); 537 538 if (skb == NULL) { 539 dev->stats.rx_dropped++; 540 rd->mblength = 0; 541 rd->rmd1_bits = LE_R1_OWN; 542 lp->rx_new = RX_NEXT(entry); 543 return; 544 } 545 546 dev->stats.rx_bytes += len; 547 548 skb_reserve(skb, 2); /* 16 byte align */ 549 skb_put(skb, len); /* make room */ 550 skb_copy_to_linear_data(skb, 551 (unsigned char *)&(ib->rx_buf [entry][0]), 552 len); 553 skb->protocol = eth_type_trans(skb, dev); 554 netif_rx(skb); 555 dev->stats.rx_packets++; 556 } 557 558 /* Return the packet to the pool */ 559 rd->mblength = 0; 560 rd->rmd1_bits = LE_R1_OWN; 561 entry = RX_NEXT(entry); 562 } 563 564 lp->rx_new = entry; 565 } 566 567 static void lance_tx_dvma(struct net_device *dev) 568 { 569 struct lance_private *lp = netdev_priv(dev); 570 struct lance_init_block *ib = lp->init_block_mem; 571 int i, j; 572 573 spin_lock(&lp->lock); 574 575 j = lp->tx_old; 576 for (i = j; i != lp->tx_new; i = j) { 577 struct lance_tx_desc *td = &ib->btx_ring [i]; 578 u8 bits = td->tmd1_bits; 579 580 /* If we hit a packet not owned by us, stop */ 581 if (bits & LE_T1_OWN) 582 break; 583 584 if (bits & LE_T1_ERR) { 585 u16 status = td->misc; 586 587 dev->stats.tx_errors++; 588 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; 589 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; 590 591 if (status & LE_T3_CLOS) { 592 dev->stats.tx_carrier_errors++; 593 if (lp->auto_select) { 594 lp->tpe = 1 - lp->tpe; 595 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 596 dev->name, lp->tpe?"TPE":"AUI"); 597 STOP_LANCE(lp); 598 lp->init_ring(dev); 599 load_csrs(lp); 600 init_restart_lance(lp); 601 goto out; 602 } 603 } 604 605 /* Buffer errors and underflows turn off the 606 * transmitter, restart the adapter. 607 */ 608 if (status & (LE_T3_BUF|LE_T3_UFL)) { 609 dev->stats.tx_fifo_errors++; 610 611 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 612 dev->name); 613 STOP_LANCE(lp); 614 lp->init_ring(dev); 615 load_csrs(lp); 616 init_restart_lance(lp); 617 goto out; 618 } 619 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 620 /* 621 * So we don't count the packet more than once. 622 */ 623 td->tmd1_bits = bits & ~(LE_T1_POK); 624 625 /* One collision before packet was sent. */ 626 if (bits & LE_T1_EONE) 627 dev->stats.collisions++; 628 629 /* More than one collision, be optimistic. */ 630 if (bits & LE_T1_EMORE) 631 dev->stats.collisions += 2; 632 633 dev->stats.tx_packets++; 634 } 635 636 j = TX_NEXT(j); 637 } 638 lp->tx_old = j; 639 out: 640 if (netif_queue_stopped(dev) && 641 TX_BUFFS_AVAIL > 0) 642 netif_wake_queue(dev); 643 644 spin_unlock(&lp->lock); 645 } 646 647 static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len) 648 { 649 u16 *p16 = (u16 *) skb->data; 650 u32 *p32; 651 u8 *p8; 652 void __iomem *pbuf = piobuf; 653 654 /* We know here that both src and dest are on a 16bit boundary. */ 655 *p16++ = sbus_readw(pbuf); 656 p32 = (u32 *) p16; 657 pbuf += 2; 658 len -= 2; 659 660 while (len >= 4) { 661 *p32++ = sbus_readl(pbuf); 662 pbuf += 4; 663 len -= 4; 664 } 665 p8 = (u8 *) p32; 666 if (len >= 2) { 667 p16 = (u16 *) p32; 668 *p16++ = sbus_readw(pbuf); 669 pbuf += 2; 670 len -= 2; 671 p8 = (u8 *) p16; 672 } 673 if (len >= 1) 674 *p8 = sbus_readb(pbuf); 675 } 676 677 static void lance_rx_pio(struct net_device *dev) 678 { 679 struct lance_private *lp = netdev_priv(dev); 680 struct lance_init_block __iomem *ib = lp->init_block_iomem; 681 struct lance_rx_desc __iomem *rd; 682 unsigned char bits; 683 int len, entry; 684 struct sk_buff *skb; 685 686 entry = lp->rx_new; 687 for (rd = &ib->brx_ring [entry]; 688 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); 689 rd = &ib->brx_ring [entry]) { 690 691 /* We got an incomplete frame? */ 692 if ((bits & LE_R1_POK) != LE_R1_POK) { 693 dev->stats.rx_over_errors++; 694 dev->stats.rx_errors++; 695 } else if (bits & LE_R1_ERR) { 696 /* Count only the end frame as a rx error, 697 * not the beginning 698 */ 699 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; 700 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; 701 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; 702 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; 703 if (bits & LE_R1_EOP) dev->stats.rx_errors++; 704 } else { 705 len = (sbus_readw(&rd->mblength) & 0xfff) - 4; 706 skb = netdev_alloc_skb(dev, len + 2); 707 708 if (skb == NULL) { 709 dev->stats.rx_dropped++; 710 sbus_writew(0, &rd->mblength); 711 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 712 lp->rx_new = RX_NEXT(entry); 713 return; 714 } 715 716 dev->stats.rx_bytes += len; 717 718 skb_reserve (skb, 2); /* 16 byte align */ 719 skb_put(skb, len); /* make room */ 720 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len); 721 skb->protocol = eth_type_trans(skb, dev); 722 netif_rx(skb); 723 dev->stats.rx_packets++; 724 } 725 726 /* Return the packet to the pool */ 727 sbus_writew(0, &rd->mblength); 728 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 729 entry = RX_NEXT(entry); 730 } 731 732 lp->rx_new = entry; 733 } 734 735 static void lance_tx_pio(struct net_device *dev) 736 { 737 struct lance_private *lp = netdev_priv(dev); 738 struct lance_init_block __iomem *ib = lp->init_block_iomem; 739 int i, j; 740 741 spin_lock(&lp->lock); 742 743 j = lp->tx_old; 744 for (i = j; i != lp->tx_new; i = j) { 745 struct lance_tx_desc __iomem *td = &ib->btx_ring [i]; 746 u8 bits = sbus_readb(&td->tmd1_bits); 747 748 /* If we hit a packet not owned by us, stop */ 749 if (bits & LE_T1_OWN) 750 break; 751 752 if (bits & LE_T1_ERR) { 753 u16 status = sbus_readw(&td->misc); 754 755 dev->stats.tx_errors++; 756 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; 757 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; 758 759 if (status & LE_T3_CLOS) { 760 dev->stats.tx_carrier_errors++; 761 if (lp->auto_select) { 762 lp->tpe = 1 - lp->tpe; 763 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 764 dev->name, lp->tpe?"TPE":"AUI"); 765 STOP_LANCE(lp); 766 lp->init_ring(dev); 767 load_csrs(lp); 768 init_restart_lance(lp); 769 goto out; 770 } 771 } 772 773 /* Buffer errors and underflows turn off the 774 * transmitter, restart the adapter. 775 */ 776 if (status & (LE_T3_BUF|LE_T3_UFL)) { 777 dev->stats.tx_fifo_errors++; 778 779 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 780 dev->name); 781 STOP_LANCE(lp); 782 lp->init_ring(dev); 783 load_csrs(lp); 784 init_restart_lance(lp); 785 goto out; 786 } 787 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 788 /* 789 * So we don't count the packet more than once. 790 */ 791 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits); 792 793 /* One collision before packet was sent. */ 794 if (bits & LE_T1_EONE) 795 dev->stats.collisions++; 796 797 /* More than one collision, be optimistic. */ 798 if (bits & LE_T1_EMORE) 799 dev->stats.collisions += 2; 800 801 dev->stats.tx_packets++; 802 } 803 804 j = TX_NEXT(j); 805 } 806 lp->tx_old = j; 807 808 if (netif_queue_stopped(dev) && 809 TX_BUFFS_AVAIL > 0) 810 netif_wake_queue(dev); 811 out: 812 spin_unlock(&lp->lock); 813 } 814 815 static irqreturn_t lance_interrupt(int irq, void *dev_id) 816 { 817 struct net_device *dev = dev_id; 818 struct lance_private *lp = netdev_priv(dev); 819 int csr0; 820 821 sbus_writew(LE_CSR0, lp->lregs + RAP); 822 csr0 = sbus_readw(lp->lregs + RDP); 823 824 /* Acknowledge all the interrupt sources ASAP */ 825 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT), 826 lp->lregs + RDP); 827 828 if ((csr0 & LE_C0_ERR) != 0) { 829 /* Clear the error condition */ 830 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 831 LE_C0_CERR | LE_C0_MERR), 832 lp->lregs + RDP); 833 } 834 835 if (csr0 & LE_C0_RINT) 836 lp->rx(dev); 837 838 if (csr0 & LE_C0_TINT) 839 lp->tx(dev); 840 841 if (csr0 & LE_C0_BABL) 842 dev->stats.tx_errors++; 843 844 if (csr0 & LE_C0_MISS) 845 dev->stats.rx_errors++; 846 847 if (csr0 & LE_C0_MERR) { 848 if (lp->dregs) { 849 u32 addr = sbus_readl(lp->dregs + DMA_ADDR); 850 851 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n", 852 dev->name, csr0, addr & 0xffffff); 853 } else { 854 printk(KERN_ERR "%s: Memory error, status %04x\n", 855 dev->name, csr0); 856 } 857 858 sbus_writew(LE_C0_STOP, lp->lregs + RDP); 859 860 if (lp->dregs) { 861 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); 862 863 dma_csr |= DMA_FIFO_INV; 864 sbus_writel(dma_csr, lp->dregs + DMA_CSR); 865 } 866 867 lp->init_ring(dev); 868 load_csrs(lp); 869 init_restart_lance(lp); 870 netif_wake_queue(dev); 871 } 872 873 sbus_writew(LE_C0_INEA, lp->lregs + RDP); 874 875 return IRQ_HANDLED; 876 } 877 878 /* Build a fake network packet and send it to ourselves. */ 879 static void build_fake_packet(struct lance_private *lp) 880 { 881 struct net_device *dev = lp->dev; 882 int i, entry; 883 884 entry = lp->tx_new & TX_RING_MOD_MASK; 885 if (lp->pio_buffer) { 886 struct lance_init_block __iomem *ib = lp->init_block_iomem; 887 u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]); 888 struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet; 889 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++) 890 sbus_writew(0, &packet[i]); 891 for (i = 0; i < 6; i++) { 892 sbus_writeb(dev->dev_addr[i], ð->h_dest[i]); 893 sbus_writeb(dev->dev_addr[i], ð->h_source[i]); 894 } 895 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length); 896 sbus_writew(0, &ib->btx_ring[entry].misc); 897 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 898 } else { 899 struct lance_init_block *ib = lp->init_block_mem; 900 u16 *packet = (u16 *) &(ib->tx_buf[entry][0]); 901 struct ethhdr *eth = (struct ethhdr *) packet; 902 memset(packet, 0, ETH_ZLEN); 903 for (i = 0; i < 6; i++) { 904 eth->h_dest[i] = dev->dev_addr[i]; 905 eth->h_source[i] = dev->dev_addr[i]; 906 } 907 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000; 908 ib->btx_ring[entry].misc = 0; 909 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN); 910 } 911 lp->tx_new = TX_NEXT(entry); 912 } 913 914 static int lance_open(struct net_device *dev) 915 { 916 struct lance_private *lp = netdev_priv(dev); 917 int status = 0; 918 919 STOP_LANCE(lp); 920 921 if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED, 922 lancestr, (void *) dev)) { 923 printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq); 924 return -EAGAIN; 925 } 926 927 /* On the 4m, setup the ledma to provide the upper bits for buffers */ 928 if (lp->dregs) { 929 u32 regval = lp->init_block_dvma & 0xff000000; 930 931 sbus_writel(regval, lp->dregs + DMA_TEST); 932 } 933 934 /* Set mode and clear multicast filter only at device open, 935 * so that lance_init_ring() called at any error will not 936 * forget multicast filters. 937 * 938 * BTW it is common bug in all lance drivers! --ANK 939 */ 940 if (lp->pio_buffer) { 941 struct lance_init_block __iomem *ib = lp->init_block_iomem; 942 sbus_writew(0, &ib->mode); 943 sbus_writel(0, &ib->filter[0]); 944 sbus_writel(0, &ib->filter[1]); 945 } else { 946 struct lance_init_block *ib = lp->init_block_mem; 947 ib->mode = 0; 948 ib->filter [0] = 0; 949 ib->filter [1] = 0; 950 } 951 952 lp->init_ring(dev); 953 load_csrs(lp); 954 955 netif_start_queue(dev); 956 957 status = init_restart_lance(lp); 958 if (!status && lp->auto_select) { 959 build_fake_packet(lp); 960 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 961 } 962 963 return status; 964 } 965 966 static int lance_close(struct net_device *dev) 967 { 968 struct lance_private *lp = netdev_priv(dev); 969 970 netif_stop_queue(dev); 971 del_timer_sync(&lp->multicast_timer); 972 973 STOP_LANCE(lp); 974 975 free_irq(dev->irq, (void *) dev); 976 return 0; 977 } 978 979 static int lance_reset(struct net_device *dev) 980 { 981 struct lance_private *lp = netdev_priv(dev); 982 int status; 983 984 STOP_LANCE(lp); 985 986 /* On the 4m, reset the dma too */ 987 if (lp->dregs) { 988 u32 csr, addr; 989 990 printk(KERN_ERR "resetting ledma\n"); 991 csr = sbus_readl(lp->dregs + DMA_CSR); 992 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 993 udelay(200); 994 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 995 996 addr = lp->init_block_dvma & 0xff000000; 997 sbus_writel(addr, lp->dregs + DMA_TEST); 998 } 999 lp->init_ring(dev); 1000 load_csrs(lp); 1001 netif_trans_update(dev); /* prevent tx timeout */ 1002 status = init_restart_lance(lp); 1003 return status; 1004 } 1005 1006 static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len) 1007 { 1008 void __iomem *piobuf = dest; 1009 u32 *p32; 1010 u16 *p16; 1011 u8 *p8; 1012 1013 switch ((unsigned long)src & 0x3) { 1014 case 0: 1015 p32 = (u32 *) src; 1016 while (len >= 4) { 1017 sbus_writel(*p32, piobuf); 1018 p32++; 1019 piobuf += 4; 1020 len -= 4; 1021 } 1022 src = (char *) p32; 1023 break; 1024 case 1: 1025 case 3: 1026 p8 = (u8 *) src; 1027 while (len >= 4) { 1028 u32 val; 1029 1030 val = p8[0] << 24; 1031 val |= p8[1] << 16; 1032 val |= p8[2] << 8; 1033 val |= p8[3]; 1034 sbus_writel(val, piobuf); 1035 p8 += 4; 1036 piobuf += 4; 1037 len -= 4; 1038 } 1039 src = (char *) p8; 1040 break; 1041 case 2: 1042 p16 = (u16 *) src; 1043 while (len >= 4) { 1044 u32 val = p16[0]<<16 | p16[1]; 1045 sbus_writel(val, piobuf); 1046 p16 += 2; 1047 piobuf += 4; 1048 len -= 4; 1049 } 1050 src = (char *) p16; 1051 break; 1052 } 1053 if (len >= 2) { 1054 u16 val = src[0] << 8 | src[1]; 1055 sbus_writew(val, piobuf); 1056 src += 2; 1057 piobuf += 2; 1058 len -= 2; 1059 } 1060 if (len >= 1) 1061 sbus_writeb(src[0], piobuf); 1062 } 1063 1064 static void lance_piozero(void __iomem *dest, int len) 1065 { 1066 void __iomem *piobuf = dest; 1067 1068 if ((unsigned long)piobuf & 1) { 1069 sbus_writeb(0, piobuf); 1070 piobuf += 1; 1071 len -= 1; 1072 if (len == 0) 1073 return; 1074 } 1075 if (len == 1) { 1076 sbus_writeb(0, piobuf); 1077 return; 1078 } 1079 if ((unsigned long)piobuf & 2) { 1080 sbus_writew(0, piobuf); 1081 piobuf += 2; 1082 len -= 2; 1083 if (len == 0) 1084 return; 1085 } 1086 while (len >= 4) { 1087 sbus_writel(0, piobuf); 1088 piobuf += 4; 1089 len -= 4; 1090 } 1091 if (len >= 2) { 1092 sbus_writew(0, piobuf); 1093 piobuf += 2; 1094 len -= 2; 1095 } 1096 if (len >= 1) 1097 sbus_writeb(0, piobuf); 1098 } 1099 1100 static void lance_tx_timeout(struct net_device *dev) 1101 { 1102 struct lance_private *lp = netdev_priv(dev); 1103 1104 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 1105 dev->name, sbus_readw(lp->lregs + RDP)); 1106 lance_reset(dev); 1107 netif_wake_queue(dev); 1108 } 1109 1110 static netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 1111 { 1112 struct lance_private *lp = netdev_priv(dev); 1113 int entry, skblen, len; 1114 1115 skblen = skb->len; 1116 1117 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen; 1118 1119 spin_lock_irq(&lp->lock); 1120 1121 dev->stats.tx_bytes += len; 1122 1123 entry = lp->tx_new & TX_RING_MOD_MASK; 1124 if (lp->pio_buffer) { 1125 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1126 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length); 1127 sbus_writew(0, &ib->btx_ring[entry].misc); 1128 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen); 1129 if (len != skblen) 1130 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen); 1131 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 1132 } else { 1133 struct lance_init_block *ib = lp->init_block_mem; 1134 ib->btx_ring [entry].length = (-len) | 0xf000; 1135 ib->btx_ring [entry].misc = 0; 1136 skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen); 1137 if (len != skblen) 1138 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen); 1139 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN); 1140 } 1141 1142 lp->tx_new = TX_NEXT(entry); 1143 1144 if (TX_BUFFS_AVAIL <= 0) 1145 netif_stop_queue(dev); 1146 1147 /* Kick the lance: transmit now */ 1148 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 1149 1150 /* Read back CSR to invalidate the E-Cache. 1151 * This is needed, because DMA_DSBL_WR_INV is set. 1152 */ 1153 if (lp->dregs) 1154 sbus_readw(lp->lregs + RDP); 1155 1156 spin_unlock_irq(&lp->lock); 1157 1158 dev_kfree_skb(skb); 1159 1160 return NETDEV_TX_OK; 1161 } 1162 1163 /* taken from the depca driver */ 1164 static void lance_load_multicast(struct net_device *dev) 1165 { 1166 struct lance_private *lp = netdev_priv(dev); 1167 struct netdev_hw_addr *ha; 1168 u32 crc; 1169 u32 val; 1170 1171 /* set all multicast bits */ 1172 if (dev->flags & IFF_ALLMULTI) 1173 val = ~0; 1174 else 1175 val = 0; 1176 1177 if (lp->pio_buffer) { 1178 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1179 sbus_writel(val, &ib->filter[0]); 1180 sbus_writel(val, &ib->filter[1]); 1181 } else { 1182 struct lance_init_block *ib = lp->init_block_mem; 1183 ib->filter [0] = val; 1184 ib->filter [1] = val; 1185 } 1186 1187 if (dev->flags & IFF_ALLMULTI) 1188 return; 1189 1190 /* Add addresses */ 1191 netdev_for_each_mc_addr(ha, dev) { 1192 crc = ether_crc_le(6, ha->addr); 1193 crc = crc >> 26; 1194 if (lp->pio_buffer) { 1195 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1196 u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter; 1197 u16 tmp = sbus_readw(&mcast_table[crc>>4]); 1198 tmp |= 1 << (crc & 0xf); 1199 sbus_writew(tmp, &mcast_table[crc>>4]); 1200 } else { 1201 struct lance_init_block *ib = lp->init_block_mem; 1202 u16 *mcast_table = (u16 *) &ib->filter; 1203 mcast_table [crc >> 4] |= 1 << (crc & 0xf); 1204 } 1205 } 1206 } 1207 1208 static void lance_set_multicast(struct net_device *dev) 1209 { 1210 struct lance_private *lp = netdev_priv(dev); 1211 struct lance_init_block *ib_mem = lp->init_block_mem; 1212 struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem; 1213 u16 mode; 1214 1215 if (!netif_running(dev)) 1216 return; 1217 1218 if (lp->tx_old != lp->tx_new) { 1219 mod_timer(&lp->multicast_timer, jiffies + 4); 1220 netif_wake_queue(dev); 1221 return; 1222 } 1223 1224 netif_stop_queue(dev); 1225 1226 STOP_LANCE(lp); 1227 lp->init_ring(dev); 1228 1229 if (lp->pio_buffer) 1230 mode = sbus_readw(&ib_iomem->mode); 1231 else 1232 mode = ib_mem->mode; 1233 if (dev->flags & IFF_PROMISC) { 1234 mode |= LE_MO_PROM; 1235 if (lp->pio_buffer) 1236 sbus_writew(mode, &ib_iomem->mode); 1237 else 1238 ib_mem->mode = mode; 1239 } else { 1240 mode &= ~LE_MO_PROM; 1241 if (lp->pio_buffer) 1242 sbus_writew(mode, &ib_iomem->mode); 1243 else 1244 ib_mem->mode = mode; 1245 lance_load_multicast(dev); 1246 } 1247 load_csrs(lp); 1248 init_restart_lance(lp); 1249 netif_wake_queue(dev); 1250 } 1251 1252 static void lance_set_multicast_retry(struct timer_list *t) 1253 { 1254 struct lance_private *lp = from_timer(lp, t, multicast_timer); 1255 struct net_device *dev = lp->dev; 1256 1257 lance_set_multicast(dev); 1258 } 1259 1260 static void lance_free_hwresources(struct lance_private *lp) 1261 { 1262 if (lp->lregs) 1263 of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE); 1264 if (lp->dregs) { 1265 struct platform_device *ledma = lp->ledma; 1266 1267 of_iounmap(&ledma->resource[0], lp->dregs, 1268 resource_size(&ledma->resource[0])); 1269 } 1270 if (lp->init_block_iomem) { 1271 of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem, 1272 sizeof(struct lance_init_block)); 1273 } else if (lp->init_block_mem) { 1274 dma_free_coherent(&lp->op->dev, 1275 sizeof(struct lance_init_block), 1276 lp->init_block_mem, 1277 lp->init_block_dvma); 1278 } 1279 } 1280 1281 /* Ethtool support... */ 1282 static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1283 { 1284 strlcpy(info->driver, "sunlance", sizeof(info->driver)); 1285 strlcpy(info->version, "2.02", sizeof(info->version)); 1286 } 1287 1288 static const struct ethtool_ops sparc_lance_ethtool_ops = { 1289 .get_drvinfo = sparc_lance_get_drvinfo, 1290 .get_link = ethtool_op_get_link, 1291 }; 1292 1293 static const struct net_device_ops sparc_lance_ops = { 1294 .ndo_open = lance_open, 1295 .ndo_stop = lance_close, 1296 .ndo_start_xmit = lance_start_xmit, 1297 .ndo_set_rx_mode = lance_set_multicast, 1298 .ndo_tx_timeout = lance_tx_timeout, 1299 .ndo_set_mac_address = eth_mac_addr, 1300 .ndo_validate_addr = eth_validate_addr, 1301 }; 1302 1303 static int sparc_lance_probe_one(struct platform_device *op, 1304 struct platform_device *ledma, 1305 struct platform_device *lebuffer) 1306 { 1307 struct device_node *dp = op->dev.of_node; 1308 static unsigned version_printed; 1309 struct lance_private *lp; 1310 struct net_device *dev; 1311 int i; 1312 1313 dev = alloc_etherdev(sizeof(struct lance_private) + 8); 1314 if (!dev) 1315 return -ENOMEM; 1316 1317 lp = netdev_priv(dev); 1318 1319 if (sparc_lance_debug && version_printed++ == 0) 1320 printk (KERN_INFO "%s", version); 1321 1322 spin_lock_init(&lp->lock); 1323 1324 /* Copy the IDPROM ethernet address to the device structure, later we 1325 * will copy the address in the device structure to the lance 1326 * initialization block. 1327 */ 1328 for (i = 0; i < 6; i++) 1329 dev->dev_addr[i] = idprom->id_ethaddr[i]; 1330 1331 /* Get the IO region */ 1332 lp->lregs = of_ioremap(&op->resource[0], 0, 1333 LANCE_REG_SIZE, lancestr); 1334 if (!lp->lregs) { 1335 printk(KERN_ERR "SunLance: Cannot map registers.\n"); 1336 goto fail; 1337 } 1338 1339 lp->ledma = ledma; 1340 if (lp->ledma) { 1341 lp->dregs = of_ioremap(&ledma->resource[0], 0, 1342 resource_size(&ledma->resource[0]), 1343 "ledma"); 1344 if (!lp->dregs) { 1345 printk(KERN_ERR "SunLance: Cannot map " 1346 "ledma registers.\n"); 1347 goto fail; 1348 } 1349 } 1350 1351 lp->op = op; 1352 lp->lebuffer = lebuffer; 1353 if (lebuffer) { 1354 /* sanity check */ 1355 if (lebuffer->resource[0].start & 7) { 1356 printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); 1357 goto fail; 1358 } 1359 lp->init_block_iomem = 1360 of_ioremap(&lebuffer->resource[0], 0, 1361 sizeof(struct lance_init_block), "lebuffer"); 1362 if (!lp->init_block_iomem) { 1363 printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n"); 1364 goto fail; 1365 } 1366 lp->init_block_dvma = 0; 1367 lp->pio_buffer = 1; 1368 lp->init_ring = lance_init_ring_pio; 1369 lp->rx = lance_rx_pio; 1370 lp->tx = lance_tx_pio; 1371 } else { 1372 lp->init_block_mem = 1373 dma_alloc_coherent(&op->dev, 1374 sizeof(struct lance_init_block), 1375 &lp->init_block_dvma, GFP_ATOMIC); 1376 if (!lp->init_block_mem) 1377 goto fail; 1378 1379 lp->pio_buffer = 0; 1380 lp->init_ring = lance_init_ring_dvma; 1381 lp->rx = lance_rx_dvma; 1382 lp->tx = lance_tx_dvma; 1383 } 1384 lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval", 1385 (LE_C3_BSWP | 1386 LE_C3_ACON | 1387 LE_C3_BCON)); 1388 1389 lp->name = lancestr; 1390 1391 lp->burst_sizes = 0; 1392 if (lp->ledma) { 1393 struct device_node *ledma_dp = ledma->dev.of_node; 1394 struct device_node *sbus_dp; 1395 unsigned int sbmask; 1396 const char *prop; 1397 u32 csr; 1398 1399 /* Find burst-size property for ledma */ 1400 lp->burst_sizes = of_getintprop_default(ledma_dp, 1401 "burst-sizes", 0); 1402 1403 /* ledma may be capable of fast bursts, but sbus may not. */ 1404 sbus_dp = ledma_dp->parent; 1405 sbmask = of_getintprop_default(sbus_dp, "burst-sizes", 1406 DMA_BURSTBITS); 1407 lp->burst_sizes &= sbmask; 1408 1409 /* Get the cable-selection property */ 1410 prop = of_get_property(ledma_dp, "cable-selection", NULL); 1411 if (!prop || prop[0] == '\0') { 1412 struct device_node *nd; 1413 1414 printk(KERN_INFO "SunLance: using " 1415 "auto-carrier-detection.\n"); 1416 1417 nd = of_find_node_by_path("/options"); 1418 if (!nd) 1419 goto no_link_test; 1420 1421 prop = of_get_property(nd, "tpe-link-test?", NULL); 1422 if (!prop) 1423 goto node_put; 1424 1425 if (strcmp(prop, "true")) { 1426 printk(KERN_NOTICE "SunLance: warning: overriding option " 1427 "'tpe-link-test?'\n"); 1428 printk(KERN_NOTICE "SunLance: warning: mail any problems " 1429 "to ecd@skynet.be\n"); 1430 auxio_set_lte(AUXIO_LTE_ON); 1431 } 1432 node_put: 1433 of_node_put(nd); 1434 no_link_test: 1435 lp->auto_select = 1; 1436 lp->tpe = 0; 1437 } else if (!strcmp(prop, "aui")) { 1438 lp->auto_select = 0; 1439 lp->tpe = 0; 1440 } else { 1441 lp->auto_select = 0; 1442 lp->tpe = 1; 1443 } 1444 1445 /* Reset ledma */ 1446 csr = sbus_readl(lp->dregs + DMA_CSR); 1447 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 1448 udelay(200); 1449 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 1450 } else 1451 lp->dregs = NULL; 1452 1453 lp->dev = dev; 1454 SET_NETDEV_DEV(dev, &op->dev); 1455 dev->watchdog_timeo = 5*HZ; 1456 dev->ethtool_ops = &sparc_lance_ethtool_ops; 1457 dev->netdev_ops = &sparc_lance_ops; 1458 1459 dev->irq = op->archdata.irqs[0]; 1460 1461 /* We cannot sleep if the chip is busy during a 1462 * multicast list update event, because such events 1463 * can occur from interrupts (ex. IPv6). So we 1464 * use a timer to try again later when necessary. -DaveM 1465 */ 1466 timer_setup(&lp->multicast_timer, lance_set_multicast_retry, 0); 1467 1468 if (register_netdev(dev)) { 1469 printk(KERN_ERR "SunLance: Cannot register device.\n"); 1470 goto fail; 1471 } 1472 1473 platform_set_drvdata(op, lp); 1474 1475 printk(KERN_INFO "%s: LANCE %pM\n", 1476 dev->name, dev->dev_addr); 1477 1478 return 0; 1479 1480 fail: 1481 lance_free_hwresources(lp); 1482 free_netdev(dev); 1483 return -ENODEV; 1484 } 1485 1486 static int sunlance_sbus_probe(struct platform_device *op) 1487 { 1488 struct platform_device *parent = to_platform_device(op->dev.parent); 1489 struct device_node *parent_dp = parent->dev.of_node; 1490 int err; 1491 1492 if (of_node_name_eq(parent_dp, "ledma")) { 1493 err = sparc_lance_probe_one(op, parent, NULL); 1494 } else if (of_node_name_eq(parent_dp, "lebuffer")) { 1495 err = sparc_lance_probe_one(op, NULL, parent); 1496 } else 1497 err = sparc_lance_probe_one(op, NULL, NULL); 1498 1499 return err; 1500 } 1501 1502 static int sunlance_sbus_remove(struct platform_device *op) 1503 { 1504 struct lance_private *lp = platform_get_drvdata(op); 1505 struct net_device *net_dev = lp->dev; 1506 1507 unregister_netdev(net_dev); 1508 1509 lance_free_hwresources(lp); 1510 1511 free_netdev(net_dev); 1512 1513 return 0; 1514 } 1515 1516 static const struct of_device_id sunlance_sbus_match[] = { 1517 { 1518 .name = "le", 1519 }, 1520 {}, 1521 }; 1522 1523 MODULE_DEVICE_TABLE(of, sunlance_sbus_match); 1524 1525 static struct platform_driver sunlance_sbus_driver = { 1526 .driver = { 1527 .name = "sunlance", 1528 .of_match_table = sunlance_sbus_match, 1529 }, 1530 .probe = sunlance_sbus_probe, 1531 .remove = sunlance_sbus_remove, 1532 }; 1533 1534 module_platform_driver(sunlance_sbus_driver); 1535