1 /* sun3lance.c: Ethernet driver for SUN3 Lance chip */ 2 /* 3 4 Sun3 Lance ethernet driver, by Sam Creasey (sammy@users.qual.net). 5 This driver is a part of the linux kernel, and is thus distributed 6 under the GNU General Public License. 7 8 The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically 9 true for the correct IRQ and address of the lance registers. They 10 have not been widely tested, however. What we probably need is a 11 "proper" way to search for a device in the sun3's prom, but, alas, 12 linux has no such thing. 13 14 This driver is largely based on atarilance.c, by Roman Hodek. Other 15 sources of inspiration were the NetBSD sun3 am7990 driver, and the 16 linux sparc lance driver (sunlance.c). 17 18 There are more assumptions made throughout this driver, it almost 19 certainly still needs work, but it does work at least for RARP/BOOTP and 20 mounting the root NFS filesystem. 21 22 */ 23 24 static const char version[] = 25 "sun3lance.c: v1.2 1/12/2001 Sam Creasey (sammy@sammy.net)\n"; 26 27 #include <linux/module.h> 28 #include <linux/stddef.h> 29 #include <linux/kernel.h> 30 #include <linux/string.h> 31 #include <linux/errno.h> 32 #include <linux/interrupt.h> 33 #include <linux/init.h> 34 #include <linux/ioport.h> 35 #include <linux/delay.h> 36 #include <linux/netdevice.h> 37 #include <linux/etherdevice.h> 38 #include <linux/skbuff.h> 39 #include <linux/bitops.h> 40 #include <linux/pgtable.h> 41 42 #include <asm/cacheflush.h> 43 #include <asm/setup.h> 44 #include <asm/irq.h> 45 #include <asm/io.h> 46 #include <asm/dvma.h> 47 #include <asm/idprom.h> 48 #include <asm/machines.h> 49 50 #ifdef CONFIG_SUN3 51 #include <asm/sun3mmu.h> 52 #else 53 #include <asm/sun3xprom.h> 54 #endif 55 56 /* sun3/60 addr/irq for the lance chip. If your sun is different, 57 change this. */ 58 #define LANCE_OBIO 0x120000 59 #define LANCE_IRQ IRQ_AUTO_3 60 61 /* Debug level: 62 * 0 = silent, print only serious errors 63 * 1 = normal, print error messages 64 * 2 = debug, print debug infos 65 * 3 = debug, print even more debug infos (packet data) 66 */ 67 68 #define LANCE_DEBUG 0 69 70 #ifdef LANCE_DEBUG 71 static int lance_debug = LANCE_DEBUG; 72 #else 73 static int lance_debug = 1; 74 #endif 75 module_param(lance_debug, int, 0); 76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)"); 77 MODULE_LICENSE("GPL"); 78 79 #define DPRINTK(n,a) \ 80 do { \ 81 if (lance_debug >= n) \ 82 printk a; \ 83 } while( 0 ) 84 85 86 /* we're only using 32k of memory, so we use 4 TX 87 buffers and 16 RX buffers. These values are expressed as log2. */ 88 89 #define TX_LOG_RING_SIZE 3 90 #define RX_LOG_RING_SIZE 5 91 92 /* These are the derived values */ 93 94 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE) 95 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5) 96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 97 98 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE) 99 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5) 100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 101 102 /* Definitions for packet buffer access: */ 103 #define PKT_BUF_SZ 1544 104 105 /* Get the address of a packet buffer corresponding to a given buffer head */ 106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base) 107 108 109 /* The LANCE Rx and Tx ring descriptors. */ 110 struct lance_rx_head { 111 unsigned short base; /* Low word of base addr */ 112 volatile unsigned char flag; 113 unsigned char base_hi; /* High word of base addr (unused) */ 114 short buf_length; /* This length is 2s complement! */ 115 volatile short msg_length; /* This length is "normal". */ 116 }; 117 118 struct lance_tx_head { 119 unsigned short base; /* Low word of base addr */ 120 volatile unsigned char flag; 121 unsigned char base_hi; /* High word of base addr (unused) */ 122 short length; /* Length is 2s complement! */ 123 volatile short misc; 124 }; 125 126 /* The LANCE initialization block, described in databook. */ 127 struct lance_init_block { 128 unsigned short mode; /* Pre-set mode */ 129 unsigned char hwaddr[6]; /* Physical ethernet address */ 130 unsigned int filter[2]; /* Multicast filter (unused). */ 131 /* Receive and transmit ring base, along with length bits. */ 132 unsigned short rdra; 133 unsigned short rlen; 134 unsigned short tdra; 135 unsigned short tlen; 136 unsigned short pad[4]; /* is thie needed? */ 137 }; 138 139 /* The whole layout of the Lance shared memory */ 140 struct lance_memory { 141 struct lance_init_block init; 142 struct lance_tx_head tx_head[TX_RING_SIZE]; 143 struct lance_rx_head rx_head[RX_RING_SIZE]; 144 char rx_data[RX_RING_SIZE][PKT_BUF_SZ]; 145 char tx_data[TX_RING_SIZE][PKT_BUF_SZ]; 146 }; 147 148 /* The driver's private device structure */ 149 150 struct lance_private { 151 volatile unsigned short *iobase; 152 struct lance_memory *mem; 153 int new_rx, new_tx; /* The next free ring entry */ 154 int old_tx, old_rx; /* ring entry to be processed */ 155 /* These two must be longs for set_bit() */ 156 long tx_full; 157 long lock; 158 }; 159 160 /* I/O register access macros */ 161 162 #define MEM lp->mem 163 #define DREG lp->iobase[0] 164 #define AREG lp->iobase[1] 165 #define REGA(a) (*( AREG = (a), &DREG )) 166 167 /* Definitions for the Lance */ 168 169 /* tx_head flags */ 170 #define TMD1_ENP 0x01 /* end of packet */ 171 #define TMD1_STP 0x02 /* start of packet */ 172 #define TMD1_DEF 0x04 /* deferred */ 173 #define TMD1_ONE 0x08 /* one retry needed */ 174 #define TMD1_MORE 0x10 /* more than one retry needed */ 175 #define TMD1_ERR 0x40 /* error summary */ 176 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */ 177 178 #define TMD1_OWN_CHIP TMD1_OWN 179 #define TMD1_OWN_HOST 0 180 181 /* tx_head misc field */ 182 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */ 183 #define TMD3_RTRY 0x0400 /* failed after 16 retries */ 184 #define TMD3_LCAR 0x0800 /* carrier lost */ 185 #define TMD3_LCOL 0x1000 /* late collision */ 186 #define TMD3_UFLO 0x4000 /* underflow (late memory) */ 187 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */ 188 189 /* rx_head flags */ 190 #define RMD1_ENP 0x01 /* end of packet */ 191 #define RMD1_STP 0x02 /* start of packet */ 192 #define RMD1_BUFF 0x04 /* buffer error */ 193 #define RMD1_CRC 0x08 /* CRC error */ 194 #define RMD1_OFLO 0x10 /* overflow */ 195 #define RMD1_FRAM 0x20 /* framing error */ 196 #define RMD1_ERR 0x40 /* error summary */ 197 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */ 198 199 #define RMD1_OWN_CHIP RMD1_OWN 200 #define RMD1_OWN_HOST 0 201 202 /* register names */ 203 #define CSR0 0 /* mode/status */ 204 #define CSR1 1 /* init block addr (low) */ 205 #define CSR2 2 /* init block addr (high) */ 206 #define CSR3 3 /* misc */ 207 #define CSR8 8 /* address filter */ 208 #define CSR15 15 /* promiscuous mode */ 209 210 /* CSR0 */ 211 /* (R=readable, W=writeable, S=set on write, C=clear on write) */ 212 #define CSR0_INIT 0x0001 /* initialize (RS) */ 213 #define CSR0_STRT 0x0002 /* start (RS) */ 214 #define CSR0_STOP 0x0004 /* stop (RS) */ 215 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */ 216 #define CSR0_TXON 0x0010 /* transmitter on (R) */ 217 #define CSR0_RXON 0x0020 /* receiver on (R) */ 218 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */ 219 #define CSR0_INTR 0x0080 /* interrupt active (R) */ 220 #define CSR0_IDON 0x0100 /* initialization done (RC) */ 221 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */ 222 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */ 223 #define CSR0_MERR 0x0800 /* memory error (RC) */ 224 #define CSR0_MISS 0x1000 /* missed frame (RC) */ 225 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ 226 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */ 227 #define CSR0_ERR 0x8000 /* error (RC) */ 228 229 /* CSR3 */ 230 #define CSR3_BCON 0x0001 /* byte control */ 231 #define CSR3_ACON 0x0002 /* ALE control */ 232 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */ 233 234 /***************************** Prototypes *****************************/ 235 236 static int lance_probe( struct net_device *dev); 237 static int lance_open( struct net_device *dev ); 238 static void lance_init_ring( struct net_device *dev ); 239 static netdev_tx_t lance_start_xmit(struct sk_buff *skb, 240 struct net_device *dev); 241 static irqreturn_t lance_interrupt( int irq, void *dev_id); 242 static int lance_rx( struct net_device *dev ); 243 static int lance_close( struct net_device *dev ); 244 static void set_multicast_list( struct net_device *dev ); 245 246 /************************* End of Prototypes **************************/ 247 248 struct net_device * __init sun3lance_probe(int unit) 249 { 250 struct net_device *dev; 251 static int found; 252 int err = -ENODEV; 253 254 if (!MACH_IS_SUN3 && !MACH_IS_SUN3X) 255 return ERR_PTR(-ENODEV); 256 257 /* check that this machine has an onboard lance */ 258 switch(idprom->id_machtype) { 259 case SM_SUN3|SM_3_50: 260 case SM_SUN3|SM_3_60: 261 case SM_SUN3X|SM_3_80: 262 /* these machines have lance */ 263 break; 264 265 default: 266 return ERR_PTR(-ENODEV); 267 } 268 269 if (found) 270 return ERR_PTR(-ENODEV); 271 272 dev = alloc_etherdev(sizeof(struct lance_private)); 273 if (!dev) 274 return ERR_PTR(-ENOMEM); 275 if (unit >= 0) { 276 sprintf(dev->name, "eth%d", unit); 277 netdev_boot_setup_check(dev); 278 } 279 280 if (!lance_probe(dev)) 281 goto out; 282 283 err = register_netdev(dev); 284 if (err) 285 goto out1; 286 found = 1; 287 return dev; 288 289 out1: 290 #ifdef CONFIG_SUN3 291 iounmap((void __iomem *)dev->base_addr); 292 #endif 293 out: 294 free_netdev(dev); 295 return ERR_PTR(err); 296 } 297 298 static const struct net_device_ops lance_netdev_ops = { 299 .ndo_open = lance_open, 300 .ndo_stop = lance_close, 301 .ndo_start_xmit = lance_start_xmit, 302 .ndo_set_rx_mode = set_multicast_list, 303 .ndo_set_mac_address = NULL, 304 .ndo_validate_addr = eth_validate_addr, 305 }; 306 307 static int __init lance_probe( struct net_device *dev) 308 { 309 unsigned long ioaddr; 310 311 struct lance_private *lp; 312 int i; 313 static int did_version; 314 volatile unsigned short *ioaddr_probe; 315 unsigned short tmp1, tmp2; 316 317 #ifdef CONFIG_SUN3 318 ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE); 319 if (!ioaddr) 320 return 0; 321 #else 322 ioaddr = SUN3X_LANCE; 323 #endif 324 325 /* test to see if there's really a lance here */ 326 /* (CSRO_INIT shouldn't be readable) */ 327 328 ioaddr_probe = (volatile unsigned short *)ioaddr; 329 tmp1 = ioaddr_probe[0]; 330 tmp2 = ioaddr_probe[1]; 331 332 ioaddr_probe[1] = CSR0; 333 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; 334 335 if(ioaddr_probe[0] != CSR0_STOP) { 336 ioaddr_probe[0] = tmp1; 337 ioaddr_probe[1] = tmp2; 338 339 #ifdef CONFIG_SUN3 340 iounmap((void __iomem *)ioaddr); 341 #endif 342 return 0; 343 } 344 345 lp = netdev_priv(dev); 346 347 /* XXX - leak? */ 348 MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000); 349 if (MEM == NULL) { 350 #ifdef CONFIG_SUN3 351 iounmap((void __iomem *)ioaddr); 352 #endif 353 printk(KERN_WARNING "SUN3 Lance couldn't allocate DVMA memory\n"); 354 return 0; 355 } 356 357 lp->iobase = (volatile unsigned short *)ioaddr; 358 dev->base_addr = (unsigned long)ioaddr; /* informational only */ 359 360 REGA(CSR0) = CSR0_STOP; 361 362 if (request_irq(LANCE_IRQ, lance_interrupt, 0, "SUN3 Lance", dev) < 0) { 363 #ifdef CONFIG_SUN3 364 iounmap((void __iomem *)ioaddr); 365 #endif 366 dvma_free((void *)MEM); 367 printk(KERN_WARNING "SUN3 Lance unable to allocate IRQ\n"); 368 return 0; 369 } 370 dev->irq = (unsigned short)LANCE_IRQ; 371 372 373 printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ", 374 dev->name, 375 (unsigned long)ioaddr, 376 (unsigned long)MEM, 377 dev->irq); 378 379 /* copy in the ethernet address from the prom */ 380 for(i = 0; i < 6 ; i++) 381 dev->dev_addr[i] = idprom->id_ethaddr[i]; 382 383 /* tell the card it's ether address, bytes swapped */ 384 MEM->init.hwaddr[0] = dev->dev_addr[1]; 385 MEM->init.hwaddr[1] = dev->dev_addr[0]; 386 MEM->init.hwaddr[2] = dev->dev_addr[3]; 387 MEM->init.hwaddr[3] = dev->dev_addr[2]; 388 MEM->init.hwaddr[4] = dev->dev_addr[5]; 389 MEM->init.hwaddr[5] = dev->dev_addr[4]; 390 391 printk("%pM\n", dev->dev_addr); 392 393 MEM->init.mode = 0x0000; 394 MEM->init.filter[0] = 0x00000000; 395 MEM->init.filter[1] = 0x00000000; 396 MEM->init.rdra = dvma_vtob(MEM->rx_head); 397 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) | 398 (dvma_vtob(MEM->rx_head) >> 16); 399 MEM->init.tdra = dvma_vtob(MEM->tx_head); 400 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) | 401 (dvma_vtob(MEM->tx_head) >> 16); 402 403 DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n", 404 dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head), 405 (dvma_vtob(MEM->tx_head)))); 406 407 if (did_version++ == 0) 408 printk( version ); 409 410 dev->netdev_ops = &lance_netdev_ops; 411 // KLUDGE -- REMOVE ME 412 set_bit(__LINK_STATE_PRESENT, &dev->state); 413 414 415 return 1; 416 } 417 418 static int lance_open( struct net_device *dev ) 419 { 420 struct lance_private *lp = netdev_priv(dev); 421 int i; 422 423 DPRINTK( 2, ( "%s: lance_open()\n", dev->name )); 424 425 REGA(CSR0) = CSR0_STOP; 426 427 lance_init_ring(dev); 428 429 /* From now on, AREG is kept to point to CSR0 */ 430 REGA(CSR0) = CSR0_INIT; 431 432 i = 1000000; 433 while (--i > 0) 434 if (DREG & CSR0_IDON) 435 break; 436 if (i <= 0 || (DREG & CSR0_ERR)) { 437 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", 438 dev->name, i, DREG )); 439 DREG = CSR0_STOP; 440 return -EIO; 441 } 442 443 DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA; 444 445 netif_start_queue(dev); 446 447 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG )); 448 449 return 0; 450 } 451 452 453 /* Initialize the LANCE Rx and Tx rings. */ 454 455 static void lance_init_ring( struct net_device *dev ) 456 { 457 struct lance_private *lp = netdev_priv(dev); 458 int i; 459 460 lp->lock = 0; 461 lp->tx_full = 0; 462 lp->new_rx = lp->new_tx = 0; 463 lp->old_rx = lp->old_tx = 0; 464 465 for( i = 0; i < TX_RING_SIZE; i++ ) { 466 MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]); 467 MEM->tx_head[i].flag = 0; 468 MEM->tx_head[i].base_hi = 469 (dvma_vtob(MEM->tx_data[i])) >>16; 470 MEM->tx_head[i].length = 0; 471 MEM->tx_head[i].misc = 0; 472 } 473 474 for( i = 0; i < RX_RING_SIZE; i++ ) { 475 MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]); 476 MEM->rx_head[i].flag = RMD1_OWN_CHIP; 477 MEM->rx_head[i].base_hi = 478 (dvma_vtob(MEM->rx_data[i])) >> 16; 479 MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000; 480 MEM->rx_head[i].msg_length = 0; 481 } 482 483 /* tell the card it's ether address, bytes swapped */ 484 MEM->init.hwaddr[0] = dev->dev_addr[1]; 485 MEM->init.hwaddr[1] = dev->dev_addr[0]; 486 MEM->init.hwaddr[2] = dev->dev_addr[3]; 487 MEM->init.hwaddr[3] = dev->dev_addr[2]; 488 MEM->init.hwaddr[4] = dev->dev_addr[5]; 489 MEM->init.hwaddr[5] = dev->dev_addr[4]; 490 491 MEM->init.mode = 0x0000; 492 MEM->init.filter[0] = 0x00000000; 493 MEM->init.filter[1] = 0x00000000; 494 MEM->init.rdra = dvma_vtob(MEM->rx_head); 495 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) | 496 (dvma_vtob(MEM->rx_head) >> 16); 497 MEM->init.tdra = dvma_vtob(MEM->tx_head); 498 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) | 499 (dvma_vtob(MEM->tx_head) >> 16); 500 501 502 /* tell the lance the address of its init block */ 503 REGA(CSR1) = dvma_vtob(&(MEM->init)); 504 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16; 505 506 #ifdef CONFIG_SUN3X 507 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON; 508 #else 509 REGA(CSR3) = CSR3_BSWP; 510 #endif 511 512 } 513 514 515 static netdev_tx_t 516 lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 517 { 518 struct lance_private *lp = netdev_priv(dev); 519 int entry, len; 520 struct lance_tx_head *head; 521 unsigned long flags; 522 523 DPRINTK( 1, ( "%s: transmit start.\n", 524 dev->name)); 525 526 /* Transmitter timeout, serious problems. */ 527 if (netif_queue_stopped(dev)) { 528 int tickssofar = jiffies - dev_trans_start(dev); 529 if (tickssofar < HZ/5) 530 return NETDEV_TX_BUSY; 531 532 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n", 533 dev->name, DREG )); 534 DREG = CSR0_STOP; 535 /* 536 * Always set BSWP after a STOP as STOP puts it back into 537 * little endian mode. 538 */ 539 REGA(CSR3) = CSR3_BSWP; 540 dev->stats.tx_errors++; 541 542 if(lance_debug >= 2) { 543 int i; 544 printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n", 545 lp->old_tx, lp->new_tx, 546 lp->tx_full ? " (full)" : "", 547 lp->new_rx ); 548 for( i = 0 ; i < RX_RING_SIZE; i++ ) 549 printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n", 550 i, MEM->rx_head[i].base, 551 -MEM->rx_head[i].buf_length, 552 MEM->rx_head[i].msg_length); 553 for( i = 0 ; i < TX_RING_SIZE; i++ ) 554 printk("tx #%d: base=%04x len=%04x misc=%04x\n", 555 i, MEM->tx_head[i].base, 556 -MEM->tx_head[i].length, 557 MEM->tx_head[i].misc ); 558 } 559 560 lance_init_ring(dev); 561 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; 562 563 netif_start_queue(dev); 564 565 return NETDEV_TX_OK; 566 } 567 568 569 /* Block a timer-based transmit from overlapping. This could better be 570 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ 571 572 /* Block a timer-based transmit from overlapping with us by 573 stopping the queue for a bit... */ 574 575 netif_stop_queue(dev); 576 577 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) { 578 printk( "%s: tx queue lock!.\n", dev->name); 579 /* don't clear dev->tbusy flag. */ 580 return NETDEV_TX_BUSY; 581 } 582 583 AREG = CSR0; 584 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n", 585 dev->name, DREG )); 586 587 #ifdef CONFIG_SUN3X 588 /* this weirdness doesn't appear on sun3... */ 589 if(!(DREG & CSR0_INIT)) { 590 DPRINTK( 1, ("INIT not set, reinitializing...\n")); 591 REGA( CSR0 ) = CSR0_STOP; 592 lance_init_ring(dev); 593 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; 594 } 595 #endif 596 597 /* Fill in a Tx ring entry */ 598 #if 0 599 if (lance_debug >= 2) { 600 printk( "%s: TX pkt %d type 0x%04x" 601 " from %s to %s" 602 " data at 0x%08x len %d\n", 603 dev->name, lp->new_tx, ((u_short *)skb->data)[6], 604 DEV_ADDR(&skb->data[6]), DEV_ADDR(skb->data), 605 (int)skb->data, (int)skb->len ); 606 } 607 #endif 608 /* We're not prepared for the int until the last flags are set/reset. 609 * And the int may happen already after setting the OWN_CHIP... */ 610 local_irq_save(flags); 611 612 /* Mask to ring buffer boundary. */ 613 entry = lp->new_tx; 614 head = &(MEM->tx_head[entry]); 615 616 /* Caution: the write order is important here, set the "ownership" bits 617 * last. 618 */ 619 620 /* the sun3's lance needs it's buffer padded to the minimum 621 size */ 622 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN; 623 624 // head->length = -len; 625 head->length = (-len) | 0xf000; 626 head->misc = 0; 627 628 skb_copy_from_linear_data(skb, PKTBUF_ADDR(head), skb->len); 629 if (len != skb->len) 630 memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len); 631 632 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP; 633 lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK; 634 dev->stats.tx_bytes += skb->len; 635 636 /* Trigger an immediate send poll. */ 637 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT; 638 AREG = CSR0; 639 DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n", 640 dev->name, DREG )); 641 dev_kfree_skb(skb); 642 643 lp->lock = 0; 644 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) == 645 TMD1_OWN_HOST) 646 netif_start_queue(dev); 647 648 local_irq_restore(flags); 649 650 return NETDEV_TX_OK; 651 } 652 653 /* The LANCE interrupt handler. */ 654 655 static irqreturn_t lance_interrupt( int irq, void *dev_id) 656 { 657 struct net_device *dev = dev_id; 658 struct lance_private *lp = netdev_priv(dev); 659 int csr0; 660 661 still_more: 662 flush_cache_all(); 663 664 AREG = CSR0; 665 csr0 = DREG; 666 667 /* ack interrupts */ 668 DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON); 669 670 /* clear errors */ 671 if(csr0 & CSR0_ERR) 672 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS; 673 674 675 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n", 676 dev->name, csr0, DREG )); 677 678 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */ 679 int old_tx = lp->old_tx; 680 681 // if(lance_debug >= 3) { 682 // int i; 683 // 684 // printk("%s: tx int\n", dev->name); 685 // 686 // for(i = 0; i < TX_RING_SIZE; i++) 687 // printk("ring %d flag=%04x\n", i, 688 // MEM->tx_head[i].flag); 689 // } 690 691 while( old_tx != lp->new_tx) { 692 struct lance_tx_head *head = &(MEM->tx_head[old_tx]); 693 694 DPRINTK(3, ("on tx_ring %d\n", old_tx)); 695 696 if (head->flag & TMD1_OWN_CHIP) 697 break; /* It still hasn't been Txed */ 698 699 if (head->flag & TMD1_ERR) { 700 int status = head->misc; 701 dev->stats.tx_errors++; 702 if (status & TMD3_RTRY) dev->stats.tx_aborted_errors++; 703 if (status & TMD3_LCAR) dev->stats.tx_carrier_errors++; 704 if (status & TMD3_LCOL) dev->stats.tx_window_errors++; 705 if (status & (TMD3_UFLO | TMD3_BUFF)) { 706 dev->stats.tx_fifo_errors++; 707 printk("%s: Tx FIFO error\n", 708 dev->name); 709 REGA(CSR0) = CSR0_STOP; 710 REGA(CSR3) = CSR3_BSWP; 711 lance_init_ring(dev); 712 REGA(CSR0) = CSR0_STRT | CSR0_INEA; 713 return IRQ_HANDLED; 714 } 715 } else if(head->flag & (TMD1_ENP | TMD1_STP)) { 716 717 head->flag &= ~(TMD1_ENP | TMD1_STP); 718 if(head->flag & (TMD1_ONE | TMD1_MORE)) 719 dev->stats.collisions++; 720 721 dev->stats.tx_packets++; 722 DPRINTK(3, ("cleared tx ring %d\n", old_tx)); 723 } 724 old_tx = (old_tx +1) & TX_RING_MOD_MASK; 725 } 726 727 lp->old_tx = old_tx; 728 } 729 730 731 if (netif_queue_stopped(dev)) { 732 /* The ring is no longer full, clear tbusy. */ 733 netif_start_queue(dev); 734 netif_wake_queue(dev); 735 } 736 737 if (csr0 & CSR0_RINT) /* Rx interrupt */ 738 lance_rx( dev ); 739 740 /* Log misc errors. */ 741 if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */ 742 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ 743 if (csr0 & CSR0_MERR) { 744 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), " 745 "status %04x.\n", dev->name, csr0 )); 746 /* Restart the chip. */ 747 REGA(CSR0) = CSR0_STOP; 748 REGA(CSR3) = CSR3_BSWP; 749 lance_init_ring(dev); 750 REGA(CSR0) = CSR0_STRT | CSR0_INEA; 751 } 752 753 754 /* Clear any other interrupt, and set interrupt enable. */ 755 // DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | 756 // CSR0_IDON | CSR0_INEA; 757 758 REGA(CSR0) = CSR0_INEA; 759 760 if(DREG & (CSR0_RINT | CSR0_TINT)) { 761 DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG)); 762 goto still_more; 763 } 764 765 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n", 766 dev->name, DREG )); 767 return IRQ_HANDLED; 768 } 769 770 /* get packet, toss into skbuff */ 771 static int lance_rx( struct net_device *dev ) 772 { 773 struct lance_private *lp = netdev_priv(dev); 774 int entry = lp->new_rx; 775 776 /* If we own the next entry, it's a new packet. Send it up. */ 777 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) { 778 struct lance_rx_head *head = &(MEM->rx_head[entry]); 779 int status = head->flag; 780 781 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */ 782 /* There is a tricky error noted by John Murphy, 783 <murf@perftech.com> to Russ Nelson: Even with 784 full-sized buffers it's possible for a jabber packet to use two 785 buffers, with only the last correctly noting the error. */ 786 if (status & RMD1_ENP) /* Only count a general error at the */ 787 dev->stats.rx_errors++; /* end of a packet.*/ 788 if (status & RMD1_FRAM) dev->stats.rx_frame_errors++; 789 if (status & RMD1_OFLO) dev->stats.rx_over_errors++; 790 if (status & RMD1_CRC) dev->stats.rx_crc_errors++; 791 if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++; 792 head->flag &= (RMD1_ENP|RMD1_STP); 793 } else { 794 /* Malloc up new buffer, compatible with net-3. */ 795 // short pkt_len = head->msg_length;// & 0xfff; 796 short pkt_len = (head->msg_length & 0xfff) - 4; 797 struct sk_buff *skb; 798 799 if (pkt_len < 60) { 800 printk( "%s: Runt packet!\n", dev->name ); 801 dev->stats.rx_errors++; 802 } 803 else { 804 skb = netdev_alloc_skb(dev, pkt_len + 2); 805 if (skb == NULL) { 806 dev->stats.rx_dropped++; 807 head->msg_length = 0; 808 head->flag |= RMD1_OWN_CHIP; 809 lp->new_rx = (lp->new_rx+1) & 810 RX_RING_MOD_MASK; 811 } 812 813 #if 0 814 if (lance_debug >= 3) { 815 u_char *data = PKTBUF_ADDR(head); 816 printk("%s: RX pkt %d type 0x%04x" 817 " from %pM to %pM", 818 dev->name, lp->new_tx, ((u_short *)data)[6], 819 &data[6], data); 820 821 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x " 822 "len %d at %08x\n", 823 data[15], data[16], data[17], data[18], 824 data[19], data[20], data[21], data[22], 825 pkt_len, data); 826 } 827 #endif 828 if (lance_debug >= 3) { 829 u_char *data = PKTBUF_ADDR(head); 830 printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len); 831 } 832 833 834 skb_reserve( skb, 2 ); /* 16 byte align */ 835 skb_put( skb, pkt_len ); /* Make room */ 836 skb_copy_to_linear_data(skb, 837 PKTBUF_ADDR(head), 838 pkt_len); 839 840 skb->protocol = eth_type_trans( skb, dev ); 841 netif_rx( skb ); 842 dev->stats.rx_packets++; 843 dev->stats.rx_bytes += pkt_len; 844 } 845 } 846 847 // head->buf_length = -PKT_BUF_SZ | 0xf000; 848 head->msg_length = 0; 849 head->flag = RMD1_OWN_CHIP; 850 851 entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK; 852 } 853 854 /* From lance.c (Donald Becker): */ 855 /* We should check that at least two ring entries are free. 856 If not, we should free one and mark stats->rx_dropped++. */ 857 858 return 0; 859 } 860 861 862 static int lance_close( struct net_device *dev ) 863 { 864 struct lance_private *lp = netdev_priv(dev); 865 866 netif_stop_queue(dev); 867 868 AREG = CSR0; 869 870 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n", 871 dev->name, DREG )); 872 873 /* We stop the LANCE here -- it occasionally polls 874 memory if we don't. */ 875 DREG = CSR0_STOP; 876 return 0; 877 } 878 879 880 /* Set or clear the multicast filter for this adaptor. 881 num_addrs == -1 Promiscuous mode, receive all packets 882 num_addrs == 0 Normal mode, clear multicast list 883 num_addrs > 0 Multicast mode, receive normal and MC packets, and do 884 best-effort filtering. 885 */ 886 887 /* completely untested on a sun3 */ 888 static void set_multicast_list( struct net_device *dev ) 889 { 890 struct lance_private *lp = netdev_priv(dev); 891 892 if(netif_queue_stopped(dev)) 893 /* Only possible if board is already started */ 894 return; 895 896 /* We take the simple way out and always enable promiscuous mode. */ 897 DREG = CSR0_STOP; /* Temporarily stop the lance. */ 898 899 if (dev->flags & IFF_PROMISC) { 900 /* Log any net taps. */ 901 DPRINTK( 3, ( "%s: Promiscuous mode enabled.\n", dev->name )); 902 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ 903 } else { 904 short multicast_table[4]; 905 int num_addrs = netdev_mc_count(dev); 906 int i; 907 /* We don't use the multicast table, but rely on upper-layer 908 * filtering. */ 909 memset( multicast_table, (num_addrs == 0) ? 0 : -1, 910 sizeof(multicast_table) ); 911 for( i = 0; i < 4; i++ ) 912 REGA( CSR8+i ) = multicast_table[i]; 913 REGA( CSR15 ) = 0; /* Unset promiscuous mode */ 914 } 915 916 /* 917 * Always set BSWP after a STOP as STOP puts it back into 918 * little endian mode. 919 */ 920 REGA( CSR3 ) = CSR3_BSWP; 921 922 /* Resume normal operation and reset AREG to CSR0 */ 923 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; 924 } 925 926 927 #ifdef MODULE 928 929 static struct net_device *sun3lance_dev; 930 931 int __init init_module(void) 932 { 933 sun3lance_dev = sun3lance_probe(-1); 934 return PTR_ERR_OR_ZERO(sun3lance_dev); 935 } 936 937 void __exit cleanup_module(void) 938 { 939 unregister_netdev(sun3lance_dev); 940 #ifdef CONFIG_SUN3 941 iounmap((void __iomem *)sun3lance_dev->base_addr); 942 #endif 943 free_netdev(sun3lance_dev); 944 } 945 946 #endif /* MODULE */ 947 948