1 /* sun3lance.c: Ethernet driver for SUN3 Lance chip */ 2 /* 3 4 Sun3 Lance ethernet driver, by Sam Creasey (sammy@users.qual.net). 5 This driver is a part of the linux kernel, and is thus distributed 6 under the GNU General Public License. 7 8 The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically 9 true for the correct IRQ and address of the lance registers. They 10 have not been widely tested, however. What we probably need is a 11 "proper" way to search for a device in the sun3's prom, but, alas, 12 linux has no such thing. 13 14 This driver is largely based on atarilance.c, by Roman Hodek. Other 15 sources of inspiration were the NetBSD sun3 am7990 driver, and the 16 linux sparc lance driver (sunlance.c). 17 18 There are more assumptions made throughout this driver, it almost 19 certainly still needs work, but it does work at least for RARP/BOOTP and 20 mounting the root NFS filesystem. 21 22 */ 23 24 static const char version[] = 25 "sun3lance.c: v1.2 1/12/2001 Sam Creasey (sammy@sammy.net)\n"; 26 27 #include <linux/module.h> 28 #include <linux/stddef.h> 29 #include <linux/kernel.h> 30 #include <linux/string.h> 31 #include <linux/errno.h> 32 #include <linux/interrupt.h> 33 #include <linux/init.h> 34 #include <linux/ioport.h> 35 #include <linux/delay.h> 36 #include <linux/netdevice.h> 37 #include <linux/etherdevice.h> 38 #include <linux/skbuff.h> 39 #include <linux/bitops.h> 40 #include <linux/pgtable.h> 41 42 #include <asm/cacheflush.h> 43 #include <asm/setup.h> 44 #include <asm/irq.h> 45 #include <asm/io.h> 46 #include <asm/dvma.h> 47 #include <asm/idprom.h> 48 #include <asm/machines.h> 49 50 #ifdef CONFIG_SUN3 51 #include <asm/sun3mmu.h> 52 #else 53 #include <asm/sun3xprom.h> 54 #endif 55 56 /* sun3/60 addr/irq for the lance chip. If your sun is different, 57 change this. */ 58 #define LANCE_OBIO 0x120000 59 #define LANCE_IRQ IRQ_AUTO_3 60 61 /* Debug level: 62 * 0 = silent, print only serious errors 63 * 1 = normal, print error messages 64 * 2 = debug, print debug infos 65 * 3 = debug, print even more debug infos (packet data) 66 */ 67 68 #define LANCE_DEBUG 0 69 70 #ifdef LANCE_DEBUG 71 static int lance_debug = LANCE_DEBUG; 72 #else 73 static int lance_debug = 1; 74 #endif 75 module_param(lance_debug, int, 0); 76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)"); 77 MODULE_LICENSE("GPL"); 78 79 #define DPRINTK(n,a) \ 80 do { \ 81 if (lance_debug >= n) \ 82 printk a; \ 83 } while( 0 ) 84 85 86 /* we're only using 32k of memory, so we use 4 TX 87 buffers and 16 RX buffers. These values are expressed as log2. */ 88 89 #define TX_LOG_RING_SIZE 3 90 #define RX_LOG_RING_SIZE 5 91 92 /* These are the derived values */ 93 94 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE) 95 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5) 96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 97 98 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE) 99 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5) 100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 101 102 /* Definitions for packet buffer access: */ 103 #define PKT_BUF_SZ 1544 104 105 /* Get the address of a packet buffer corresponding to a given buffer head */ 106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base) 107 108 109 /* The LANCE Rx and Tx ring descriptors. */ 110 struct lance_rx_head { 111 unsigned short base; /* Low word of base addr */ 112 volatile unsigned char flag; 113 unsigned char base_hi; /* High word of base addr (unused) */ 114 short buf_length; /* This length is 2s complement! */ 115 volatile short msg_length; /* This length is "normal". */ 116 }; 117 118 struct lance_tx_head { 119 unsigned short base; /* Low word of base addr */ 120 volatile unsigned char flag; 121 unsigned char base_hi; /* High word of base addr (unused) */ 122 short length; /* Length is 2s complement! */ 123 volatile short misc; 124 }; 125 126 /* The LANCE initialization block, described in databook. */ 127 struct lance_init_block { 128 unsigned short mode; /* Pre-set mode */ 129 unsigned char hwaddr[6]; /* Physical ethernet address */ 130 unsigned int filter[2]; /* Multicast filter (unused). */ 131 /* Receive and transmit ring base, along with length bits. */ 132 unsigned short rdra; 133 unsigned short rlen; 134 unsigned short tdra; 135 unsigned short tlen; 136 unsigned short pad[4]; /* is thie needed? */ 137 }; 138 139 /* The whole layout of the Lance shared memory */ 140 struct lance_memory { 141 struct lance_init_block init; 142 struct lance_tx_head tx_head[TX_RING_SIZE]; 143 struct lance_rx_head rx_head[RX_RING_SIZE]; 144 char rx_data[RX_RING_SIZE][PKT_BUF_SZ]; 145 char tx_data[TX_RING_SIZE][PKT_BUF_SZ]; 146 }; 147 148 /* The driver's private device structure */ 149 150 struct lance_private { 151 volatile unsigned short *iobase; 152 struct lance_memory *mem; 153 int new_rx, new_tx; /* The next free ring entry */ 154 int old_tx, old_rx; /* ring entry to be processed */ 155 /* These two must be longs for set_bit() */ 156 long tx_full; 157 long lock; 158 }; 159 160 /* I/O register access macros */ 161 162 #define MEM lp->mem 163 #define DREG lp->iobase[0] 164 #define AREG lp->iobase[1] 165 #define REGA(a) (*( AREG = (a), &DREG )) 166 167 /* Definitions for the Lance */ 168 169 /* tx_head flags */ 170 #define TMD1_ENP 0x01 /* end of packet */ 171 #define TMD1_STP 0x02 /* start of packet */ 172 #define TMD1_DEF 0x04 /* deferred */ 173 #define TMD1_ONE 0x08 /* one retry needed */ 174 #define TMD1_MORE 0x10 /* more than one retry needed */ 175 #define TMD1_ERR 0x40 /* error summary */ 176 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */ 177 178 #define TMD1_OWN_CHIP TMD1_OWN 179 #define TMD1_OWN_HOST 0 180 181 /* tx_head misc field */ 182 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */ 183 #define TMD3_RTRY 0x0400 /* failed after 16 retries */ 184 #define TMD3_LCAR 0x0800 /* carrier lost */ 185 #define TMD3_LCOL 0x1000 /* late collision */ 186 #define TMD3_UFLO 0x4000 /* underflow (late memory) */ 187 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */ 188 189 /* rx_head flags */ 190 #define RMD1_ENP 0x01 /* end of packet */ 191 #define RMD1_STP 0x02 /* start of packet */ 192 #define RMD1_BUFF 0x04 /* buffer error */ 193 #define RMD1_CRC 0x08 /* CRC error */ 194 #define RMD1_OFLO 0x10 /* overflow */ 195 #define RMD1_FRAM 0x20 /* framing error */ 196 #define RMD1_ERR 0x40 /* error summary */ 197 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */ 198 199 #define RMD1_OWN_CHIP RMD1_OWN 200 #define RMD1_OWN_HOST 0 201 202 /* register names */ 203 #define CSR0 0 /* mode/status */ 204 #define CSR1 1 /* init block addr (low) */ 205 #define CSR2 2 /* init block addr (high) */ 206 #define CSR3 3 /* misc */ 207 #define CSR8 8 /* address filter */ 208 #define CSR15 15 /* promiscuous mode */ 209 210 /* CSR0 */ 211 /* (R=readable, W=writeable, S=set on write, C=clear on write) */ 212 #define CSR0_INIT 0x0001 /* initialize (RS) */ 213 #define CSR0_STRT 0x0002 /* start (RS) */ 214 #define CSR0_STOP 0x0004 /* stop (RS) */ 215 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */ 216 #define CSR0_TXON 0x0010 /* transmitter on (R) */ 217 #define CSR0_RXON 0x0020 /* receiver on (R) */ 218 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */ 219 #define CSR0_INTR 0x0080 /* interrupt active (R) */ 220 #define CSR0_IDON 0x0100 /* initialization done (RC) */ 221 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */ 222 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */ 223 #define CSR0_MERR 0x0800 /* memory error (RC) */ 224 #define CSR0_MISS 0x1000 /* missed frame (RC) */ 225 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */ 226 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */ 227 #define CSR0_ERR 0x8000 /* error (RC) */ 228 229 /* CSR3 */ 230 #define CSR3_BCON 0x0001 /* byte control */ 231 #define CSR3_ACON 0x0002 /* ALE control */ 232 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */ 233 234 /***************************** Prototypes *****************************/ 235 236 static int lance_probe( struct net_device *dev); 237 static int lance_open( struct net_device *dev ); 238 static void lance_init_ring( struct net_device *dev ); 239 static netdev_tx_t lance_start_xmit(struct sk_buff *skb, 240 struct net_device *dev); 241 static irqreturn_t lance_interrupt( int irq, void *dev_id); 242 static int lance_rx( struct net_device *dev ); 243 static int lance_close( struct net_device *dev ); 244 static void set_multicast_list( struct net_device *dev ); 245 246 /************************* End of Prototypes **************************/ 247 248 static struct net_device * __init sun3lance_probe(void) 249 { 250 struct net_device *dev; 251 static int found; 252 int err = -ENODEV; 253 254 if (!MACH_IS_SUN3 && !MACH_IS_SUN3X) 255 return ERR_PTR(-ENODEV); 256 257 /* check that this machine has an onboard lance */ 258 switch(idprom->id_machtype) { 259 case SM_SUN3|SM_3_50: 260 case SM_SUN3|SM_3_60: 261 case SM_SUN3X|SM_3_80: 262 /* these machines have lance */ 263 break; 264 265 default: 266 return ERR_PTR(-ENODEV); 267 } 268 269 if (found) 270 return ERR_PTR(-ENODEV); 271 272 dev = alloc_etherdev(sizeof(struct lance_private)); 273 if (!dev) 274 return ERR_PTR(-ENOMEM); 275 276 if (!lance_probe(dev)) 277 goto out; 278 279 err = register_netdev(dev); 280 if (err) 281 goto out1; 282 found = 1; 283 return dev; 284 285 out1: 286 #ifdef CONFIG_SUN3 287 iounmap((void __iomem *)dev->base_addr); 288 #endif 289 out: 290 free_netdev(dev); 291 return ERR_PTR(err); 292 } 293 294 static const struct net_device_ops lance_netdev_ops = { 295 .ndo_open = lance_open, 296 .ndo_stop = lance_close, 297 .ndo_start_xmit = lance_start_xmit, 298 .ndo_set_rx_mode = set_multicast_list, 299 .ndo_set_mac_address = NULL, 300 .ndo_validate_addr = eth_validate_addr, 301 }; 302 303 static int __init lance_probe( struct net_device *dev) 304 { 305 unsigned long ioaddr; 306 307 struct lance_private *lp; 308 int i; 309 static int did_version; 310 volatile unsigned short *ioaddr_probe; 311 unsigned short tmp1, tmp2; 312 313 #ifdef CONFIG_SUN3 314 ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE); 315 if (!ioaddr) 316 return 0; 317 #else 318 ioaddr = SUN3X_LANCE; 319 #endif 320 321 /* test to see if there's really a lance here */ 322 /* (CSRO_INIT shouldn't be readable) */ 323 324 ioaddr_probe = (volatile unsigned short *)ioaddr; 325 tmp1 = ioaddr_probe[0]; 326 tmp2 = ioaddr_probe[1]; 327 328 ioaddr_probe[1] = CSR0; 329 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP; 330 331 if(ioaddr_probe[0] != CSR0_STOP) { 332 ioaddr_probe[0] = tmp1; 333 ioaddr_probe[1] = tmp2; 334 335 #ifdef CONFIG_SUN3 336 iounmap((void __iomem *)ioaddr); 337 #endif 338 return 0; 339 } 340 341 lp = netdev_priv(dev); 342 343 /* XXX - leak? */ 344 MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000); 345 if (MEM == NULL) { 346 #ifdef CONFIG_SUN3 347 iounmap((void __iomem *)ioaddr); 348 #endif 349 printk(KERN_WARNING "SUN3 Lance couldn't allocate DVMA memory\n"); 350 return 0; 351 } 352 353 lp->iobase = (volatile unsigned short *)ioaddr; 354 dev->base_addr = (unsigned long)ioaddr; /* informational only */ 355 356 REGA(CSR0) = CSR0_STOP; 357 358 if (request_irq(LANCE_IRQ, lance_interrupt, 0, "SUN3 Lance", dev) < 0) { 359 #ifdef CONFIG_SUN3 360 iounmap((void __iomem *)ioaddr); 361 #endif 362 dvma_free((void *)MEM); 363 printk(KERN_WARNING "SUN3 Lance unable to allocate IRQ\n"); 364 return 0; 365 } 366 dev->irq = (unsigned short)LANCE_IRQ; 367 368 369 printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ", 370 dev->name, 371 (unsigned long)ioaddr, 372 (unsigned long)MEM, 373 dev->irq); 374 375 /* copy in the ethernet address from the prom */ 376 for(i = 0; i < 6 ; i++) 377 dev->dev_addr[i] = idprom->id_ethaddr[i]; 378 379 /* tell the card it's ether address, bytes swapped */ 380 MEM->init.hwaddr[0] = dev->dev_addr[1]; 381 MEM->init.hwaddr[1] = dev->dev_addr[0]; 382 MEM->init.hwaddr[2] = dev->dev_addr[3]; 383 MEM->init.hwaddr[3] = dev->dev_addr[2]; 384 MEM->init.hwaddr[4] = dev->dev_addr[5]; 385 MEM->init.hwaddr[5] = dev->dev_addr[4]; 386 387 printk("%pM\n", dev->dev_addr); 388 389 MEM->init.mode = 0x0000; 390 MEM->init.filter[0] = 0x00000000; 391 MEM->init.filter[1] = 0x00000000; 392 MEM->init.rdra = dvma_vtob(MEM->rx_head); 393 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) | 394 (dvma_vtob(MEM->rx_head) >> 16); 395 MEM->init.tdra = dvma_vtob(MEM->tx_head); 396 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) | 397 (dvma_vtob(MEM->tx_head) >> 16); 398 399 DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n", 400 dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head), 401 (dvma_vtob(MEM->tx_head)))); 402 403 if (did_version++ == 0) 404 printk( version ); 405 406 dev->netdev_ops = &lance_netdev_ops; 407 // KLUDGE -- REMOVE ME 408 set_bit(__LINK_STATE_PRESENT, &dev->state); 409 410 411 return 1; 412 } 413 414 static int lance_open( struct net_device *dev ) 415 { 416 struct lance_private *lp = netdev_priv(dev); 417 int i; 418 419 DPRINTK( 2, ( "%s: lance_open()\n", dev->name )); 420 421 REGA(CSR0) = CSR0_STOP; 422 423 lance_init_ring(dev); 424 425 /* From now on, AREG is kept to point to CSR0 */ 426 REGA(CSR0) = CSR0_INIT; 427 428 i = 1000000; 429 while (--i > 0) 430 if (DREG & CSR0_IDON) 431 break; 432 if (i <= 0 || (DREG & CSR0_ERR)) { 433 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", 434 dev->name, i, DREG )); 435 DREG = CSR0_STOP; 436 return -EIO; 437 } 438 439 DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA; 440 441 netif_start_queue(dev); 442 443 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG )); 444 445 return 0; 446 } 447 448 449 /* Initialize the LANCE Rx and Tx rings. */ 450 451 static void lance_init_ring( struct net_device *dev ) 452 { 453 struct lance_private *lp = netdev_priv(dev); 454 int i; 455 456 lp->lock = 0; 457 lp->tx_full = 0; 458 lp->new_rx = lp->new_tx = 0; 459 lp->old_rx = lp->old_tx = 0; 460 461 for( i = 0; i < TX_RING_SIZE; i++ ) { 462 MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]); 463 MEM->tx_head[i].flag = 0; 464 MEM->tx_head[i].base_hi = 465 (dvma_vtob(MEM->tx_data[i])) >>16; 466 MEM->tx_head[i].length = 0; 467 MEM->tx_head[i].misc = 0; 468 } 469 470 for( i = 0; i < RX_RING_SIZE; i++ ) { 471 MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]); 472 MEM->rx_head[i].flag = RMD1_OWN_CHIP; 473 MEM->rx_head[i].base_hi = 474 (dvma_vtob(MEM->rx_data[i])) >> 16; 475 MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000; 476 MEM->rx_head[i].msg_length = 0; 477 } 478 479 /* tell the card it's ether address, bytes swapped */ 480 MEM->init.hwaddr[0] = dev->dev_addr[1]; 481 MEM->init.hwaddr[1] = dev->dev_addr[0]; 482 MEM->init.hwaddr[2] = dev->dev_addr[3]; 483 MEM->init.hwaddr[3] = dev->dev_addr[2]; 484 MEM->init.hwaddr[4] = dev->dev_addr[5]; 485 MEM->init.hwaddr[5] = dev->dev_addr[4]; 486 487 MEM->init.mode = 0x0000; 488 MEM->init.filter[0] = 0x00000000; 489 MEM->init.filter[1] = 0x00000000; 490 MEM->init.rdra = dvma_vtob(MEM->rx_head); 491 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) | 492 (dvma_vtob(MEM->rx_head) >> 16); 493 MEM->init.tdra = dvma_vtob(MEM->tx_head); 494 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) | 495 (dvma_vtob(MEM->tx_head) >> 16); 496 497 498 /* tell the lance the address of its init block */ 499 REGA(CSR1) = dvma_vtob(&(MEM->init)); 500 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16; 501 502 #ifdef CONFIG_SUN3X 503 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON; 504 #else 505 REGA(CSR3) = CSR3_BSWP; 506 #endif 507 508 } 509 510 511 static netdev_tx_t 512 lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 513 { 514 struct lance_private *lp = netdev_priv(dev); 515 int entry, len; 516 struct lance_tx_head *head; 517 unsigned long flags; 518 519 DPRINTK( 1, ( "%s: transmit start.\n", 520 dev->name)); 521 522 /* Transmitter timeout, serious problems. */ 523 if (netif_queue_stopped(dev)) { 524 int tickssofar = jiffies - dev_trans_start(dev); 525 if (tickssofar < HZ/5) 526 return NETDEV_TX_BUSY; 527 528 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n", 529 dev->name, DREG )); 530 DREG = CSR0_STOP; 531 /* 532 * Always set BSWP after a STOP as STOP puts it back into 533 * little endian mode. 534 */ 535 REGA(CSR3) = CSR3_BSWP; 536 dev->stats.tx_errors++; 537 538 if(lance_debug >= 2) { 539 int i; 540 printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n", 541 lp->old_tx, lp->new_tx, 542 lp->tx_full ? " (full)" : "", 543 lp->new_rx ); 544 for( i = 0 ; i < RX_RING_SIZE; i++ ) 545 printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n", 546 i, MEM->rx_head[i].base, 547 -MEM->rx_head[i].buf_length, 548 MEM->rx_head[i].msg_length); 549 for( i = 0 ; i < TX_RING_SIZE; i++ ) 550 printk("tx #%d: base=%04x len=%04x misc=%04x\n", 551 i, MEM->tx_head[i].base, 552 -MEM->tx_head[i].length, 553 MEM->tx_head[i].misc ); 554 } 555 556 lance_init_ring(dev); 557 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; 558 559 netif_start_queue(dev); 560 561 return NETDEV_TX_OK; 562 } 563 564 565 /* Block a timer-based transmit from overlapping. This could better be 566 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */ 567 568 /* Block a timer-based transmit from overlapping with us by 569 stopping the queue for a bit... */ 570 571 netif_stop_queue(dev); 572 573 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) { 574 printk( "%s: tx queue lock!.\n", dev->name); 575 /* don't clear dev->tbusy flag. */ 576 return NETDEV_TX_BUSY; 577 } 578 579 AREG = CSR0; 580 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n", 581 dev->name, DREG )); 582 583 #ifdef CONFIG_SUN3X 584 /* this weirdness doesn't appear on sun3... */ 585 if(!(DREG & CSR0_INIT)) { 586 DPRINTK( 1, ("INIT not set, reinitializing...\n")); 587 REGA( CSR0 ) = CSR0_STOP; 588 lance_init_ring(dev); 589 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; 590 } 591 #endif 592 593 /* Fill in a Tx ring entry */ 594 #if 0 595 if (lance_debug >= 2) { 596 printk( "%s: TX pkt %d type 0x%04x" 597 " from %s to %s" 598 " data at 0x%08x len %d\n", 599 dev->name, lp->new_tx, ((u_short *)skb->data)[6], 600 DEV_ADDR(&skb->data[6]), DEV_ADDR(skb->data), 601 (int)skb->data, (int)skb->len ); 602 } 603 #endif 604 /* We're not prepared for the int until the last flags are set/reset. 605 * And the int may happen already after setting the OWN_CHIP... */ 606 local_irq_save(flags); 607 608 /* Mask to ring buffer boundary. */ 609 entry = lp->new_tx; 610 head = &(MEM->tx_head[entry]); 611 612 /* Caution: the write order is important here, set the "ownership" bits 613 * last. 614 */ 615 616 /* the sun3's lance needs it's buffer padded to the minimum 617 size */ 618 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN; 619 620 // head->length = -len; 621 head->length = (-len) | 0xf000; 622 head->misc = 0; 623 624 skb_copy_from_linear_data(skb, PKTBUF_ADDR(head), skb->len); 625 if (len != skb->len) 626 memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len); 627 628 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP; 629 lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK; 630 dev->stats.tx_bytes += skb->len; 631 632 /* Trigger an immediate send poll. */ 633 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT; 634 AREG = CSR0; 635 DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n", 636 dev->name, DREG )); 637 dev_kfree_skb(skb); 638 639 lp->lock = 0; 640 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) == 641 TMD1_OWN_HOST) 642 netif_start_queue(dev); 643 644 local_irq_restore(flags); 645 646 return NETDEV_TX_OK; 647 } 648 649 /* The LANCE interrupt handler. */ 650 651 static irqreturn_t lance_interrupt( int irq, void *dev_id) 652 { 653 struct net_device *dev = dev_id; 654 struct lance_private *lp = netdev_priv(dev); 655 int csr0; 656 657 still_more: 658 flush_cache_all(); 659 660 AREG = CSR0; 661 csr0 = DREG; 662 663 /* ack interrupts */ 664 DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON); 665 666 /* clear errors */ 667 if(csr0 & CSR0_ERR) 668 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS; 669 670 671 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n", 672 dev->name, csr0, DREG )); 673 674 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */ 675 int old_tx = lp->old_tx; 676 677 // if(lance_debug >= 3) { 678 // int i; 679 // 680 // printk("%s: tx int\n", dev->name); 681 // 682 // for(i = 0; i < TX_RING_SIZE; i++) 683 // printk("ring %d flag=%04x\n", i, 684 // MEM->tx_head[i].flag); 685 // } 686 687 while( old_tx != lp->new_tx) { 688 struct lance_tx_head *head = &(MEM->tx_head[old_tx]); 689 690 DPRINTK(3, ("on tx_ring %d\n", old_tx)); 691 692 if (head->flag & TMD1_OWN_CHIP) 693 break; /* It still hasn't been Txed */ 694 695 if (head->flag & TMD1_ERR) { 696 int status = head->misc; 697 dev->stats.tx_errors++; 698 if (status & TMD3_RTRY) dev->stats.tx_aborted_errors++; 699 if (status & TMD3_LCAR) dev->stats.tx_carrier_errors++; 700 if (status & TMD3_LCOL) dev->stats.tx_window_errors++; 701 if (status & (TMD3_UFLO | TMD3_BUFF)) { 702 dev->stats.tx_fifo_errors++; 703 printk("%s: Tx FIFO error\n", 704 dev->name); 705 REGA(CSR0) = CSR0_STOP; 706 REGA(CSR3) = CSR3_BSWP; 707 lance_init_ring(dev); 708 REGA(CSR0) = CSR0_STRT | CSR0_INEA; 709 return IRQ_HANDLED; 710 } 711 } else if(head->flag & (TMD1_ENP | TMD1_STP)) { 712 713 head->flag &= ~(TMD1_ENP | TMD1_STP); 714 if(head->flag & (TMD1_ONE | TMD1_MORE)) 715 dev->stats.collisions++; 716 717 dev->stats.tx_packets++; 718 DPRINTK(3, ("cleared tx ring %d\n", old_tx)); 719 } 720 old_tx = (old_tx +1) & TX_RING_MOD_MASK; 721 } 722 723 lp->old_tx = old_tx; 724 } 725 726 727 if (netif_queue_stopped(dev)) { 728 /* The ring is no longer full, clear tbusy. */ 729 netif_start_queue(dev); 730 netif_wake_queue(dev); 731 } 732 733 if (csr0 & CSR0_RINT) /* Rx interrupt */ 734 lance_rx( dev ); 735 736 /* Log misc errors. */ 737 if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */ 738 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */ 739 if (csr0 & CSR0_MERR) { 740 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), " 741 "status %04x.\n", dev->name, csr0 )); 742 /* Restart the chip. */ 743 REGA(CSR0) = CSR0_STOP; 744 REGA(CSR3) = CSR3_BSWP; 745 lance_init_ring(dev); 746 REGA(CSR0) = CSR0_STRT | CSR0_INEA; 747 } 748 749 750 /* Clear any other interrupt, and set interrupt enable. */ 751 // DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR | 752 // CSR0_IDON | CSR0_INEA; 753 754 REGA(CSR0) = CSR0_INEA; 755 756 if(DREG & (CSR0_RINT | CSR0_TINT)) { 757 DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG)); 758 goto still_more; 759 } 760 761 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n", 762 dev->name, DREG )); 763 return IRQ_HANDLED; 764 } 765 766 /* get packet, toss into skbuff */ 767 static int lance_rx( struct net_device *dev ) 768 { 769 struct lance_private *lp = netdev_priv(dev); 770 int entry = lp->new_rx; 771 772 /* If we own the next entry, it's a new packet. Send it up. */ 773 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) { 774 struct lance_rx_head *head = &(MEM->rx_head[entry]); 775 int status = head->flag; 776 777 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */ 778 /* There is a tricky error noted by John Murphy, 779 <murf@perftech.com> to Russ Nelson: Even with 780 full-sized buffers it's possible for a jabber packet to use two 781 buffers, with only the last correctly noting the error. */ 782 if (status & RMD1_ENP) /* Only count a general error at the */ 783 dev->stats.rx_errors++; /* end of a packet.*/ 784 if (status & RMD1_FRAM) dev->stats.rx_frame_errors++; 785 if (status & RMD1_OFLO) dev->stats.rx_over_errors++; 786 if (status & RMD1_CRC) dev->stats.rx_crc_errors++; 787 if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++; 788 head->flag &= (RMD1_ENP|RMD1_STP); 789 } else { 790 /* Malloc up new buffer, compatible with net-3. */ 791 // short pkt_len = head->msg_length;// & 0xfff; 792 short pkt_len = (head->msg_length & 0xfff) - 4; 793 struct sk_buff *skb; 794 795 if (pkt_len < 60) { 796 printk( "%s: Runt packet!\n", dev->name ); 797 dev->stats.rx_errors++; 798 } 799 else { 800 skb = netdev_alloc_skb(dev, pkt_len + 2); 801 if (skb == NULL) { 802 dev->stats.rx_dropped++; 803 head->msg_length = 0; 804 head->flag |= RMD1_OWN_CHIP; 805 lp->new_rx = (lp->new_rx+1) & 806 RX_RING_MOD_MASK; 807 } 808 809 #if 0 810 if (lance_debug >= 3) { 811 u_char *data = PKTBUF_ADDR(head); 812 printk("%s: RX pkt %d type 0x%04x" 813 " from %pM to %pM", 814 dev->name, lp->new_tx, ((u_short *)data)[6], 815 &data[6], data); 816 817 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x " 818 "len %d at %08x\n", 819 data[15], data[16], data[17], data[18], 820 data[19], data[20], data[21], data[22], 821 pkt_len, data); 822 } 823 #endif 824 if (lance_debug >= 3) { 825 u_char *data = PKTBUF_ADDR(head); 826 printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len); 827 } 828 829 830 skb_reserve( skb, 2 ); /* 16 byte align */ 831 skb_put( skb, pkt_len ); /* Make room */ 832 skb_copy_to_linear_data(skb, 833 PKTBUF_ADDR(head), 834 pkt_len); 835 836 skb->protocol = eth_type_trans( skb, dev ); 837 netif_rx( skb ); 838 dev->stats.rx_packets++; 839 dev->stats.rx_bytes += pkt_len; 840 } 841 } 842 843 // head->buf_length = -PKT_BUF_SZ | 0xf000; 844 head->msg_length = 0; 845 head->flag = RMD1_OWN_CHIP; 846 847 entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK; 848 } 849 850 /* From lance.c (Donald Becker): */ 851 /* We should check that at least two ring entries are free. 852 If not, we should free one and mark stats->rx_dropped++. */ 853 854 return 0; 855 } 856 857 858 static int lance_close( struct net_device *dev ) 859 { 860 struct lance_private *lp = netdev_priv(dev); 861 862 netif_stop_queue(dev); 863 864 AREG = CSR0; 865 866 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n", 867 dev->name, DREG )); 868 869 /* We stop the LANCE here -- it occasionally polls 870 memory if we don't. */ 871 DREG = CSR0_STOP; 872 return 0; 873 } 874 875 876 /* Set or clear the multicast filter for this adaptor. 877 num_addrs == -1 Promiscuous mode, receive all packets 878 num_addrs == 0 Normal mode, clear multicast list 879 num_addrs > 0 Multicast mode, receive normal and MC packets, and do 880 best-effort filtering. 881 */ 882 883 /* completely untested on a sun3 */ 884 static void set_multicast_list( struct net_device *dev ) 885 { 886 struct lance_private *lp = netdev_priv(dev); 887 888 if(netif_queue_stopped(dev)) 889 /* Only possible if board is already started */ 890 return; 891 892 /* We take the simple way out and always enable promiscuous mode. */ 893 DREG = CSR0_STOP; /* Temporarily stop the lance. */ 894 895 if (dev->flags & IFF_PROMISC) { 896 /* Log any net taps. */ 897 DPRINTK( 3, ( "%s: Promiscuous mode enabled.\n", dev->name )); 898 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ 899 } else { 900 short multicast_table[4]; 901 int num_addrs = netdev_mc_count(dev); 902 int i; 903 /* We don't use the multicast table, but rely on upper-layer 904 * filtering. */ 905 memset( multicast_table, (num_addrs == 0) ? 0 : -1, 906 sizeof(multicast_table) ); 907 for( i = 0; i < 4; i++ ) 908 REGA( CSR8+i ) = multicast_table[i]; 909 REGA( CSR15 ) = 0; /* Unset promiscuous mode */ 910 } 911 912 /* 913 * Always set BSWP after a STOP as STOP puts it back into 914 * little endian mode. 915 */ 916 REGA( CSR3 ) = CSR3_BSWP; 917 918 /* Resume normal operation and reset AREG to CSR0 */ 919 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; 920 } 921 922 923 static struct net_device *sun3lance_dev; 924 925 static int __init sun3lance_init(void) 926 { 927 sun3lance_dev = sun3lance_probe(); 928 return PTR_ERR_OR_ZERO(sun3lance_dev); 929 } 930 module_init(sun3lance_init); 931 932 static void __exit sun3lance_cleanup(void) 933 { 934 unregister_netdev(sun3lance_dev); 935 #ifdef CONFIG_SUN3 936 iounmap((void __iomem *)sun3lance_dev->base_addr); 937 #endif 938 free_netdev(sun3lance_dev); 939 } 940 module_exit(sun3lance_cleanup); 941