1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2023 Advanced Micro Devices, Inc */ 3 4 #include <linux/errno.h> 5 #include <linux/pci.h> 6 #include <linux/utsname.h> 7 8 #include "core.h" 9 10 int pdsc_err_to_errno(enum pds_core_status_code code) 11 { 12 switch (code) { 13 case PDS_RC_SUCCESS: 14 return 0; 15 case PDS_RC_EVERSION: 16 case PDS_RC_EQTYPE: 17 case PDS_RC_EQID: 18 case PDS_RC_EINVAL: 19 case PDS_RC_ENOSUPP: 20 return -EINVAL; 21 case PDS_RC_EPERM: 22 return -EPERM; 23 case PDS_RC_ENOENT: 24 return -ENOENT; 25 case PDS_RC_EAGAIN: 26 return -EAGAIN; 27 case PDS_RC_ENOMEM: 28 return -ENOMEM; 29 case PDS_RC_EFAULT: 30 return -EFAULT; 31 case PDS_RC_EBUSY: 32 return -EBUSY; 33 case PDS_RC_EEXIST: 34 return -EEXIST; 35 case PDS_RC_EVFID: 36 return -ENODEV; 37 case PDS_RC_ECLIENT: 38 return -ECHILD; 39 case PDS_RC_ENOSPC: 40 return -ENOSPC; 41 case PDS_RC_ERANGE: 42 return -ERANGE; 43 case PDS_RC_BAD_ADDR: 44 return -EFAULT; 45 case PDS_RC_EOPCODE: 46 case PDS_RC_EINTR: 47 case PDS_RC_DEV_CMD: 48 case PDS_RC_ERROR: 49 case PDS_RC_ERDMA: 50 case PDS_RC_EIO: 51 default: 52 return -EIO; 53 } 54 } 55 56 bool pdsc_is_fw_running(struct pdsc *pdsc) 57 { 58 pdsc->fw_status = ioread8(&pdsc->info_regs->fw_status); 59 pdsc->last_fw_time = jiffies; 60 pdsc->last_hb = ioread32(&pdsc->info_regs->fw_heartbeat); 61 62 /* Firmware is useful only if the running bit is set and 63 * fw_status != 0xff (bad PCI read) 64 */ 65 return (pdsc->fw_status != 0xff) && 66 (pdsc->fw_status & PDS_CORE_FW_STS_F_RUNNING); 67 } 68 69 bool pdsc_is_fw_good(struct pdsc *pdsc) 70 { 71 bool fw_running = pdsc_is_fw_running(pdsc); 72 u8 gen; 73 74 /* Make sure to update the cached fw_status by calling 75 * pdsc_is_fw_running() before getting the generation 76 */ 77 gen = pdsc->fw_status & PDS_CORE_FW_STS_F_GENERATION; 78 79 return fw_running && gen == pdsc->fw_generation; 80 } 81 82 static u8 pdsc_devcmd_status(struct pdsc *pdsc) 83 { 84 return ioread8(&pdsc->cmd_regs->comp.status); 85 } 86 87 static bool pdsc_devcmd_done(struct pdsc *pdsc) 88 { 89 return ioread32(&pdsc->cmd_regs->done) & PDS_CORE_DEV_CMD_DONE; 90 } 91 92 static void pdsc_devcmd_dbell(struct pdsc *pdsc) 93 { 94 iowrite32(0, &pdsc->cmd_regs->done); 95 iowrite32(1, &pdsc->cmd_regs->doorbell); 96 } 97 98 static void pdsc_devcmd_clean(struct pdsc *pdsc) 99 { 100 iowrite32(0, &pdsc->cmd_regs->doorbell); 101 memset_io(&pdsc->cmd_regs->cmd, 0, sizeof(pdsc->cmd_regs->cmd)); 102 } 103 104 static const char *pdsc_devcmd_str(int opcode) 105 { 106 switch (opcode) { 107 case PDS_CORE_CMD_NOP: 108 return "PDS_CORE_CMD_NOP"; 109 case PDS_CORE_CMD_IDENTIFY: 110 return "PDS_CORE_CMD_IDENTIFY"; 111 case PDS_CORE_CMD_RESET: 112 return "PDS_CORE_CMD_RESET"; 113 case PDS_CORE_CMD_INIT: 114 return "PDS_CORE_CMD_INIT"; 115 case PDS_CORE_CMD_FW_DOWNLOAD: 116 return "PDS_CORE_CMD_FW_DOWNLOAD"; 117 case PDS_CORE_CMD_FW_CONTROL: 118 return "PDS_CORE_CMD_FW_CONTROL"; 119 default: 120 return "PDS_CORE_CMD_UNKNOWN"; 121 } 122 } 123 124 static int pdsc_devcmd_wait(struct pdsc *pdsc, int max_seconds) 125 { 126 struct device *dev = pdsc->dev; 127 unsigned long start_time; 128 unsigned long max_wait; 129 unsigned long duration; 130 int timeout = 0; 131 int done = 0; 132 int err = 0; 133 int status; 134 int opcode; 135 136 opcode = ioread8(&pdsc->cmd_regs->cmd.opcode); 137 138 start_time = jiffies; 139 max_wait = start_time + (max_seconds * HZ); 140 141 while (!done && !timeout) { 142 done = pdsc_devcmd_done(pdsc); 143 if (done) 144 break; 145 146 timeout = time_after(jiffies, max_wait); 147 if (timeout) 148 break; 149 150 usleep_range(100, 200); 151 } 152 duration = jiffies - start_time; 153 154 if (done && duration > HZ) 155 dev_dbg(dev, "DEVCMD %d %s after %ld secs\n", 156 opcode, pdsc_devcmd_str(opcode), duration / HZ); 157 158 if (!done || timeout) { 159 dev_err(dev, "DEVCMD %d %s timeout, done %d timeout %d max_seconds=%d\n", 160 opcode, pdsc_devcmd_str(opcode), done, timeout, 161 max_seconds); 162 err = -ETIMEDOUT; 163 pdsc_devcmd_clean(pdsc); 164 } 165 166 status = pdsc_devcmd_status(pdsc); 167 err = pdsc_err_to_errno(status); 168 if (err && err != -EAGAIN) 169 dev_err(dev, "DEVCMD %d %s failed, status=%d err %d %pe\n", 170 opcode, pdsc_devcmd_str(opcode), status, err, 171 ERR_PTR(err)); 172 173 return err; 174 } 175 176 int pdsc_devcmd_locked(struct pdsc *pdsc, union pds_core_dev_cmd *cmd, 177 union pds_core_dev_comp *comp, int max_seconds) 178 { 179 int err; 180 181 memcpy_toio(&pdsc->cmd_regs->cmd, cmd, sizeof(*cmd)); 182 pdsc_devcmd_dbell(pdsc); 183 err = pdsc_devcmd_wait(pdsc, max_seconds); 184 memcpy_fromio(comp, &pdsc->cmd_regs->comp, sizeof(*comp)); 185 186 if (err == -ENXIO || err == -ETIMEDOUT) 187 queue_work(pdsc->wq, &pdsc->health_work); 188 189 return err; 190 } 191 192 int pdsc_devcmd(struct pdsc *pdsc, union pds_core_dev_cmd *cmd, 193 union pds_core_dev_comp *comp, int max_seconds) 194 { 195 int err; 196 197 mutex_lock(&pdsc->devcmd_lock); 198 err = pdsc_devcmd_locked(pdsc, cmd, comp, max_seconds); 199 mutex_unlock(&pdsc->devcmd_lock); 200 201 return err; 202 } 203 204 int pdsc_devcmd_init(struct pdsc *pdsc) 205 { 206 union pds_core_dev_comp comp = {}; 207 union pds_core_dev_cmd cmd = { 208 .opcode = PDS_CORE_CMD_INIT, 209 }; 210 211 return pdsc_devcmd(pdsc, &cmd, &comp, pdsc->devcmd_timeout); 212 } 213 214 int pdsc_devcmd_reset(struct pdsc *pdsc) 215 { 216 union pds_core_dev_comp comp = {}; 217 union pds_core_dev_cmd cmd = { 218 .reset.opcode = PDS_CORE_CMD_RESET, 219 }; 220 221 return pdsc_devcmd(pdsc, &cmd, &comp, pdsc->devcmd_timeout); 222 } 223 224 static int pdsc_devcmd_identify_locked(struct pdsc *pdsc) 225 { 226 union pds_core_dev_comp comp = {}; 227 union pds_core_dev_cmd cmd = { 228 .identify.opcode = PDS_CORE_CMD_IDENTIFY, 229 .identify.ver = PDS_CORE_IDENTITY_VERSION_1, 230 }; 231 232 return pdsc_devcmd_locked(pdsc, &cmd, &comp, pdsc->devcmd_timeout); 233 } 234 235 static void pdsc_init_devinfo(struct pdsc *pdsc) 236 { 237 pdsc->dev_info.asic_type = ioread8(&pdsc->info_regs->asic_type); 238 pdsc->dev_info.asic_rev = ioread8(&pdsc->info_regs->asic_rev); 239 pdsc->fw_generation = PDS_CORE_FW_STS_F_GENERATION & 240 ioread8(&pdsc->info_regs->fw_status); 241 242 memcpy_fromio(pdsc->dev_info.fw_version, 243 pdsc->info_regs->fw_version, 244 PDS_CORE_DEVINFO_FWVERS_BUFLEN); 245 pdsc->dev_info.fw_version[PDS_CORE_DEVINFO_FWVERS_BUFLEN] = 0; 246 247 memcpy_fromio(pdsc->dev_info.serial_num, 248 pdsc->info_regs->serial_num, 249 PDS_CORE_DEVINFO_SERIAL_BUFLEN); 250 pdsc->dev_info.serial_num[PDS_CORE_DEVINFO_SERIAL_BUFLEN] = 0; 251 252 dev_dbg(pdsc->dev, "fw_version %s\n", pdsc->dev_info.fw_version); 253 } 254 255 static int pdsc_identify(struct pdsc *pdsc) 256 { 257 struct pds_core_drv_identity drv = {}; 258 size_t sz; 259 int err; 260 261 drv.drv_type = cpu_to_le32(PDS_DRIVER_LINUX); 262 snprintf(drv.driver_ver_str, sizeof(drv.driver_ver_str), 263 "%s %s", PDS_CORE_DRV_NAME, utsname()->release); 264 265 /* Next let's get some info about the device 266 * We use the devcmd_lock at this level in order to 267 * get safe access to the cmd_regs->data before anyone 268 * else can mess it up 269 */ 270 mutex_lock(&pdsc->devcmd_lock); 271 272 sz = min_t(size_t, sizeof(drv), sizeof(pdsc->cmd_regs->data)); 273 memcpy_toio(&pdsc->cmd_regs->data, &drv, sz); 274 275 err = pdsc_devcmd_identify_locked(pdsc); 276 if (!err) { 277 sz = min_t(size_t, sizeof(pdsc->dev_ident), 278 sizeof(pdsc->cmd_regs->data)); 279 memcpy_fromio(&pdsc->dev_ident, &pdsc->cmd_regs->data, sz); 280 } 281 mutex_unlock(&pdsc->devcmd_lock); 282 283 if (err) { 284 dev_err(pdsc->dev, "Cannot identify device: %pe\n", 285 ERR_PTR(err)); 286 return err; 287 } 288 289 if (isprint(pdsc->dev_info.fw_version[0]) && 290 isascii(pdsc->dev_info.fw_version[0])) 291 dev_info(pdsc->dev, "FW: %.*s\n", 292 (int)(sizeof(pdsc->dev_info.fw_version) - 1), 293 pdsc->dev_info.fw_version); 294 else 295 dev_info(pdsc->dev, "FW: (invalid string) 0x%02x 0x%02x 0x%02x 0x%02x ...\n", 296 (u8)pdsc->dev_info.fw_version[0], 297 (u8)pdsc->dev_info.fw_version[1], 298 (u8)pdsc->dev_info.fw_version[2], 299 (u8)pdsc->dev_info.fw_version[3]); 300 301 return 0; 302 } 303 304 int pdsc_dev_reinit(struct pdsc *pdsc) 305 { 306 pdsc_init_devinfo(pdsc); 307 308 return pdsc_identify(pdsc); 309 } 310 311 int pdsc_dev_init(struct pdsc *pdsc) 312 { 313 unsigned int nintrs; 314 int err; 315 316 /* Initial init and reset of device */ 317 pdsc_init_devinfo(pdsc); 318 pdsc->devcmd_timeout = PDS_CORE_DEVCMD_TIMEOUT; 319 320 err = pdsc_devcmd_reset(pdsc); 321 if (err) 322 return err; 323 324 err = pdsc_identify(pdsc); 325 if (err) 326 return err; 327 328 pdsc_debugfs_add_ident(pdsc); 329 330 /* Now we can reserve interrupts */ 331 nintrs = le32_to_cpu(pdsc->dev_ident.nintrs); 332 nintrs = min_t(unsigned int, num_online_cpus(), nintrs); 333 334 /* Get intr_info struct array for tracking */ 335 pdsc->intr_info = kcalloc(nintrs, sizeof(*pdsc->intr_info), GFP_KERNEL); 336 if (!pdsc->intr_info) { 337 err = -ENOMEM; 338 goto err_out; 339 } 340 341 err = pci_alloc_irq_vectors(pdsc->pdev, nintrs, nintrs, PCI_IRQ_MSIX); 342 if (err != nintrs) { 343 dev_err(pdsc->dev, "Can't get %d intrs from OS: %pe\n", 344 nintrs, ERR_PTR(err)); 345 err = -ENOSPC; 346 goto err_out; 347 } 348 pdsc->nintrs = nintrs; 349 350 return 0; 351 352 err_out: 353 kfree(pdsc->intr_info); 354 pdsc->intr_info = NULL; 355 356 return err; 357 } 358