1b955f6caSJeff Kirsher /* Random defines and structures for the HP Lance driver. 2b955f6caSJeff Kirsher * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk> 3b955f6caSJeff Kirsher * Based on the Sun Lance driver and the NetBSD HP Lance driver 4b955f6caSJeff Kirsher */ 5b955f6caSJeff Kirsher 6b955f6caSJeff Kirsher /* Registers */ 7b955f6caSJeff Kirsher #define HPLANCE_ID 0x01 /* DIO register: ID byte */ 8b955f6caSJeff Kirsher #define HPLANCE_STATUS 0x03 /* DIO register: interrupt enable/status */ 9b955f6caSJeff Kirsher 10b955f6caSJeff Kirsher /* Control and status bits for the status register */ 11b955f6caSJeff Kirsher #define LE_IE 0x80 /* interrupt enable */ 12b955f6caSJeff Kirsher #define LE_IR 0x40 /* interrupt requested */ 13b955f6caSJeff Kirsher #define LE_LOCK 0x08 /* lock status register */ 14b955f6caSJeff Kirsher #define LE_ACK 0x04 /* ack of lock */ 15b955f6caSJeff Kirsher #define LE_JAB 0x02 /* loss of tx clock (???) */ 16b955f6caSJeff Kirsher /* We can also extract the IPL from the status register with the standard 17b955f6caSJeff Kirsher * DIO_IPL(hplance) macro, or using dio_scodetoipl() 18b955f6caSJeff Kirsher */ 19b955f6caSJeff Kirsher 20b955f6caSJeff Kirsher /* These are the offsets for the DIO regs (hplance_reg), lance_ioreg, 21b955f6caSJeff Kirsher * memory and NVRAM: 22b955f6caSJeff Kirsher */ 23b955f6caSJeff Kirsher #define HPLANCE_IDOFF 0 /* board baseaddr */ 24b955f6caSJeff Kirsher #define HPLANCE_REGOFF 0x4000 /* lance registers */ 25b955f6caSJeff Kirsher #define HPLANCE_MEMOFF 0x8000 /* struct lance_init_block */ 26b955f6caSJeff Kirsher #define HPLANCE_NVRAMOFF 0xC008 /* etheraddress as one *nibble* per byte */ 27