1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Lance ethernet driver for the MIPS processor based 4 * DECstation family 5 * 6 * 7 * adopted from sunlance.c by Richard van den Berg 8 * 9 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki 10 * 11 * additional sources: 12 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, 13 * Revision 1.2 14 * 15 * History: 16 * 17 * v0.001: The kernel accepts the code and it shows the hardware address. 18 * 19 * v0.002: Removed most sparc stuff, left only some module and dma stuff. 20 * 21 * v0.003: Enhanced base address calculation from proposals by 22 * Harald Koerfgen and Thomas Riemer. 23 * 24 * v0.004: lance-regs is pointing at the right addresses, added prom 25 * check. First start of address mapping and DMA. 26 * 27 * v0.005: started to play around with LANCE-DMA. This driver will not 28 * work for non IOASIC lances. HK 29 * 30 * v0.006: added pointer arrays to lance_private and setup routine for 31 * them in dec_lance_init. HK 32 * 33 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to 34 * access the init block. This looks like one (short) word at a 35 * time, but the smallest amount the IOASIC can transfer is a 36 * (long) word. So we have a 2-2 padding here. Changed 37 * lance_init_block accordingly. The 16-16 padding for the buffers 38 * seems to be correct. HK 39 * 40 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer 41 * 42 * v0.009: Module support fixes, multiple interfaces support, various 43 * bits. macro 44 * 45 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the 46 * PMAX requirement to only use halfword accesses to the 47 * buffer. macro 48 * 49 * v0.011: Converted the PMAD to the driver model. macro 50 */ 51 52 #include <linux/crc32.h> 53 #include <linux/delay.h> 54 #include <linux/errno.h> 55 #include <linux/if_ether.h> 56 #include <linux/init.h> 57 #include <linux/kernel.h> 58 #include <linux/module.h> 59 #include <linux/netdevice.h> 60 #include <linux/etherdevice.h> 61 #include <linux/spinlock.h> 62 #include <linux/stddef.h> 63 #include <linux/string.h> 64 #include <linux/tc.h> 65 #include <linux/types.h> 66 67 #include <asm/addrspace.h> 68 69 #include <asm/dec/interrupts.h> 70 #include <asm/dec/ioasic.h> 71 #include <asm/dec/ioasic_addrs.h> 72 #include <asm/dec/kn01.h> 73 #include <asm/dec/machtype.h> 74 #include <asm/dec/system.h> 75 76 static const char version[] = 77 "declance.c: v0.011 by Linux MIPS DECstation task force\n"; 78 79 MODULE_AUTHOR("Linux MIPS DECstation task force"); 80 MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); 81 MODULE_LICENSE("GPL"); 82 83 #define __unused __attribute__ ((unused)) 84 85 /* 86 * card types 87 */ 88 #define ASIC_LANCE 1 89 #define PMAD_LANCE 2 90 #define PMAX_LANCE 3 91 92 93 #define LE_CSR0 0 94 #define LE_CSR1 1 95 #define LE_CSR2 2 96 #define LE_CSR3 3 97 98 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 99 100 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 101 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 102 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 103 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 104 #define LE_C0_MERR 0x0800 /* ME: Memory error */ 105 #define LE_C0_RINT 0x0400 /* Received interrupt */ 106 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 107 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 108 #define LE_C0_INTR 0x0080 /* Interrupt or error */ 109 #define LE_C0_INEA 0x0040 /* Interrupt enable */ 110 #define LE_C0_RXON 0x0020 /* Receiver on */ 111 #define LE_C0_TXON 0x0010 /* Transmitter on */ 112 #define LE_C0_TDMD 0x0008 /* Transmitter demand */ 113 #define LE_C0_STOP 0x0004 /* Stop the card */ 114 #define LE_C0_STRT 0x0002 /* Start the card */ 115 #define LE_C0_INIT 0x0001 /* Init the card */ 116 117 #define LE_C3_BSWP 0x4 /* SWAP */ 118 #define LE_C3_ACON 0x2 /* ALE Control */ 119 #define LE_C3_BCON 0x1 /* Byte control */ 120 121 /* Receive message descriptor 1 */ 122 #define LE_R1_OWN 0x8000 /* Who owns the entry */ 123 #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ 124 #define LE_R1_FRA 0x2000 /* FRA: Frame error */ 125 #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ 126 #define LE_R1_CRC 0x0800 /* CRC error */ 127 #define LE_R1_BUF 0x0400 /* BUF: Buffer error */ 128 #define LE_R1_SOP 0x0200 /* Start of packet */ 129 #define LE_R1_EOP 0x0100 /* End of packet */ 130 #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ 131 132 /* Transmit message descriptor 1 */ 133 #define LE_T1_OWN 0x8000 /* Lance owns the packet */ 134 #define LE_T1_ERR 0x4000 /* Error summary */ 135 #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ 136 #define LE_T1_EONE 0x0800 /* Error: one retry needed */ 137 #define LE_T1_EDEF 0x0400 /* Error: deferred */ 138 #define LE_T1_SOP 0x0200 /* Start of packet */ 139 #define LE_T1_EOP 0x0100 /* End of packet */ 140 #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ 141 142 #define LE_T3_BUF 0x8000 /* Buffer error */ 143 #define LE_T3_UFL 0x4000 /* Error underflow */ 144 #define LE_T3_LCOL 0x1000 /* Error late collision */ 145 #define LE_T3_CLOS 0x0800 /* Error carrier loss */ 146 #define LE_T3_RTY 0x0400 /* Error retry */ 147 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 148 149 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 150 151 #ifndef LANCE_LOG_TX_BUFFERS 152 #define LANCE_LOG_TX_BUFFERS 4 153 #define LANCE_LOG_RX_BUFFERS 4 154 #endif 155 156 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 157 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 158 159 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 160 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 161 162 #define PKT_BUF_SZ 1536 163 #define RX_BUFF_SIZE PKT_BUF_SZ 164 #define TX_BUFF_SIZE PKT_BUF_SZ 165 166 #undef TEST_HITS 167 #define ZERO 0 168 169 /* 170 * The DS2100/3100 have a linear 64 kB buffer which supports halfword 171 * accesses only. Each halfword of the buffer is word-aligned in the 172 * CPU address space. 173 * 174 * The PMAD-AA has a 128 kB buffer on-board. 175 * 176 * The IOASIC LANCE devices use a shared memory region. This region 177 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB 178 * boundary. The LANCE sees this as a 64 kB long continuous memory 179 * region. 180 * 181 * The LANCE's DMA address is used as an index in this buffer and DMA 182 * takes place in bursts of eight 16-bit words which are packed into 183 * four 32-bit words by the IOASIC. This leads to a strange padding: 184 * 16 bytes of valid data followed by a 16 byte gap :-(. 185 */ 186 187 struct lance_rx_desc { 188 unsigned short rmd0; /* low address of packet */ 189 unsigned short rmd1; /* high address of packet 190 and descriptor bits */ 191 short length; /* 2s complement (negative!) 192 of buffer length */ 193 unsigned short mblength; /* actual number of bytes received */ 194 }; 195 196 struct lance_tx_desc { 197 unsigned short tmd0; /* low address of packet */ 198 unsigned short tmd1; /* high address of packet 199 and descriptor bits */ 200 short length; /* 2s complement (negative!) 201 of buffer length */ 202 unsigned short misc; 203 }; 204 205 206 /* First part of the LANCE initialization block, described in databook. */ 207 struct lance_init_block { 208 unsigned short mode; /* pre-set mode (reg. 15) */ 209 210 unsigned short phys_addr[3]; /* physical ethernet address */ 211 unsigned short filter[4]; /* multicast filter */ 212 213 /* Receive and transmit ring base, along with extra bits. */ 214 unsigned short rx_ptr; /* receive descriptor addr */ 215 unsigned short rx_len; /* receive len and high addr */ 216 unsigned short tx_ptr; /* transmit descriptor addr */ 217 unsigned short tx_len; /* transmit len and high addr */ 218 219 short gap[4]; 220 221 /* The buffer descriptors */ 222 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 223 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 224 }; 225 226 #define BUF_OFFSET_CPU sizeof(struct lance_init_block) 227 #define BUF_OFFSET_LNC sizeof(struct lance_init_block) 228 229 #define shift_off(off, type) \ 230 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) 231 232 #define lib_off(rt, type) \ 233 shift_off(offsetof(struct lance_init_block, rt), type) 234 235 #define lib_ptr(ib, rt, type) \ 236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) 237 238 #define rds_off(rt, type) \ 239 shift_off(offsetof(struct lance_rx_desc, rt), type) 240 241 #define rds_ptr(rd, rt, type) \ 242 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) 243 244 #define tds_off(rt, type) \ 245 shift_off(offsetof(struct lance_tx_desc, rt), type) 246 247 #define tds_ptr(td, rt, type) \ 248 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) 249 250 struct lance_private { 251 struct net_device *next; 252 int type; 253 int dma_irq; 254 volatile struct lance_regs *ll; 255 256 spinlock_t lock; 257 258 int rx_new, tx_new; 259 int rx_old, tx_old; 260 261 unsigned short busmaster_regval; 262 263 struct timer_list multicast_timer; 264 struct net_device *dev; 265 266 /* Pointers to the ring buffers as seen from the CPU */ 267 char *rx_buf_ptr_cpu[RX_RING_SIZE]; 268 char *tx_buf_ptr_cpu[TX_RING_SIZE]; 269 270 /* Pointers to the ring buffers as seen from the LANCE */ 271 uint rx_buf_ptr_lnc[RX_RING_SIZE]; 272 uint tx_buf_ptr_lnc[TX_RING_SIZE]; 273 }; 274 275 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 276 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 277 lp->tx_old - lp->tx_new-1) 278 279 /* The lance control ports are at an absolute address, machine and tc-slot 280 * dependent. 281 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, 282 * so we have to give the structure an extra member making rap pointing 283 * at the right address 284 */ 285 struct lance_regs { 286 volatile unsigned short rdp; /* register data port */ 287 unsigned short pad; 288 volatile unsigned short rap; /* register address port */ 289 }; 290 291 int dec_lance_debug = 2; 292 293 static struct tc_driver dec_lance_tc_driver; 294 static struct net_device *root_lance_dev; 295 296 static inline void writereg(volatile unsigned short *regptr, short value) 297 { 298 *regptr = value; 299 iob(); 300 } 301 302 /* Load the CSR registers */ 303 static void load_csrs(struct lance_private *lp) 304 { 305 volatile struct lance_regs *ll = lp->ll; 306 uint leptr; 307 308 /* The address space as seen from the LANCE 309 * begins at address 0. HK 310 */ 311 leptr = 0; 312 313 writereg(&ll->rap, LE_CSR1); 314 writereg(&ll->rdp, (leptr & 0xFFFF)); 315 writereg(&ll->rap, LE_CSR2); 316 writereg(&ll->rdp, leptr >> 16); 317 writereg(&ll->rap, LE_CSR3); 318 writereg(&ll->rdp, lp->busmaster_regval); 319 320 /* Point back to csr0 */ 321 writereg(&ll->rap, LE_CSR0); 322 } 323 324 /* 325 * Our specialized copy routines 326 * 327 */ 328 static void cp_to_buf(const int type, void *to, const void *from, int len) 329 { 330 unsigned short *tp; 331 const unsigned short *fp; 332 unsigned short clen; 333 unsigned char *rtp; 334 const unsigned char *rfp; 335 336 if (type == PMAD_LANCE) { 337 memcpy(to, from, len); 338 } else if (type == PMAX_LANCE) { 339 clen = len >> 1; 340 tp = to; 341 fp = from; 342 343 while (clen--) { 344 *tp++ = *fp++; 345 tp++; 346 } 347 348 clen = len & 1; 349 rtp = (unsigned char *)tp; 350 rfp = (const unsigned char *)fp; 351 while (clen--) { 352 *rtp++ = *rfp++; 353 } 354 } else { 355 /* 356 * copy 16 Byte chunks 357 */ 358 clen = len >> 4; 359 tp = to; 360 fp = from; 361 while (clen--) { 362 *tp++ = *fp++; 363 *tp++ = *fp++; 364 *tp++ = *fp++; 365 *tp++ = *fp++; 366 *tp++ = *fp++; 367 *tp++ = *fp++; 368 *tp++ = *fp++; 369 *tp++ = *fp++; 370 tp += 8; 371 } 372 373 /* 374 * do the rest, if any. 375 */ 376 clen = len & 15; 377 rtp = (unsigned char *)tp; 378 rfp = (const unsigned char *)fp; 379 while (clen--) { 380 *rtp++ = *rfp++; 381 } 382 } 383 384 iob(); 385 } 386 387 static void cp_from_buf(const int type, void *to, const void *from, int len) 388 { 389 unsigned short *tp; 390 const unsigned short *fp; 391 unsigned short clen; 392 unsigned char *rtp; 393 const unsigned char *rfp; 394 395 if (type == PMAD_LANCE) { 396 memcpy(to, from, len); 397 } else if (type == PMAX_LANCE) { 398 clen = len >> 1; 399 tp = to; 400 fp = from; 401 while (clen--) { 402 *tp++ = *fp++; 403 fp++; 404 } 405 406 clen = len & 1; 407 408 rtp = (unsigned char *)tp; 409 rfp = (const unsigned char *)fp; 410 411 while (clen--) { 412 *rtp++ = *rfp++; 413 } 414 } else { 415 416 /* 417 * copy 16 Byte chunks 418 */ 419 clen = len >> 4; 420 tp = to; 421 fp = from; 422 while (clen--) { 423 *tp++ = *fp++; 424 *tp++ = *fp++; 425 *tp++ = *fp++; 426 *tp++ = *fp++; 427 *tp++ = *fp++; 428 *tp++ = *fp++; 429 *tp++ = *fp++; 430 *tp++ = *fp++; 431 fp += 8; 432 } 433 434 /* 435 * do the rest, if any. 436 */ 437 clen = len & 15; 438 rtp = (unsigned char *)tp; 439 rfp = (const unsigned char *)fp; 440 while (clen--) { 441 *rtp++ = *rfp++; 442 } 443 444 445 } 446 447 } 448 449 /* Setup the Lance Rx and Tx rings */ 450 static void lance_init_ring(struct net_device *dev) 451 { 452 struct lance_private *lp = netdev_priv(dev); 453 volatile u16 *ib = (volatile u16 *)dev->mem_start; 454 uint leptr; 455 int i; 456 457 /* Lock out other processes while setting up hardware */ 458 netif_stop_queue(dev); 459 lp->rx_new = lp->tx_new = 0; 460 lp->rx_old = lp->tx_old = 0; 461 462 /* Copy the ethernet address to the lance init block. 463 * XXX bit 0 of the physical address registers has to be zero 464 */ 465 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | 466 dev->dev_addr[0]; 467 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | 468 dev->dev_addr[2]; 469 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | 470 dev->dev_addr[4]; 471 /* Setup the initialization block */ 472 473 /* Setup rx descriptor pointer */ 474 leptr = offsetof(struct lance_init_block, brx_ring); 475 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | 476 (leptr >> 16); 477 *lib_ptr(ib, rx_ptr, lp->type) = leptr; 478 if (ZERO) 479 printk("RX ptr: %8.8x(%8.8x)\n", 480 leptr, (uint)lib_off(brx_ring, lp->type)); 481 482 /* Setup tx descriptor pointer */ 483 leptr = offsetof(struct lance_init_block, btx_ring); 484 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | 485 (leptr >> 16); 486 *lib_ptr(ib, tx_ptr, lp->type) = leptr; 487 if (ZERO) 488 printk("TX ptr: %8.8x(%8.8x)\n", 489 leptr, (uint)lib_off(btx_ring, lp->type)); 490 491 if (ZERO) 492 printk("TX rings:\n"); 493 494 /* Setup the Tx ring entries */ 495 for (i = 0; i < TX_RING_SIZE; i++) { 496 leptr = lp->tx_buf_ptr_lnc[i]; 497 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; 498 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 499 0xff; 500 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; 501 /* The ones required by tmd2 */ 502 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; 503 if (i < 3 && ZERO) 504 printk("%d: %8.8x(%p)\n", 505 i, leptr, lp->tx_buf_ptr_cpu[i]); 506 } 507 508 /* Setup the Rx ring entries */ 509 if (ZERO) 510 printk("RX rings:\n"); 511 for (i = 0; i < RX_RING_SIZE; i++) { 512 leptr = lp->rx_buf_ptr_lnc[i]; 513 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; 514 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & 515 0xff) | 516 LE_R1_OWN; 517 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | 518 0xf000; 519 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; 520 if (i < 3 && ZERO) 521 printk("%d: %8.8x(%p)\n", 522 i, leptr, lp->rx_buf_ptr_cpu[i]); 523 } 524 iob(); 525 } 526 527 static int init_restart_lance(struct lance_private *lp) 528 { 529 volatile struct lance_regs *ll = lp->ll; 530 int i; 531 532 writereg(&ll->rap, LE_CSR0); 533 writereg(&ll->rdp, LE_C0_INIT); 534 535 /* Wait for the lance to complete initialization */ 536 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { 537 udelay(10); 538 } 539 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { 540 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 541 i, ll->rdp); 542 return -1; 543 } 544 if ((ll->rdp & LE_C0_ERR)) { 545 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 546 i, ll->rdp); 547 return -1; 548 } 549 writereg(&ll->rdp, LE_C0_IDON); 550 writereg(&ll->rdp, LE_C0_STRT); 551 writereg(&ll->rdp, LE_C0_INEA); 552 553 return 0; 554 } 555 556 static int lance_rx(struct net_device *dev) 557 { 558 struct lance_private *lp = netdev_priv(dev); 559 volatile u16 *ib = (volatile u16 *)dev->mem_start; 560 volatile u16 *rd; 561 unsigned short bits; 562 int entry, len; 563 struct sk_buff *skb; 564 565 #ifdef TEST_HITS 566 { 567 int i; 568 569 printk("["); 570 for (i = 0; i < RX_RING_SIZE; i++) { 571 if (i == lp->rx_new) 572 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 573 lp->type) & 574 LE_R1_OWN ? "_" : "X"); 575 else 576 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 577 lp->type) & 578 LE_R1_OWN ? "." : "1"); 579 } 580 printk("]"); 581 } 582 #endif 583 584 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); 585 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); 586 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { 587 entry = lp->rx_new; 588 589 /* We got an incomplete frame? */ 590 if ((bits & LE_R1_POK) != LE_R1_POK) { 591 dev->stats.rx_over_errors++; 592 dev->stats.rx_errors++; 593 } else if (bits & LE_R1_ERR) { 594 /* Count only the end frame as a rx error, 595 * not the beginning 596 */ 597 if (bits & LE_R1_BUF) 598 dev->stats.rx_fifo_errors++; 599 if (bits & LE_R1_CRC) 600 dev->stats.rx_crc_errors++; 601 if (bits & LE_R1_OFL) 602 dev->stats.rx_over_errors++; 603 if (bits & LE_R1_FRA) 604 dev->stats.rx_frame_errors++; 605 if (bits & LE_R1_EOP) 606 dev->stats.rx_errors++; 607 } else { 608 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; 609 skb = netdev_alloc_skb(dev, len + 2); 610 611 if (skb == 0) { 612 dev->stats.rx_dropped++; 613 *rds_ptr(rd, mblength, lp->type) = 0; 614 *rds_ptr(rd, rmd1, lp->type) = 615 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 616 0xff) | LE_R1_OWN; 617 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 618 return 0; 619 } 620 dev->stats.rx_bytes += len; 621 622 skb_reserve(skb, 2); /* 16 byte align */ 623 skb_put(skb, len); /* make room */ 624 625 cp_from_buf(lp->type, skb->data, 626 lp->rx_buf_ptr_cpu[entry], len); 627 628 skb->protocol = eth_type_trans(skb, dev); 629 netif_rx(skb); 630 dev->stats.rx_packets++; 631 } 632 633 /* Return the packet to the pool */ 634 *rds_ptr(rd, mblength, lp->type) = 0; 635 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; 636 *rds_ptr(rd, rmd1, lp->type) = 637 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; 638 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 639 } 640 return 0; 641 } 642 643 static void lance_tx(struct net_device *dev) 644 { 645 struct lance_private *lp = netdev_priv(dev); 646 volatile u16 *ib = (volatile u16 *)dev->mem_start; 647 volatile struct lance_regs *ll = lp->ll; 648 volatile u16 *td; 649 int i, j; 650 int status; 651 652 j = lp->tx_old; 653 654 spin_lock(&lp->lock); 655 656 for (i = j; i != lp->tx_new; i = j) { 657 td = lib_ptr(ib, btx_ring[i], lp->type); 658 /* If we hit a packet not owned by us, stop */ 659 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) 660 break; 661 662 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { 663 status = *tds_ptr(td, misc, lp->type); 664 665 dev->stats.tx_errors++; 666 if (status & LE_T3_RTY) 667 dev->stats.tx_aborted_errors++; 668 if (status & LE_T3_LCOL) 669 dev->stats.tx_window_errors++; 670 671 if (status & LE_T3_CLOS) { 672 dev->stats.tx_carrier_errors++; 673 printk("%s: Carrier Lost\n", dev->name); 674 /* Stop the lance */ 675 writereg(&ll->rap, LE_CSR0); 676 writereg(&ll->rdp, LE_C0_STOP); 677 lance_init_ring(dev); 678 load_csrs(lp); 679 init_restart_lance(lp); 680 goto out; 681 } 682 /* Buffer errors and underflows turn off the 683 * transmitter, restart the adapter. 684 */ 685 if (status & (LE_T3_BUF | LE_T3_UFL)) { 686 dev->stats.tx_fifo_errors++; 687 688 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 689 dev->name); 690 /* Stop the lance */ 691 writereg(&ll->rap, LE_CSR0); 692 writereg(&ll->rdp, LE_C0_STOP); 693 lance_init_ring(dev); 694 load_csrs(lp); 695 init_restart_lance(lp); 696 goto out; 697 } 698 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == 699 LE_T1_POK) { 700 /* 701 * So we don't count the packet more than once. 702 */ 703 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); 704 705 /* One collision before packet was sent. */ 706 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) 707 dev->stats.collisions++; 708 709 /* More than one collision, be optimistic. */ 710 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) 711 dev->stats.collisions += 2; 712 713 dev->stats.tx_packets++; 714 } 715 j = (j + 1) & TX_RING_MOD_MASK; 716 } 717 lp->tx_old = j; 718 out: 719 if (netif_queue_stopped(dev) && 720 TX_BUFFS_AVAIL > 0) 721 netif_wake_queue(dev); 722 723 spin_unlock(&lp->lock); 724 } 725 726 static irqreturn_t lance_dma_merr_int(int irq, void *dev_id) 727 { 728 struct net_device *dev = dev_id; 729 730 printk(KERN_ERR "%s: DMA error\n", dev->name); 731 return IRQ_HANDLED; 732 } 733 734 static irqreturn_t lance_interrupt(int irq, void *dev_id) 735 { 736 struct net_device *dev = dev_id; 737 struct lance_private *lp = netdev_priv(dev); 738 volatile struct lance_regs *ll = lp->ll; 739 int csr0; 740 741 writereg(&ll->rap, LE_CSR0); 742 csr0 = ll->rdp; 743 744 /* Acknowledge all the interrupt sources ASAP */ 745 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); 746 747 if ((csr0 & LE_C0_ERR)) { 748 /* Clear the error condition */ 749 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 750 LE_C0_CERR | LE_C0_MERR); 751 } 752 if (csr0 & LE_C0_RINT) 753 lance_rx(dev); 754 755 if (csr0 & LE_C0_TINT) 756 lance_tx(dev); 757 758 if (csr0 & LE_C0_BABL) 759 dev->stats.tx_errors++; 760 761 if (csr0 & LE_C0_MISS) 762 dev->stats.rx_errors++; 763 764 if (csr0 & LE_C0_MERR) { 765 printk("%s: Memory error, status %04x\n", dev->name, csr0); 766 767 writereg(&ll->rdp, LE_C0_STOP); 768 769 lance_init_ring(dev); 770 load_csrs(lp); 771 init_restart_lance(lp); 772 netif_wake_queue(dev); 773 } 774 775 writereg(&ll->rdp, LE_C0_INEA); 776 writereg(&ll->rdp, LE_C0_INEA); 777 return IRQ_HANDLED; 778 } 779 780 static int lance_open(struct net_device *dev) 781 { 782 volatile u16 *ib = (volatile u16 *)dev->mem_start; 783 struct lance_private *lp = netdev_priv(dev); 784 volatile struct lance_regs *ll = lp->ll; 785 int status = 0; 786 787 /* Stop the Lance */ 788 writereg(&ll->rap, LE_CSR0); 789 writereg(&ll->rdp, LE_C0_STOP); 790 791 /* Set mode and clear multicast filter only at device open, 792 * so that lance_init_ring() called at any error will not 793 * forget multicast filters. 794 * 795 * BTW it is common bug in all lance drivers! --ANK 796 */ 797 *lib_ptr(ib, mode, lp->type) = 0; 798 *lib_ptr(ib, filter[0], lp->type) = 0; 799 *lib_ptr(ib, filter[1], lp->type) = 0; 800 *lib_ptr(ib, filter[2], lp->type) = 0; 801 *lib_ptr(ib, filter[3], lp->type) = 0; 802 803 lance_init_ring(dev); 804 load_csrs(lp); 805 806 netif_start_queue(dev); 807 808 /* Associate IRQ with lance_interrupt */ 809 if (request_irq(dev->irq, lance_interrupt, 0, "lance", dev)) { 810 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); 811 return -EAGAIN; 812 } 813 if (lp->dma_irq >= 0) { 814 unsigned long flags; 815 816 if (request_irq(lp->dma_irq, lance_dma_merr_int, IRQF_ONESHOT, 817 "lance error", dev)) { 818 free_irq(dev->irq, dev); 819 printk("%s: Can't get DMA IRQ %d\n", dev->name, 820 lp->dma_irq); 821 return -EAGAIN; 822 } 823 824 spin_lock_irqsave(&ioasic_ssr_lock, flags); 825 826 fast_mb(); 827 /* Enable I/O ASIC LANCE DMA. */ 828 ioasic_write(IO_REG_SSR, 829 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); 830 831 fast_mb(); 832 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 833 } 834 835 status = init_restart_lance(lp); 836 return status; 837 } 838 839 static int lance_close(struct net_device *dev) 840 { 841 struct lance_private *lp = netdev_priv(dev); 842 volatile struct lance_regs *ll = lp->ll; 843 844 netif_stop_queue(dev); 845 del_timer_sync(&lp->multicast_timer); 846 847 /* Stop the card */ 848 writereg(&ll->rap, LE_CSR0); 849 writereg(&ll->rdp, LE_C0_STOP); 850 851 if (lp->dma_irq >= 0) { 852 unsigned long flags; 853 854 spin_lock_irqsave(&ioasic_ssr_lock, flags); 855 856 fast_mb(); 857 /* Disable I/O ASIC LANCE DMA. */ 858 ioasic_write(IO_REG_SSR, 859 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); 860 861 fast_iob(); 862 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 863 864 free_irq(lp->dma_irq, dev); 865 } 866 free_irq(dev->irq, dev); 867 return 0; 868 } 869 870 static inline int lance_reset(struct net_device *dev) 871 { 872 struct lance_private *lp = netdev_priv(dev); 873 volatile struct lance_regs *ll = lp->ll; 874 int status; 875 876 /* Stop the lance */ 877 writereg(&ll->rap, LE_CSR0); 878 writereg(&ll->rdp, LE_C0_STOP); 879 880 lance_init_ring(dev); 881 load_csrs(lp); 882 netif_trans_update(dev); /* prevent tx timeout */ 883 status = init_restart_lance(lp); 884 return status; 885 } 886 887 static void lance_tx_timeout(struct net_device *dev) 888 { 889 struct lance_private *lp = netdev_priv(dev); 890 volatile struct lance_regs *ll = lp->ll; 891 892 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 893 dev->name, ll->rdp); 894 lance_reset(dev); 895 netif_wake_queue(dev); 896 } 897 898 static netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 899 { 900 struct lance_private *lp = netdev_priv(dev); 901 volatile struct lance_regs *ll = lp->ll; 902 volatile u16 *ib = (volatile u16 *)dev->mem_start; 903 unsigned long flags; 904 int entry, len; 905 906 len = skb->len; 907 908 if (len < ETH_ZLEN) { 909 if (skb_padto(skb, ETH_ZLEN)) 910 return NETDEV_TX_OK; 911 len = ETH_ZLEN; 912 } 913 914 dev->stats.tx_bytes += len; 915 916 spin_lock_irqsave(&lp->lock, flags); 917 918 entry = lp->tx_new; 919 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); 920 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; 921 922 cp_to_buf(lp->type, lp->tx_buf_ptr_cpu[entry], skb->data, len); 923 924 /* Now, give the packet to the lance */ 925 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = 926 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | 927 (LE_T1_POK | LE_T1_OWN); 928 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; 929 930 if (TX_BUFFS_AVAIL <= 0) 931 netif_stop_queue(dev); 932 933 /* Kick the lance: transmit now */ 934 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); 935 936 spin_unlock_irqrestore(&lp->lock, flags); 937 938 dev_kfree_skb(skb); 939 940 return NETDEV_TX_OK; 941 } 942 943 static void lance_load_multicast(struct net_device *dev) 944 { 945 struct lance_private *lp = netdev_priv(dev); 946 volatile u16 *ib = (volatile u16 *)dev->mem_start; 947 struct netdev_hw_addr *ha; 948 u32 crc; 949 950 /* set all multicast bits */ 951 if (dev->flags & IFF_ALLMULTI) { 952 *lib_ptr(ib, filter[0], lp->type) = 0xffff; 953 *lib_ptr(ib, filter[1], lp->type) = 0xffff; 954 *lib_ptr(ib, filter[2], lp->type) = 0xffff; 955 *lib_ptr(ib, filter[3], lp->type) = 0xffff; 956 return; 957 } 958 /* clear the multicast filter */ 959 *lib_ptr(ib, filter[0], lp->type) = 0; 960 *lib_ptr(ib, filter[1], lp->type) = 0; 961 *lib_ptr(ib, filter[2], lp->type) = 0; 962 *lib_ptr(ib, filter[3], lp->type) = 0; 963 964 /* Add addresses */ 965 netdev_for_each_mc_addr(ha, dev) { 966 crc = ether_crc_le(ETH_ALEN, ha->addr); 967 crc = crc >> 26; 968 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); 969 } 970 } 971 972 static void lance_set_multicast(struct net_device *dev) 973 { 974 struct lance_private *lp = netdev_priv(dev); 975 volatile u16 *ib = (volatile u16 *)dev->mem_start; 976 volatile struct lance_regs *ll = lp->ll; 977 978 if (!netif_running(dev)) 979 return; 980 981 if (lp->tx_old != lp->tx_new) { 982 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); 983 netif_wake_queue(dev); 984 return; 985 } 986 987 netif_stop_queue(dev); 988 989 writereg(&ll->rap, LE_CSR0); 990 writereg(&ll->rdp, LE_C0_STOP); 991 992 lance_init_ring(dev); 993 994 if (dev->flags & IFF_PROMISC) { 995 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; 996 } else { 997 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; 998 lance_load_multicast(dev); 999 } 1000 load_csrs(lp); 1001 init_restart_lance(lp); 1002 netif_wake_queue(dev); 1003 } 1004 1005 static void lance_set_multicast_retry(struct timer_list *t) 1006 { 1007 struct lance_private *lp = from_timer(lp, t, multicast_timer); 1008 struct net_device *dev = lp->dev; 1009 1010 lance_set_multicast(dev); 1011 } 1012 1013 static const struct net_device_ops lance_netdev_ops = { 1014 .ndo_open = lance_open, 1015 .ndo_stop = lance_close, 1016 .ndo_start_xmit = lance_start_xmit, 1017 .ndo_tx_timeout = lance_tx_timeout, 1018 .ndo_set_rx_mode = lance_set_multicast, 1019 .ndo_validate_addr = eth_validate_addr, 1020 .ndo_set_mac_address = eth_mac_addr, 1021 }; 1022 1023 static int dec_lance_probe(struct device *bdev, const int type) 1024 { 1025 static unsigned version_printed; 1026 static const char fmt[] = "declance%d"; 1027 char name[10]; 1028 struct net_device *dev; 1029 struct lance_private *lp; 1030 volatile struct lance_regs *ll; 1031 resource_size_t start = 0, len = 0; 1032 int i, ret; 1033 unsigned long esar_base; 1034 unsigned char *esar; 1035 const char *desc; 1036 1037 if (dec_lance_debug && version_printed++ == 0) 1038 printk(version); 1039 1040 if (bdev) 1041 snprintf(name, sizeof(name), "%s", dev_name(bdev)); 1042 else { 1043 i = 0; 1044 dev = root_lance_dev; 1045 while (dev) { 1046 i++; 1047 lp = netdev_priv(dev); 1048 dev = lp->next; 1049 } 1050 snprintf(name, sizeof(name), fmt, i); 1051 } 1052 1053 dev = alloc_etherdev(sizeof(struct lance_private)); 1054 if (!dev) { 1055 ret = -ENOMEM; 1056 goto err_out; 1057 } 1058 1059 /* 1060 * alloc_etherdev ensures the data structures used by the LANCE 1061 * are aligned. 1062 */ 1063 lp = netdev_priv(dev); 1064 spin_lock_init(&lp->lock); 1065 1066 lp->type = type; 1067 switch (type) { 1068 case ASIC_LANCE: 1069 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); 1070 1071 /* buffer space for the on-board LANCE shared memory */ 1072 /* 1073 * FIXME: ugly hack! 1074 */ 1075 dev->mem_start = CKSEG1ADDR(0x00020000); 1076 dev->mem_end = dev->mem_start + 0x00020000; 1077 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1078 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); 1079 1080 /* Workaround crash with booting KN04 2.1k from Disk */ 1081 memset((void *)dev->mem_start, 0, 1082 dev->mem_end - dev->mem_start); 1083 1084 /* 1085 * setup the pointer arrays, this sucks [tm] :-( 1086 */ 1087 for (i = 0; i < RX_RING_SIZE; i++) { 1088 lp->rx_buf_ptr_cpu[i] = 1089 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1090 2 * i * RX_BUFF_SIZE); 1091 lp->rx_buf_ptr_lnc[i] = 1092 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1093 } 1094 for (i = 0; i < TX_RING_SIZE; i++) { 1095 lp->tx_buf_ptr_cpu[i] = 1096 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1097 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1098 2 * i * TX_BUFF_SIZE); 1099 lp->tx_buf_ptr_lnc[i] = 1100 (BUF_OFFSET_LNC + 1101 RX_RING_SIZE * RX_BUFF_SIZE + 1102 i * TX_BUFF_SIZE); 1103 } 1104 1105 /* Setup I/O ASIC LANCE DMA. */ 1106 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; 1107 ioasic_write(IO_REG_LANCE_DMA_P, 1108 CPHYSADDR(dev->mem_start) << 3); 1109 1110 break; 1111 #ifdef CONFIG_TC 1112 case PMAD_LANCE: 1113 dev_set_drvdata(bdev, dev); 1114 1115 start = to_tc_dev(bdev)->resource.start; 1116 len = to_tc_dev(bdev)->resource.end - start + 1; 1117 if (!request_mem_region(start, len, dev_name(bdev))) { 1118 printk(KERN_ERR 1119 "%s: Unable to reserve MMIO resource\n", 1120 dev_name(bdev)); 1121 ret = -EBUSY; 1122 goto err_out_dev; 1123 } 1124 1125 dev->mem_start = CKSEG1ADDR(start); 1126 dev->mem_end = dev->mem_start + 0x100000; 1127 dev->base_addr = dev->mem_start + 0x100000; 1128 dev->irq = to_tc_dev(bdev)->interrupt; 1129 esar_base = dev->mem_start + 0x1c0002; 1130 lp->dma_irq = -1; 1131 1132 for (i = 0; i < RX_RING_SIZE; i++) { 1133 lp->rx_buf_ptr_cpu[i] = 1134 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1135 i * RX_BUFF_SIZE); 1136 lp->rx_buf_ptr_lnc[i] = 1137 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1138 } 1139 for (i = 0; i < TX_RING_SIZE; i++) { 1140 lp->tx_buf_ptr_cpu[i] = 1141 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1142 RX_RING_SIZE * RX_BUFF_SIZE + 1143 i * TX_BUFF_SIZE); 1144 lp->tx_buf_ptr_lnc[i] = 1145 (BUF_OFFSET_LNC + 1146 RX_RING_SIZE * RX_BUFF_SIZE + 1147 i * TX_BUFF_SIZE); 1148 } 1149 1150 break; 1151 #endif 1152 case PMAX_LANCE: 1153 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1154 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); 1155 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); 1156 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; 1157 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); 1158 lp->dma_irq = -1; 1159 1160 /* 1161 * setup the pointer arrays, this sucks [tm] :-( 1162 */ 1163 for (i = 0; i < RX_RING_SIZE; i++) { 1164 lp->rx_buf_ptr_cpu[i] = 1165 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1166 2 * i * RX_BUFF_SIZE); 1167 lp->rx_buf_ptr_lnc[i] = 1168 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1169 } 1170 for (i = 0; i < TX_RING_SIZE; i++) { 1171 lp->tx_buf_ptr_cpu[i] = 1172 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1173 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1174 2 * i * TX_BUFF_SIZE); 1175 lp->tx_buf_ptr_lnc[i] = 1176 (BUF_OFFSET_LNC + 1177 RX_RING_SIZE * RX_BUFF_SIZE + 1178 i * TX_BUFF_SIZE); 1179 } 1180 1181 break; 1182 1183 default: 1184 printk(KERN_ERR "%s: declance_init called with unknown type\n", 1185 name); 1186 ret = -ENODEV; 1187 goto err_out_dev; 1188 } 1189 1190 ll = (struct lance_regs *) dev->base_addr; 1191 esar = (unsigned char *) esar_base; 1192 1193 /* prom checks */ 1194 /* First, check for test pattern */ 1195 if (esar[0x60] != 0xff && esar[0x64] != 0x00 && 1196 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { 1197 printk(KERN_ERR 1198 "%s: Ethernet station address prom not found!\n", 1199 name); 1200 ret = -ENODEV; 1201 goto err_out_resource; 1202 } 1203 /* Check the prom contents */ 1204 for (i = 0; i < 8; i++) { 1205 if (esar[i * 4] != esar[0x3c - i * 4] && 1206 esar[i * 4] != esar[0x40 + i * 4] && 1207 esar[0x3c - i * 4] != esar[0x40 + i * 4]) { 1208 printk(KERN_ERR "%s: Something is wrong with the " 1209 "ethernet station address prom!\n", name); 1210 ret = -ENODEV; 1211 goto err_out_resource; 1212 } 1213 } 1214 1215 /* Copy the ethernet address to the device structure, later to the 1216 * lance initialization block so the lance gets it every time it's 1217 * (re)initialized. 1218 */ 1219 switch (type) { 1220 case ASIC_LANCE: 1221 desc = "IOASIC onboard LANCE"; 1222 break; 1223 case PMAD_LANCE: 1224 desc = "PMAD-AA"; 1225 break; 1226 case PMAX_LANCE: 1227 desc = "PMAX onboard LANCE"; 1228 break; 1229 } 1230 for (i = 0; i < 6; i++) 1231 dev->dev_addr[i] = esar[i * 4]; 1232 1233 printk("%s: %s, addr = %pM, irq = %d\n", 1234 name, desc, dev->dev_addr, dev->irq); 1235 1236 dev->netdev_ops = &lance_netdev_ops; 1237 dev->watchdog_timeo = 5*HZ; 1238 1239 /* lp->ll is the location of the registers for lance card */ 1240 lp->ll = ll; 1241 1242 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA 1243 * specification. 1244 */ 1245 lp->busmaster_regval = 0; 1246 1247 dev->dma = 0; 1248 1249 /* We cannot sleep if the chip is busy during a 1250 * multicast list update event, because such events 1251 * can occur from interrupts (ex. IPv6). So we 1252 * use a timer to try again later when necessary. -DaveM 1253 */ 1254 lp->dev = dev; 1255 timer_setup(&lp->multicast_timer, lance_set_multicast_retry, 0); 1256 1257 1258 ret = register_netdev(dev); 1259 if (ret) { 1260 printk(KERN_ERR 1261 "%s: Unable to register netdev, aborting.\n", name); 1262 goto err_out_resource; 1263 } 1264 1265 if (!bdev) { 1266 lp->next = root_lance_dev; 1267 root_lance_dev = dev; 1268 } 1269 1270 printk("%s: registered as %s.\n", name, dev->name); 1271 return 0; 1272 1273 err_out_resource: 1274 if (bdev) 1275 release_mem_region(start, len); 1276 1277 err_out_dev: 1278 free_netdev(dev); 1279 1280 err_out: 1281 return ret; 1282 } 1283 1284 /* Find all the lance cards on the system and initialize them */ 1285 static int __init dec_lance_platform_probe(void) 1286 { 1287 int count = 0; 1288 1289 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { 1290 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { 1291 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0) 1292 count++; 1293 } else if (!TURBOCHANNEL) { 1294 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0) 1295 count++; 1296 } 1297 } 1298 1299 return (count > 0) ? 0 : -ENODEV; 1300 } 1301 1302 static void __exit dec_lance_platform_remove(void) 1303 { 1304 while (root_lance_dev) { 1305 struct net_device *dev = root_lance_dev; 1306 struct lance_private *lp = netdev_priv(dev); 1307 1308 unregister_netdev(dev); 1309 root_lance_dev = lp->next; 1310 free_netdev(dev); 1311 } 1312 } 1313 1314 #ifdef CONFIG_TC 1315 static int dec_lance_tc_probe(struct device *dev); 1316 static int dec_lance_tc_remove(struct device *dev); 1317 1318 static const struct tc_device_id dec_lance_tc_table[] = { 1319 { "DEC ", "PMAD-AA " }, 1320 { } 1321 }; 1322 MODULE_DEVICE_TABLE(tc, dec_lance_tc_table); 1323 1324 static struct tc_driver dec_lance_tc_driver = { 1325 .id_table = dec_lance_tc_table, 1326 .driver = { 1327 .name = "declance", 1328 .bus = &tc_bus_type, 1329 .probe = dec_lance_tc_probe, 1330 .remove = dec_lance_tc_remove, 1331 }, 1332 }; 1333 1334 static int dec_lance_tc_probe(struct device *dev) 1335 { 1336 int status = dec_lance_probe(dev, PMAD_LANCE); 1337 if (!status) 1338 get_device(dev); 1339 return status; 1340 } 1341 1342 static void dec_lance_remove(struct device *bdev) 1343 { 1344 struct net_device *dev = dev_get_drvdata(bdev); 1345 resource_size_t start, len; 1346 1347 unregister_netdev(dev); 1348 start = to_tc_dev(bdev)->resource.start; 1349 len = to_tc_dev(bdev)->resource.end - start + 1; 1350 release_mem_region(start, len); 1351 free_netdev(dev); 1352 } 1353 1354 static int dec_lance_tc_remove(struct device *dev) 1355 { 1356 put_device(dev); 1357 dec_lance_remove(dev); 1358 return 0; 1359 } 1360 #endif 1361 1362 static int __init dec_lance_init(void) 1363 { 1364 int status; 1365 1366 status = tc_register_driver(&dec_lance_tc_driver); 1367 if (!status) 1368 dec_lance_platform_probe(); 1369 return status; 1370 } 1371 1372 static void __exit dec_lance_exit(void) 1373 { 1374 dec_lance_platform_remove(); 1375 tc_unregister_driver(&dec_lance_tc_driver); 1376 } 1377 1378 1379 module_init(dec_lance_init); 1380 module_exit(dec_lance_exit); 1381