1 /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
2 /*
3 	Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
4 
5 	This software may be used and distributed according to the terms
6 	of the GNU General Public License, incorporated herein by reference.
7 
8 	This drivers was written with the following sources of reference:
9 	 - The driver for the Riebl Lance card by the TU Vienna.
10 	 - The modified TUW driver for PAM's VME cards
11 	 - The PC-Linux driver for Lance cards (but this is for bus master
12        cards, not the shared memory ones)
13 	 - The Amiga Ariadne driver
14 
15 	v1.0: (in 1.2.13pl4/0.9.13)
16 	      Initial version
17 	v1.1: (in 1.2.13pl5)
18 	      more comments
19 		  deleted some debugging stuff
20 		  optimized register access (keep AREG pointing to CSR0)
21 		  following AMD, CSR0_STRT should be set only after IDON is detected
22 		  use memcpy() for data transfers, that also employs long word moves
23 		  better probe procedure for 24-bit systems
24           non-VME-RieblCards need extra delays in memcpy
25 		  must also do write test, since 0xfxe00000 may hit ROM
26 		  use 8/32 tx/rx buffers, which should give better NFS performance;
27 		    this is made possible by shifting the last packet buffer after the
28 		    RieblCard reserved area
29     v1.2: (in 1.2.13pl8)
30 	      again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
31 		  and thus RAM, in case of no Lance found all memory contents have to
32 		  be restored!
33 		  Now possible to compile as module.
34 	v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
35 	      Several little 1.3 adaptions
36 		  When the lance is stopped it jumps back into little-endian
37 		  mode. It is therefore necessary to put it back where it
38 		  belongs, in big endian mode, in order to make things work.
39 		  This might be the reason why multicast-mode didn't work
40 		  before, but I'm not able to test it as I only got an Amiga
41 		  (we had similar problems with the A2065 driver).
42 
43 */
44 
45 static const char version[] = "atarilance.c: v1.3 04/04/96 "
46 			      "Roman.Hodek@informatik.uni-erlangen.de\n";
47 
48 #include <linux/netdevice.h>
49 #include <linux/etherdevice.h>
50 #include <linux/module.h>
51 #include <linux/stddef.h>
52 #include <linux/kernel.h>
53 #include <linux/string.h>
54 #include <linux/errno.h>
55 #include <linux/skbuff.h>
56 #include <linux/interrupt.h>
57 #include <linux/init.h>
58 #include <linux/bitops.h>
59 
60 #include <asm/setup.h>
61 #include <asm/irq.h>
62 #include <asm/atarihw.h>
63 #include <asm/atariints.h>
64 #include <asm/io.h>
65 
66 /* Debug level:
67  *  0 = silent, print only serious errors
68  *  1 = normal, print error messages
69  *  2 = debug, print debug infos
70  *  3 = debug, print even more debug infos (packet data)
71  */
72 
73 #define	LANCE_DEBUG	1
74 
75 #ifdef LANCE_DEBUG
76 static int lance_debug = LANCE_DEBUG;
77 #else
78 static int lance_debug = 1;
79 #endif
80 module_param(lance_debug, int, 0);
81 MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");
82 MODULE_LICENSE("GPL");
83 
84 /* Print debug messages on probing? */
85 #undef LANCE_DEBUG_PROBE
86 
87 #define	DPRINTK(n,a)							\
88 	do {										\
89 		if (lance_debug >= n)					\
90 			printk a;							\
91 	} while( 0 )
92 
93 #ifdef LANCE_DEBUG_PROBE
94 # define PROBE_PRINT(a)	printk a
95 #else
96 # define PROBE_PRINT(a)
97 #endif
98 
99 /* These define the number of Rx and Tx buffers as log2. (Only powers
100  * of two are valid)
101  * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
102  * is more time critical then sending and packets may have to remain in the
103  * board's memory when main memory is low.
104  */
105 
106 #define TX_LOG_RING_SIZE			3
107 #define RX_LOG_RING_SIZE			5
108 
109 /* These are the derived values */
110 
111 #define TX_RING_SIZE			(1 << TX_LOG_RING_SIZE)
112 #define TX_RING_LEN_BITS		(TX_LOG_RING_SIZE << 5)
113 #define	TX_RING_MOD_MASK		(TX_RING_SIZE - 1)
114 
115 #define RX_RING_SIZE			(1 << RX_LOG_RING_SIZE)
116 #define RX_RING_LEN_BITS		(RX_LOG_RING_SIZE << 5)
117 #define	RX_RING_MOD_MASK		(RX_RING_SIZE - 1)
118 
119 #define TX_TIMEOUT	(HZ/5)
120 
121 /* The LANCE Rx and Tx ring descriptors. */
122 struct lance_rx_head {
123 	unsigned short			base;		/* Low word of base addr */
124 	volatile unsigned char	flag;
125 	unsigned char			base_hi;	/* High word of base addr (unused) */
126 	short					buf_length;	/* This length is 2s complement! */
127 	volatile short			msg_length;	/* This length is "normal". */
128 };
129 
130 struct lance_tx_head {
131 	unsigned short			base;		/* Low word of base addr */
132 	volatile unsigned char	flag;
133 	unsigned char			base_hi;	/* High word of base addr (unused) */
134 	short					length;		/* Length is 2s complement! */
135 	volatile short			misc;
136 };
137 
138 struct ringdesc {
139 	unsigned short	adr_lo;		/* Low 16 bits of address */
140 	unsigned char	len;		/* Length bits */
141 	unsigned char	adr_hi;		/* High 8 bits of address (unused) */
142 };
143 
144 /* The LANCE initialization block, described in databook. */
145 struct lance_init_block {
146 	unsigned short	mode;		/* Pre-set mode */
147 	unsigned char	hwaddr[6];	/* Physical ethernet address */
148 	unsigned		filter[2];	/* Multicast filter (unused). */
149 	/* Receive and transmit ring base, along with length bits. */
150 	struct ringdesc	rx_ring;
151 	struct ringdesc	tx_ring;
152 };
153 
154 /* The whole layout of the Lance shared memory */
155 struct lance_memory {
156 	struct lance_init_block	init;
157 	struct lance_tx_head	tx_head[TX_RING_SIZE];
158 	struct lance_rx_head	rx_head[RX_RING_SIZE];
159 	char					packet_area[];	/* packet data follow after the
160 											 * init block and the ring
161 											 * descriptors and are located
162 											 * at runtime */
163 };
164 
165 /* RieblCard specifics:
166  * The original TOS driver for these cards reserves the area from offset
167  * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
168  * Ethernet address there, and the magic for verifying the data's validity.
169  * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
170  * is reserved for the interrupt vector number.
171  */
172 #define	RIEBL_RSVD_START	0xee70
173 #define	RIEBL_RSVD_END		0xeec0
174 #define RIEBL_MAGIC			0x09051990
175 #define RIEBL_MAGIC_ADDR	((unsigned long *)(((char *)MEM) + 0xee8a))
176 #define RIEBL_HWADDR_ADDR	((unsigned char *)(((char *)MEM) + 0xee8e))
177 #define RIEBL_IVEC_ADDR		((unsigned short *)(((char *)MEM) + 0xfffe))
178 
179 /* This is a default address for the old RieblCards without a battery
180  * that have no ethernet address at boot time. 00:00:36:04 is the
181  * prefix for Riebl cards, the 00:00 at the end is arbitrary.
182  */
183 
184 static unsigned char OldRieblDefHwaddr[6] = {
185 	0x00, 0x00, 0x36, 0x04, 0x00, 0x00
186 };
187 
188 
189 /* I/O registers of the Lance chip */
190 
191 struct lance_ioreg {
192 /* base+0x0 */	volatile unsigned short	data;
193 /* base+0x2 */	volatile unsigned short	addr;
194 				unsigned char			_dummy1[3];
195 /* base+0x7 */	volatile unsigned char	ivec;
196 				unsigned char			_dummy2[5];
197 /* base+0xd */	volatile unsigned char	eeprom;
198 				unsigned char			_dummy3;
199 /* base+0xf */	volatile unsigned char	mem;
200 };
201 
202 /* Types of boards this driver supports */
203 
204 enum lance_type {
205 	OLD_RIEBL,		/* old Riebl card without battery */
206 	NEW_RIEBL,		/* new Riebl card with battery */
207 	PAM_CARD		/* PAM card with EEPROM */
208 };
209 
210 static char *lance_names[] = {
211 	"Riebl-Card (without battery)",
212 	"Riebl-Card (with battery)",
213 	"PAM intern card"
214 };
215 
216 /* The driver's private device structure */
217 
218 struct lance_private {
219 	enum lance_type		cardtype;
220 	struct lance_ioreg	*iobase;
221 	struct lance_memory	*mem;
222 	int		 	cur_rx, cur_tx;	/* The next free ring entry */
223 	int			dirty_tx;		/* Ring entries to be freed. */
224 				/* copy function */
225 	void			*(*memcpy_f)( void *, const void *, size_t );
226 /* This must be long for set_bit() */
227 	long			tx_full;
228 	spinlock_t		devlock;
229 };
230 
231 /* I/O register access macros */
232 
233 #define	MEM		lp->mem
234 #define	DREG	IO->data
235 #define	AREG	IO->addr
236 #define	REGA(a)	(*( AREG = (a), &DREG ))
237 
238 /* Definitions for packet buffer access: */
239 #define PKT_BUF_SZ		1544
240 /* Get the address of a packet buffer corresponding to a given buffer head */
241 #define	PKTBUF_ADDR(head)	(((unsigned char *)(MEM)) + (head)->base)
242 
243 /* Possible memory/IO addresses for probing */
244 
245 static struct lance_addr {
246 	unsigned long	memaddr;
247 	unsigned long	ioaddr;
248 	int				slow_flag;
249 } lance_addr_list[] = {
250 	{ 0xfe010000, 0xfe00fff0, 0 },	/* RieblCard VME in TT */
251 	{ 0xffc10000, 0xffc0fff0, 0 },	/* RieblCard VME in MegaSTE
252 									   (highest byte stripped) */
253 	{ 0xffe00000, 0xffff7000, 1 },	/* RieblCard in ST
254 									   (highest byte stripped) */
255 	{ 0xffd00000, 0xffff7000, 1 },	/* RieblCard in ST with hw modif. to
256 									   avoid conflict with ROM
257 									   (highest byte stripped) */
258 	{ 0xffcf0000, 0xffcffff0, 0 },	/* PAMCard VME in TT and MSTE
259 									   (highest byte stripped) */
260 	{ 0xfecf0000, 0xfecffff0, 0 },	/* Rhotron's PAMCard VME in TT and MSTE
261 									   (highest byte stripped) */
262 };
263 
264 #define	N_LANCE_ADDR	ARRAY_SIZE(lance_addr_list)
265 
266 
267 /* Definitions for the Lance */
268 
269 /* tx_head flags */
270 #define TMD1_ENP		0x01	/* end of packet */
271 #define TMD1_STP		0x02	/* start of packet */
272 #define TMD1_DEF		0x04	/* deferred */
273 #define TMD1_ONE		0x08	/* one retry needed */
274 #define TMD1_MORE		0x10	/* more than one retry needed */
275 #define TMD1_ERR		0x40	/* error summary */
276 #define TMD1_OWN 		0x80	/* ownership (set: chip owns) */
277 
278 #define TMD1_OWN_CHIP	TMD1_OWN
279 #define TMD1_OWN_HOST	0
280 
281 /* tx_head misc field */
282 #define TMD3_TDR		0x03FF	/* Time Domain Reflectometry counter */
283 #define TMD3_RTRY		0x0400	/* failed after 16 retries */
284 #define TMD3_LCAR		0x0800	/* carrier lost */
285 #define TMD3_LCOL		0x1000	/* late collision */
286 #define TMD3_UFLO		0x4000	/* underflow (late memory) */
287 #define TMD3_BUFF		0x8000	/* buffering error (no ENP) */
288 
289 /* rx_head flags */
290 #define RMD1_ENP		0x01	/* end of packet */
291 #define RMD1_STP		0x02	/* start of packet */
292 #define RMD1_BUFF		0x04	/* buffer error */
293 #define RMD1_CRC		0x08	/* CRC error */
294 #define RMD1_OFLO		0x10	/* overflow */
295 #define RMD1_FRAM		0x20	/* framing error */
296 #define RMD1_ERR		0x40	/* error summary */
297 #define RMD1_OWN 		0x80	/* ownership (set: ship owns) */
298 
299 #define RMD1_OWN_CHIP	RMD1_OWN
300 #define RMD1_OWN_HOST	0
301 
302 /* register names */
303 #define CSR0	0		/* mode/status */
304 #define CSR1	1		/* init block addr (low) */
305 #define CSR2	2		/* init block addr (high) */
306 #define CSR3	3		/* misc */
307 #define CSR8	8	  	/* address filter */
308 #define CSR15	15		/* promiscuous mode */
309 
310 /* CSR0 */
311 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
312 #define CSR0_INIT	0x0001		/* initialize (RS) */
313 #define CSR0_STRT	0x0002		/* start (RS) */
314 #define CSR0_STOP	0x0004		/* stop (RS) */
315 #define CSR0_TDMD	0x0008		/* transmit demand (RS) */
316 #define CSR0_TXON	0x0010		/* transmitter on (R) */
317 #define CSR0_RXON	0x0020		/* receiver on (R) */
318 #define CSR0_INEA	0x0040		/* interrupt enable (RW) */
319 #define CSR0_INTR	0x0080		/* interrupt active (R) */
320 #define CSR0_IDON	0x0100		/* initialization done (RC) */
321 #define CSR0_TINT	0x0200		/* transmitter interrupt (RC) */
322 #define CSR0_RINT	0x0400		/* receiver interrupt (RC) */
323 #define CSR0_MERR	0x0800		/* memory error (RC) */
324 #define CSR0_MISS	0x1000		/* missed frame (RC) */
325 #define CSR0_CERR	0x2000		/* carrier error (no heartbeat :-) (RC) */
326 #define CSR0_BABL	0x4000		/* babble: tx-ed too many bits (RC) */
327 #define CSR0_ERR	0x8000		/* error (RC) */
328 
329 /* CSR3 */
330 #define CSR3_BCON	0x0001		/* byte control */
331 #define CSR3_ACON	0x0002		/* ALE control */
332 #define CSR3_BSWP	0x0004		/* byte swap (1=big endian) */
333 
334 
335 
336 /***************************** Prototypes *****************************/
337 
338 static unsigned long lance_probe1( struct net_device *dev, struct lance_addr
339                                    *init_rec );
340 static int lance_open( struct net_device *dev );
341 static void lance_init_ring( struct net_device *dev );
342 static netdev_tx_t lance_start_xmit(struct sk_buff *skb,
343 				    struct net_device *dev);
344 static irqreturn_t lance_interrupt( int irq, void *dev_id );
345 static int lance_rx( struct net_device *dev );
346 static int lance_close( struct net_device *dev );
347 static void set_multicast_list( struct net_device *dev );
348 static int lance_set_mac_address( struct net_device *dev, void *addr );
349 static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue);
350 
351 /************************* End of Prototypes **************************/
352 
353 
354 
355 
356 
357 static void *slow_memcpy( void *dst, const void *src, size_t len )
358 
359 {	char *cto = dst;
360 	const char *cfrom = src;
361 
362 	while( len-- ) {
363 		*cto++ = *cfrom++;
364 		MFPDELAY();
365 	}
366 	return dst;
367 }
368 
369 
370 struct net_device * __init atarilance_probe(void)
371 {
372 	int i;
373 	static int found;
374 	struct net_device *dev;
375 	int err = -ENODEV;
376 
377 	if (!MACH_IS_ATARI || found)
378 		/* Assume there's only one board possible... That seems true, since
379 		 * the Riebl/PAM board's address cannot be changed. */
380 		return ERR_PTR(-ENODEV);
381 
382 	dev = alloc_etherdev(sizeof(struct lance_private));
383 	if (!dev)
384 		return ERR_PTR(-ENOMEM);
385 
386 	for( i = 0; i < N_LANCE_ADDR; ++i ) {
387 		if (lance_probe1( dev, &lance_addr_list[i] )) {
388 			found = 1;
389 			err = register_netdev(dev);
390 			if (!err)
391 				return dev;
392 			free_irq(dev->irq, dev);
393 			break;
394 		}
395 	}
396 	free_netdev(dev);
397 	return ERR_PTR(err);
398 }
399 
400 
401 /* Derived from hwreg_present() in atari/config.c: */
402 
403 static noinline int __init addr_accessible(volatile void *regp, int wordflag,
404 					   int writeflag)
405 {
406 	int		ret;
407 	unsigned long	flags;
408 	long	*vbr, save_berr;
409 
410 	local_irq_save(flags);
411 
412 	__asm__ __volatile__ ( "movec	%/vbr,%0" : "=r" (vbr) : );
413 	save_berr = vbr[2];
414 
415 	__asm__ __volatile__
416 	(	"movel	%/sp,%/d1\n\t"
417 		"movel	#Lberr,%2@\n\t"
418 		"moveq	#0,%0\n\t"
419 		"tstl   %3\n\t"
420 		"bne	1f\n\t"
421 		"moveb	%1@,%/d0\n\t"
422 		"nop	\n\t"
423 		"bra	2f\n"
424 "1:		 movew	%1@,%/d0\n\t"
425 		"nop	\n"
426 "2:		 tstl   %4\n\t"
427 		"beq	2f\n\t"
428 		"tstl	%3\n\t"
429 		"bne	1f\n\t"
430 		"clrb	%1@\n\t"
431 		"nop	\n\t"
432 		"moveb	%/d0,%1@\n\t"
433 		"nop	\n\t"
434 		"bra	2f\n"
435 "1:		 clrw	%1@\n\t"
436 		"nop	\n\t"
437 		"movew	%/d0,%1@\n\t"
438 		"nop	\n"
439 "2:		 moveq	#1,%0\n"
440 "Lberr:	 movel	%/d1,%/sp"
441 		: "=&d" (ret)
442 		: "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
443 		: "d0", "d1", "memory"
444 	);
445 
446 	vbr[2] = save_berr;
447 	local_irq_restore(flags);
448 
449 	return ret;
450 }
451 
452 static const struct net_device_ops lance_netdev_ops = {
453 	.ndo_open		= lance_open,
454 	.ndo_stop		= lance_close,
455 	.ndo_start_xmit		= lance_start_xmit,
456 	.ndo_set_rx_mode	= set_multicast_list,
457 	.ndo_set_mac_address	= lance_set_mac_address,
458 	.ndo_tx_timeout		= lance_tx_timeout,
459 	.ndo_validate_addr	= eth_validate_addr,
460 };
461 
462 static unsigned long __init lance_probe1( struct net_device *dev,
463 					   struct lance_addr *init_rec )
464 {
465 	volatile unsigned short *memaddr =
466 		(volatile unsigned short *)init_rec->memaddr;
467 	volatile unsigned short *ioaddr =
468 		(volatile unsigned short *)init_rec->ioaddr;
469 	struct lance_private	*lp;
470 	struct lance_ioreg		*IO;
471 	int 					i;
472 	static int 				did_version;
473 	unsigned short			save1, save2;
474 
475 	PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
476 				  (long)memaddr, (long)ioaddr ));
477 
478 	/* Test whether memory readable and writable */
479 	PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
480 	if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
481 
482 	/* Written values should come back... */
483 	PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
484 	save1 = *memaddr;
485 	*memaddr = 0x0001;
486 	if (*memaddr != 0x0001) goto probe_fail;
487 	PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
488 	*memaddr = 0x0000;
489 	if (*memaddr != 0x0000) goto probe_fail;
490 	*memaddr = save1;
491 
492 	/* First port should be readable and writable */
493 	PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
494 	if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
495 
496 	/* and written values should be readable */
497 	PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
498 	save2 = ioaddr[1];
499 	ioaddr[1] = 0x0001;
500 	if (ioaddr[1] != 0x0001) goto probe_fail;
501 
502 	/* The CSR0_INIT bit should not be readable */
503 	PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
504 	save1 = ioaddr[0];
505 	ioaddr[1] = CSR0;
506 	ioaddr[0] = CSR0_INIT | CSR0_STOP;
507 	if (ioaddr[0] != CSR0_STOP) {
508 		ioaddr[0] = save1;
509 		ioaddr[1] = save2;
510 		goto probe_fail;
511 	}
512 	PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
513 	ioaddr[0] = CSR0_STOP;
514 	if (ioaddr[0] != CSR0_STOP) {
515 		ioaddr[0] = save1;
516 		ioaddr[1] = save2;
517 		goto probe_fail;
518 	}
519 
520 	/* Now ok... */
521 	PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
522 	goto probe_ok;
523 
524   probe_fail:
525 	return 0;
526 
527   probe_ok:
528 	lp = netdev_priv(dev);
529 	MEM = (struct lance_memory *)memaddr;
530 	IO = lp->iobase = (struct lance_ioreg *)ioaddr;
531 	dev->base_addr = (unsigned long)ioaddr; /* informational only */
532 	lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
533 
534 	REGA( CSR0 ) = CSR0_STOP;
535 
536 	/* Now test for type: If the eeprom I/O port is readable, it is a
537 	 * PAM card */
538 	if (addr_accessible( &(IO->eeprom), 0, 0 )) {
539 		/* Switch back to Ram */
540 		i = IO->mem;
541 		lp->cardtype = PAM_CARD;
542 	}
543 	else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
544 		lp->cardtype = NEW_RIEBL;
545 	}
546 	else
547 		lp->cardtype = OLD_RIEBL;
548 
549 	if (lp->cardtype == PAM_CARD ||
550 		memaddr == (unsigned short *)0xffe00000) {
551 		/* PAMs card and Riebl on ST use level 5 autovector */
552 		if (request_irq(IRQ_AUTO_5, lance_interrupt, 0,
553 				"PAM,Riebl-ST Ethernet", dev)) {
554 			printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );
555 			return 0;
556 		}
557 		dev->irq = IRQ_AUTO_5;
558 	}
559 	else {
560 		/* For VME-RieblCards, request a free VME int */
561 		unsigned int irq = atari_register_vme_int();
562 		if (!irq) {
563 			printk( "Lance: request for VME interrupt failed\n" );
564 			return 0;
565 		}
566 		if (request_irq(irq, lance_interrupt, 0, "Riebl-VME Ethernet",
567 				dev)) {
568 			printk( "Lance: request for irq %u failed\n", irq );
569 			return 0;
570 		}
571 		dev->irq = irq;
572 	}
573 
574 	printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
575 		   dev->name, lance_names[lp->cardtype],
576 		   (unsigned long)ioaddr,
577 		   (unsigned long)memaddr,
578 		   dev->irq,
579 		   init_rec->slow_flag ? " (slow memcpy)" : "" );
580 
581 	/* Get the ethernet address */
582 	switch( lp->cardtype ) {
583 	  case OLD_RIEBL:
584 		/* No ethernet address! (Set some default address) */
585 		memcpy(dev->dev_addr, OldRieblDefHwaddr, ETH_ALEN);
586 		break;
587 	  case NEW_RIEBL:
588 		lp->memcpy_f(dev->dev_addr, RIEBL_HWADDR_ADDR, ETH_ALEN);
589 		break;
590 	  case PAM_CARD:
591 		i = IO->eeprom;
592 		for( i = 0; i < 6; ++i )
593 			dev->dev_addr[i] =
594 				((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
595 				((((unsigned short *)MEM)[i*2+1] & 0x0f));
596 		i = IO->mem;
597 		break;
598 	}
599 	printk("%pM\n", dev->dev_addr);
600 	if (lp->cardtype == OLD_RIEBL) {
601 		printk( "%s: Warning: This is a default ethernet address!\n",
602 				dev->name );
603 		printk( "      Use \"ifconfig hw ether ...\" to set the address.\n" );
604 	}
605 
606 	spin_lock_init(&lp->devlock);
607 
608 	MEM->init.mode = 0x0000;		/* Disable Rx and Tx. */
609 	for( i = 0; i < 6; i++ )
610 		MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
611 	MEM->init.filter[0] = 0x00000000;
612 	MEM->init.filter[1] = 0x00000000;
613 	MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
614 	MEM->init.rx_ring.adr_hi = 0;
615 	MEM->init.rx_ring.len    = RX_RING_LEN_BITS;
616 	MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
617 	MEM->init.tx_ring.adr_hi = 0;
618 	MEM->init.tx_ring.len    = TX_RING_LEN_BITS;
619 
620 	if (lp->cardtype == PAM_CARD)
621 		IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
622 	else
623 		*RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
624 
625 	if (did_version++ == 0)
626 		DPRINTK( 1, ( version ));
627 
628 	dev->netdev_ops = &lance_netdev_ops;
629 
630 	/* XXX MSch */
631 	dev->watchdog_timeo = TX_TIMEOUT;
632 
633 	return 1;
634 }
635 
636 
637 static int lance_open( struct net_device *dev )
638 {
639 	struct lance_private *lp = netdev_priv(dev);
640 	struct lance_ioreg	 *IO = lp->iobase;
641 	int i;
642 
643 	DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
644 
645 	lance_init_ring(dev);
646 	/* Re-initialize the LANCE, and start it when done. */
647 
648 	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
649 	REGA( CSR2 ) = 0;
650 	REGA( CSR1 ) = 0;
651 	REGA( CSR0 ) = CSR0_INIT;
652 	/* From now on, AREG is kept to point to CSR0 */
653 
654 	i = 1000000;
655 	while (--i > 0)
656 		if (DREG & CSR0_IDON)
657 			break;
658 	if (i <= 0 || (DREG & CSR0_ERR)) {
659 		DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
660 					  dev->name, i, DREG ));
661 		DREG = CSR0_STOP;
662 		return -EIO;
663 	}
664 	DREG = CSR0_IDON;
665 	DREG = CSR0_STRT;
666 	DREG = CSR0_INEA;
667 
668 	netif_start_queue (dev);
669 
670 	DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
671 
672 	return 0;
673 }
674 
675 
676 /* Initialize the LANCE Rx and Tx rings. */
677 
678 static void lance_init_ring( struct net_device *dev )
679 {
680 	struct lance_private *lp = netdev_priv(dev);
681 	int i;
682 	unsigned offset;
683 
684 	lp->tx_full = 0;
685 	lp->cur_rx = lp->cur_tx = 0;
686 	lp->dirty_tx = 0;
687 
688 	offset = offsetof( struct lance_memory, packet_area );
689 
690 /* If the packet buffer at offset 'o' would conflict with the reserved area
691  * of RieblCards, advance it */
692 #define	CHECK_OFFSET(o)														 \
693 	do {																	 \
694 		if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) {		 \
695 			if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
696 										 : (o) < RIEBL_RSVD_END)			 \
697 				(o) = RIEBL_RSVD_END;										 \
698 		}																	 \
699 	} while(0)
700 
701 	for( i = 0; i < TX_RING_SIZE; i++ ) {
702 		CHECK_OFFSET(offset);
703 		MEM->tx_head[i].base = offset;
704 		MEM->tx_head[i].flag = TMD1_OWN_HOST;
705 		MEM->tx_head[i].base_hi = 0;
706 		MEM->tx_head[i].length = 0;
707 		MEM->tx_head[i].misc = 0;
708 		offset += PKT_BUF_SZ;
709 	}
710 
711 	for( i = 0; i < RX_RING_SIZE; i++ ) {
712 		CHECK_OFFSET(offset);
713 		MEM->rx_head[i].base = offset;
714 		MEM->rx_head[i].flag = TMD1_OWN_CHIP;
715 		MEM->rx_head[i].base_hi = 0;
716 		MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
717 		MEM->rx_head[i].msg_length = 0;
718 		offset += PKT_BUF_SZ;
719 	}
720 }
721 
722 
723 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
724 
725 
726 static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue)
727 {
728 	struct lance_private *lp = netdev_priv(dev);
729 	struct lance_ioreg	 *IO = lp->iobase;
730 
731 	AREG = CSR0;
732 	DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
733 			  dev->name, DREG ));
734 	DREG = CSR0_STOP;
735 	/*
736 	 * Always set BSWP after a STOP as STOP puts it back into
737 	 * little endian mode.
738 	 */
739 	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
740 	dev->stats.tx_errors++;
741 #ifndef final_version
742 		{	int i;
743 			DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
744 						  lp->dirty_tx, lp->cur_tx,
745 						  lp->tx_full ? " (full)" : "",
746 						  lp->cur_rx ));
747 			for( i = 0 ; i < RX_RING_SIZE; i++ )
748 				DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
749 							  i, MEM->rx_head[i].base,
750 							  -MEM->rx_head[i].buf_length,
751 							  MEM->rx_head[i].msg_length ));
752 			for( i = 0 ; i < TX_RING_SIZE; i++ )
753 				DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
754 							  i, MEM->tx_head[i].base,
755 							  -MEM->tx_head[i].length,
756 							  MEM->tx_head[i].misc ));
757 		}
758 #endif
759 	/* XXX MSch: maybe purge/reinit ring here */
760 	/* lance_restart, essentially */
761 	lance_init_ring(dev);
762 	REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
763 	netif_trans_update(dev); /* prevent tx timeout */
764 	netif_wake_queue(dev);
765 }
766 
767 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
768 
769 static netdev_tx_t
770 lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
771 {
772 	struct lance_private *lp = netdev_priv(dev);
773 	struct lance_ioreg	 *IO = lp->iobase;
774 	int entry, len;
775 	struct lance_tx_head *head;
776 	unsigned long flags;
777 
778 	DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
779 				  dev->name, DREG ));
780 
781 
782 	/* The old LANCE chips doesn't automatically pad buffers to min. size. */
783 	len = skb->len;
784 	if (len < ETH_ZLEN)
785 		len = ETH_ZLEN;
786 	/* PAM-Card has a bug: Can only send packets with even number of bytes! */
787 	else if (lp->cardtype == PAM_CARD && (len & 1))
788 		++len;
789 
790 	if (len > skb->len) {
791 		if (skb_padto(skb, len))
792 			return NETDEV_TX_OK;
793 	}
794 
795 	netif_stop_queue (dev);
796 
797 	/* Fill in a Tx ring entry */
798 	if (lance_debug >= 3) {
799 		printk( "%s: TX pkt type 0x%04x from %pM to %pM"
800 				" data at 0x%08x len %d\n",
801 				dev->name, ((u_short *)skb->data)[6],
802 				&skb->data[6], skb->data,
803 				(int)skb->data, (int)skb->len );
804 	}
805 
806 	/* We're not prepared for the int until the last flags are set/reset. And
807 	 * the int may happen already after setting the OWN_CHIP... */
808 	spin_lock_irqsave (&lp->devlock, flags);
809 
810 	/* Mask to ring buffer boundary. */
811 	entry = lp->cur_tx & TX_RING_MOD_MASK;
812 	head  = &(MEM->tx_head[entry]);
813 
814 	/* Caution: the write order is important here, set the "ownership" bits
815 	 * last.
816 	 */
817 
818 
819 	head->length = -len;
820 	head->misc = 0;
821 	lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
822 	head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
823 	dev->stats.tx_bytes += skb->len;
824 	dev_kfree_skb( skb );
825 	lp->cur_tx++;
826 	while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
827 		lp->cur_tx -= TX_RING_SIZE;
828 		lp->dirty_tx -= TX_RING_SIZE;
829 	}
830 
831 	/* Trigger an immediate send poll. */
832 	DREG = CSR0_INEA | CSR0_TDMD;
833 
834 	if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
835 		TMD1_OWN_HOST)
836 		netif_start_queue (dev);
837 	else
838 		lp->tx_full = 1;
839 	spin_unlock_irqrestore (&lp->devlock, flags);
840 
841 	return NETDEV_TX_OK;
842 }
843 
844 /* The LANCE interrupt handler. */
845 
846 static irqreturn_t lance_interrupt( int irq, void *dev_id )
847 {
848 	struct net_device *dev = dev_id;
849 	struct lance_private *lp;
850 	struct lance_ioreg	 *IO;
851 	int csr0, boguscnt = 10;
852 	int handled = 0;
853 
854 	if (dev == NULL) {
855 		DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
856 		return IRQ_NONE;
857 	}
858 
859 	lp = netdev_priv(dev);
860 	IO = lp->iobase;
861 	spin_lock (&lp->devlock);
862 
863 	AREG = CSR0;
864 
865 	while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
866 		   --boguscnt >= 0) {
867 		handled = 1;
868 		/* Acknowledge all of the current interrupt sources ASAP. */
869 		DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
870 									CSR0_TDMD | CSR0_INEA);
871 
872 		DPRINTK( 2, ( "%s: interrupt  csr0=%04x new csr=%04x.\n",
873 					  dev->name, csr0, DREG ));
874 
875 		if (csr0 & CSR0_RINT)			/* Rx interrupt */
876 			lance_rx( dev );
877 
878 		if (csr0 & CSR0_TINT) {			/* Tx-done interrupt */
879 			int dirty_tx = lp->dirty_tx;
880 
881 			while( dirty_tx < lp->cur_tx) {
882 				int entry = dirty_tx & TX_RING_MOD_MASK;
883 				int status = MEM->tx_head[entry].flag;
884 
885 				if (status & TMD1_OWN_CHIP)
886 					break;			/* It still hasn't been Txed */
887 
888 				MEM->tx_head[entry].flag = 0;
889 
890 				if (status & TMD1_ERR) {
891 					/* There was an major error, log it. */
892 					int err_status = MEM->tx_head[entry].misc;
893 					dev->stats.tx_errors++;
894 					if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++;
895 					if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++;
896 					if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++;
897 					if (err_status & TMD3_UFLO) {
898 						/* Ackk!  On FIFO errors the Tx unit is turned off! */
899 						dev->stats.tx_fifo_errors++;
900 						/* Remove this verbosity later! */
901 						DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
902 									  dev->name, csr0 ));
903 						/* Restart the chip. */
904 						DREG = CSR0_STRT;
905 					}
906 				} else {
907 					if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
908 						dev->stats.collisions++;
909 					dev->stats.tx_packets++;
910 				}
911 
912 				/* XXX MSch: free skb?? */
913 				dirty_tx++;
914 			}
915 
916 #ifndef final_version
917 			if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
918 				DPRINTK( 0, ( "out-of-sync dirty pointer,"
919 							  " %d vs. %d, full=%ld.\n",
920 							  dirty_tx, lp->cur_tx, lp->tx_full ));
921 				dirty_tx += TX_RING_SIZE;
922 			}
923 #endif
924 
925 			if (lp->tx_full && (netif_queue_stopped(dev)) &&
926 				dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
927 				/* The ring is no longer full, clear tbusy. */
928 				lp->tx_full = 0;
929 				netif_wake_queue (dev);
930 			}
931 
932 			lp->dirty_tx = dirty_tx;
933 		}
934 
935 		/* Log misc errors. */
936 		if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */
937 		if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */
938 		if (csr0 & CSR0_MERR) {
939 			DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
940 						  "status %04x.\n", dev->name, csr0 ));
941 			/* Restart the chip. */
942 			DREG = CSR0_STRT;
943 		}
944 	}
945 
946     /* Clear any other interrupt, and set interrupt enable. */
947 	DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
948 		   CSR0_IDON | CSR0_INEA;
949 
950 	DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
951 				  dev->name, DREG ));
952 
953 	spin_unlock (&lp->devlock);
954 	return IRQ_RETVAL(handled);
955 }
956 
957 
958 static int lance_rx( struct net_device *dev )
959 {
960 	struct lance_private *lp = netdev_priv(dev);
961 	int entry = lp->cur_rx & RX_RING_MOD_MASK;
962 	int i;
963 
964 	DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
965 				  MEM->rx_head[entry].flag ));
966 
967 	/* If we own the next entry, it's a new packet. Send it up. */
968 	while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
969 		struct lance_rx_head *head = &(MEM->rx_head[entry]);
970 		int status = head->flag;
971 
972 		if (status != (RMD1_ENP|RMD1_STP)) {		/* There was an error. */
973 			/* There is a tricky error noted by John Murphy,
974 			   <murf@perftech.com> to Russ Nelson: Even with full-sized
975 			   buffers it's possible for a jabber packet to use two
976 			   buffers, with only the last correctly noting the error. */
977 			if (status & RMD1_ENP)	/* Only count a general error at the */
978 				dev->stats.rx_errors++; /* end of a packet.*/
979 			if (status & RMD1_FRAM) dev->stats.rx_frame_errors++;
980 			if (status & RMD1_OFLO) dev->stats.rx_over_errors++;
981 			if (status & RMD1_CRC) dev->stats.rx_crc_errors++;
982 			if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++;
983 			head->flag &= (RMD1_ENP|RMD1_STP);
984 		} else {
985 			/* Malloc up new buffer, compatible with net-3. */
986 			short pkt_len = head->msg_length & 0xfff;
987 			struct sk_buff *skb;
988 
989 			if (pkt_len < 60) {
990 				printk( "%s: Runt packet!\n", dev->name );
991 				dev->stats.rx_errors++;
992 			}
993 			else {
994 				skb = netdev_alloc_skb(dev, pkt_len + 2);
995 				if (skb == NULL) {
996 					for( i = 0; i < RX_RING_SIZE; i++ )
997 						if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
998 							RMD1_OWN_CHIP)
999 							break;
1000 
1001 					if (i > RX_RING_SIZE - 2) {
1002 						dev->stats.rx_dropped++;
1003 						head->flag |= RMD1_OWN_CHIP;
1004 						lp->cur_rx++;
1005 					}
1006 					break;
1007 				}
1008 
1009 				if (lance_debug >= 3) {
1010 					u_char *data = PKTBUF_ADDR(head);
1011 
1012 					printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %pM to %pM "
1013 						   "data %8ph len %d\n",
1014 						   dev->name, ((u_short *)data)[6],
1015 						   &data[6], data, &data[15], pkt_len);
1016 				}
1017 
1018 				skb_reserve( skb, 2 );	/* 16 byte align */
1019 				skb_put( skb, pkt_len );	/* Make room */
1020 				lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1021 				skb->protocol = eth_type_trans( skb, dev );
1022 				netif_rx( skb );
1023 				dev->stats.rx_packets++;
1024 				dev->stats.rx_bytes += pkt_len;
1025 			}
1026 		}
1027 
1028 		head->flag |= RMD1_OWN_CHIP;
1029 		entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1030 	}
1031 	lp->cur_rx &= RX_RING_MOD_MASK;
1032 
1033 	/* From lance.c (Donald Becker): */
1034 	/* We should check that at least two ring entries are free.	 If not,
1035 	   we should free one and mark stats->rx_dropped++. */
1036 
1037 	return 0;
1038 }
1039 
1040 
1041 static int lance_close( struct net_device *dev )
1042 {
1043 	struct lance_private *lp = netdev_priv(dev);
1044 	struct lance_ioreg	 *IO = lp->iobase;
1045 
1046 	netif_stop_queue (dev);
1047 
1048 	AREG = CSR0;
1049 
1050 	DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1051 				  dev->name, DREG ));
1052 
1053 	/* We stop the LANCE here -- it occasionally polls
1054 	   memory if we don't. */
1055 	DREG = CSR0_STOP;
1056 
1057 	return 0;
1058 }
1059 
1060 
1061 /* Set or clear the multicast filter for this adaptor.
1062    num_addrs == -1		Promiscuous mode, receive all packets
1063    num_addrs == 0		Normal mode, clear multicast list
1064    num_addrs > 0		Multicast mode, receive normal and MC packets, and do
1065 						best-effort filtering.
1066  */
1067 
1068 static void set_multicast_list( struct net_device *dev )
1069 {
1070 	struct lance_private *lp = netdev_priv(dev);
1071 	struct lance_ioreg	 *IO = lp->iobase;
1072 
1073 	if (netif_running(dev))
1074 		/* Only possible if board is already started */
1075 		return;
1076 
1077 	/* We take the simple way out and always enable promiscuous mode. */
1078 	DREG = CSR0_STOP; /* Temporarily stop the lance. */
1079 
1080 	if (dev->flags & IFF_PROMISC) {
1081 		/* Log any net taps. */
1082 		DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1083 		REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1084 	} else {
1085 		short multicast_table[4];
1086 		int num_addrs = netdev_mc_count(dev);
1087 		int i;
1088 		/* We don't use the multicast table, but rely on upper-layer
1089 		 * filtering. */
1090 		memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1091 				sizeof(multicast_table) );
1092 		for( i = 0; i < 4; i++ )
1093 			REGA( CSR8+i ) = multicast_table[i];
1094 		REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1095 	}
1096 
1097 	/*
1098 	 * Always set BSWP after a STOP as STOP puts it back into
1099 	 * little endian mode.
1100 	 */
1101 	REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1102 
1103 	/* Resume normal operation and reset AREG to CSR0 */
1104 	REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1105 }
1106 
1107 
1108 /* This is needed for old RieblCards and possible for new RieblCards */
1109 
1110 static int lance_set_mac_address( struct net_device *dev, void *addr )
1111 {
1112 	struct lance_private *lp = netdev_priv(dev);
1113 	struct sockaddr *saddr = addr;
1114 	int i;
1115 
1116 	if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1117 		return -EOPNOTSUPP;
1118 
1119 	if (netif_running(dev)) {
1120 		/* Only possible while card isn't started */
1121 		DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1122 					  dev->name ));
1123 		return -EIO;
1124 	}
1125 
1126 	memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
1127 	for( i = 0; i < 6; i++ )
1128 		MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1129 	lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1130 	/* set also the magic for future sessions */
1131 	*RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1132 
1133 	return 0;
1134 }
1135 
1136 static struct net_device *atarilance_dev;
1137 
1138 static int __init atarilance_module_init(void)
1139 {
1140 	atarilance_dev = atarilance_probe();
1141 	return PTR_ERR_OR_ZERO(atarilance_dev);
1142 }
1143 
1144 static void __exit atarilance_module_exit(void)
1145 {
1146 	unregister_netdev(atarilance_dev);
1147 	free_irq(atarilance_dev->irq, atarilance_dev);
1148 	free_netdev(atarilance_dev);
1149 }
1150 module_init(atarilance_module_init);
1151 module_exit(atarilance_module_exit);
1152