xref: /openbmc/linux/drivers/net/ethernet/amd/7990.h (revision 44da5c2f)
1b955f6caSJeff Kirsher /*
2b955f6caSJeff Kirsher  * 7990.h -- LANCE ethernet IC generic routines.
3b955f6caSJeff Kirsher  * This is an attempt to separate out the bits of various ethernet
4b955f6caSJeff Kirsher  * drivers that are common because they all use the AMD 7990 LANCE
5b955f6caSJeff Kirsher  * (Local Area Network Controller for Ethernet) chip.
6b955f6caSJeff Kirsher  *
7b955f6caSJeff Kirsher  * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
8b955f6caSJeff Kirsher  *
9b955f6caSJeff Kirsher  * Most of this stuff was obtained by looking at other LANCE drivers,
10b955f6caSJeff Kirsher  * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
11b955f6caSJeff Kirsher  */
12b955f6caSJeff Kirsher 
13b955f6caSJeff Kirsher #ifndef _7990_H
14b955f6caSJeff Kirsher #define _7990_H
15b955f6caSJeff Kirsher 
16b955f6caSJeff Kirsher /* The lance only has two register locations. We communicate mostly via memory. */
17b955f6caSJeff Kirsher #define LANCE_RDP	0	/* Register Data Port */
18b955f6caSJeff Kirsher #define LANCE_RAP	2	/* Register Address Port */
19b955f6caSJeff Kirsher 
20b955f6caSJeff Kirsher /* Transmit/receive ring definitions.
21b955f6caSJeff Kirsher  * We allow the specific drivers to override these defaults if they want to.
22b955f6caSJeff Kirsher  * NB: according to lance.c, increasing the number of buffers is a waste
23b955f6caSJeff Kirsher  * of space and reduces the chance that an upper layer will be able to
24b955f6caSJeff Kirsher  * reorder queued Tx packets based on priority. [Clearly there is a minimum
25b955f6caSJeff Kirsher  * limit too: too small and we drop rx packets and can't tx at full speed.]
26b955f6caSJeff Kirsher  * 4+4 seems to be the usual setting; the atarilance driver uses 3 and 5.
27b955f6caSJeff Kirsher  */
28b955f6caSJeff Kirsher 
29b955f6caSJeff Kirsher /* Blast! This won't work. The problem is that we can't specify a default
30b955f6caSJeff Kirsher  * setting because that would cause the lance_init_block struct to be
31b955f6caSJeff Kirsher  * too long (and overflow the RAM on shared-memory cards like the HP LANCE.
32b955f6caSJeff Kirsher  */
33b955f6caSJeff Kirsher #ifndef LANCE_LOG_TX_BUFFERS
34b955f6caSJeff Kirsher #define LANCE_LOG_TX_BUFFERS 1
35b955f6caSJeff Kirsher #define LANCE_LOG_RX_BUFFERS 3
36b955f6caSJeff Kirsher #endif
37b955f6caSJeff Kirsher 
38b955f6caSJeff Kirsher #define TX_RING_SIZE (1<<LANCE_LOG_TX_BUFFERS)
39b955f6caSJeff Kirsher #define RX_RING_SIZE (1<<LANCE_LOG_RX_BUFFERS)
40b955f6caSJeff Kirsher #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
41b955f6caSJeff Kirsher #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
42b955f6caSJeff Kirsher #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
43b955f6caSJeff Kirsher #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
44b955f6caSJeff Kirsher #define PKT_BUFF_SIZE (1544)
45b955f6caSJeff Kirsher #define RX_BUFF_SIZE PKT_BUFF_SIZE
46b955f6caSJeff Kirsher #define TX_BUFF_SIZE PKT_BUFF_SIZE
47b955f6caSJeff Kirsher 
48b955f6caSJeff Kirsher /* Each receive buffer is described by a receive message descriptor (RMD) */
49b955f6caSJeff Kirsher struct lance_rx_desc {
50b955f6caSJeff Kirsher 	volatile unsigned short rmd0;        /* low address of packet */
51b955f6caSJeff Kirsher 	volatile unsigned char  rmd1_bits;   /* descriptor bits */
52b955f6caSJeff Kirsher 	volatile unsigned char  rmd1_hadr;   /* high address of packet */
53b955f6caSJeff Kirsher 	volatile short    length;    	    /* This length is 2s complement (negative)!
54b955f6caSJeff Kirsher 				     * Buffer length
55b955f6caSJeff Kirsher 				     */
56b955f6caSJeff Kirsher 	volatile unsigned short mblength;    /* Actual number of bytes received */
57b955f6caSJeff Kirsher };
58b955f6caSJeff Kirsher 
59b955f6caSJeff Kirsher /* Ditto for TMD: */
60b955f6caSJeff Kirsher struct lance_tx_desc {
61b955f6caSJeff Kirsher 	volatile unsigned short tmd0;        /* low address of packet */
62b955f6caSJeff Kirsher 	volatile unsigned char  tmd1_bits;   /* descriptor bits */
63b955f6caSJeff Kirsher 	volatile unsigned char  tmd1_hadr;   /* high address of packet */
64b955f6caSJeff Kirsher 	volatile short    length;       	    /* Length is 2s complement (negative)! */
65b955f6caSJeff Kirsher 	volatile unsigned short misc;
66b955f6caSJeff Kirsher };
67b955f6caSJeff Kirsher 
68b955f6caSJeff Kirsher /* There are three memory structures accessed by the LANCE:
69b955f6caSJeff Kirsher  * the initialization block, the receive and transmit descriptor rings,
70b955f6caSJeff Kirsher  * and the data buffers themselves. In fact we might as well put the
71b955f6caSJeff Kirsher  * init block,the Tx and Rx rings and the buffers together in memory:
72b955f6caSJeff Kirsher  */
73b955f6caSJeff Kirsher struct lance_init_block {
74b955f6caSJeff Kirsher         volatile unsigned short mode;            /* Pre-set mode (reg. 15) */
75b955f6caSJeff Kirsher         volatile unsigned char phys_addr[6];     /* Physical ethernet address */
76b955f6caSJeff Kirsher         volatile unsigned filter[2];             /* Multicast filter (64 bits) */
77b955f6caSJeff Kirsher 
78b955f6caSJeff Kirsher         /* Receive and transmit ring base, along with extra bits. */
79b955f6caSJeff Kirsher         volatile unsigned short rx_ptr;          /* receive descriptor addr */
80b955f6caSJeff Kirsher         volatile unsigned short rx_len;          /* receive len and high addr */
81b955f6caSJeff Kirsher         volatile unsigned short tx_ptr;          /* transmit descriptor addr */
82b955f6caSJeff Kirsher         volatile unsigned short tx_len;          /* transmit len and high addr */
83b955f6caSJeff Kirsher 
84b955f6caSJeff Kirsher         /* The Tx and Rx ring entries must be aligned on 8-byte boundaries.
85b955f6caSJeff Kirsher          * This will be true if this whole struct is 8-byte aligned.
86b955f6caSJeff Kirsher          */
87b955f6caSJeff Kirsher         volatile struct lance_tx_desc btx_ring[TX_RING_SIZE];
88b955f6caSJeff Kirsher         volatile struct lance_rx_desc brx_ring[RX_RING_SIZE];
89b955f6caSJeff Kirsher 
90b955f6caSJeff Kirsher         volatile char   tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
91b955f6caSJeff Kirsher         volatile char   rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
92b955f6caSJeff Kirsher         /* we use this just to make the struct big enough that we can move its startaddr
93b955f6caSJeff Kirsher          * in order to force alignment to an eight byte boundary.
94b955f6caSJeff Kirsher          */
95b955f6caSJeff Kirsher };
96b955f6caSJeff Kirsher 
97b955f6caSJeff Kirsher /* This is where we keep all the stuff the driver needs to know about.
98b955f6caSJeff Kirsher  * I'm definitely unhappy about the mechanism for allowing specific
99b955f6caSJeff Kirsher  * drivers to add things...
100b955f6caSJeff Kirsher  */
101b955f6caSJeff Kirsher struct lance_private
102b955f6caSJeff Kirsher {
103b955f6caSJeff Kirsher         char *name;
104b955f6caSJeff Kirsher 	unsigned long base;
105b955f6caSJeff Kirsher         volatile struct lance_init_block *init_block; /* CPU address of RAM */
106b955f6caSJeff Kirsher         volatile struct lance_init_block *lance_init_block; /* LANCE address of RAM */
107b955f6caSJeff Kirsher 
108b955f6caSJeff Kirsher         int rx_new, tx_new;
109b955f6caSJeff Kirsher         int rx_old, tx_old;
110b955f6caSJeff Kirsher 
111b955f6caSJeff Kirsher         int lance_log_rx_bufs, lance_log_tx_bufs;
112b955f6caSJeff Kirsher         int rx_ring_mod_mask, tx_ring_mod_mask;
113b955f6caSJeff Kirsher 
114b955f6caSJeff Kirsher         int tpe;                                  /* TPE is selected */
115b955f6caSJeff Kirsher         int auto_select;                          /* cable-selection is by carrier */
116b955f6caSJeff Kirsher         unsigned short busmaster_regval;
117b955f6caSJeff Kirsher 
118b955f6caSJeff Kirsher         unsigned int irq;                         /* IRQ to register */
119b955f6caSJeff Kirsher 
120b955f6caSJeff Kirsher         /* This is because the HP LANCE is disgusting and you have to check
121b955f6caSJeff Kirsher          * a DIO-specific register every time you read/write the LANCE regs :-<
122b955f6caSJeff Kirsher          * [could we get away with making these some sort of macro?]
123b955f6caSJeff Kirsher          */
124b955f6caSJeff Kirsher         void (*writerap)(void *, unsigned short);
125b955f6caSJeff Kirsher         void (*writerdp)(void *, unsigned short);
126b955f6caSJeff Kirsher         unsigned short (*readrdp)(void *);
127b955f6caSJeff Kirsher 	spinlock_t devlock;
128b955f6caSJeff Kirsher 	char tx_full;
129b955f6caSJeff Kirsher };
130b955f6caSJeff Kirsher 
131b955f6caSJeff Kirsher /*
132b955f6caSJeff Kirsher  *              Am7990 Control and Status Registers
133b955f6caSJeff Kirsher  */
134b955f6caSJeff Kirsher #define LE_CSR0         0x0000          /* LANCE Controller Status */
135b955f6caSJeff Kirsher #define LE_CSR1         0x0001          /* IADR[15:0] (bit0==0 ie word aligned) */
136b955f6caSJeff Kirsher #define LE_CSR2         0x0002          /* IADR[23:16] (high bits reserved) */
137b955f6caSJeff Kirsher #define LE_CSR3         0x0003          /* Misc */
138b955f6caSJeff Kirsher 
139b955f6caSJeff Kirsher /*
140b955f6caSJeff Kirsher  *		Bit definitions for CSR0 (LANCE Controller Status)
141b955f6caSJeff Kirsher  */
142b955f6caSJeff Kirsher #define LE_C0_ERR	0x8000		/* Error = BABL | CERR | MISS | MERR */
143b955f6caSJeff Kirsher #define LE_C0_BABL	0x4000		/* Babble: Transmitted too many bits */
144b955f6caSJeff Kirsher #define LE_C0_CERR	0x2000		/* No Heartbeat (10BASE-T) */
145b955f6caSJeff Kirsher #define LE_C0_MISS	0x1000		/* Missed Frame (no rx buffer to put it in) */
146b955f6caSJeff Kirsher #define LE_C0_MERR	0x0800		/* Memory Error */
147b955f6caSJeff Kirsher #define LE_C0_RINT	0x0400		/* Receive Interrupt */
148b955f6caSJeff Kirsher #define LE_C0_TINT	0x0200		/* Transmit Interrupt */
149b955f6caSJeff Kirsher #define LE_C0_IDON	0x0100		/* Initialization Done */
150b955f6caSJeff Kirsher #define LE_C0_INTR	0x0080		/* Interrupt Flag
151b955f6caSJeff Kirsher                                          = BABL | MISS | MERR | RINT | TINT | IDON */
152b955f6caSJeff Kirsher #define LE_C0_INEA	0x0040		/* Interrupt Enable */
153b955f6caSJeff Kirsher #define LE_C0_RXON	0x0020		/* Receive On */
154b955f6caSJeff Kirsher #define LE_C0_TXON	0x0010		/* Transmit On */
155b955f6caSJeff Kirsher #define LE_C0_TDMD	0x0008		/* Transmit Demand */
156b955f6caSJeff Kirsher #define LE_C0_STOP	0x0004		/* Stop */
157b955f6caSJeff Kirsher #define LE_C0_STRT	0x0002		/* Start */
158b955f6caSJeff Kirsher #define LE_C0_INIT	0x0001		/* Initialize */
159b955f6caSJeff Kirsher 
160b955f6caSJeff Kirsher 
161b955f6caSJeff Kirsher /*
162b955f6caSJeff Kirsher  *		Bit definitions for CSR3
163b955f6caSJeff Kirsher  */
164b955f6caSJeff Kirsher #define LE_C3_BSWP	0x0004		/* Byte Swap
165b955f6caSJeff Kirsher 					   (on for big endian byte order) */
166b955f6caSJeff Kirsher #define LE_C3_ACON	0x0002		/* ALE Control
167b955f6caSJeff Kirsher 					   (on for active low ALE) */
168b955f6caSJeff Kirsher #define LE_C3_BCON	0x0001		/* Byte Control */
169b955f6caSJeff Kirsher 
170b955f6caSJeff Kirsher 
171b955f6caSJeff Kirsher /*
172b955f6caSJeff Kirsher  *		Mode Flags
173b955f6caSJeff Kirsher  */
174b955f6caSJeff Kirsher #define LE_MO_PROM	0x8000		/* Promiscuous Mode */
175b955f6caSJeff Kirsher /* these next ones 0x4000 -- 0x0080 are not available on the LANCE 7990,
176b955f6caSJeff Kirsher  * but they are in NetBSD's am7990.h, presumably for backwards-compatible chips
177b955f6caSJeff Kirsher  */
178b955f6caSJeff Kirsher #define LE_MO_DRCVBC  0x4000          /* disable receive broadcast */
179b955f6caSJeff Kirsher #define LE_MO_DRCVPA  0x2000          /* disable physical address detection */
180b955f6caSJeff Kirsher #define LE_MO_DLNKTST 0x1000          /* disable link status */
181b955f6caSJeff Kirsher #define LE_MO_DAPC    0x0800          /* disable automatic polarity correction */
182b955f6caSJeff Kirsher #define LE_MO_MENDECL 0x0400          /* MENDEC loopback mode */
183b955f6caSJeff Kirsher #define LE_MO_LRTTSEL 0x0200          /* lower RX threshold / TX mode selection */
184b955f6caSJeff Kirsher #define LE_MO_PSEL1   0x0100          /* port selection bit1 */
185b955f6caSJeff Kirsher #define LE_MO_PSEL0   0x0080          /* port selection bit0 */
186b955f6caSJeff Kirsher /* and this one is from the C-LANCE data sheet... */
187b955f6caSJeff Kirsher #define LE_MO_EMBA      0x0080          /* Enable Modified Backoff Algorithm
188b955f6caSJeff Kirsher                                            (C-LANCE, not original LANCE) */
189b955f6caSJeff Kirsher #define LE_MO_INTL	0x0040		/* Internal Loopback */
190b955f6caSJeff Kirsher #define LE_MO_DRTY	0x0020		/* Disable Retry */
191b955f6caSJeff Kirsher #define LE_MO_FCOLL	0x0010		/* Force Collision */
192b955f6caSJeff Kirsher #define LE_MO_DXMTFCS	0x0008		/* Disable Transmit CRC */
193b955f6caSJeff Kirsher #define LE_MO_LOOP	0x0004		/* Loopback Enable */
194b955f6caSJeff Kirsher #define LE_MO_DTX	0x0002		/* Disable Transmitter */
195b955f6caSJeff Kirsher #define LE_MO_DRX	0x0001		/* Disable Receiver */
196b955f6caSJeff Kirsher 
197b955f6caSJeff Kirsher 
198b955f6caSJeff Kirsher /*
199b955f6caSJeff Kirsher  *		Receive Flags
200b955f6caSJeff Kirsher  */
201b955f6caSJeff Kirsher #define LE_R1_OWN	0x80		/* LANCE owns the descriptor */
202b955f6caSJeff Kirsher #define LE_R1_ERR	0x40		/* Error */
203b955f6caSJeff Kirsher #define LE_R1_FRA	0x20		/* Framing Error */
204b955f6caSJeff Kirsher #define LE_R1_OFL	0x10		/* Overflow Error */
205b955f6caSJeff Kirsher #define LE_R1_CRC	0x08		/* CRC Error */
206b955f6caSJeff Kirsher #define LE_R1_BUF	0x04		/* Buffer Error */
207b955f6caSJeff Kirsher #define LE_R1_SOP	0x02		/* Start of Packet */
208b955f6caSJeff Kirsher #define LE_R1_EOP	0x01		/* End of Packet */
209b955f6caSJeff Kirsher #define LE_R1_POK       0x03		/* Packet is complete: SOP + EOP */
210b955f6caSJeff Kirsher 
211b955f6caSJeff Kirsher 
212b955f6caSJeff Kirsher /*
213b955f6caSJeff Kirsher  *		Transmit Flags
214b955f6caSJeff Kirsher  */
215b955f6caSJeff Kirsher #define LE_T1_OWN	0x80		/* LANCE owns the descriptor */
216b955f6caSJeff Kirsher #define LE_T1_ERR	0x40		/* Error */
217b955f6caSJeff Kirsher #define LE_T1_RES	0x20		/* Reserved, LANCE writes this with a zero */
218b955f6caSJeff Kirsher #define LE_T1_EMORE	0x10		/* More than one retry needed */
219b955f6caSJeff Kirsher #define LE_T1_EONE	0x08		/* One retry needed */
220b955f6caSJeff Kirsher #define LE_T1_EDEF	0x04		/* Deferred */
221b955f6caSJeff Kirsher #define LE_T1_SOP	0x02		/* Start of Packet */
222b955f6caSJeff Kirsher #define LE_T1_EOP	0x01		/* End of Packet */
223b955f6caSJeff Kirsher #define LE_T1_POK	0x03		/* Packet is complete: SOP + EOP */
224b955f6caSJeff Kirsher 
225b955f6caSJeff Kirsher /*
226b955f6caSJeff Kirsher  *		Error Flags
227b955f6caSJeff Kirsher  */
228b955f6caSJeff Kirsher #define LE_T3_BUF 	0x8000		/* Buffer Error */
229b955f6caSJeff Kirsher #define LE_T3_UFL 	0x4000		/* Underflow Error */
230b955f6caSJeff Kirsher #define LE_T3_LCOL 	0x1000		/* Late Collision */
231b955f6caSJeff Kirsher #define LE_T3_CLOS 	0x0800		/* Loss of Carrier */
232b955f6caSJeff Kirsher #define LE_T3_RTY 	0x0400		/* Retry Error */
233b955f6caSJeff Kirsher #define LE_T3_TDR	0x03ff		/* Time Domain Reflectometry */
234b955f6caSJeff Kirsher 
235b955f6caSJeff Kirsher /* Miscellaneous useful macros */
236b955f6caSJeff Kirsher 
237b955f6caSJeff Kirsher #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
238b955f6caSJeff Kirsher                         lp->tx_old+lp->tx_ring_mod_mask-lp->tx_new:\
239b955f6caSJeff Kirsher                         lp->tx_old - lp->tx_new-1)
240b955f6caSJeff Kirsher 
241b955f6caSJeff Kirsher /* The LANCE only uses 24 bit addresses. This does the obvious thing. */
242b955f6caSJeff Kirsher #define LANCE_ADDR(x) ((int)(x) & ~0xff000000)
243b955f6caSJeff Kirsher 
244b955f6caSJeff Kirsher /* Now the prototypes we export */
24544da5c2fSJoe Perches int lance_open(struct net_device *dev);
24644da5c2fSJoe Perches int lance_close (struct net_device *dev);
24744da5c2fSJoe Perches int lance_start_xmit (struct sk_buff *skb, struct net_device *dev);
24844da5c2fSJoe Perches void lance_set_multicast (struct net_device *dev);
24944da5c2fSJoe Perches void lance_tx_timeout(struct net_device *dev);
250b955f6caSJeff Kirsher #ifdef CONFIG_NET_POLL_CONTROLLER
25144da5c2fSJoe Perches void lance_poll(struct net_device *dev);
252b955f6caSJeff Kirsher #endif
253b955f6caSJeff Kirsher 
254b955f6caSJeff Kirsher #endif /* ndef _7990_H */
255