1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #ifndef ENA_H 7 #define ENA_H 8 9 #include <linux/bitops.h> 10 #include <linux/dim.h> 11 #include <linux/etherdevice.h> 12 #include <linux/if_vlan.h> 13 #include <linux/inetdevice.h> 14 #include <linux/interrupt.h> 15 #include <linux/netdevice.h> 16 #include <linux/skbuff.h> 17 #include <uapi/linux/bpf.h> 18 19 #include "ena_com.h" 20 #include "ena_eth_com.h" 21 22 #define DRV_MODULE_GEN_MAJOR 2 23 #define DRV_MODULE_GEN_MINOR 1 24 #define DRV_MODULE_GEN_SUBMINOR 0 25 26 #define DRV_MODULE_NAME "ena" 27 28 #define DEVICE_NAME "Elastic Network Adapter (ENA)" 29 30 /* 1 for AENQ + ADMIN */ 31 #define ENA_ADMIN_MSIX_VEC 1 32 #define ENA_MAX_MSIX_VEC(io_queues) (ENA_ADMIN_MSIX_VEC + (io_queues)) 33 34 /* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the 35 * driver passes 0. 36 * Since the max packet size the ENA handles is ~9kB limit the buffer length to 37 * 16kB. 38 */ 39 #if PAGE_SIZE > SZ_16K 40 #define ENA_PAGE_SIZE (_AC(SZ_16K, UL)) 41 #else 42 #define ENA_PAGE_SIZE PAGE_SIZE 43 #endif 44 45 #define ENA_MIN_MSIX_VEC 2 46 47 #define ENA_REG_BAR 0 48 #define ENA_MEM_BAR 2 49 #define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR)) 50 51 #define ENA_DEFAULT_RING_SIZE (1024) 52 #define ENA_MIN_RING_SIZE (256) 53 54 #define ENA_MIN_RX_BUF_SIZE (2048) 55 56 #define ENA_MIN_NUM_IO_QUEUES (1) 57 58 #define ENA_TX_WAKEUP_THRESH (MAX_SKB_FRAGS + 2) 59 #define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN) 60 61 #define ENA_MIN_MTU 128 62 63 #define ENA_NAME_MAX_LEN 20 64 #define ENA_IRQNAME_SIZE 40 65 66 #define ENA_PKT_MAX_BUFS 19 67 68 #define ENA_RX_RSS_TABLE_LOG_SIZE 7 69 #define ENA_RX_RSS_TABLE_SIZE (1 << ENA_RX_RSS_TABLE_LOG_SIZE) 70 71 /* The number of tx packet completions that will be handled each NAPI poll 72 * cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER. 73 */ 74 #define ENA_TX_POLL_BUDGET_DIVIDER 4 75 76 /* Refill Rx queue when number of required descriptors is above 77 * QUEUE_SIZE / ENA_RX_REFILL_THRESH_DIVIDER or ENA_RX_REFILL_THRESH_PACKET 78 */ 79 #define ENA_RX_REFILL_THRESH_DIVIDER 8 80 #define ENA_RX_REFILL_THRESH_PACKET 256 81 82 /* Number of queues to check for missing queues per timer service */ 83 #define ENA_MONITORED_TX_QUEUES 4 84 /* Max timeout packets before device reset */ 85 #define MAX_NUM_OF_TIMEOUTED_PACKETS 128 86 87 #define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1)) 88 89 #define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1)) 90 #define ENA_RX_RING_IDX_ADD(idx, n, ring_size) \ 91 (((idx) + (n)) & ((ring_size) - 1)) 92 93 #define ENA_IO_TXQ_IDX(q) (2 * (q)) 94 #define ENA_IO_RXQ_IDX(q) (2 * (q) + 1) 95 #define ENA_IO_TXQ_IDX_TO_COMBINED_IDX(q) ((q) / 2) 96 #define ENA_IO_RXQ_IDX_TO_COMBINED_IDX(q) (((q) - 1) / 2) 97 98 #define ENA_MGMNT_IRQ_IDX 0 99 #define ENA_IO_IRQ_FIRST_IDX 1 100 #define ENA_IO_IRQ_IDX(q) (ENA_IO_IRQ_FIRST_IDX + (q)) 101 102 #define ENA_ADMIN_POLL_DELAY_US 100 103 104 /* ENA device should send keep alive msg every 1 sec. 105 * We wait for 6 sec just to be on the safe side. 106 */ 107 #define ENA_DEVICE_KALIVE_TIMEOUT (6 * HZ) 108 #define ENA_MAX_NO_INTERRUPT_ITERATIONS 3 109 110 #define ENA_MMIO_DISABLE_REG_READ BIT(0) 111 112 /* The max MTU size is configured to be the ethernet frame size without 113 * the overhead of the ethernet header, which can have a VLAN header, and 114 * a frame check sequence (FCS). 115 * The buffer size we share with the device is defined to be ENA_PAGE_SIZE 116 */ 117 118 #define ENA_XDP_MAX_MTU (ENA_PAGE_SIZE - ETH_HLEN - ETH_FCS_LEN - \ 119 VLAN_HLEN - XDP_PACKET_HEADROOM - \ 120 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 121 122 #define ENA_IS_XDP_INDEX(adapter, index) (((index) >= (adapter)->xdp_first_ring) && \ 123 ((index) < (adapter)->xdp_first_ring + (adapter)->xdp_num_queues)) 124 125 struct ena_irq { 126 irq_handler_t handler; 127 void *data; 128 int cpu; 129 u32 vector; 130 cpumask_t affinity_hint_mask; 131 char name[ENA_IRQNAME_SIZE]; 132 }; 133 134 struct ena_napi { 135 u8 first_interrupt ____cacheline_aligned; 136 u8 interrupts_masked; 137 struct napi_struct napi; 138 struct ena_ring *tx_ring; 139 struct ena_ring *rx_ring; 140 struct ena_ring *xdp_ring; 141 u32 qid; 142 struct dim dim; 143 }; 144 145 struct ena_tx_buffer { 146 struct sk_buff *skb; 147 /* num of ena desc for this specific skb 148 * (includes data desc and metadata desc) 149 */ 150 u32 tx_descs; 151 /* num of buffers used by this skb */ 152 u32 num_of_bufs; 153 154 /* XDP buffer structure which is used for sending packets in 155 * the xdp queues 156 */ 157 struct xdp_frame *xdpf; 158 159 /* Indicate if bufs[0] map the linear data of the skb. */ 160 u8 map_linear_data; 161 162 /* Used for detect missing tx packets to limit the number of prints */ 163 u32 print_once; 164 /* Save the last jiffies to detect missing tx packets 165 * 166 * sets to non zero value on ena_start_xmit and set to zero on 167 * napi and timer_Service_routine. 168 * 169 * while this value is not protected by lock, 170 * a given packet is not expected to be handled by ena_start_xmit 171 * and by napi/timer_service at the same time. 172 */ 173 unsigned long last_jiffies; 174 struct ena_com_buf bufs[ENA_PKT_MAX_BUFS]; 175 } ____cacheline_aligned; 176 177 struct ena_rx_buffer { 178 struct sk_buff *skb; 179 struct page *page; 180 dma_addr_t dma_addr; 181 u32 page_offset; 182 u32 buf_offset; 183 struct ena_com_buf ena_buf; 184 } ____cacheline_aligned; 185 186 struct ena_stats_tx { 187 u64 cnt; 188 u64 bytes; 189 u64 queue_stop; 190 u64 prepare_ctx_err; 191 u64 queue_wakeup; 192 u64 dma_mapping_err; 193 u64 linearize; 194 u64 linearize_failed; 195 u64 napi_comp; 196 u64 tx_poll; 197 u64 doorbells; 198 u64 bad_req_id; 199 u64 llq_buffer_copy; 200 u64 missed_tx; 201 u64 unmask_interrupt; 202 u64 last_napi_jiffies; 203 }; 204 205 struct ena_stats_rx { 206 u64 cnt; 207 u64 bytes; 208 u64 rx_copybreak_pkt; 209 u64 csum_good; 210 u64 refil_partial; 211 u64 csum_bad; 212 u64 page_alloc_fail; 213 u64 skb_alloc_fail; 214 u64 dma_mapping_err; 215 u64 bad_desc_num; 216 u64 bad_req_id; 217 u64 empty_rx_ring; 218 u64 csum_unchecked; 219 u64 xdp_aborted; 220 u64 xdp_drop; 221 u64 xdp_pass; 222 u64 xdp_tx; 223 u64 xdp_invalid; 224 u64 xdp_redirect; 225 }; 226 227 struct ena_ring { 228 /* Holds the empty requests for TX/RX 229 * out of order completions 230 */ 231 u16 *free_ids; 232 233 union { 234 struct ena_tx_buffer *tx_buffer_info; 235 struct ena_rx_buffer *rx_buffer_info; 236 }; 237 238 /* cache ptr to avoid using the adapter */ 239 struct device *dev; 240 struct pci_dev *pdev; 241 struct napi_struct *napi; 242 struct net_device *netdev; 243 struct ena_com_dev *ena_dev; 244 struct ena_adapter *adapter; 245 struct ena_com_io_cq *ena_com_io_cq; 246 struct ena_com_io_sq *ena_com_io_sq; 247 struct bpf_prog *xdp_bpf_prog; 248 struct xdp_rxq_info xdp_rxq; 249 spinlock_t xdp_tx_lock; /* synchronize XDP TX/Redirect traffic */ 250 /* Used for rx queues only to point to the xdp tx ring, to 251 * which traffic should be redirected from this rx ring. 252 */ 253 struct ena_ring *xdp_ring; 254 255 u16 next_to_use; 256 u16 next_to_clean; 257 u16 rx_copybreak; 258 u16 rx_headroom; 259 u16 qid; 260 u16 mtu; 261 u16 sgl_size; 262 263 /* The maximum header length the device can handle */ 264 u8 tx_max_header_size; 265 266 bool disable_meta_caching; 267 u16 no_interrupt_event_cnt; 268 269 /* cpu and NUMA for TPH */ 270 int cpu; 271 int numa_node; 272 273 /* number of tx/rx_buffer_info's entries */ 274 int ring_size; 275 276 enum ena_admin_placement_policy_type tx_mem_queue_type; 277 278 struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS]; 279 u32 smoothed_interval; 280 u32 per_napi_packets; 281 u16 non_empty_napi_events; 282 struct u64_stats_sync syncp; 283 union { 284 struct ena_stats_tx tx_stats; 285 struct ena_stats_rx rx_stats; 286 }; 287 288 u8 *push_buf_intermediate_buf; 289 int empty_rx_queue; 290 } ____cacheline_aligned; 291 292 struct ena_stats_dev { 293 u64 tx_timeout; 294 u64 suspend; 295 u64 resume; 296 u64 wd_expired; 297 u64 interface_up; 298 u64 interface_down; 299 u64 admin_q_pause; 300 u64 rx_drops; 301 u64 tx_drops; 302 }; 303 304 enum ena_flags_t { 305 ENA_FLAG_DEVICE_RUNNING, 306 ENA_FLAG_DEV_UP, 307 ENA_FLAG_LINK_UP, 308 ENA_FLAG_MSIX_ENABLED, 309 ENA_FLAG_TRIGGER_RESET, 310 ENA_FLAG_ONGOING_RESET 311 }; 312 313 /* adapter specific private data structure */ 314 struct ena_adapter { 315 struct ena_com_dev *ena_dev; 316 /* OS defined structs */ 317 struct net_device *netdev; 318 struct pci_dev *pdev; 319 320 /* rx packets that shorter that this len will be copied to the skb 321 * header 322 */ 323 u32 rx_copybreak; 324 u32 max_mtu; 325 326 u32 num_io_queues; 327 u32 max_num_io_queues; 328 329 int msix_vecs; 330 331 u32 missing_tx_completion_threshold; 332 333 u32 requested_tx_ring_size; 334 u32 requested_rx_ring_size; 335 336 u32 max_tx_ring_size; 337 u32 max_rx_ring_size; 338 339 u32 msg_enable; 340 341 /* large_llq_header_enabled is used for two purposes: 342 * 1. Indicates that large LLQ has been requested. 343 * 2. Indicates whether large LLQ is set or not after device 344 * initialization / configuration. 345 */ 346 bool large_llq_header_enabled; 347 bool large_llq_header_supported; 348 349 u16 max_tx_sgl_size; 350 u16 max_rx_sgl_size; 351 352 u8 mac_addr[ETH_ALEN]; 353 354 unsigned long keep_alive_timeout; 355 unsigned long missing_tx_completion_to; 356 357 char name[ENA_NAME_MAX_LEN]; 358 359 unsigned long flags; 360 /* TX */ 361 struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES] 362 ____cacheline_aligned_in_smp; 363 364 /* RX */ 365 struct ena_ring rx_ring[ENA_MAX_NUM_IO_QUEUES] 366 ____cacheline_aligned_in_smp; 367 368 struct ena_napi ena_napi[ENA_MAX_NUM_IO_QUEUES]; 369 370 struct ena_irq irq_tbl[ENA_MAX_MSIX_VEC(ENA_MAX_NUM_IO_QUEUES)]; 371 372 /* timer service */ 373 struct work_struct reset_task; 374 struct timer_list timer_service; 375 376 bool wd_state; 377 bool dev_up_before_reset; 378 bool disable_meta_caching; 379 unsigned long last_keep_alive_jiffies; 380 381 struct u64_stats_sync syncp; 382 struct ena_stats_dev dev_stats; 383 struct ena_admin_eni_stats eni_stats; 384 385 /* last queue index that was checked for uncompleted tx packets */ 386 u32 last_monitored_tx_qid; 387 388 enum ena_regs_reset_reason_types reset_reason; 389 390 struct bpf_prog *xdp_bpf_prog; 391 u32 xdp_first_ring; 392 u32 xdp_num_queues; 393 }; 394 395 void ena_set_ethtool_ops(struct net_device *netdev); 396 397 void ena_dump_stats_to_dmesg(struct ena_adapter *adapter); 398 399 void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf); 400 401 int ena_update_hw_stats(struct ena_adapter *adapter); 402 403 int ena_update_queue_params(struct ena_adapter *adapter, 404 u32 new_tx_size, 405 u32 new_rx_size, 406 u32 new_llq_header_len); 407 408 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count); 409 410 int ena_set_rx_copybreak(struct ena_adapter *adapter, u32 rx_copybreak); 411 412 int ena_get_sset_count(struct net_device *netdev, int sset); 413 414 static inline void ena_reset_device(struct ena_adapter *adapter, 415 enum ena_regs_reset_reason_types reset_reason) 416 { 417 adapter->reset_reason = reset_reason; 418 /* Make sure reset reason is set before triggering the reset */ 419 smp_mb__before_atomic(); 420 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 421 } 422 423 enum ena_xdp_errors_t { 424 ENA_XDP_ALLOWED = 0, 425 ENA_XDP_CURRENT_MTU_TOO_LARGE, 426 ENA_XDP_NO_ENOUGH_QUEUES, 427 }; 428 429 enum ENA_XDP_ACTIONS { 430 ENA_XDP_PASS = 0, 431 ENA_XDP_TX = BIT(0), 432 ENA_XDP_REDIRECT = BIT(1), 433 ENA_XDP_DROP = BIT(2) 434 }; 435 436 #define ENA_XDP_FORWARDED (ENA_XDP_TX | ENA_XDP_REDIRECT) 437 438 static inline bool ena_xdp_present(struct ena_adapter *adapter) 439 { 440 return !!adapter->xdp_bpf_prog; 441 } 442 443 static inline bool ena_xdp_present_ring(struct ena_ring *ring) 444 { 445 return !!ring->xdp_bpf_prog; 446 } 447 448 static inline bool ena_xdp_legal_queue_count(struct ena_adapter *adapter, 449 u32 queues) 450 { 451 return 2 * queues <= adapter->max_num_io_queues; 452 } 453 454 static inline enum ena_xdp_errors_t ena_xdp_allowed(struct ena_adapter *adapter) 455 { 456 enum ena_xdp_errors_t rc = ENA_XDP_ALLOWED; 457 458 if (adapter->netdev->mtu > ENA_XDP_MAX_MTU) 459 rc = ENA_XDP_CURRENT_MTU_TOO_LARGE; 460 else if (!ena_xdp_legal_queue_count(adapter, adapter->num_io_queues)) 461 rc = ENA_XDP_NO_ENOUGH_QUEUES; 462 463 return rc; 464 } 465 466 #endif /* !(ENA_H) */ 467