1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2 /* 3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #ifndef ENA_H 7 #define ENA_H 8 9 #include <linux/bitops.h> 10 #include <linux/dim.h> 11 #include <linux/etherdevice.h> 12 #include <linux/if_vlan.h> 13 #include <linux/inetdevice.h> 14 #include <linux/interrupt.h> 15 #include <linux/netdevice.h> 16 #include <linux/skbuff.h> 17 #include <net/xdp.h> 18 #include <uapi/linux/bpf.h> 19 20 #include "ena_com.h" 21 #include "ena_eth_com.h" 22 23 #define DRV_MODULE_GEN_MAJOR 2 24 #define DRV_MODULE_GEN_MINOR 1 25 #define DRV_MODULE_GEN_SUBMINOR 0 26 27 #define DRV_MODULE_NAME "ena" 28 29 #define DEVICE_NAME "Elastic Network Adapter (ENA)" 30 31 /* 1 for AENQ + ADMIN */ 32 #define ENA_ADMIN_MSIX_VEC 1 33 #define ENA_MAX_MSIX_VEC(io_queues) (ENA_ADMIN_MSIX_VEC + (io_queues)) 34 35 /* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the 36 * driver passes 0. 37 * Since the max packet size the ENA handles is ~9kB limit the buffer length to 38 * 16kB. 39 */ 40 #if PAGE_SIZE > SZ_16K 41 #define ENA_PAGE_SIZE (_AC(SZ_16K, UL)) 42 #else 43 #define ENA_PAGE_SIZE PAGE_SIZE 44 #endif 45 46 #define ENA_MIN_MSIX_VEC 2 47 48 #define ENA_REG_BAR 0 49 #define ENA_MEM_BAR 2 50 #define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR)) 51 52 #define ENA_DEFAULT_RING_SIZE (1024) 53 #define ENA_MIN_RING_SIZE (256) 54 55 #define ENA_MIN_RX_BUF_SIZE (2048) 56 57 #define ENA_MIN_NUM_IO_QUEUES (1) 58 59 #define ENA_TX_WAKEUP_THRESH (MAX_SKB_FRAGS + 2) 60 #define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN) 61 62 #define ENA_MIN_MTU 128 63 64 #define ENA_NAME_MAX_LEN 20 65 #define ENA_IRQNAME_SIZE 40 66 67 #define ENA_PKT_MAX_BUFS 19 68 69 #define ENA_RX_RSS_TABLE_LOG_SIZE 7 70 #define ENA_RX_RSS_TABLE_SIZE (1 << ENA_RX_RSS_TABLE_LOG_SIZE) 71 72 /* The number of tx packet completions that will be handled each NAPI poll 73 * cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER. 74 */ 75 #define ENA_TX_POLL_BUDGET_DIVIDER 4 76 77 /* Refill Rx queue when number of required descriptors is above 78 * QUEUE_SIZE / ENA_RX_REFILL_THRESH_DIVIDER or ENA_RX_REFILL_THRESH_PACKET 79 */ 80 #define ENA_RX_REFILL_THRESH_DIVIDER 8 81 #define ENA_RX_REFILL_THRESH_PACKET 256 82 83 /* Number of queues to check for missing queues per timer service */ 84 #define ENA_MONITORED_TX_QUEUES 4 85 /* Max timeout packets before device reset */ 86 #define MAX_NUM_OF_TIMEOUTED_PACKETS 128 87 88 #define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1)) 89 90 #define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1)) 91 #define ENA_RX_RING_IDX_ADD(idx, n, ring_size) \ 92 (((idx) + (n)) & ((ring_size) - 1)) 93 94 #define ENA_IO_TXQ_IDX(q) (2 * (q)) 95 #define ENA_IO_RXQ_IDX(q) (2 * (q) + 1) 96 #define ENA_IO_TXQ_IDX_TO_COMBINED_IDX(q) ((q) / 2) 97 #define ENA_IO_RXQ_IDX_TO_COMBINED_IDX(q) (((q) - 1) / 2) 98 99 #define ENA_MGMNT_IRQ_IDX 0 100 #define ENA_IO_IRQ_FIRST_IDX 1 101 #define ENA_IO_IRQ_IDX(q) (ENA_IO_IRQ_FIRST_IDX + (q)) 102 103 #define ENA_ADMIN_POLL_DELAY_US 100 104 105 /* ENA device should send keep alive msg every 1 sec. 106 * We wait for 6 sec just to be on the safe side. 107 */ 108 #define ENA_DEVICE_KALIVE_TIMEOUT (6 * HZ) 109 #define ENA_MAX_NO_INTERRUPT_ITERATIONS 3 110 111 #define ENA_MMIO_DISABLE_REG_READ BIT(0) 112 113 struct ena_irq { 114 irq_handler_t handler; 115 void *data; 116 int cpu; 117 u32 vector; 118 cpumask_t affinity_hint_mask; 119 char name[ENA_IRQNAME_SIZE]; 120 }; 121 122 struct ena_napi { 123 u8 first_interrupt ____cacheline_aligned; 124 u8 interrupts_masked; 125 struct napi_struct napi; 126 struct ena_ring *tx_ring; 127 struct ena_ring *rx_ring; 128 u32 qid; 129 struct dim dim; 130 }; 131 132 struct ena_tx_buffer { 133 struct sk_buff *skb; 134 /* num of ena desc for this specific skb 135 * (includes data desc and metadata desc) 136 */ 137 u32 tx_descs; 138 /* num of buffers used by this skb */ 139 u32 num_of_bufs; 140 141 /* XDP buffer structure which is used for sending packets in 142 * the xdp queues 143 */ 144 struct xdp_frame *xdpf; 145 146 /* Indicate if bufs[0] map the linear data of the skb. */ 147 u8 map_linear_data; 148 149 /* Used for detect missing tx packets to limit the number of prints */ 150 u32 print_once; 151 /* Save the last jiffies to detect missing tx packets 152 * 153 * sets to non zero value on ena_start_xmit and set to zero on 154 * napi and timer_Service_routine. 155 * 156 * while this value is not protected by lock, 157 * a given packet is not expected to be handled by ena_start_xmit 158 * and by napi/timer_service at the same time. 159 */ 160 unsigned long last_jiffies; 161 struct ena_com_buf bufs[ENA_PKT_MAX_BUFS]; 162 } ____cacheline_aligned; 163 164 struct ena_rx_buffer { 165 struct sk_buff *skb; 166 struct page *page; 167 dma_addr_t dma_addr; 168 u32 page_offset; 169 u32 buf_offset; 170 struct ena_com_buf ena_buf; 171 } ____cacheline_aligned; 172 173 struct ena_stats_tx { 174 u64 cnt; 175 u64 bytes; 176 u64 queue_stop; 177 u64 prepare_ctx_err; 178 u64 queue_wakeup; 179 u64 dma_mapping_err; 180 u64 linearize; 181 u64 linearize_failed; 182 u64 napi_comp; 183 u64 tx_poll; 184 u64 doorbells; 185 u64 bad_req_id; 186 u64 llq_buffer_copy; 187 u64 missed_tx; 188 u64 unmask_interrupt; 189 u64 last_napi_jiffies; 190 }; 191 192 struct ena_stats_rx { 193 u64 cnt; 194 u64 bytes; 195 u64 rx_copybreak_pkt; 196 u64 csum_good; 197 u64 refil_partial; 198 u64 csum_bad; 199 u64 page_alloc_fail; 200 u64 skb_alloc_fail; 201 u64 dma_mapping_err; 202 u64 bad_desc_num; 203 u64 bad_req_id; 204 u64 empty_rx_ring; 205 u64 csum_unchecked; 206 u64 xdp_aborted; 207 u64 xdp_drop; 208 u64 xdp_pass; 209 u64 xdp_tx; 210 u64 xdp_invalid; 211 u64 xdp_redirect; 212 }; 213 214 struct ena_ring { 215 /* Holds the empty requests for TX/RX 216 * out of order completions 217 */ 218 u16 *free_ids; 219 220 union { 221 struct ena_tx_buffer *tx_buffer_info; 222 struct ena_rx_buffer *rx_buffer_info; 223 }; 224 225 /* cache ptr to avoid using the adapter */ 226 struct device *dev; 227 struct pci_dev *pdev; 228 struct napi_struct *napi; 229 struct net_device *netdev; 230 struct ena_com_dev *ena_dev; 231 struct ena_adapter *adapter; 232 struct ena_com_io_cq *ena_com_io_cq; 233 struct ena_com_io_sq *ena_com_io_sq; 234 struct bpf_prog *xdp_bpf_prog; 235 struct xdp_rxq_info xdp_rxq; 236 spinlock_t xdp_tx_lock; /* synchronize XDP TX/Redirect traffic */ 237 /* Used for rx queues only to point to the xdp tx ring, to 238 * which traffic should be redirected from this rx ring. 239 */ 240 struct ena_ring *xdp_ring; 241 242 u16 next_to_use; 243 u16 next_to_clean; 244 u16 rx_copybreak; 245 u16 rx_headroom; 246 u16 qid; 247 u16 mtu; 248 u16 sgl_size; 249 250 /* The maximum header length the device can handle */ 251 u8 tx_max_header_size; 252 253 bool disable_meta_caching; 254 u16 no_interrupt_event_cnt; 255 256 /* cpu and NUMA for TPH */ 257 int cpu; 258 int numa_node; 259 260 /* number of tx/rx_buffer_info's entries */ 261 int ring_size; 262 263 enum ena_admin_placement_policy_type tx_mem_queue_type; 264 265 struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS]; 266 u32 smoothed_interval; 267 u32 per_napi_packets; 268 u16 non_empty_napi_events; 269 struct u64_stats_sync syncp; 270 union { 271 struct ena_stats_tx tx_stats; 272 struct ena_stats_rx rx_stats; 273 }; 274 275 u8 *push_buf_intermediate_buf; 276 int empty_rx_queue; 277 } ____cacheline_aligned; 278 279 struct ena_stats_dev { 280 u64 tx_timeout; 281 u64 suspend; 282 u64 resume; 283 u64 wd_expired; 284 u64 interface_up; 285 u64 interface_down; 286 u64 admin_q_pause; 287 u64 rx_drops; 288 u64 tx_drops; 289 }; 290 291 enum ena_flags_t { 292 ENA_FLAG_DEVICE_RUNNING, 293 ENA_FLAG_DEV_UP, 294 ENA_FLAG_LINK_UP, 295 ENA_FLAG_MSIX_ENABLED, 296 ENA_FLAG_TRIGGER_RESET, 297 ENA_FLAG_ONGOING_RESET 298 }; 299 300 /* adapter specific private data structure */ 301 struct ena_adapter { 302 struct ena_com_dev *ena_dev; 303 /* OS defined structs */ 304 struct net_device *netdev; 305 struct pci_dev *pdev; 306 307 /* rx packets that shorter that this len will be copied to the skb 308 * header 309 */ 310 u32 rx_copybreak; 311 u32 max_mtu; 312 313 u32 num_io_queues; 314 u32 max_num_io_queues; 315 316 int msix_vecs; 317 318 u32 missing_tx_completion_threshold; 319 320 u32 requested_tx_ring_size; 321 u32 requested_rx_ring_size; 322 323 u32 max_tx_ring_size; 324 u32 max_rx_ring_size; 325 326 u32 msg_enable; 327 328 /* large_llq_header_enabled is used for two purposes: 329 * 1. Indicates that large LLQ has been requested. 330 * 2. Indicates whether large LLQ is set or not after device 331 * initialization / configuration. 332 */ 333 bool large_llq_header_enabled; 334 bool large_llq_header_supported; 335 336 u16 max_tx_sgl_size; 337 u16 max_rx_sgl_size; 338 339 u8 mac_addr[ETH_ALEN]; 340 341 unsigned long keep_alive_timeout; 342 unsigned long missing_tx_completion_to; 343 344 char name[ENA_NAME_MAX_LEN]; 345 346 unsigned long flags; 347 /* TX */ 348 struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES] 349 ____cacheline_aligned_in_smp; 350 351 /* RX */ 352 struct ena_ring rx_ring[ENA_MAX_NUM_IO_QUEUES] 353 ____cacheline_aligned_in_smp; 354 355 struct ena_napi ena_napi[ENA_MAX_NUM_IO_QUEUES]; 356 357 struct ena_irq irq_tbl[ENA_MAX_MSIX_VEC(ENA_MAX_NUM_IO_QUEUES)]; 358 359 /* timer service */ 360 struct work_struct reset_task; 361 struct timer_list timer_service; 362 363 bool wd_state; 364 bool dev_up_before_reset; 365 bool disable_meta_caching; 366 unsigned long last_keep_alive_jiffies; 367 368 struct u64_stats_sync syncp; 369 struct ena_stats_dev dev_stats; 370 struct ena_admin_eni_stats eni_stats; 371 372 /* last queue index that was checked for uncompleted tx packets */ 373 u32 last_monitored_tx_qid; 374 375 enum ena_regs_reset_reason_types reset_reason; 376 377 struct bpf_prog *xdp_bpf_prog; 378 u32 xdp_first_ring; 379 u32 xdp_num_queues; 380 }; 381 382 void ena_set_ethtool_ops(struct net_device *netdev); 383 384 void ena_dump_stats_to_dmesg(struct ena_adapter *adapter); 385 386 void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf); 387 388 int ena_update_hw_stats(struct ena_adapter *adapter); 389 390 int ena_update_queue_params(struct ena_adapter *adapter, 391 u32 new_tx_size, 392 u32 new_rx_size, 393 u32 new_llq_header_len); 394 395 int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count); 396 397 int ena_set_rx_copybreak(struct ena_adapter *adapter, u32 rx_copybreak); 398 399 int ena_get_sset_count(struct net_device *netdev, int sset); 400 401 static inline void ena_reset_device(struct ena_adapter *adapter, 402 enum ena_regs_reset_reason_types reset_reason) 403 { 404 adapter->reset_reason = reset_reason; 405 /* Make sure reset reason is set before triggering the reset */ 406 smp_mb__before_atomic(); 407 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags); 408 } 409 410 int handle_invalid_req_id(struct ena_ring *ring, u16 req_id, 411 struct ena_tx_buffer *tx_info, bool is_xdp); 412 413 /* Increase a stat by cnt while holding syncp seqlock on 32bit machines */ 414 static inline void ena_increase_stat(u64 *statp, u64 cnt, 415 struct u64_stats_sync *syncp) 416 { 417 u64_stats_update_begin(syncp); 418 (*statp) += cnt; 419 u64_stats_update_end(syncp); 420 } 421 422 static inline void ena_ring_tx_doorbell(struct ena_ring *tx_ring) 423 { 424 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq); 425 ena_increase_stat(&tx_ring->tx_stats.doorbells, 1, &tx_ring->syncp); 426 } 427 428 int ena_xmit_common(struct ena_adapter *adapter, 429 struct ena_ring *ring, 430 struct ena_tx_buffer *tx_info, 431 struct ena_com_tx_ctx *ena_tx_ctx, 432 u16 next_to_use, 433 u32 bytes); 434 void ena_unmap_tx_buff(struct ena_ring *tx_ring, 435 struct ena_tx_buffer *tx_info); 436 void ena_init_io_rings(struct ena_adapter *adapter, 437 int first_index, int count); 438 int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter, 439 int first_index, int count); 440 int ena_setup_tx_resources_in_range(struct ena_adapter *adapter, 441 int first_index, int count); 442 void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter, 443 int first_index, int count); 444 void ena_free_all_io_tx_resources(struct ena_adapter *adapter); 445 void ena_down(struct ena_adapter *adapter); 446 int ena_up(struct ena_adapter *adapter); 447 void ena_unmask_interrupt(struct ena_ring *tx_ring, struct ena_ring *rx_ring); 448 void ena_update_ring_numa_node(struct ena_ring *tx_ring, 449 struct ena_ring *rx_ring); 450 #endif /* !(ENA_H) */ 451