1 /* 2 * Copyright 2015 Amazon.com, Inc. or its affiliates. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef ENA_H 34 #define ENA_H 35 36 #include <linux/bitops.h> 37 #include <linux/etherdevice.h> 38 #include <linux/inetdevice.h> 39 #include <linux/interrupt.h> 40 #include <linux/netdevice.h> 41 #include <linux/skbuff.h> 42 43 #include "ena_com.h" 44 #include "ena_eth_com.h" 45 46 #define DRV_MODULE_VER_MAJOR 2 47 #define DRV_MODULE_VER_MINOR 0 48 #define DRV_MODULE_VER_SUBMINOR 3 49 50 #define DRV_MODULE_NAME "ena" 51 #ifndef DRV_MODULE_VERSION 52 #define DRV_MODULE_VERSION \ 53 __stringify(DRV_MODULE_VER_MAJOR) "." \ 54 __stringify(DRV_MODULE_VER_MINOR) "." \ 55 __stringify(DRV_MODULE_VER_SUBMINOR) "K" 56 #endif 57 58 #define DEVICE_NAME "Elastic Network Adapter (ENA)" 59 60 /* 1 for AENQ + ADMIN */ 61 #define ENA_ADMIN_MSIX_VEC 1 62 #define ENA_MAX_MSIX_VEC(io_queues) (ENA_ADMIN_MSIX_VEC + (io_queues)) 63 64 /* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the 65 * driver passes 0. 66 * Since the max packet size the ENA handles is ~9kB limit the buffer length to 67 * 16kB. 68 */ 69 #if PAGE_SIZE > SZ_16K 70 #define ENA_PAGE_SIZE SZ_16K 71 #else 72 #define ENA_PAGE_SIZE PAGE_SIZE 73 #endif 74 75 #define ENA_MIN_MSIX_VEC 2 76 77 #define ENA_REG_BAR 0 78 #define ENA_MEM_BAR 2 79 #define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR)) 80 81 #define ENA_DEFAULT_RING_SIZE (1024) 82 83 #define ENA_TX_WAKEUP_THRESH (MAX_SKB_FRAGS + 2) 84 #define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN) 85 86 /* limit the buffer size to 600 bytes to handle MTU changes from very 87 * small to very large, in which case the number of buffers per packet 88 * could exceed ENA_PKT_MAX_BUFS 89 */ 90 #define ENA_DEFAULT_MIN_RX_BUFF_ALLOC_SIZE 600 91 92 #define ENA_MIN_MTU 128 93 94 #define ENA_NAME_MAX_LEN 20 95 #define ENA_IRQNAME_SIZE 40 96 97 #define ENA_PKT_MAX_BUFS 19 98 99 #define ENA_RX_RSS_TABLE_LOG_SIZE 7 100 #define ENA_RX_RSS_TABLE_SIZE (1 << ENA_RX_RSS_TABLE_LOG_SIZE) 101 102 #define ENA_HASH_KEY_SIZE 40 103 104 /* The number of tx packet completions that will be handled each NAPI poll 105 * cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER. 106 */ 107 #define ENA_TX_POLL_BUDGET_DIVIDER 4 108 109 /* Refill Rx queue when number of required descriptors is above 110 * QUEUE_SIZE / ENA_RX_REFILL_THRESH_DIVIDER or ENA_RX_REFILL_THRESH_PACKET 111 */ 112 #define ENA_RX_REFILL_THRESH_DIVIDER 8 113 #define ENA_RX_REFILL_THRESH_PACKET 256 114 115 /* Number of queues to check for missing queues per timer service */ 116 #define ENA_MONITORED_TX_QUEUES 4 117 /* Max timeout packets before device reset */ 118 #define MAX_NUM_OF_TIMEOUTED_PACKETS 128 119 120 #define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1)) 121 122 #define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1)) 123 #define ENA_RX_RING_IDX_ADD(idx, n, ring_size) \ 124 (((idx) + (n)) & ((ring_size) - 1)) 125 126 #define ENA_IO_TXQ_IDX(q) (2 * (q)) 127 #define ENA_IO_RXQ_IDX(q) (2 * (q) + 1) 128 129 #define ENA_MGMNT_IRQ_IDX 0 130 #define ENA_IO_IRQ_FIRST_IDX 1 131 #define ENA_IO_IRQ_IDX(q) (ENA_IO_IRQ_FIRST_IDX + (q)) 132 133 /* ENA device should send keep alive msg every 1 sec. 134 * We wait for 6 sec just to be on the safe side. 135 */ 136 #define ENA_DEVICE_KALIVE_TIMEOUT (6 * HZ) 137 #define ENA_MAX_NO_INTERRUPT_ITERATIONS 3 138 139 #define ENA_MMIO_DISABLE_REG_READ BIT(0) 140 141 struct ena_irq { 142 irq_handler_t handler; 143 void *data; 144 int cpu; 145 u32 vector; 146 cpumask_t affinity_hint_mask; 147 char name[ENA_IRQNAME_SIZE]; 148 }; 149 150 struct ena_napi { 151 struct napi_struct napi ____cacheline_aligned; 152 struct ena_ring *tx_ring; 153 struct ena_ring *rx_ring; 154 u32 qid; 155 }; 156 157 struct ena_tx_buffer { 158 struct sk_buff *skb; 159 /* num of ena desc for this specific skb 160 * (includes data desc and metadata desc) 161 */ 162 u32 tx_descs; 163 /* num of buffers used by this skb */ 164 u32 num_of_bufs; 165 166 /* Indicate if bufs[0] map the linear data of the skb. */ 167 u8 map_linear_data; 168 169 /* Used for detect missing tx packets to limit the number of prints */ 170 u32 print_once; 171 /* Save the last jiffies to detect missing tx packets 172 * 173 * sets to non zero value on ena_start_xmit and set to zero on 174 * napi and timer_Service_routine. 175 * 176 * while this value is not protected by lock, 177 * a given packet is not expected to be handled by ena_start_xmit 178 * and by napi/timer_service at the same time. 179 */ 180 unsigned long last_jiffies; 181 struct ena_com_buf bufs[ENA_PKT_MAX_BUFS]; 182 } ____cacheline_aligned; 183 184 struct ena_rx_buffer { 185 struct sk_buff *skb; 186 struct page *page; 187 u32 page_offset; 188 struct ena_com_buf ena_buf; 189 } ____cacheline_aligned; 190 191 struct ena_stats_tx { 192 u64 cnt; 193 u64 bytes; 194 u64 queue_stop; 195 u64 prepare_ctx_err; 196 u64 queue_wakeup; 197 u64 dma_mapping_err; 198 u64 linearize; 199 u64 linearize_failed; 200 u64 napi_comp; 201 u64 tx_poll; 202 u64 doorbells; 203 u64 bad_req_id; 204 u64 llq_buffer_copy; 205 u64 missed_tx; 206 }; 207 208 struct ena_stats_rx { 209 u64 cnt; 210 u64 bytes; 211 u64 refil_partial; 212 u64 bad_csum; 213 u64 page_alloc_fail; 214 u64 skb_alloc_fail; 215 u64 dma_mapping_err; 216 u64 bad_desc_num; 217 u64 rx_copybreak_pkt; 218 u64 bad_req_id; 219 u64 empty_rx_ring; 220 u64 csum_unchecked; 221 }; 222 223 struct ena_ring { 224 union { 225 /* Holds the empty requests for TX/RX 226 * out of order completions 227 */ 228 u16 *free_tx_ids; 229 u16 *free_rx_ids; 230 }; 231 232 union { 233 struct ena_tx_buffer *tx_buffer_info; 234 struct ena_rx_buffer *rx_buffer_info; 235 }; 236 237 /* cache ptr to avoid using the adapter */ 238 struct device *dev; 239 struct pci_dev *pdev; 240 struct napi_struct *napi; 241 struct net_device *netdev; 242 struct ena_com_dev *ena_dev; 243 struct ena_adapter *adapter; 244 struct ena_com_io_cq *ena_com_io_cq; 245 struct ena_com_io_sq *ena_com_io_sq; 246 247 u16 next_to_use; 248 u16 next_to_clean; 249 u16 rx_copybreak; 250 u16 qid; 251 u16 mtu; 252 u16 sgl_size; 253 254 /* The maximum header length the device can handle */ 255 u8 tx_max_header_size; 256 257 bool first_interrupt; 258 u16 no_interrupt_event_cnt; 259 260 /* cpu for TPH */ 261 int cpu; 262 /* number of tx/rx_buffer_info's entries */ 263 int ring_size; 264 265 enum ena_admin_placement_policy_type tx_mem_queue_type; 266 267 struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS]; 268 u32 smoothed_interval; 269 u32 per_napi_packets; 270 u32 per_napi_bytes; 271 enum ena_intr_moder_level moder_tbl_idx; 272 struct u64_stats_sync syncp; 273 union { 274 struct ena_stats_tx tx_stats; 275 struct ena_stats_rx rx_stats; 276 }; 277 278 u8 *push_buf_intermediate_buf; 279 int empty_rx_queue; 280 } ____cacheline_aligned; 281 282 struct ena_stats_dev { 283 u64 tx_timeout; 284 u64 suspend; 285 u64 resume; 286 u64 wd_expired; 287 u64 interface_up; 288 u64 interface_down; 289 u64 admin_q_pause; 290 u64 rx_drops; 291 }; 292 293 enum ena_flags_t { 294 ENA_FLAG_DEVICE_RUNNING, 295 ENA_FLAG_DEV_UP, 296 ENA_FLAG_LINK_UP, 297 ENA_FLAG_MSIX_ENABLED, 298 ENA_FLAG_TRIGGER_RESET, 299 ENA_FLAG_ONGOING_RESET 300 }; 301 302 /* adapter specific private data structure */ 303 struct ena_adapter { 304 struct ena_com_dev *ena_dev; 305 /* OS defined structs */ 306 struct net_device *netdev; 307 struct pci_dev *pdev; 308 309 /* rx packets that shorter that this len will be copied to the skb 310 * header 311 */ 312 u32 rx_copybreak; 313 u32 max_mtu; 314 315 int num_queues; 316 317 int msix_vecs; 318 319 u32 missing_tx_completion_threshold; 320 321 u32 tx_usecs, rx_usecs; /* interrupt moderation */ 322 u32 tx_frames, rx_frames; /* interrupt moderation */ 323 324 u32 tx_ring_size; 325 u32 rx_ring_size; 326 327 u32 msg_enable; 328 329 u16 max_tx_sgl_size; 330 u16 max_rx_sgl_size; 331 332 u8 mac_addr[ETH_ALEN]; 333 334 unsigned long keep_alive_timeout; 335 unsigned long missing_tx_completion_to; 336 337 char name[ENA_NAME_MAX_LEN]; 338 339 unsigned long flags; 340 /* TX */ 341 struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES] 342 ____cacheline_aligned_in_smp; 343 344 /* RX */ 345 struct ena_ring rx_ring[ENA_MAX_NUM_IO_QUEUES] 346 ____cacheline_aligned_in_smp; 347 348 struct ena_napi ena_napi[ENA_MAX_NUM_IO_QUEUES]; 349 350 struct ena_irq irq_tbl[ENA_MAX_MSIX_VEC(ENA_MAX_NUM_IO_QUEUES)]; 351 352 /* timer service */ 353 struct work_struct reset_task; 354 struct timer_list timer_service; 355 356 bool wd_state; 357 bool dev_up_before_reset; 358 unsigned long last_keep_alive_jiffies; 359 360 struct u64_stats_sync syncp; 361 struct ena_stats_dev dev_stats; 362 363 /* last queue index that was checked for uncompleted tx packets */ 364 u32 last_monitored_tx_qid; 365 366 enum ena_regs_reset_reason_types reset_reason; 367 }; 368 369 void ena_set_ethtool_ops(struct net_device *netdev); 370 371 void ena_dump_stats_to_dmesg(struct ena_adapter *adapter); 372 373 void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf); 374 375 int ena_get_sset_count(struct net_device *netdev, int sset); 376 377 #endif /* !(ENA_H) */ 378